12874c5fdSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 2a73ccd61SBrandon Streiff /* 3a73ccd61SBrandon Streiff * Marvell 88E6xxx Switch Global 2 Scratch & Misc Registers support 4a73ccd61SBrandon Streiff * 5a73ccd61SBrandon Streiff * Copyright (c) 2008 Marvell Semiconductor 6a73ccd61SBrandon Streiff * 7a73ccd61SBrandon Streiff * Copyright (c) 2017 National Instruments 8a73ccd61SBrandon Streiff * Brandon Streiff <brandon.streiff@ni.com> 9a73ccd61SBrandon Streiff */ 10a73ccd61SBrandon Streiff 11a73ccd61SBrandon Streiff #include "chip.h" 12a73ccd61SBrandon Streiff #include "global2.h" 13a73ccd61SBrandon Streiff 14a73ccd61SBrandon Streiff /* Offset 0x1A: Scratch and Misc. Register */ 15a73ccd61SBrandon Streiff static int mv88e6xxx_g2_scratch_read(struct mv88e6xxx_chip *chip, int reg, 16a73ccd61SBrandon Streiff u8 *data) 17a73ccd61SBrandon Streiff { 18a73ccd61SBrandon Streiff u16 value; 19a73ccd61SBrandon Streiff int err; 20a73ccd61SBrandon Streiff 21a73ccd61SBrandon Streiff err = mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC, 22a73ccd61SBrandon Streiff reg << 8); 23a73ccd61SBrandon Streiff if (err) 24a73ccd61SBrandon Streiff return err; 25a73ccd61SBrandon Streiff 26a73ccd61SBrandon Streiff err = mv88e6xxx_g2_read(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC, &value); 27a73ccd61SBrandon Streiff if (err) 28a73ccd61SBrandon Streiff return err; 29a73ccd61SBrandon Streiff 30a73ccd61SBrandon Streiff *data = (value & MV88E6XXX_G2_SCRATCH_MISC_DATA_MASK); 31a73ccd61SBrandon Streiff 32a73ccd61SBrandon Streiff return 0; 33a73ccd61SBrandon Streiff } 34a73ccd61SBrandon Streiff 35a73ccd61SBrandon Streiff static int mv88e6xxx_g2_scratch_write(struct mv88e6xxx_chip *chip, int reg, 36a73ccd61SBrandon Streiff u8 data) 37a73ccd61SBrandon Streiff { 38a73ccd61SBrandon Streiff u16 value = (reg << 8) | data; 39a73ccd61SBrandon Streiff 40*2ad4da77SVivien Didelot return mv88e6xxx_g2_write(chip, MV88E6XXX_G2_SCRATCH_MISC_MISC, 41*2ad4da77SVivien Didelot MV88E6XXX_G2_SCRATCH_MISC_UPDATE | value); 42a73ccd61SBrandon Streiff } 43a73ccd61SBrandon Streiff 44a73ccd61SBrandon Streiff /** 45a73ccd61SBrandon Streiff * mv88e6xxx_g2_scratch_gpio_get_bit - get a bit 46a73ccd61SBrandon Streiff * @chip: chip private data 47a73ccd61SBrandon Streiff * @nr: bit index 48a73ccd61SBrandon Streiff * @set: is bit set? 49a73ccd61SBrandon Streiff */ 50a73ccd61SBrandon Streiff static int mv88e6xxx_g2_scratch_get_bit(struct mv88e6xxx_chip *chip, 51a73ccd61SBrandon Streiff int base_reg, unsigned int offset, 52a73ccd61SBrandon Streiff int *set) 53a73ccd61SBrandon Streiff { 54a73ccd61SBrandon Streiff int reg = base_reg + (offset / 8); 55a73ccd61SBrandon Streiff u8 mask = (1 << (offset & 0x7)); 56a73ccd61SBrandon Streiff u8 val; 57a73ccd61SBrandon Streiff int err; 58a73ccd61SBrandon Streiff 59a73ccd61SBrandon Streiff err = mv88e6xxx_g2_scratch_read(chip, reg, &val); 60a73ccd61SBrandon Streiff if (err) 61a73ccd61SBrandon Streiff return err; 62a73ccd61SBrandon Streiff 63a73ccd61SBrandon Streiff *set = !!(mask & val); 64a73ccd61SBrandon Streiff 65a73ccd61SBrandon Streiff return 0; 66a73ccd61SBrandon Streiff } 67a73ccd61SBrandon Streiff 68a73ccd61SBrandon Streiff /** 69a73ccd61SBrandon Streiff * mv88e6xxx_g2_scratch_gpio_set_bit - set (or clear) a bit 70a73ccd61SBrandon Streiff * @chip: chip private data 71a73ccd61SBrandon Streiff * @nr: bit index 72a73ccd61SBrandon Streiff * @set: set if true, clear if false 73a73ccd61SBrandon Streiff * 74a73ccd61SBrandon Streiff * Helper function for dealing with the direction and data registers. 75a73ccd61SBrandon Streiff */ 76a73ccd61SBrandon Streiff static int mv88e6xxx_g2_scratch_set_bit(struct mv88e6xxx_chip *chip, 77a73ccd61SBrandon Streiff int base_reg, unsigned int offset, 78a73ccd61SBrandon Streiff int set) 79a73ccd61SBrandon Streiff { 80a73ccd61SBrandon Streiff int reg = base_reg + (offset / 8); 81a73ccd61SBrandon Streiff u8 mask = (1 << (offset & 0x7)); 82a73ccd61SBrandon Streiff u8 val; 83a73ccd61SBrandon Streiff int err; 84a73ccd61SBrandon Streiff 85a73ccd61SBrandon Streiff err = mv88e6xxx_g2_scratch_read(chip, reg, &val); 86a73ccd61SBrandon Streiff if (err) 87a73ccd61SBrandon Streiff return err; 88a73ccd61SBrandon Streiff 89a73ccd61SBrandon Streiff if (set) 90a73ccd61SBrandon Streiff val |= mask; 91a73ccd61SBrandon Streiff else 92a73ccd61SBrandon Streiff val &= ~mask; 93a73ccd61SBrandon Streiff 94a73ccd61SBrandon Streiff return mv88e6xxx_g2_scratch_write(chip, reg, val); 95a73ccd61SBrandon Streiff } 96a73ccd61SBrandon Streiff 97a73ccd61SBrandon Streiff /** 98a73ccd61SBrandon Streiff * mv88e6352_g2_scratch_gpio_get_data - get data on gpio pin 99a73ccd61SBrandon Streiff * @chip: chip private data 100a73ccd61SBrandon Streiff * @pin: gpio index 101a73ccd61SBrandon Streiff * 102a73ccd61SBrandon Streiff * Return: 0 for low, 1 for high, negative error 103a73ccd61SBrandon Streiff */ 104a73ccd61SBrandon Streiff static int mv88e6352_g2_scratch_gpio_get_data(struct mv88e6xxx_chip *chip, 105a73ccd61SBrandon Streiff unsigned int pin) 106a73ccd61SBrandon Streiff { 107a73ccd61SBrandon Streiff int val = 0; 108a73ccd61SBrandon Streiff int err; 109a73ccd61SBrandon Streiff 110a73ccd61SBrandon Streiff err = mv88e6xxx_g2_scratch_get_bit(chip, 111a73ccd61SBrandon Streiff MV88E6352_G2_SCRATCH_GPIO_DATA0, 112a73ccd61SBrandon Streiff pin, &val); 113a73ccd61SBrandon Streiff if (err) 114a73ccd61SBrandon Streiff return err; 115a73ccd61SBrandon Streiff 116a73ccd61SBrandon Streiff return val; 117a73ccd61SBrandon Streiff } 118a73ccd61SBrandon Streiff 119a73ccd61SBrandon Streiff /** 120a73ccd61SBrandon Streiff * mv88e6352_g2_scratch_gpio_set_data - set data on gpio pin 121a73ccd61SBrandon Streiff * @chip: chip private data 122a73ccd61SBrandon Streiff * @pin: gpio index 123a73ccd61SBrandon Streiff * @value: value to set 124a73ccd61SBrandon Streiff */ 125a73ccd61SBrandon Streiff static int mv88e6352_g2_scratch_gpio_set_data(struct mv88e6xxx_chip *chip, 126a73ccd61SBrandon Streiff unsigned int pin, int value) 127a73ccd61SBrandon Streiff { 128a73ccd61SBrandon Streiff u8 mask = (1 << (pin & 0x7)); 129a73ccd61SBrandon Streiff int offset = (pin / 8); 130a73ccd61SBrandon Streiff int reg; 131a73ccd61SBrandon Streiff 132a73ccd61SBrandon Streiff reg = MV88E6352_G2_SCRATCH_GPIO_DATA0 + offset; 133a73ccd61SBrandon Streiff 134a73ccd61SBrandon Streiff if (value) 135a73ccd61SBrandon Streiff chip->gpio_data[offset] |= mask; 136a73ccd61SBrandon Streiff else 137a73ccd61SBrandon Streiff chip->gpio_data[offset] &= ~mask; 138a73ccd61SBrandon Streiff 139a73ccd61SBrandon Streiff return mv88e6xxx_g2_scratch_write(chip, reg, chip->gpio_data[offset]); 140a73ccd61SBrandon Streiff } 141a73ccd61SBrandon Streiff 142a73ccd61SBrandon Streiff /** 143a73ccd61SBrandon Streiff * mv88e6352_g2_scratch_gpio_get_dir - get direction of gpio pin 144a73ccd61SBrandon Streiff * @chip: chip private data 145a73ccd61SBrandon Streiff * @pin: gpio index 146a73ccd61SBrandon Streiff * 147a73ccd61SBrandon Streiff * Return: 0 for output, 1 for input (same as GPIOF_DIR_XXX). 148a73ccd61SBrandon Streiff */ 149a73ccd61SBrandon Streiff static int mv88e6352_g2_scratch_gpio_get_dir(struct mv88e6xxx_chip *chip, 150a73ccd61SBrandon Streiff unsigned int pin) 151a73ccd61SBrandon Streiff { 152a73ccd61SBrandon Streiff int val = 0; 153a73ccd61SBrandon Streiff int err; 154a73ccd61SBrandon Streiff 155a73ccd61SBrandon Streiff err = mv88e6xxx_g2_scratch_get_bit(chip, 156a73ccd61SBrandon Streiff MV88E6352_G2_SCRATCH_GPIO_DIR0, 157a73ccd61SBrandon Streiff pin, &val); 158a73ccd61SBrandon Streiff if (err) 159a73ccd61SBrandon Streiff return err; 160a73ccd61SBrandon Streiff 161a73ccd61SBrandon Streiff return val; 162a73ccd61SBrandon Streiff } 163a73ccd61SBrandon Streiff 164a73ccd61SBrandon Streiff /** 165a73ccd61SBrandon Streiff * mv88e6352_g2_scratch_gpio_set_dir - set direction of gpio pin 166a73ccd61SBrandon Streiff * @chip: chip private data 167a73ccd61SBrandon Streiff * @pin: gpio index 168a73ccd61SBrandon Streiff */ 169a73ccd61SBrandon Streiff static int mv88e6352_g2_scratch_gpio_set_dir(struct mv88e6xxx_chip *chip, 170a73ccd61SBrandon Streiff unsigned int pin, bool input) 171a73ccd61SBrandon Streiff { 172a73ccd61SBrandon Streiff int value = (input ? MV88E6352_G2_SCRATCH_GPIO_DIR_IN : 173a73ccd61SBrandon Streiff MV88E6352_G2_SCRATCH_GPIO_DIR_OUT); 174a73ccd61SBrandon Streiff 175a73ccd61SBrandon Streiff return mv88e6xxx_g2_scratch_set_bit(chip, 176a73ccd61SBrandon Streiff MV88E6352_G2_SCRATCH_GPIO_DIR0, 177a73ccd61SBrandon Streiff pin, value); 178a73ccd61SBrandon Streiff } 179a73ccd61SBrandon Streiff 180a73ccd61SBrandon Streiff /** 181a73ccd61SBrandon Streiff * mv88e6352_g2_scratch_gpio_get_pctl - get pin control setting 182a73ccd61SBrandon Streiff * @chip: chip private data 183a73ccd61SBrandon Streiff * @pin: gpio index 184a73ccd61SBrandon Streiff * @func: function number 185a73ccd61SBrandon Streiff * 186a73ccd61SBrandon Streiff * Note that the function numbers themselves may vary by chipset. 187a73ccd61SBrandon Streiff */ 188a73ccd61SBrandon Streiff static int mv88e6352_g2_scratch_gpio_get_pctl(struct mv88e6xxx_chip *chip, 189a73ccd61SBrandon Streiff unsigned int pin, int *func) 190a73ccd61SBrandon Streiff { 191a73ccd61SBrandon Streiff int reg = MV88E6352_G2_SCRATCH_GPIO_PCTL0 + (pin / 2); 192a73ccd61SBrandon Streiff int offset = (pin & 0x1) ? 4 : 0; 193a73ccd61SBrandon Streiff u8 mask = (0x7 << offset); 194a73ccd61SBrandon Streiff int err; 195a73ccd61SBrandon Streiff u8 val; 196a73ccd61SBrandon Streiff 197a73ccd61SBrandon Streiff err = mv88e6xxx_g2_scratch_read(chip, reg, &val); 198a73ccd61SBrandon Streiff if (err) 199a73ccd61SBrandon Streiff return err; 200a73ccd61SBrandon Streiff 201a73ccd61SBrandon Streiff *func = (val & mask) >> offset; 202a73ccd61SBrandon Streiff 203a73ccd61SBrandon Streiff return 0; 204a73ccd61SBrandon Streiff } 205a73ccd61SBrandon Streiff 206a73ccd61SBrandon Streiff /** 207a73ccd61SBrandon Streiff * mv88e6352_g2_scratch_gpio_set_pctl - set pin control setting 208a73ccd61SBrandon Streiff * @chip: chip private data 209a73ccd61SBrandon Streiff * @pin: gpio index 210a73ccd61SBrandon Streiff * @func: function number 211a73ccd61SBrandon Streiff */ 212a73ccd61SBrandon Streiff static int mv88e6352_g2_scratch_gpio_set_pctl(struct mv88e6xxx_chip *chip, 213a73ccd61SBrandon Streiff unsigned int pin, int func) 214a73ccd61SBrandon Streiff { 215a73ccd61SBrandon Streiff int reg = MV88E6352_G2_SCRATCH_GPIO_PCTL0 + (pin / 2); 216a73ccd61SBrandon Streiff int offset = (pin & 0x1) ? 4 : 0; 217a73ccd61SBrandon Streiff u8 mask = (0x7 << offset); 218a73ccd61SBrandon Streiff int err; 219a73ccd61SBrandon Streiff u8 val; 220a73ccd61SBrandon Streiff 221a73ccd61SBrandon Streiff err = mv88e6xxx_g2_scratch_read(chip, reg, &val); 222a73ccd61SBrandon Streiff if (err) 223a73ccd61SBrandon Streiff return err; 224a73ccd61SBrandon Streiff 225a73ccd61SBrandon Streiff val = (val & ~mask) | ((func & mask) << offset); 226a73ccd61SBrandon Streiff 227a73ccd61SBrandon Streiff return mv88e6xxx_g2_scratch_write(chip, reg, val); 228a73ccd61SBrandon Streiff } 229a73ccd61SBrandon Streiff 230a73ccd61SBrandon Streiff const struct mv88e6xxx_gpio_ops mv88e6352_gpio_ops = { 231a73ccd61SBrandon Streiff .get_data = mv88e6352_g2_scratch_gpio_get_data, 232a73ccd61SBrandon Streiff .set_data = mv88e6352_g2_scratch_gpio_set_data, 233a73ccd61SBrandon Streiff .get_dir = mv88e6352_g2_scratch_gpio_get_dir, 234a73ccd61SBrandon Streiff .set_dir = mv88e6352_g2_scratch_gpio_set_dir, 235a73ccd61SBrandon Streiff .get_pctl = mv88e6352_g2_scratch_gpio_get_pctl, 236a73ccd61SBrandon Streiff .set_pctl = mv88e6352_g2_scratch_gpio_set_pctl, 237a73ccd61SBrandon Streiff }; 2382510babcSAndrew Lunn 2392510babcSAndrew Lunn /** 2402510babcSAndrew Lunn * mv88e6xxx_g2_gpio_set_smi - set gpio muxing for external smi 2412510babcSAndrew Lunn * @chip: chip private data 2422510babcSAndrew Lunn * @external: set mux for external smi, or free for gpio usage 2432510babcSAndrew Lunn * 2442510babcSAndrew Lunn * Some mv88e6xxx models have GPIO pins that may be configured as 2452510babcSAndrew Lunn * an external SMI interface, or they may be made free for other 2462510babcSAndrew Lunn * GPIO uses. 2472510babcSAndrew Lunn */ 2482510babcSAndrew Lunn int mv88e6xxx_g2_scratch_gpio_set_smi(struct mv88e6xxx_chip *chip, 2492510babcSAndrew Lunn bool external) 2502510babcSAndrew Lunn { 2512510babcSAndrew Lunn int misc_cfg = MV88E6352_G2_SCRATCH_MISC_CFG; 2522510babcSAndrew Lunn int config_data1 = MV88E6352_G2_SCRATCH_CONFIG_DATA1; 2532510babcSAndrew Lunn int config_data2 = MV88E6352_G2_SCRATCH_CONFIG_DATA2; 2542510babcSAndrew Lunn bool no_cpu; 2552510babcSAndrew Lunn u8 p0_mode; 2562510babcSAndrew Lunn int err; 2572510babcSAndrew Lunn u8 val; 2582510babcSAndrew Lunn 2592510babcSAndrew Lunn err = mv88e6xxx_g2_scratch_read(chip, config_data2, &val); 2602510babcSAndrew Lunn if (err) 2612510babcSAndrew Lunn return err; 2622510babcSAndrew Lunn 2632510babcSAndrew Lunn p0_mode = val & MV88E6352_G2_SCRATCH_CONFIG_DATA2_P0_MODE_MASK; 2642510babcSAndrew Lunn 2652510babcSAndrew Lunn if (p0_mode == 0x01 || p0_mode == 0x02) 2662510babcSAndrew Lunn return -EBUSY; 2672510babcSAndrew Lunn 2682510babcSAndrew Lunn err = mv88e6xxx_g2_scratch_read(chip, config_data1, &val); 2692510babcSAndrew Lunn if (err) 2702510babcSAndrew Lunn return err; 2712510babcSAndrew Lunn 2722510babcSAndrew Lunn no_cpu = !!(val & MV88E6352_G2_SCRATCH_CONFIG_DATA1_NO_CPU); 2732510babcSAndrew Lunn 2742510babcSAndrew Lunn err = mv88e6xxx_g2_scratch_read(chip, misc_cfg, &val); 2752510babcSAndrew Lunn if (err) 2762510babcSAndrew Lunn return err; 2772510babcSAndrew Lunn 2782510babcSAndrew Lunn /* NO_CPU being 0 inverts the meaning of the bit */ 2792510babcSAndrew Lunn if (!no_cpu) 2802510babcSAndrew Lunn external = !external; 2812510babcSAndrew Lunn 2822510babcSAndrew Lunn if (external) 2832510babcSAndrew Lunn val |= MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; 2842510babcSAndrew Lunn else 2852510babcSAndrew Lunn val &= ~MV88E6352_G2_SCRATCH_MISC_CFG_NORMALSMI; 2862510babcSAndrew Lunn 2872510babcSAndrew Lunn return mv88e6xxx_g2_scratch_write(chip, misc_cfg, val); 2882510babcSAndrew Lunn } 289