1 /* 2 * net/dsa/mv88e6060.c - Driver for Marvell 88e6060 switch chips 3 * Copyright (c) 2008-2009 Marvell Semiconductor 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License as published by 7 * the Free Software Foundation; either version 2 of the License, or 8 * (at your option) any later version. 9 */ 10 11 #include <linux/delay.h> 12 #include <linux/etherdevice.h> 13 #include <linux/jiffies.h> 14 #include <linux/list.h> 15 #include <linux/module.h> 16 #include <linux/netdevice.h> 17 #include <linux/phy.h> 18 #include <net/dsa.h> 19 #include "mv88e6060.h" 20 21 static int reg_read(struct dsa_switch *ds, int addr, int reg) 22 { 23 struct mv88e6060_priv *priv = ds->priv; 24 25 return mdiobus_read_nested(priv->bus, priv->sw_addr + addr, reg); 26 } 27 28 #define REG_READ(addr, reg) \ 29 ({ \ 30 int __ret; \ 31 \ 32 __ret = reg_read(ds, addr, reg); \ 33 if (__ret < 0) \ 34 return __ret; \ 35 __ret; \ 36 }) 37 38 39 static int reg_write(struct dsa_switch *ds, int addr, int reg, u16 val) 40 { 41 struct mv88e6060_priv *priv = ds->priv; 42 43 return mdiobus_write_nested(priv->bus, priv->sw_addr + addr, reg, val); 44 } 45 46 #define REG_WRITE(addr, reg, val) \ 47 ({ \ 48 int __ret; \ 49 \ 50 __ret = reg_write(ds, addr, reg, val); \ 51 if (__ret < 0) \ 52 return __ret; \ 53 }) 54 55 static const char *mv88e6060_get_name(struct mii_bus *bus, int sw_addr) 56 { 57 int ret; 58 59 ret = mdiobus_read(bus, sw_addr + REG_PORT(0), PORT_SWITCH_ID); 60 if (ret >= 0) { 61 if (ret == PORT_SWITCH_ID_6060) 62 return "Marvell 88E6060 (A0)"; 63 if (ret == PORT_SWITCH_ID_6060_R1 || 64 ret == PORT_SWITCH_ID_6060_R2) 65 return "Marvell 88E6060 (B0)"; 66 if ((ret & PORT_SWITCH_ID_6060_MASK) == PORT_SWITCH_ID_6060) 67 return "Marvell 88E6060"; 68 } 69 70 return NULL; 71 } 72 73 static enum dsa_tag_protocol mv88e6060_get_tag_protocol(struct dsa_switch *ds) 74 { 75 return DSA_TAG_PROTO_TRAILER; 76 } 77 78 static const char *mv88e6060_drv_probe(struct device *dsa_dev, 79 struct device *host_dev, int sw_addr, 80 void **_priv) 81 { 82 struct mii_bus *bus = dsa_host_dev_to_mii_bus(host_dev); 83 struct mv88e6060_priv *priv; 84 const char *name; 85 86 name = mv88e6060_get_name(bus, sw_addr); 87 if (name) { 88 priv = devm_kzalloc(dsa_dev, sizeof(*priv), GFP_KERNEL); 89 if (!priv) 90 return NULL; 91 *_priv = priv; 92 priv->bus = bus; 93 priv->sw_addr = sw_addr; 94 } 95 96 return name; 97 } 98 99 static int mv88e6060_switch_reset(struct dsa_switch *ds) 100 { 101 int i; 102 int ret; 103 unsigned long timeout; 104 105 /* Set all ports to the disabled state. */ 106 for (i = 0; i < MV88E6060_PORTS; i++) { 107 ret = REG_READ(REG_PORT(i), PORT_CONTROL); 108 REG_WRITE(REG_PORT(i), PORT_CONTROL, 109 ret & ~PORT_CONTROL_STATE_MASK); 110 } 111 112 /* Wait for transmit queues to drain. */ 113 usleep_range(2000, 4000); 114 115 /* Reset the switch. */ 116 REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL, 117 GLOBAL_ATU_CONTROL_SWRESET | 118 GLOBAL_ATU_CONTROL_ATUSIZE_1024 | 119 GLOBAL_ATU_CONTROL_ATE_AGE_5MIN); 120 121 /* Wait up to one second for reset to complete. */ 122 timeout = jiffies + 1 * HZ; 123 while (time_before(jiffies, timeout)) { 124 ret = REG_READ(REG_GLOBAL, GLOBAL_STATUS); 125 if (ret & GLOBAL_STATUS_INIT_READY) 126 break; 127 128 usleep_range(1000, 2000); 129 } 130 if (time_after(jiffies, timeout)) 131 return -ETIMEDOUT; 132 133 return 0; 134 } 135 136 static int mv88e6060_setup_global(struct dsa_switch *ds) 137 { 138 /* Disable discarding of frames with excessive collisions, 139 * set the maximum frame size to 1536 bytes, and mask all 140 * interrupt sources. 141 */ 142 REG_WRITE(REG_GLOBAL, GLOBAL_CONTROL, GLOBAL_CONTROL_MAX_FRAME_1536); 143 144 /* Enable automatic address learning, set the address 145 * database size to 1024 entries, and set the default aging 146 * time to 5 minutes. 147 */ 148 REG_WRITE(REG_GLOBAL, GLOBAL_ATU_CONTROL, 149 GLOBAL_ATU_CONTROL_ATUSIZE_1024 | 150 GLOBAL_ATU_CONTROL_ATE_AGE_5MIN); 151 152 return 0; 153 } 154 155 static int mv88e6060_setup_port(struct dsa_switch *ds, int p) 156 { 157 int addr = REG_PORT(p); 158 159 /* Do not force flow control, disable Ingress and Egress 160 * Header tagging, disable VLAN tunneling, and set the port 161 * state to Forwarding. Additionally, if this is the CPU 162 * port, enable Ingress and Egress Trailer tagging mode. 163 */ 164 REG_WRITE(addr, PORT_CONTROL, 165 dsa_is_cpu_port(ds, p) ? 166 PORT_CONTROL_TRAILER | 167 PORT_CONTROL_INGRESS_MODE | 168 PORT_CONTROL_STATE_FORWARDING : 169 PORT_CONTROL_STATE_FORWARDING); 170 171 /* Port based VLAN map: give each port its own address 172 * database, allow the CPU port to talk to each of the 'real' 173 * ports, and allow each of the 'real' ports to only talk to 174 * the CPU port. 175 */ 176 REG_WRITE(addr, PORT_VLAN_MAP, 177 ((p & 0xf) << PORT_VLAN_MAP_DBNUM_SHIFT) | 178 (dsa_is_cpu_port(ds, p) ? dsa_user_ports(ds) : 179 BIT(dsa_to_port(ds, p)->cpu_dp->index))); 180 181 /* Port Association Vector: when learning source addresses 182 * of packets, add the address to the address database using 183 * a port bitmap that has only the bit for this port set and 184 * the other bits clear. 185 */ 186 REG_WRITE(addr, PORT_ASSOC_VECTOR, BIT(p)); 187 188 return 0; 189 } 190 191 static int mv88e6060_setup_addr(struct dsa_switch *ds) 192 { 193 u8 addr[ETH_ALEN]; 194 u16 val; 195 196 eth_random_addr(addr); 197 198 val = addr[0] << 8 | addr[1]; 199 200 /* The multicast bit is always transmitted as a zero, so the switch uses 201 * bit 8 for "DiffAddr", where 0 means all ports transmit the same SA. 202 */ 203 val &= 0xfeff; 204 205 REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, val); 206 REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]); 207 REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]); 208 209 return 0; 210 } 211 212 static int mv88e6060_setup(struct dsa_switch *ds) 213 { 214 int ret; 215 int i; 216 217 ret = mv88e6060_switch_reset(ds); 218 if (ret < 0) 219 return ret; 220 221 /* @@@ initialise atu */ 222 223 ret = mv88e6060_setup_global(ds); 224 if (ret < 0) 225 return ret; 226 227 ret = mv88e6060_setup_addr(ds); 228 if (ret < 0) 229 return ret; 230 231 for (i = 0; i < MV88E6060_PORTS; i++) { 232 ret = mv88e6060_setup_port(ds, i); 233 if (ret < 0) 234 return ret; 235 } 236 237 return 0; 238 } 239 240 static int mv88e6060_port_to_phy_addr(int port) 241 { 242 if (port >= 0 && port < MV88E6060_PORTS) 243 return port; 244 return -1; 245 } 246 247 static int mv88e6060_phy_read(struct dsa_switch *ds, int port, int regnum) 248 { 249 int addr; 250 251 addr = mv88e6060_port_to_phy_addr(port); 252 if (addr == -1) 253 return 0xffff; 254 255 return reg_read(ds, addr, regnum); 256 } 257 258 static int 259 mv88e6060_phy_write(struct dsa_switch *ds, int port, int regnum, u16 val) 260 { 261 int addr; 262 263 addr = mv88e6060_port_to_phy_addr(port); 264 if (addr == -1) 265 return 0xffff; 266 267 return reg_write(ds, addr, regnum, val); 268 } 269 270 static const struct dsa_switch_ops mv88e6060_switch_ops = { 271 .get_tag_protocol = mv88e6060_get_tag_protocol, 272 .probe = mv88e6060_drv_probe, 273 .setup = mv88e6060_setup, 274 .phy_read = mv88e6060_phy_read, 275 .phy_write = mv88e6060_phy_write, 276 }; 277 278 static struct dsa_switch_driver mv88e6060_switch_drv = { 279 .ops = &mv88e6060_switch_ops, 280 }; 281 282 static int __init mv88e6060_init(void) 283 { 284 register_switch_driver(&mv88e6060_switch_drv); 285 return 0; 286 } 287 module_init(mv88e6060_init); 288 289 static void __exit mv88e6060_cleanup(void) 290 { 291 unregister_switch_driver(&mv88e6060_switch_drv); 292 } 293 module_exit(mv88e6060_cleanup); 294 295 MODULE_AUTHOR("Lennert Buytenhek <buytenh@wantstofly.org>"); 296 MODULE_DESCRIPTION("Driver for Marvell 88E6060 ethernet switch chip"); 297 MODULE_LICENSE("GPL"); 298 MODULE_ALIAS("platform:mv88e6060"); 299