xref: /linux/drivers/net/dsa/microchip/ksz_common.h (revision 704fd176204577459beadb37d46e164d376fabc3)
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /* Microchip switch driver common header
3  *
4  * Copyright (C) 2017-2019 Microchip Technology Inc.
5  */
6 
7 #ifndef __KSZ_COMMON_H
8 #define __KSZ_COMMON_H
9 
10 #include <linux/etherdevice.h>
11 #include <linux/kernel.h>
12 #include <linux/mutex.h>
13 #include <linux/phy.h>
14 #include <linux/regmap.h>
15 #include <net/dsa.h>
16 
17 struct vlan_table {
18 	u32 table[3];
19 };
20 
21 struct ksz_port_mib {
22 	struct mutex cnt_mutex;		/* structure access */
23 	u8 cnt_ptr;
24 	u64 *counters;
25 	struct rtnl_link_stats64 stats64;
26 	struct spinlock stats64_lock;
27 };
28 
29 struct ksz_port {
30 	bool remove_tag;		/* Remove Tag flag set, for ksz8795 only */
31 	int stp_state;
32 	struct phy_device phydev;
33 
34 	u32 on:1;			/* port is not disabled by hardware */
35 	u32 phy:1;			/* port has a PHY */
36 	u32 fiber:1;			/* port is fiber */
37 	u32 sgmii:1;			/* port is SGMII */
38 	u32 force:1;
39 	u32 read:1;			/* read MIB counters in background */
40 	u32 freeze:1;			/* MIB counter freeze is enabled */
41 
42 	struct ksz_port_mib mib;
43 	phy_interface_t interface;
44 	u16 max_frame;
45 };
46 
47 struct ksz_device {
48 	struct dsa_switch *ds;
49 	struct ksz_platform_data *pdata;
50 	const char *name;
51 
52 	struct mutex dev_mutex;		/* device access */
53 	struct mutex regmap_mutex;	/* regmap access */
54 	struct mutex alu_mutex;		/* ALU access */
55 	struct mutex vlan_mutex;	/* vlan access */
56 	const struct ksz_dev_ops *dev_ops;
57 
58 	struct device *dev;
59 	struct regmap *regmap[3];
60 
61 	void *priv;
62 
63 	struct gpio_desc *reset_gpio;	/* Optional reset GPIO */
64 
65 	/* chip specific data */
66 	u32 chip_id;
67 	int num_vlans;
68 	int num_alus;
69 	int num_statics;
70 	int cpu_port;			/* port connected to CPU */
71 	int cpu_ports;			/* port bitmap can be cpu port */
72 	int phy_port_cnt;
73 	int port_cnt;
74 	u8 reg_mib_cnt;
75 	int mib_cnt;
76 	const struct mib_names *mib_names;
77 	phy_interface_t compat_interface;
78 	u32 regs_size;
79 	bool phy_errata_9477;
80 	bool ksz87xx_eee_link_erratum;
81 	bool synclko_125;
82 	bool synclko_disable;
83 
84 	struct vlan_table *vlan_cache;
85 
86 	struct ksz_port *ports;
87 	struct delayed_work mib_read;
88 	unsigned long mib_read_interval;
89 	u16 mirror_rx;
90 	u16 mirror_tx;
91 	u32 features;			/* chip specific features */
92 	u32 overrides;			/* chip functions set by user */
93 	u16 host_mask;
94 	u16 port_mask;
95 };
96 
97 struct alu_struct {
98 	/* entry 1 */
99 	u8	is_static:1;
100 	u8	is_src_filter:1;
101 	u8	is_dst_filter:1;
102 	u8	prio_age:3;
103 	u32	_reserv_0_1:23;
104 	u8	mstp:3;
105 	/* entry 2 */
106 	u8	is_override:1;
107 	u8	is_use_fid:1;
108 	u32	_reserv_1_1:23;
109 	u8	port_forward:7;
110 	/* entry 3 & 4*/
111 	u32	_reserv_2_1:9;
112 	u8	fid:7;
113 	u8	mac[ETH_ALEN];
114 };
115 
116 struct ksz_dev_ops {
117 	u32 (*get_port_addr)(int port, int offset);
118 	void (*cfg_port_member)(struct ksz_device *dev, int port, u8 member);
119 	void (*flush_dyn_mac_table)(struct ksz_device *dev, int port);
120 	void (*port_cleanup)(struct ksz_device *dev, int port);
121 	void (*port_setup)(struct ksz_device *dev, int port, bool cpu_port);
122 	void (*r_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 *val);
123 	void (*w_phy)(struct ksz_device *dev, u16 phy, u16 reg, u16 val);
124 	int (*r_dyn_mac_table)(struct ksz_device *dev, u16 addr, u8 *mac_addr,
125 			       u8 *fid, u8 *src_port, u8 *timestamp,
126 			       u16 *entries);
127 	int (*r_sta_mac_table)(struct ksz_device *dev, u16 addr,
128 			       struct alu_struct *alu);
129 	void (*w_sta_mac_table)(struct ksz_device *dev, u16 addr,
130 				struct alu_struct *alu);
131 	void (*r_mib_cnt)(struct ksz_device *dev, int port, u16 addr,
132 			  u64 *cnt);
133 	void (*r_mib_pkt)(struct ksz_device *dev, int port, u16 addr,
134 			  u64 *dropped, u64 *cnt);
135 	void (*r_mib_stat64)(struct ksz_device *dev, int port);
136 	void (*freeze_mib)(struct ksz_device *dev, int port, bool freeze);
137 	void (*port_init_cnt)(struct ksz_device *dev, int port);
138 	int (*shutdown)(struct ksz_device *dev);
139 	int (*detect)(struct ksz_device *dev);
140 	int (*init)(struct ksz_device *dev);
141 	void (*exit)(struct ksz_device *dev);
142 };
143 
144 struct ksz_device *ksz_switch_alloc(struct device *base, void *priv);
145 int ksz_switch_register(struct ksz_device *dev,
146 			const struct ksz_dev_ops *ops);
147 void ksz_switch_remove(struct ksz_device *dev);
148 
149 int ksz8_switch_register(struct ksz_device *dev);
150 int ksz9477_switch_register(struct ksz_device *dev);
151 
152 void ksz_update_port_member(struct ksz_device *dev, int port);
153 void ksz_init_mib_timer(struct ksz_device *dev);
154 void ksz_r_mib_stats64(struct ksz_device *dev, int port);
155 void ksz_get_stats64(struct dsa_switch *ds, int port,
156 		     struct rtnl_link_stats64 *s);
157 
158 /* Common DSA access functions */
159 
160 int ksz_phy_read16(struct dsa_switch *ds, int addr, int reg);
161 int ksz_phy_write16(struct dsa_switch *ds, int addr, int reg, u16 val);
162 void ksz_mac_link_down(struct dsa_switch *ds, int port, unsigned int mode,
163 		       phy_interface_t interface);
164 int ksz_sset_count(struct dsa_switch *ds, int port, int sset);
165 void ksz_get_ethtool_stats(struct dsa_switch *ds, int port, uint64_t *buf);
166 int ksz_port_bridge_join(struct dsa_switch *ds, int port,
167 			 struct dsa_bridge bridge, bool *tx_fwd_offload,
168 			 struct netlink_ext_ack *extack);
169 void ksz_port_bridge_leave(struct dsa_switch *ds, int port,
170 			   struct dsa_bridge bridge);
171 void ksz_port_stp_state_set(struct dsa_switch *ds, int port,
172 			    u8 state, int reg);
173 void ksz_port_fast_age(struct dsa_switch *ds, int port);
174 int ksz_port_fdb_dump(struct dsa_switch *ds, int port, dsa_fdb_dump_cb_t *cb,
175 		      void *data);
176 int ksz_port_mdb_add(struct dsa_switch *ds, int port,
177 		     const struct switchdev_obj_port_mdb *mdb,
178 		     struct dsa_db db);
179 int ksz_port_mdb_del(struct dsa_switch *ds, int port,
180 		     const struct switchdev_obj_port_mdb *mdb,
181 		     struct dsa_db db);
182 int ksz_enable_port(struct dsa_switch *ds, int port, struct phy_device *phy);
183 
184 /* Common register access functions */
185 
186 static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val)
187 {
188 	unsigned int value;
189 	int ret = regmap_read(dev->regmap[0], reg, &value);
190 
191 	*val = value;
192 	return ret;
193 }
194 
195 static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val)
196 {
197 	unsigned int value;
198 	int ret = regmap_read(dev->regmap[1], reg, &value);
199 
200 	*val = value;
201 	return ret;
202 }
203 
204 static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val)
205 {
206 	unsigned int value;
207 	int ret = regmap_read(dev->regmap[2], reg, &value);
208 
209 	*val = value;
210 	return ret;
211 }
212 
213 static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val)
214 {
215 	u32 value[2];
216 	int ret;
217 
218 	ret = regmap_bulk_read(dev->regmap[2], reg, value, 2);
219 	if (!ret)
220 		*val = (u64)value[0] << 32 | value[1];
221 
222 	return ret;
223 }
224 
225 static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value)
226 {
227 	return regmap_write(dev->regmap[0], reg, value);
228 }
229 
230 static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value)
231 {
232 	return regmap_write(dev->regmap[1], reg, value);
233 }
234 
235 static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value)
236 {
237 	return regmap_write(dev->regmap[2], reg, value);
238 }
239 
240 static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value)
241 {
242 	u32 val[2];
243 
244 	/* Ick! ToDo: Add 64bit R/W to regmap on 32bit systems */
245 	value = swab64(value);
246 	val[0] = swab32(value & 0xffffffffULL);
247 	val[1] = swab32(value >> 32ULL);
248 
249 	return regmap_bulk_write(dev->regmap[2], reg, val, 2);
250 }
251 
252 static inline void ksz_pread8(struct ksz_device *dev, int port, int offset,
253 			      u8 *data)
254 {
255 	ksz_read8(dev, dev->dev_ops->get_port_addr(port, offset), data);
256 }
257 
258 static inline void ksz_pread16(struct ksz_device *dev, int port, int offset,
259 			       u16 *data)
260 {
261 	ksz_read16(dev, dev->dev_ops->get_port_addr(port, offset), data);
262 }
263 
264 static inline void ksz_pread32(struct ksz_device *dev, int port, int offset,
265 			       u32 *data)
266 {
267 	ksz_read32(dev, dev->dev_ops->get_port_addr(port, offset), data);
268 }
269 
270 static inline void ksz_pwrite8(struct ksz_device *dev, int port, int offset,
271 			       u8 data)
272 {
273 	ksz_write8(dev, dev->dev_ops->get_port_addr(port, offset), data);
274 }
275 
276 static inline void ksz_pwrite16(struct ksz_device *dev, int port, int offset,
277 				u16 data)
278 {
279 	ksz_write16(dev, dev->dev_ops->get_port_addr(port, offset), data);
280 }
281 
282 static inline void ksz_pwrite32(struct ksz_device *dev, int port, int offset,
283 				u32 data)
284 {
285 	ksz_write32(dev, dev->dev_ops->get_port_addr(port, offset), data);
286 }
287 
288 static inline void ksz_regmap_lock(void *__mtx)
289 {
290 	struct mutex *mtx = __mtx;
291 	mutex_lock(mtx);
292 }
293 
294 static inline void ksz_regmap_unlock(void *__mtx)
295 {
296 	struct mutex *mtx = __mtx;
297 	mutex_unlock(mtx);
298 }
299 
300 /* STP State Defines */
301 #define PORT_TX_ENABLE			BIT(2)
302 #define PORT_RX_ENABLE			BIT(1)
303 #define PORT_LEARN_DISABLE		BIT(0)
304 
305 /* Regmap tables generation */
306 #define KSZ_SPI_OP_RD		3
307 #define KSZ_SPI_OP_WR		2
308 
309 #define swabnot_used(x)		0
310 
311 #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad)		\
312 	swab##swp((opcode) << ((regbits) + (regpad)))
313 
314 #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign)		\
315 	{								\
316 		.name = #width,						\
317 		.val_bits = (width),					\
318 		.reg_stride = 1,					\
319 		.reg_bits = (regbits) + (regalign),			\
320 		.pad_bits = (regpad),					\
321 		.max_register = BIT(regbits) - 1,			\
322 		.cache_type = REGCACHE_NONE,				\
323 		.read_flag_mask =					\
324 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_RD, swp,	\
325 					     regbits, regpad),		\
326 		.write_flag_mask =					\
327 			KSZ_SPI_OP_FLAG_MASK(KSZ_SPI_OP_WR, swp,	\
328 					     regbits, regpad),		\
329 		.lock = ksz_regmap_lock,				\
330 		.unlock = ksz_regmap_unlock,				\
331 		.reg_format_endian = REGMAP_ENDIAN_BIG,			\
332 		.val_format_endian = REGMAP_ENDIAN_BIG			\
333 	}
334 
335 #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign)		\
336 	static const struct regmap_config ksz##_regmap_config[] = {	\
337 		KSZ_REGMAP_ENTRY(8, swp, (regbits), (regpad), (regalign)), \
338 		KSZ_REGMAP_ENTRY(16, swp, (regbits), (regpad), (regalign)), \
339 		KSZ_REGMAP_ENTRY(32, swp, (regbits), (regpad), (regalign)), \
340 	}
341 
342 #endif
343