1 /* 2 * sja1000.c - Philips SJA1000 network device driver 3 * 4 * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33, 5 * 38106 Braunschweig, GERMANY 6 * 7 * Copyright (c) 2002-2007 Volkswagen Group Electronic Research 8 * All rights reserved. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. Neither the name of Volkswagen nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * Alternatively, provided that this notice is retained in full, this 23 * software may be distributed under the terms of the GNU General 24 * Public License ("GPL") version 2, in which case the provisions of the 25 * GPL apply INSTEAD OF those given above. 26 * 27 * The provided data structures and external interfaces from this code 28 * are not restricted to be used by modules with a GPL compatible license. 29 * 30 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 31 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 32 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 33 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 34 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 35 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 36 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 37 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 38 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 39 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 40 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH 41 * DAMAGE. 42 * 43 */ 44 45 #include <linux/module.h> 46 #include <linux/init.h> 47 #include <linux/kernel.h> 48 #include <linux/sched.h> 49 #include <linux/types.h> 50 #include <linux/fcntl.h> 51 #include <linux/interrupt.h> 52 #include <linux/ptrace.h> 53 #include <linux/string.h> 54 #include <linux/errno.h> 55 #include <linux/ethtool.h> 56 #include <linux/netdevice.h> 57 #include <linux/if_arp.h> 58 #include <linux/if_ether.h> 59 #include <linux/skbuff.h> 60 #include <linux/delay.h> 61 62 #include <linux/can/dev.h> 63 #include <linux/can/error.h> 64 65 #include "sja1000.h" 66 67 #define DRV_NAME "sja1000" 68 69 MODULE_AUTHOR("Oliver Hartkopp <oliver.hartkopp@volkswagen.de>"); 70 MODULE_LICENSE("Dual BSD/GPL"); 71 MODULE_DESCRIPTION(DRV_NAME "CAN netdevice driver"); 72 73 static const struct can_bittiming_const sja1000_bittiming_const = { 74 .name = DRV_NAME, 75 .tseg1_min = 1, 76 .tseg1_max = 16, 77 .tseg2_min = 1, 78 .tseg2_max = 8, 79 .sjw_max = 4, 80 .brp_min = 1, 81 .brp_max = 64, 82 .brp_inc = 1, 83 }; 84 85 static void sja1000_write_cmdreg(struct sja1000_priv *priv, u8 val) 86 { 87 unsigned long flags; 88 89 /* 90 * The command register needs some locking and time to settle 91 * the write_reg() operation - especially on SMP systems. 92 */ 93 spin_lock_irqsave(&priv->cmdreg_lock, flags); 94 priv->write_reg(priv, SJA1000_CMR, val); 95 priv->read_reg(priv, SJA1000_SR); 96 spin_unlock_irqrestore(&priv->cmdreg_lock, flags); 97 } 98 99 static int sja1000_is_absent(struct sja1000_priv *priv) 100 { 101 return (priv->read_reg(priv, SJA1000_MOD) == 0xFF); 102 } 103 104 static int sja1000_probe_chip(struct net_device *dev) 105 { 106 struct sja1000_priv *priv = netdev_priv(dev); 107 108 if (priv->reg_base && sja1000_is_absent(priv)) { 109 netdev_err(dev, "probing failed\n"); 110 return 0; 111 } 112 return -1; 113 } 114 115 static void set_reset_mode(struct net_device *dev) 116 { 117 struct sja1000_priv *priv = netdev_priv(dev); 118 unsigned char status = priv->read_reg(priv, SJA1000_MOD); 119 int i; 120 121 /* disable interrupts */ 122 priv->write_reg(priv, SJA1000_IER, IRQ_OFF); 123 124 for (i = 0; i < 100; i++) { 125 /* check reset bit */ 126 if (status & MOD_RM) { 127 priv->can.state = CAN_STATE_STOPPED; 128 return; 129 } 130 131 /* reset chip */ 132 priv->write_reg(priv, SJA1000_MOD, MOD_RM); 133 udelay(10); 134 status = priv->read_reg(priv, SJA1000_MOD); 135 } 136 137 netdev_err(dev, "setting SJA1000 into reset mode failed!\n"); 138 } 139 140 static void set_normal_mode(struct net_device *dev) 141 { 142 struct sja1000_priv *priv = netdev_priv(dev); 143 unsigned char status = priv->read_reg(priv, SJA1000_MOD); 144 u8 mod_reg_val = 0x00; 145 int i; 146 147 for (i = 0; i < 100; i++) { 148 /* check reset bit */ 149 if ((status & MOD_RM) == 0) { 150 priv->can.state = CAN_STATE_ERROR_ACTIVE; 151 /* enable interrupts */ 152 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) 153 priv->write_reg(priv, SJA1000_IER, IRQ_ALL); 154 else 155 priv->write_reg(priv, SJA1000_IER, 156 IRQ_ALL & ~IRQ_BEI); 157 return; 158 } 159 160 /* set chip to normal mode */ 161 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY) 162 mod_reg_val |= MOD_LOM; 163 if (priv->can.ctrlmode & CAN_CTRLMODE_PRESUME_ACK) 164 mod_reg_val |= MOD_STM; 165 priv->write_reg(priv, SJA1000_MOD, mod_reg_val); 166 167 udelay(10); 168 169 status = priv->read_reg(priv, SJA1000_MOD); 170 } 171 172 netdev_err(dev, "setting SJA1000 into normal mode failed!\n"); 173 } 174 175 /* 176 * initialize SJA1000 chip: 177 * - reset chip 178 * - set output mode 179 * - set baudrate 180 * - enable interrupts 181 * - start operating mode 182 */ 183 static void chipset_init(struct net_device *dev) 184 { 185 struct sja1000_priv *priv = netdev_priv(dev); 186 187 if (!(priv->flags & SJA1000_QUIRK_NO_CDR_REG)) 188 /* set clock divider and output control register */ 189 priv->write_reg(priv, SJA1000_CDR, priv->cdr | CDR_PELICAN); 190 191 /* set acceptance filter (accept all) */ 192 priv->write_reg(priv, SJA1000_ACCC0, 0x00); 193 priv->write_reg(priv, SJA1000_ACCC1, 0x00); 194 priv->write_reg(priv, SJA1000_ACCC2, 0x00); 195 priv->write_reg(priv, SJA1000_ACCC3, 0x00); 196 197 priv->write_reg(priv, SJA1000_ACCM0, 0xFF); 198 priv->write_reg(priv, SJA1000_ACCM1, 0xFF); 199 priv->write_reg(priv, SJA1000_ACCM2, 0xFF); 200 priv->write_reg(priv, SJA1000_ACCM3, 0xFF); 201 202 priv->write_reg(priv, SJA1000_OCR, priv->ocr | OCR_MODE_NORMAL); 203 } 204 205 static void sja1000_start(struct net_device *dev) 206 { 207 struct sja1000_priv *priv = netdev_priv(dev); 208 209 /* enter reset mode */ 210 if (priv->can.state != CAN_STATE_STOPPED) 211 set_reset_mode(dev); 212 213 /* Initialize chip if uninitialized at this stage */ 214 if (!(priv->flags & SJA1000_QUIRK_NO_CDR_REG || 215 priv->read_reg(priv, SJA1000_CDR) & CDR_PELICAN)) 216 chipset_init(dev); 217 218 /* Clear error counters and error code capture */ 219 priv->write_reg(priv, SJA1000_TXERR, 0x0); 220 priv->write_reg(priv, SJA1000_RXERR, 0x0); 221 priv->read_reg(priv, SJA1000_ECC); 222 223 /* clear interrupt flags */ 224 priv->read_reg(priv, SJA1000_IR); 225 226 /* leave reset mode */ 227 set_normal_mode(dev); 228 } 229 230 static int sja1000_set_mode(struct net_device *dev, enum can_mode mode) 231 { 232 switch (mode) { 233 case CAN_MODE_START: 234 sja1000_start(dev); 235 if (netif_queue_stopped(dev)) 236 netif_wake_queue(dev); 237 break; 238 239 default: 240 return -EOPNOTSUPP; 241 } 242 243 return 0; 244 } 245 246 static int sja1000_set_bittiming(struct net_device *dev) 247 { 248 struct sja1000_priv *priv = netdev_priv(dev); 249 struct can_bittiming *bt = &priv->can.bittiming; 250 u8 btr0, btr1; 251 252 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6); 253 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) | 254 (((bt->phase_seg2 - 1) & 0x7) << 4); 255 if (priv->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES) 256 btr1 |= 0x80; 257 258 netdev_info(dev, "setting BTR0=0x%02x BTR1=0x%02x\n", btr0, btr1); 259 260 priv->write_reg(priv, SJA1000_BTR0, btr0); 261 priv->write_reg(priv, SJA1000_BTR1, btr1); 262 263 return 0; 264 } 265 266 static int sja1000_get_berr_counter(const struct net_device *dev, 267 struct can_berr_counter *bec) 268 { 269 struct sja1000_priv *priv = netdev_priv(dev); 270 271 bec->txerr = priv->read_reg(priv, SJA1000_TXERR); 272 bec->rxerr = priv->read_reg(priv, SJA1000_RXERR); 273 274 return 0; 275 } 276 277 /* 278 * transmit a CAN message 279 * message layout in the sk_buff should be like this: 280 * xx xx xx xx ff ll 00 11 22 33 44 55 66 77 281 * [ can-id ] [flags] [len] [can data (up to 8 bytes] 282 */ 283 static netdev_tx_t sja1000_start_xmit(struct sk_buff *skb, 284 struct net_device *dev) 285 { 286 struct sja1000_priv *priv = netdev_priv(dev); 287 struct can_frame *cf = (struct can_frame *)skb->data; 288 uint8_t fi; 289 canid_t id; 290 uint8_t dreg; 291 u8 cmd_reg_val = 0x00; 292 int i; 293 294 if (can_dev_dropped_skb(dev, skb)) 295 return NETDEV_TX_OK; 296 297 netif_stop_queue(dev); 298 299 fi = can_get_cc_dlc(cf, priv->can.ctrlmode); 300 id = cf->can_id; 301 302 if (id & CAN_RTR_FLAG) 303 fi |= SJA1000_FI_RTR; 304 305 if (id & CAN_EFF_FLAG) { 306 fi |= SJA1000_FI_FF; 307 dreg = SJA1000_EFF_BUF; 308 priv->write_reg(priv, SJA1000_FI, fi); 309 priv->write_reg(priv, SJA1000_ID1, (id & 0x1fe00000) >> 21); 310 priv->write_reg(priv, SJA1000_ID2, (id & 0x001fe000) >> 13); 311 priv->write_reg(priv, SJA1000_ID3, (id & 0x00001fe0) >> 5); 312 priv->write_reg(priv, SJA1000_ID4, (id & 0x0000001f) << 3); 313 } else { 314 dreg = SJA1000_SFF_BUF; 315 priv->write_reg(priv, SJA1000_FI, fi); 316 priv->write_reg(priv, SJA1000_ID1, (id & 0x000007f8) >> 3); 317 priv->write_reg(priv, SJA1000_ID2, (id & 0x00000007) << 5); 318 } 319 320 for (i = 0; i < cf->len; i++) 321 priv->write_reg(priv, dreg++, cf->data[i]); 322 323 can_put_echo_skb(skb, dev, 0, 0); 324 325 if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT) 326 cmd_reg_val |= CMD_AT; 327 328 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) 329 cmd_reg_val |= CMD_SRR; 330 else 331 cmd_reg_val |= CMD_TR; 332 333 sja1000_write_cmdreg(priv, cmd_reg_val); 334 335 return NETDEV_TX_OK; 336 } 337 338 static void sja1000_rx(struct net_device *dev) 339 { 340 struct sja1000_priv *priv = netdev_priv(dev); 341 struct net_device_stats *stats = &dev->stats; 342 struct can_frame *cf; 343 struct sk_buff *skb; 344 uint8_t fi; 345 uint8_t dreg; 346 canid_t id; 347 int i; 348 349 /* create zero'ed CAN frame buffer */ 350 skb = alloc_can_skb(dev, &cf); 351 if (skb == NULL) 352 return; 353 354 fi = priv->read_reg(priv, SJA1000_FI); 355 356 if (fi & SJA1000_FI_FF) { 357 /* extended frame format (EFF) */ 358 dreg = SJA1000_EFF_BUF; 359 id = (priv->read_reg(priv, SJA1000_ID1) << 21) 360 | (priv->read_reg(priv, SJA1000_ID2) << 13) 361 | (priv->read_reg(priv, SJA1000_ID3) << 5) 362 | (priv->read_reg(priv, SJA1000_ID4) >> 3); 363 id |= CAN_EFF_FLAG; 364 } else { 365 /* standard frame format (SFF) */ 366 dreg = SJA1000_SFF_BUF; 367 id = (priv->read_reg(priv, SJA1000_ID1) << 3) 368 | (priv->read_reg(priv, SJA1000_ID2) >> 5); 369 } 370 371 can_frame_set_cc_len(cf, fi & 0x0F, priv->can.ctrlmode); 372 if (fi & SJA1000_FI_RTR) { 373 id |= CAN_RTR_FLAG; 374 } else { 375 for (i = 0; i < cf->len; i++) 376 cf->data[i] = priv->read_reg(priv, dreg++); 377 378 stats->rx_bytes += cf->len; 379 } 380 stats->rx_packets++; 381 382 cf->can_id = id; 383 384 /* release receive buffer */ 385 sja1000_write_cmdreg(priv, CMD_RRB); 386 387 netif_rx(skb); 388 } 389 390 static irqreturn_t sja1000_reset_interrupt(int irq, void *dev_id) 391 { 392 struct net_device *dev = (struct net_device *)dev_id; 393 394 netdev_dbg(dev, "performing a soft reset upon overrun\n"); 395 396 netif_tx_lock(dev); 397 398 can_free_echo_skb(dev, 0, NULL); 399 sja1000_set_mode(dev, CAN_MODE_START); 400 401 netif_tx_unlock(dev); 402 403 return IRQ_HANDLED; 404 } 405 406 static int sja1000_err(struct net_device *dev, uint8_t isrc, uint8_t status) 407 { 408 struct sja1000_priv *priv = netdev_priv(dev); 409 struct net_device_stats *stats = &dev->stats; 410 enum can_state state, rx_state, tx_state; 411 struct can_frame *cf; 412 struct sk_buff *skb; 413 struct can_berr_counter bec; 414 uint8_t ecc, alc; 415 int ret = 0; 416 417 skb = alloc_can_err_skb(dev, &cf); 418 419 sja1000_get_berr_counter(dev, &bec); 420 can_state_get_by_berr_counter(dev, &bec, &tx_state, &rx_state); 421 422 if (status & SR_BS) 423 rx_state = CAN_STATE_BUS_OFF; 424 425 state = max(tx_state, rx_state); 426 427 if (isrc & IRQ_DOI) { 428 /* data overrun interrupt */ 429 netdev_dbg(dev, "data overrun interrupt\n"); 430 if (skb) { 431 cf->can_id |= CAN_ERR_CRTL; 432 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW; 433 } 434 435 stats->rx_over_errors++; 436 stats->rx_errors++; 437 sja1000_write_cmdreg(priv, CMD_CDO); /* clear bit */ 438 439 /* Some controllers needs additional handling upon overrun 440 * condition: the controller may sometimes be totally confused 441 * and refuse any new frame while its buffer is empty. The only 442 * way to re-sync the read vs. write buffer offsets is to 443 * stop any current handling and perform a reset. 444 */ 445 if (priv->flags & SJA1000_QUIRK_RESET_ON_OVERRUN) 446 ret = IRQ_WAKE_THREAD; 447 } 448 if (state != CAN_STATE_BUS_OFF && skb) { 449 cf->can_id |= CAN_ERR_CNT; 450 cf->data[6] = bec.txerr; 451 cf->data[7] = bec.rxerr; 452 } 453 if (isrc & IRQ_BEI) { 454 /* bus error interrupt */ 455 priv->can.can_stats.bus_error++; 456 457 ecc = priv->read_reg(priv, SJA1000_ECC); 458 if (skb) { 459 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 460 461 /* set error type */ 462 switch (ecc & ECC_MASK) { 463 case ECC_BIT: 464 cf->data[2] |= CAN_ERR_PROT_BIT; 465 break; 466 case ECC_FORM: 467 cf->data[2] |= CAN_ERR_PROT_FORM; 468 break; 469 case ECC_STUFF: 470 cf->data[2] |= CAN_ERR_PROT_STUFF; 471 break; 472 default: 473 break; 474 } 475 476 /* set error location */ 477 cf->data[3] = ecc & ECC_SEG; 478 } 479 480 /* Error occurred during transmission? */ 481 if ((ecc & ECC_DIR) == 0) { 482 stats->tx_errors++; 483 if (skb) 484 cf->data[2] |= CAN_ERR_PROT_TX; 485 } else { 486 stats->rx_errors++; 487 } 488 } 489 if (isrc & IRQ_ALI) { 490 /* arbitration lost interrupt */ 491 netdev_dbg(dev, "arbitration lost interrupt\n"); 492 alc = priv->read_reg(priv, SJA1000_ALC); 493 priv->can.can_stats.arbitration_lost++; 494 if (skb) { 495 cf->can_id |= CAN_ERR_LOSTARB; 496 cf->data[0] = alc & 0x1f; 497 } 498 } 499 500 if (state != priv->can.state) { 501 can_change_state(dev, cf, tx_state, rx_state); 502 503 if(state == CAN_STATE_BUS_OFF) 504 can_bus_off(dev); 505 } 506 507 if (!skb) 508 return -ENOMEM; 509 510 netif_rx(skb); 511 512 return ret; 513 } 514 515 irqreturn_t sja1000_interrupt(int irq, void *dev_id) 516 { 517 struct net_device *dev = (struct net_device *)dev_id; 518 struct sja1000_priv *priv = netdev_priv(dev); 519 struct net_device_stats *stats = &dev->stats; 520 uint8_t isrc, status; 521 irqreturn_t ret = 0; 522 int n = 0, err; 523 524 if (priv->pre_irq) 525 priv->pre_irq(priv); 526 527 /* Shared interrupts and IRQ off? */ 528 if (priv->read_reg(priv, SJA1000_IER) == IRQ_OFF) 529 goto out; 530 531 while ((n < SJA1000_MAX_IRQ) && 532 (isrc = priv->read_reg(priv, SJA1000_IR))) { 533 534 status = priv->read_reg(priv, SJA1000_SR); 535 /* check for absent controller due to hw unplug */ 536 if (status == 0xFF && sja1000_is_absent(priv)) 537 goto out; 538 539 if (isrc & IRQ_WUI) 540 netdev_warn(dev, "wakeup interrupt\n"); 541 542 if (isrc & IRQ_TI) { 543 /* transmission buffer released */ 544 if (priv->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT && 545 !(status & SR_TCS)) { 546 stats->tx_errors++; 547 can_free_echo_skb(dev, 0, NULL); 548 } else { 549 /* transmission complete */ 550 stats->tx_bytes += can_get_echo_skb(dev, 0, NULL); 551 stats->tx_packets++; 552 } 553 netif_wake_queue(dev); 554 } 555 if (isrc & IRQ_RI) { 556 /* receive interrupt */ 557 while (status & SR_RBS) { 558 sja1000_rx(dev); 559 status = priv->read_reg(priv, SJA1000_SR); 560 /* check for absent controller */ 561 if (status == 0xFF && sja1000_is_absent(priv)) 562 goto out; 563 } 564 } 565 if (isrc & (IRQ_DOI | IRQ_EI | IRQ_BEI | IRQ_EPI | IRQ_ALI)) { 566 /* error interrupt */ 567 err = sja1000_err(dev, isrc, status); 568 if (err == IRQ_WAKE_THREAD) 569 ret = err; 570 if (err) 571 break; 572 } 573 n++; 574 } 575 out: 576 if (!ret) 577 ret = (n) ? IRQ_HANDLED : IRQ_NONE; 578 579 if (priv->post_irq) 580 priv->post_irq(priv); 581 582 if (n >= SJA1000_MAX_IRQ) 583 netdev_dbg(dev, "%d messages handled in ISR", n); 584 585 return ret; 586 } 587 EXPORT_SYMBOL_GPL(sja1000_interrupt); 588 589 static int sja1000_open(struct net_device *dev) 590 { 591 struct sja1000_priv *priv = netdev_priv(dev); 592 int err; 593 594 /* set chip into reset mode */ 595 set_reset_mode(dev); 596 597 /* common open */ 598 err = open_candev(dev); 599 if (err) 600 return err; 601 602 /* register interrupt handler, if not done by the device driver */ 603 if (!(priv->flags & SJA1000_CUSTOM_IRQ_HANDLER)) { 604 err = request_threaded_irq(dev->irq, sja1000_interrupt, 605 sja1000_reset_interrupt, 606 priv->irq_flags, dev->name, (void *)dev); 607 if (err) { 608 close_candev(dev); 609 return -EAGAIN; 610 } 611 } 612 613 /* init and start chi */ 614 sja1000_start(dev); 615 616 netif_start_queue(dev); 617 618 return 0; 619 } 620 621 static int sja1000_close(struct net_device *dev) 622 { 623 struct sja1000_priv *priv = netdev_priv(dev); 624 625 netif_stop_queue(dev); 626 set_reset_mode(dev); 627 628 if (!(priv->flags & SJA1000_CUSTOM_IRQ_HANDLER)) 629 free_irq(dev->irq, (void *)dev); 630 631 close_candev(dev); 632 633 return 0; 634 } 635 636 struct net_device *alloc_sja1000dev(int sizeof_priv) 637 { 638 struct net_device *dev; 639 struct sja1000_priv *priv; 640 641 dev = alloc_candev(sizeof(struct sja1000_priv) + sizeof_priv, 642 SJA1000_ECHO_SKB_MAX); 643 if (!dev) 644 return NULL; 645 646 priv = netdev_priv(dev); 647 648 priv->dev = dev; 649 priv->can.bittiming_const = &sja1000_bittiming_const; 650 priv->can.do_set_bittiming = sja1000_set_bittiming; 651 priv->can.do_set_mode = sja1000_set_mode; 652 priv->can.do_get_berr_counter = sja1000_get_berr_counter; 653 priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK | 654 CAN_CTRLMODE_LISTENONLY | 655 CAN_CTRLMODE_3_SAMPLES | 656 CAN_CTRLMODE_ONE_SHOT | 657 CAN_CTRLMODE_BERR_REPORTING | 658 CAN_CTRLMODE_PRESUME_ACK | 659 CAN_CTRLMODE_CC_LEN8_DLC; 660 661 spin_lock_init(&priv->cmdreg_lock); 662 663 if (sizeof_priv) 664 priv->priv = (void *)priv + sizeof(struct sja1000_priv); 665 666 return dev; 667 } 668 EXPORT_SYMBOL_GPL(alloc_sja1000dev); 669 670 void free_sja1000dev(struct net_device *dev) 671 { 672 free_candev(dev); 673 } 674 EXPORT_SYMBOL_GPL(free_sja1000dev); 675 676 static const struct net_device_ops sja1000_netdev_ops = { 677 .ndo_open = sja1000_open, 678 .ndo_stop = sja1000_close, 679 .ndo_start_xmit = sja1000_start_xmit, 680 }; 681 682 static const struct ethtool_ops sja1000_ethtool_ops = { 683 .get_ts_info = ethtool_op_get_ts_info, 684 }; 685 686 int register_sja1000dev(struct net_device *dev) 687 { 688 if (!sja1000_probe_chip(dev)) 689 return -ENODEV; 690 691 dev->flags |= IFF_ECHO; /* we support local echo */ 692 dev->netdev_ops = &sja1000_netdev_ops; 693 dev->ethtool_ops = &sja1000_ethtool_ops; 694 695 set_reset_mode(dev); 696 chipset_init(dev); 697 698 return register_candev(dev); 699 } 700 EXPORT_SYMBOL_GPL(register_sja1000dev); 701 702 void unregister_sja1000dev(struct net_device *dev) 703 { 704 set_reset_mode(dev); 705 unregister_candev(dev); 706 } 707 EXPORT_SYMBOL_GPL(unregister_sja1000dev); 708