1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /******************************************************************************* 3 * 4 * CTU CAN FD IP Core 5 * 6 * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU 7 * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded 8 * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU 9 * Copyright (C) 2018-2022 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded 10 * 11 * Project advisors: 12 * Jiri Novak <jnovak@fel.cvut.cz> 13 * Pavel Pisa <pisa@cmp.felk.cvut.cz> 14 * 15 * Department of Measurement (http://meas.fel.cvut.cz/) 16 * Faculty of Electrical Engineering (http://www.fel.cvut.cz) 17 * Czech Technical University (http://www.cvut.cz/) 18 ******************************************************************************/ 19 20 #include <linux/clk.h> 21 #include <linux/errno.h> 22 #include <linux/init.h> 23 #include <linux/bitfield.h> 24 #include <linux/interrupt.h> 25 #include <linux/io.h> 26 #include <linux/kernel.h> 27 #include <linux/module.h> 28 #include <linux/skbuff.h> 29 #include <linux/string.h> 30 #include <linux/types.h> 31 #include <linux/can/error.h> 32 #include <linux/can/led.h> 33 #include <linux/pm_runtime.h> 34 #include <linux/version.h> 35 36 #include "ctucanfd.h" 37 #include "ctucanfd_kregs.h" 38 #include "ctucanfd_kframe.h" 39 40 #ifdef DEBUG 41 #define ctucan_netdev_dbg(ndev, args...) \ 42 netdev_dbg(ndev, args) 43 #else 44 #define ctucan_netdev_dbg(...) do { } while (0) 45 #endif 46 47 #define CTUCANFD_ID 0xCAFD 48 49 /* TX buffer rotation: 50 * - when a buffer transitions to empty state, rotate order and priorities 51 * - if more buffers seem to transition at the same time, rotate by the number of buffers 52 * - it may be assumed that buffers transition to empty state in FIFO order (because we manage 53 * priorities that way) 54 * - at frame filling, do not rotate anything, just increment buffer modulo counter 55 */ 56 57 #define CTUCANFD_FLAG_RX_FFW_BUFFERED 1 58 59 #define CTUCAN_STATE_TO_TEXT_ENTRY(st) \ 60 [st] = #st 61 62 enum ctucan_txtb_status { 63 TXT_NOT_EXIST = 0x0, 64 TXT_RDY = 0x1, 65 TXT_TRAN = 0x2, 66 TXT_ABTP = 0x3, 67 TXT_TOK = 0x4, 68 TXT_ERR = 0x6, 69 TXT_ABT = 0x7, 70 TXT_ETY = 0x8, 71 }; 72 73 enum ctucan_txtb_command { 74 TXT_CMD_SET_EMPTY = 0x01, 75 TXT_CMD_SET_READY = 0x02, 76 TXT_CMD_SET_ABORT = 0x04 77 }; 78 79 static const struct can_bittiming_const ctu_can_fd_bit_timing_max = { 80 .name = "ctu_can_fd", 81 .tseg1_min = 2, 82 .tseg1_max = 190, 83 .tseg2_min = 1, 84 .tseg2_max = 63, 85 .sjw_max = 31, 86 .brp_min = 1, 87 .brp_max = 8, 88 .brp_inc = 1, 89 }; 90 91 static const struct can_bittiming_const ctu_can_fd_bit_timing_data_max = { 92 .name = "ctu_can_fd", 93 .tseg1_min = 2, 94 .tseg1_max = 94, 95 .tseg2_min = 1, 96 .tseg2_max = 31, 97 .sjw_max = 31, 98 .brp_min = 1, 99 .brp_max = 2, 100 .brp_inc = 1, 101 }; 102 103 static const char * const ctucan_state_strings[CAN_STATE_MAX] = { 104 CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_ACTIVE), 105 CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_WARNING), 106 CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_PASSIVE), 107 CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_BUS_OFF), 108 CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_STOPPED), 109 CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_SLEEPING) 110 }; 111 112 static void ctucan_write32_le(struct ctucan_priv *priv, 113 enum ctu_can_fd_can_registers reg, u32 val) 114 { 115 iowrite32(val, priv->mem_base + reg); 116 } 117 118 static void ctucan_write32_be(struct ctucan_priv *priv, 119 enum ctu_can_fd_can_registers reg, u32 val) 120 { 121 iowrite32be(val, priv->mem_base + reg); 122 } 123 124 static u32 ctucan_read32_le(struct ctucan_priv *priv, 125 enum ctu_can_fd_can_registers reg) 126 { 127 return ioread32(priv->mem_base + reg); 128 } 129 130 static u32 ctucan_read32_be(struct ctucan_priv *priv, 131 enum ctu_can_fd_can_registers reg) 132 { 133 return ioread32be(priv->mem_base + reg); 134 } 135 136 static inline void ctucan_write32(struct ctucan_priv *priv, enum ctu_can_fd_can_registers reg, 137 u32 val) 138 { 139 priv->write_reg(priv, reg, val); 140 } 141 142 static inline u32 ctucan_read32(struct ctucan_priv *priv, enum ctu_can_fd_can_registers reg) 143 { 144 return priv->read_reg(priv, reg); 145 } 146 147 static void ctucan_write_txt_buf(struct ctucan_priv *priv, enum ctu_can_fd_can_registers buf_base, 148 u32 offset, u32 val) 149 { 150 priv->write_reg(priv, buf_base + offset, val); 151 } 152 153 #define CTU_CAN_FD_TXTNF(priv) (!!FIELD_GET(REG_STATUS_TXNF, ctucan_read32(priv, CTUCANFD_STATUS))) 154 #define CTU_CAN_FD_ENABLED(priv) (!!FIELD_GET(REG_MODE_ENA, ctucan_read32(priv, CTUCANFD_MODE))) 155 156 /** 157 * ctucan_state_to_str() - Converts CAN controller state code to corresponding text 158 * @state: CAN controller state code 159 * 160 * Return: Pointer to string representation of the error state 161 */ 162 static const char *ctucan_state_to_str(enum can_state state) 163 { 164 const char *txt = NULL; 165 166 if (state >= 0 && state < CAN_STATE_MAX) 167 txt = ctucan_state_strings[state]; 168 return txt ? txt : "UNKNOWN"; 169 } 170 171 /** 172 * ctucan_reset() - Issues software reset request to CTU CAN FD 173 * @ndev: Pointer to net_device structure 174 * 175 * Return: 0 for success, -%ETIMEDOUT if CAN controller does not leave reset 176 */ 177 static int ctucan_reset(struct net_device *ndev) 178 { 179 struct ctucan_priv *priv = netdev_priv(ndev); 180 int i = 100; 181 182 ctucan_netdev_dbg(ndev, "%s\n", __func__); 183 184 ctucan_write32(priv, CTUCANFD_MODE, REG_MODE_RST); 185 clear_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &priv->drv_flags); 186 187 do { 188 u16 device_id = FIELD_GET(REG_DEVICE_ID_DEVICE_ID, 189 ctucan_read32(priv, CTUCANFD_DEVICE_ID)); 190 191 if (device_id == 0xCAFD) 192 return 0; 193 if (!i--) { 194 netdev_warn(ndev, "device did not leave reset\n"); 195 return -ETIMEDOUT; 196 } 197 usleep_range(100, 200); 198 } while (1); 199 } 200 201 /** 202 * ctucan_set_btr() - Sets CAN bus bit timing in CTU CAN FD 203 * @ndev: Pointer to net_device structure 204 * @bt: Pointer to Bit timing structure 205 * @nominal: True - Nominal bit timing, False - Data bit timing 206 * 207 * Return: 0 - OK, -%EPERM if controller is enabled 208 */ 209 static int ctucan_set_btr(struct net_device *ndev, struct can_bittiming *bt, bool nominal) 210 { 211 struct ctucan_priv *priv = netdev_priv(ndev); 212 int max_ph1_len = 31; 213 u32 btr = 0; 214 u32 prop_seg = bt->prop_seg; 215 u32 phase_seg1 = bt->phase_seg1; 216 217 if (CTU_CAN_FD_ENABLED(priv)) { 218 netdev_err(ndev, "BUG! Cannot set bittiming - CAN is enabled\n"); 219 return -EPERM; 220 } 221 222 if (nominal) 223 max_ph1_len = 63; 224 225 /* The timing calculation functions have only constraints on tseg1, which is prop_seg + 226 * phase1_seg combined. tseg1 is then split in half and stored into prog_seg and phase_seg1. 227 * In CTU CAN FD, PROP is 6/7 bits wide but PH1 only 6/5, so we must re-distribute the 228 * values here. 229 */ 230 if (phase_seg1 > max_ph1_len) { 231 prop_seg += phase_seg1 - max_ph1_len; 232 phase_seg1 = max_ph1_len; 233 bt->prop_seg = prop_seg; 234 bt->phase_seg1 = phase_seg1; 235 } 236 237 if (nominal) { 238 btr = FIELD_PREP(REG_BTR_PROP, prop_seg); 239 btr |= FIELD_PREP(REG_BTR_PH1, phase_seg1); 240 btr |= FIELD_PREP(REG_BTR_PH2, bt->phase_seg2); 241 btr |= FIELD_PREP(REG_BTR_BRP, bt->brp); 242 btr |= FIELD_PREP(REG_BTR_SJW, bt->sjw); 243 244 ctucan_write32(priv, CTUCANFD_BTR, btr); 245 } else { 246 btr = FIELD_PREP(REG_BTR_FD_PROP_FD, prop_seg); 247 btr |= FIELD_PREP(REG_BTR_FD_PH1_FD, phase_seg1); 248 btr |= FIELD_PREP(REG_BTR_FD_PH2_FD, bt->phase_seg2); 249 btr |= FIELD_PREP(REG_BTR_FD_BRP_FD, bt->brp); 250 btr |= FIELD_PREP(REG_BTR_FD_SJW_FD, bt->sjw); 251 252 ctucan_write32(priv, CTUCANFD_BTR_FD, btr); 253 } 254 255 return 0; 256 } 257 258 /** 259 * ctucan_set_bittiming() - CAN set nominal bit timing routine 260 * @ndev: Pointer to net_device structure 261 * 262 * Return: 0 on success, -%EPERM on error 263 */ 264 static int ctucan_set_bittiming(struct net_device *ndev) 265 { 266 struct ctucan_priv *priv = netdev_priv(ndev); 267 struct can_bittiming *bt = &priv->can.bittiming; 268 269 ctucan_netdev_dbg(ndev, "%s\n", __func__); 270 271 /* Note that bt may be modified here */ 272 return ctucan_set_btr(ndev, bt, true); 273 } 274 275 /** 276 * ctucan_set_data_bittiming() - CAN set data bit timing routine 277 * @ndev: Pointer to net_device structure 278 * 279 * Return: 0 on success, -%EPERM on error 280 */ 281 static int ctucan_set_data_bittiming(struct net_device *ndev) 282 { 283 struct ctucan_priv *priv = netdev_priv(ndev); 284 struct can_bittiming *dbt = &priv->can.data_bittiming; 285 286 ctucan_netdev_dbg(ndev, "%s\n", __func__); 287 288 /* Note that dbt may be modified here */ 289 return ctucan_set_btr(ndev, dbt, false); 290 } 291 292 /** 293 * ctucan_set_secondary_sample_point() - Sets secondary sample point in CTU CAN FD 294 * @ndev: Pointer to net_device structure 295 * 296 * Return: 0 on success, -%EPERM if controller is enabled 297 */ 298 static int ctucan_set_secondary_sample_point(struct net_device *ndev) 299 { 300 struct ctucan_priv *priv = netdev_priv(ndev); 301 struct can_bittiming *dbt = &priv->can.data_bittiming; 302 int ssp_offset = 0; 303 u32 ssp_cfg = 0; /* No SSP by default */ 304 305 ctucan_netdev_dbg(ndev, "%s\n", __func__); 306 307 if (CTU_CAN_FD_ENABLED(priv)) { 308 netdev_err(ndev, "BUG! Cannot set SSP - CAN is enabled\n"); 309 return -EPERM; 310 } 311 312 /* Use SSP for bit-rates above 1 Mbits/s */ 313 if (dbt->bitrate > 1000000) { 314 /* Calculate SSP in minimal time quanta */ 315 ssp_offset = (priv->can.clock.freq / 1000) * dbt->sample_point / dbt->bitrate; 316 317 if (ssp_offset > 127) { 318 netdev_warn(ndev, "SSP offset saturated to 127\n"); 319 ssp_offset = 127; 320 } 321 322 ssp_cfg = FIELD_PREP(REG_TRV_DELAY_SSP_OFFSET, ssp_offset); 323 ssp_cfg |= FIELD_PREP(REG_TRV_DELAY_SSP_SRC, 0x1); 324 } 325 326 ctucan_write32(priv, CTUCANFD_TRV_DELAY, ssp_cfg); 327 328 return 0; 329 } 330 331 /** 332 * ctucan_set_mode() - Sets CTU CAN FDs mode 333 * @priv: Pointer to private data 334 * @mode: Pointer to controller modes to be set 335 */ 336 static void ctucan_set_mode(struct ctucan_priv *priv, const struct can_ctrlmode *mode) 337 { 338 u32 mode_reg = ctucan_read32(priv, CTUCANFD_MODE); 339 340 mode_reg = (mode->flags & CAN_CTRLMODE_LOOPBACK) ? 341 (mode_reg | REG_MODE_ILBP) : 342 (mode_reg & ~REG_MODE_ILBP); 343 344 mode_reg = (mode->flags & CAN_CTRLMODE_LISTENONLY) ? 345 (mode_reg | REG_MODE_BMM) : 346 (mode_reg & ~REG_MODE_BMM); 347 348 mode_reg = (mode->flags & CAN_CTRLMODE_FD) ? 349 (mode_reg | REG_MODE_FDE) : 350 (mode_reg & ~REG_MODE_FDE); 351 352 mode_reg = (mode->flags & CAN_CTRLMODE_PRESUME_ACK) ? 353 (mode_reg | REG_MODE_ACF) : 354 (mode_reg & ~REG_MODE_ACF); 355 356 mode_reg = (mode->flags & CAN_CTRLMODE_FD_NON_ISO) ? 357 (mode_reg | REG_MODE_NISOFD) : 358 (mode_reg & ~REG_MODE_NISOFD); 359 360 /* One shot mode supported indirectly via Retransmit limit */ 361 mode_reg &= ~FIELD_PREP(REG_MODE_RTRTH, 0xF); 362 mode_reg = (mode->flags & CAN_CTRLMODE_ONE_SHOT) ? 363 (mode_reg | REG_MODE_RTRLE) : 364 (mode_reg & ~REG_MODE_RTRLE); 365 366 /* Some bits fixed: 367 * TSTM - Off, User shall not be able to change REC/TEC by hand during operation 368 */ 369 mode_reg &= ~REG_MODE_TSTM; 370 371 ctucan_write32(priv, CTUCANFD_MODE, mode_reg); 372 } 373 374 /** 375 * ctucan_chip_start() - This routine starts the driver 376 * @ndev: Pointer to net_device structure 377 * 378 * Routine expects that chip is in reset state. It setups initial 379 * Tx buffers for FIFO priorities, sets bittiming, enables interrupts, 380 * switches core to operational mode and changes controller 381 * state to %CAN_STATE_STOPPED. 382 * 383 * Return: 0 on success and failure value on error 384 */ 385 static int ctucan_chip_start(struct net_device *ndev) 386 { 387 struct ctucan_priv *priv = netdev_priv(ndev); 388 u32 int_ena, int_msk; 389 u32 mode_reg; 390 int err; 391 struct can_ctrlmode mode; 392 393 ctucan_netdev_dbg(ndev, "%s\n", __func__); 394 395 priv->txb_prio = 0x01234567; 396 priv->txb_head = 0; 397 priv->txb_tail = 0; 398 ctucan_write32(priv, CTUCANFD_TX_PRIORITY, priv->txb_prio); 399 400 /* Configure bit-rates and ssp */ 401 err = ctucan_set_bittiming(ndev); 402 if (err < 0) 403 return err; 404 405 err = ctucan_set_data_bittiming(ndev); 406 if (err < 0) 407 return err; 408 409 err = ctucan_set_secondary_sample_point(ndev); 410 if (err < 0) 411 return err; 412 413 /* Configure modes */ 414 mode.flags = priv->can.ctrlmode; 415 mode.mask = 0xFFFFFFFF; 416 ctucan_set_mode(priv, &mode); 417 418 /* Configure interrupts */ 419 int_ena = REG_INT_STAT_RBNEI | 420 REG_INT_STAT_TXBHCI | 421 REG_INT_STAT_EWLI | 422 REG_INT_STAT_FCSI; 423 424 /* Bus error reporting -> Allow Error/Arb.lost interrupts */ 425 if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) { 426 int_ena |= REG_INT_STAT_ALI | 427 REG_INT_STAT_BEI; 428 } 429 430 int_msk = ~int_ena; /* Mask all disabled interrupts */ 431 432 /* It's after reset, so there is no need to clear anything */ 433 ctucan_write32(priv, CTUCANFD_INT_MASK_SET, int_msk); 434 ctucan_write32(priv, CTUCANFD_INT_ENA_SET, int_ena); 435 436 /* Controller enters ERROR_ACTIVE on initial FCSI */ 437 priv->can.state = CAN_STATE_STOPPED; 438 439 /* Enable the controller */ 440 mode_reg = ctucan_read32(priv, CTUCANFD_MODE); 441 mode_reg |= REG_MODE_ENA; 442 ctucan_write32(priv, CTUCANFD_MODE, mode_reg); 443 444 return 0; 445 } 446 447 /** 448 * ctucan_do_set_mode() - Sets mode of the driver 449 * @ndev: Pointer to net_device structure 450 * @mode: Tells the mode of the driver 451 * 452 * This check the drivers state and calls the corresponding modes to set. 453 * 454 * Return: 0 on success and failure value on error 455 */ 456 static int ctucan_do_set_mode(struct net_device *ndev, enum can_mode mode) 457 { 458 int ret; 459 460 ctucan_netdev_dbg(ndev, "%s\n", __func__); 461 462 switch (mode) { 463 case CAN_MODE_START: 464 ret = ctucan_reset(ndev); 465 if (ret < 0) 466 return ret; 467 ret = ctucan_chip_start(ndev); 468 if (ret < 0) { 469 netdev_err(ndev, "ctucan_chip_start failed!\n"); 470 return ret; 471 } 472 netif_wake_queue(ndev); 473 break; 474 default: 475 ret = -EOPNOTSUPP; 476 break; 477 } 478 479 return ret; 480 } 481 482 /** 483 * ctucan_get_tx_status() - Gets status of TXT buffer 484 * @priv: Pointer to private data 485 * @buf: Buffer index (0-based) 486 * 487 * Return: Status of TXT buffer 488 */ 489 static inline enum ctucan_txtb_status ctucan_get_tx_status(struct ctucan_priv *priv, u8 buf) 490 { 491 u32 tx_status = ctucan_read32(priv, CTUCANFD_TX_STATUS); 492 enum ctucan_txtb_status status = (tx_status >> (buf * 4)) & 0x7; 493 494 return status; 495 } 496 497 /** 498 * ctucan_is_txt_buf_writable() - Checks if frame can be inserted to TXT Buffer 499 * @priv: Pointer to private data 500 * @buf: Buffer index (0-based) 501 * 502 * Return: True - Frame can be inserted to TXT Buffer, False - If attempted, frame will not be 503 * inserted to TXT Buffer 504 */ 505 static bool ctucan_is_txt_buf_writable(struct ctucan_priv *priv, u8 buf) 506 { 507 enum ctucan_txtb_status buf_status; 508 509 buf_status = ctucan_get_tx_status(priv, buf); 510 if (buf_status == TXT_RDY || buf_status == TXT_TRAN || buf_status == TXT_ABTP) 511 return false; 512 513 return true; 514 } 515 516 /** 517 * ctucan_insert_frame() - Inserts frame to TXT buffer 518 * @priv: Pointer to private data 519 * @cf: Pointer to CAN frame to be inserted 520 * @buf: TXT Buffer index to which frame is inserted (0-based) 521 * @isfdf: True - CAN FD Frame, False - CAN 2.0 Frame 522 * 523 * Return: True - Frame inserted successfully 524 * False - Frame was not inserted due to one of: 525 * 1. TXT Buffer is not writable (it is in wrong state) 526 * 2. Invalid TXT buffer index 527 * 3. Invalid frame length 528 */ 529 static bool ctucan_insert_frame(struct ctucan_priv *priv, const struct canfd_frame *cf, u8 buf, 530 bool isfdf) 531 { 532 u32 buf_base; 533 u32 ffw = 0; 534 u32 idw = 0; 535 unsigned int i; 536 537 if (buf >= priv->ntxbufs) 538 return false; 539 540 if (!ctucan_is_txt_buf_writable(priv, buf)) 541 return false; 542 543 if (cf->len > CANFD_MAX_DLEN) 544 return false; 545 546 /* Prepare Frame format */ 547 if (cf->can_id & CAN_RTR_FLAG) 548 ffw |= REG_FRAME_FORMAT_W_RTR; 549 550 if (cf->can_id & CAN_EFF_FLAG) 551 ffw |= REG_FRAME_FORMAT_W_IDE; 552 553 if (isfdf) { 554 ffw |= REG_FRAME_FORMAT_W_FDF; 555 if (cf->flags & CANFD_BRS) 556 ffw |= REG_FRAME_FORMAT_W_BRS; 557 } 558 559 ffw |= FIELD_PREP(REG_FRAME_FORMAT_W_DLC, can_fd_len2dlc(cf->len)); 560 561 /* Prepare identifier */ 562 if (cf->can_id & CAN_EFF_FLAG) 563 idw = cf->can_id & CAN_EFF_MASK; 564 else 565 idw = FIELD_PREP(REG_IDENTIFIER_W_IDENTIFIER_BASE, cf->can_id & CAN_SFF_MASK); 566 567 /* Write ID, Frame format, Don't write timestamp -> Time triggered transmission disabled */ 568 buf_base = (buf + 1) * 0x100; 569 ctucan_write_txt_buf(priv, buf_base, CTUCANFD_FRAME_FORMAT_W, ffw); 570 ctucan_write_txt_buf(priv, buf_base, CTUCANFD_IDENTIFIER_W, idw); 571 572 /* Write Data payload */ 573 if (!(cf->can_id & CAN_RTR_FLAG)) { 574 for (i = 0; i < cf->len; i += 4) { 575 u32 data = le32_to_cpu(*(__le32 *)(cf->data + i)); 576 577 ctucan_write_txt_buf(priv, buf_base, CTUCANFD_DATA_1_4_W + i, data); 578 } 579 } 580 581 return true; 582 } 583 584 /** 585 * ctucan_give_txtb_cmd() - Applies command on TXT buffer 586 * @priv: Pointer to private data 587 * @cmd: Command to give 588 * @buf: Buffer index (0-based) 589 */ 590 static void ctucan_give_txtb_cmd(struct ctucan_priv *priv, enum ctucan_txtb_command cmd, u8 buf) 591 { 592 u32 tx_cmd = cmd; 593 594 tx_cmd |= 1 << (buf + 8); 595 ctucan_write32(priv, CTUCANFD_TX_COMMAND, tx_cmd); 596 } 597 598 /** 599 * ctucan_start_xmit() - Starts the transmission 600 * @skb: sk_buff pointer that contains data to be Txed 601 * @ndev: Pointer to net_device structure 602 * 603 * Invoked from upper layers to initiate transmission. Uses the next available free TXT Buffer and 604 * populates its fields to start the transmission. 605 * 606 * Return: %NETDEV_TX_OK on success, %NETDEV_TX_BUSY when no free TXT buffer is available, 607 * negative return values reserved for error cases 608 */ 609 static netdev_tx_t ctucan_start_xmit(struct sk_buff *skb, struct net_device *ndev) 610 { 611 struct ctucan_priv *priv = netdev_priv(ndev); 612 struct canfd_frame *cf = (struct canfd_frame *)skb->data; 613 u32 txtb_id; 614 bool ok; 615 unsigned long flags; 616 617 if (can_dropped_invalid_skb(ndev, skb)) 618 return NETDEV_TX_OK; 619 620 if (unlikely(!CTU_CAN_FD_TXTNF(priv))) { 621 netif_stop_queue(ndev); 622 netdev_err(ndev, "BUG!, no TXB free when queue awake!\n"); 623 return NETDEV_TX_BUSY; 624 } 625 626 txtb_id = priv->txb_head % priv->ntxbufs; 627 ctucan_netdev_dbg(ndev, "%s: using TXB#%u\n", __func__, txtb_id); 628 ok = ctucan_insert_frame(priv, cf, txtb_id, can_is_canfd_skb(skb)); 629 630 if (!ok) { 631 netdev_err(ndev, "BUG! TXNF set but cannot insert frame into TXTB! HW Bug?"); 632 kfree_skb(skb); 633 ndev->stats.tx_dropped++; 634 return NETDEV_TX_OK; 635 } 636 637 can_put_echo_skb(skb, ndev, txtb_id, 0); 638 639 spin_lock_irqsave(&priv->tx_lock, flags); 640 ctucan_give_txtb_cmd(priv, TXT_CMD_SET_READY, txtb_id); 641 priv->txb_head++; 642 643 /* Check if all TX buffers are full */ 644 if (!CTU_CAN_FD_TXTNF(priv)) 645 netif_stop_queue(ndev); 646 647 spin_unlock_irqrestore(&priv->tx_lock, flags); 648 649 return NETDEV_TX_OK; 650 } 651 652 /** 653 * ctucan_read_rx_frame() - Reads frame from RX FIFO 654 * @priv: Pointer to CTU CAN FD's private data 655 * @cf: Pointer to CAN frame struct 656 * @ffw: Previously read frame format word 657 * 658 * Note: Frame format word must be read separately and provided in 'ffw'. 659 */ 660 static void ctucan_read_rx_frame(struct ctucan_priv *priv, struct canfd_frame *cf, u32 ffw) 661 { 662 u32 idw; 663 unsigned int i; 664 unsigned int wc; 665 unsigned int len; 666 667 idw = ctucan_read32(priv, CTUCANFD_RX_DATA); 668 if (FIELD_GET(REG_FRAME_FORMAT_W_IDE, ffw)) 669 cf->can_id = (idw & CAN_EFF_MASK) | CAN_EFF_FLAG; 670 else 671 cf->can_id = (idw >> 18) & CAN_SFF_MASK; 672 673 /* BRS, ESI, RTR Flags */ 674 cf->flags = 0; 675 if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw)) { 676 if (FIELD_GET(REG_FRAME_FORMAT_W_BRS, ffw)) 677 cf->flags |= CANFD_BRS; 678 if (FIELD_GET(REG_FRAME_FORMAT_W_ESI_RSV, ffw)) 679 cf->flags |= CANFD_ESI; 680 } else if (FIELD_GET(REG_FRAME_FORMAT_W_RTR, ffw)) { 681 cf->can_id |= CAN_RTR_FLAG; 682 } 683 684 wc = FIELD_GET(REG_FRAME_FORMAT_W_RWCNT, ffw) - 3; 685 686 /* DLC */ 687 if (FIELD_GET(REG_FRAME_FORMAT_W_DLC, ffw) <= 8) { 688 len = FIELD_GET(REG_FRAME_FORMAT_W_DLC, ffw); 689 } else { 690 if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw)) 691 len = wc << 2; 692 else 693 len = 8; 694 } 695 cf->len = len; 696 if (unlikely(len > wc * 4)) 697 len = wc * 4; 698 699 /* Timestamp - Read and throw away */ 700 ctucan_read32(priv, CTUCANFD_RX_DATA); 701 ctucan_read32(priv, CTUCANFD_RX_DATA); 702 703 /* Data */ 704 for (i = 0; i < len; i += 4) { 705 u32 data = ctucan_read32(priv, CTUCANFD_RX_DATA); 706 *(__le32 *)(cf->data + i) = cpu_to_le32(data); 707 } 708 while (unlikely(i < wc * 4)) { 709 ctucan_read32(priv, CTUCANFD_RX_DATA); 710 i += 4; 711 } 712 } 713 714 /** 715 * ctucan_rx() - Called from CAN ISR to complete the received frame processing 716 * @ndev: Pointer to net_device structure 717 * 718 * This function is invoked from the CAN isr(poll) to process the Rx frames. It does minimal 719 * processing and invokes "netif_receive_skb" to complete further processing. 720 * Return: 1 when frame is passed to the network layer, 0 when the first frame word is read but 721 * system is out of free SKBs temporally and left code to resolve SKB allocation later, 722 * -%EAGAIN in a case of empty Rx FIFO. 723 */ 724 static int ctucan_rx(struct net_device *ndev) 725 { 726 struct ctucan_priv *priv = netdev_priv(ndev); 727 struct net_device_stats *stats = &ndev->stats; 728 struct canfd_frame *cf; 729 struct sk_buff *skb; 730 u32 ffw; 731 732 if (test_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &priv->drv_flags)) { 733 ffw = priv->rxfrm_first_word; 734 clear_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &priv->drv_flags); 735 } else { 736 ffw = ctucan_read32(priv, CTUCANFD_RX_DATA); 737 } 738 739 if (!FIELD_GET(REG_FRAME_FORMAT_W_RWCNT, ffw)) 740 return -EAGAIN; 741 742 if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw)) 743 skb = alloc_canfd_skb(ndev, &cf); 744 else 745 skb = alloc_can_skb(ndev, (struct can_frame **)&cf); 746 747 if (unlikely(!skb)) { 748 priv->rxfrm_first_word = ffw; 749 set_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &priv->drv_flags); 750 return 0; 751 } 752 753 ctucan_read_rx_frame(priv, cf, ffw); 754 755 stats->rx_bytes += cf->len; 756 stats->rx_packets++; 757 netif_receive_skb(skb); 758 759 return 1; 760 } 761 762 /** 763 * ctucan_read_fault_state() - Reads CTU CAN FDs fault confinement state. 764 * @priv: Pointer to private data 765 * 766 * Returns: Fault confinement state of controller 767 */ 768 static enum can_state ctucan_read_fault_state(struct ctucan_priv *priv) 769 { 770 u32 fs; 771 u32 rec_tec; 772 u32 ewl; 773 774 fs = ctucan_read32(priv, CTUCANFD_EWL); 775 rec_tec = ctucan_read32(priv, CTUCANFD_REC); 776 ewl = FIELD_GET(REG_EWL_EW_LIMIT, fs); 777 778 if (FIELD_GET(REG_EWL_ERA, fs)) { 779 if (ewl > FIELD_GET(REG_REC_REC_VAL, rec_tec) && 780 ewl > FIELD_GET(REG_REC_TEC_VAL, rec_tec)) 781 return CAN_STATE_ERROR_ACTIVE; 782 else 783 return CAN_STATE_ERROR_WARNING; 784 } else if (FIELD_GET(REG_EWL_ERP, fs)) { 785 return CAN_STATE_ERROR_PASSIVE; 786 } else if (FIELD_GET(REG_EWL_BOF, fs)) { 787 return CAN_STATE_BUS_OFF; 788 } 789 790 WARN(true, "Invalid error state"); 791 return CAN_STATE_ERROR_PASSIVE; 792 } 793 794 /** 795 * ctucan_get_rec_tec() - Reads REC/TEC counter values from controller 796 * @priv: Pointer to private data 797 * @bec: Pointer to Error counter structure 798 */ 799 static void ctucan_get_rec_tec(struct ctucan_priv *priv, struct can_berr_counter *bec) 800 { 801 u32 err_ctrs = ctucan_read32(priv, CTUCANFD_REC); 802 803 bec->rxerr = FIELD_GET(REG_REC_REC_VAL, err_ctrs); 804 bec->txerr = FIELD_GET(REG_REC_TEC_VAL, err_ctrs); 805 } 806 807 /** 808 * ctucan_err_interrupt() - Error frame ISR 809 * @ndev: net_device pointer 810 * @isr: interrupt status register value 811 * 812 * This is the CAN error interrupt and it will check the type of error and forward the error 813 * frame to upper layers. 814 */ 815 static void ctucan_err_interrupt(struct net_device *ndev, u32 isr) 816 { 817 struct ctucan_priv *priv = netdev_priv(ndev); 818 struct net_device_stats *stats = &ndev->stats; 819 struct can_frame *cf; 820 struct sk_buff *skb; 821 enum can_state state; 822 struct can_berr_counter bec; 823 u32 err_capt_alc; 824 int dologerr = net_ratelimit(); 825 826 ctucan_get_rec_tec(priv, &bec); 827 state = ctucan_read_fault_state(priv); 828 err_capt_alc = ctucan_read32(priv, CTUCANFD_ERR_CAPT); 829 830 if (dologerr) 831 netdev_info(ndev, "%s: ISR = 0x%08x, rxerr %d, txerr %d, error type %lu, pos %lu, ALC id_field %lu, bit %lu\n", 832 __func__, isr, bec.rxerr, bec.txerr, 833 FIELD_GET(REG_ERR_CAPT_ERR_TYPE, err_capt_alc), 834 FIELD_GET(REG_ERR_CAPT_ERR_POS, err_capt_alc), 835 FIELD_GET(REG_ERR_CAPT_ALC_ID_FIELD, err_capt_alc), 836 FIELD_GET(REG_ERR_CAPT_ALC_BIT, err_capt_alc)); 837 838 skb = alloc_can_err_skb(ndev, &cf); 839 840 /* EWLI: error warning limit condition met 841 * FCSI: fault confinement state changed 842 * ALI: arbitration lost (just informative) 843 * BEI: bus error interrupt 844 */ 845 if (FIELD_GET(REG_INT_STAT_FCSI, isr) || FIELD_GET(REG_INT_STAT_EWLI, isr)) { 846 netdev_info(ndev, "state changes from %s to %s\n", 847 ctucan_state_to_str(priv->can.state), 848 ctucan_state_to_str(state)); 849 850 if (priv->can.state == state) 851 netdev_warn(ndev, 852 "current and previous state is the same! (missed interrupt?)\n"); 853 854 priv->can.state = state; 855 switch (state) { 856 case CAN_STATE_BUS_OFF: 857 priv->can.can_stats.bus_off++; 858 can_bus_off(ndev); 859 if (skb) 860 cf->can_id |= CAN_ERR_BUSOFF; 861 break; 862 case CAN_STATE_ERROR_PASSIVE: 863 priv->can.can_stats.error_passive++; 864 if (skb) { 865 cf->can_id |= CAN_ERR_CRTL; 866 cf->data[1] = (bec.rxerr > 127) ? 867 CAN_ERR_CRTL_RX_PASSIVE : 868 CAN_ERR_CRTL_TX_PASSIVE; 869 cf->data[6] = bec.txerr; 870 cf->data[7] = bec.rxerr; 871 } 872 break; 873 case CAN_STATE_ERROR_WARNING: 874 priv->can.can_stats.error_warning++; 875 if (skb) { 876 cf->can_id |= CAN_ERR_CRTL; 877 cf->data[1] |= (bec.txerr > bec.rxerr) ? 878 CAN_ERR_CRTL_TX_WARNING : 879 CAN_ERR_CRTL_RX_WARNING; 880 cf->data[6] = bec.txerr; 881 cf->data[7] = bec.rxerr; 882 } 883 break; 884 case CAN_STATE_ERROR_ACTIVE: 885 cf->data[1] = CAN_ERR_CRTL_ACTIVE; 886 cf->data[6] = bec.txerr; 887 cf->data[7] = bec.rxerr; 888 break; 889 default: 890 netdev_warn(ndev, "unhandled error state (%d:%s)!\n", 891 state, ctucan_state_to_str(state)); 892 break; 893 } 894 } 895 896 /* Check for Arbitration Lost interrupt */ 897 if (FIELD_GET(REG_INT_STAT_ALI, isr)) { 898 if (dologerr) 899 netdev_info(ndev, "arbitration lost\n"); 900 priv->can.can_stats.arbitration_lost++; 901 if (skb) { 902 cf->can_id |= CAN_ERR_LOSTARB; 903 cf->data[0] = CAN_ERR_LOSTARB_UNSPEC; 904 } 905 } 906 907 /* Check for Bus Error interrupt */ 908 if (FIELD_GET(REG_INT_STAT_BEI, isr)) { 909 netdev_info(ndev, "bus error\n"); 910 priv->can.can_stats.bus_error++; 911 stats->rx_errors++; 912 if (skb) { 913 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR; 914 cf->data[2] = CAN_ERR_PROT_UNSPEC; 915 cf->data[3] = CAN_ERR_PROT_LOC_UNSPEC; 916 } 917 } 918 919 if (skb) { 920 stats->rx_packets++; 921 stats->rx_bytes += cf->can_dlc; 922 netif_rx(skb); 923 } 924 } 925 926 /** 927 * ctucan_rx_poll() - Poll routine for rx packets (NAPI) 928 * @napi: NAPI structure pointer 929 * @quota: Max number of rx packets to be processed. 930 * 931 * This is the poll routine for rx part. It will process the packets maximux quota value. 932 * 933 * Return: Number of packets received 934 */ 935 static int ctucan_rx_poll(struct napi_struct *napi, int quota) 936 { 937 struct net_device *ndev = napi->dev; 938 struct ctucan_priv *priv = netdev_priv(ndev); 939 int work_done = 0; 940 u32 status; 941 u32 framecnt; 942 int res = 1; 943 944 framecnt = FIELD_GET(REG_RX_STATUS_RXFRC, ctucan_read32(priv, CTUCANFD_RX_STATUS)); 945 while (framecnt && work_done < quota && res > 0) { 946 res = ctucan_rx(ndev); 947 work_done++; 948 framecnt = FIELD_GET(REG_RX_STATUS_RXFRC, ctucan_read32(priv, CTUCANFD_RX_STATUS)); 949 } 950 951 /* Check for RX FIFO Overflow */ 952 status = ctucan_read32(priv, CTUCANFD_STATUS); 953 if (FIELD_GET(REG_STATUS_DOR, status)) { 954 struct net_device_stats *stats = &ndev->stats; 955 struct can_frame *cf; 956 struct sk_buff *skb; 957 958 netdev_info(ndev, "rx_poll: rx fifo overflow\n"); 959 stats->rx_over_errors++; 960 stats->rx_errors++; 961 skb = alloc_can_err_skb(ndev, &cf); 962 if (skb) { 963 cf->can_id |= CAN_ERR_CRTL; 964 cf->data[1] |= CAN_ERR_CRTL_RX_OVERFLOW; 965 stats->rx_packets++; 966 stats->rx_bytes += cf->can_dlc; 967 netif_rx(skb); 968 } 969 970 /* Clear Data Overrun */ 971 ctucan_write32(priv, CTUCANFD_COMMAND, REG_COMMAND_CDO); 972 } 973 974 if (work_done) 975 can_led_event(ndev, CAN_LED_EVENT_RX); 976 977 if (!framecnt && res != 0) { 978 if (napi_complete_done(napi, work_done)) { 979 /* Clear and enable RBNEI. It is level-triggered, so 980 * there is no race condition. 981 */ 982 ctucan_write32(priv, CTUCANFD_INT_STAT, REG_INT_STAT_RBNEI); 983 ctucan_write32(priv, CTUCANFD_INT_MASK_CLR, REG_INT_STAT_RBNEI); 984 } 985 } 986 987 return work_done; 988 } 989 990 /** 991 * ctucan_rotate_txb_prio() - Rotates priorities of TXT Buffers 992 * @ndev: net_device pointer 993 */ 994 static void ctucan_rotate_txb_prio(struct net_device *ndev) 995 { 996 struct ctucan_priv *priv = netdev_priv(ndev); 997 u32 prio = priv->txb_prio; 998 999 prio = (prio << 4) | ((prio >> ((priv->ntxbufs - 1) * 4)) & 0xF); 1000 ctucan_netdev_dbg(ndev, "%s: from 0x%08x to 0x%08x\n", __func__, priv->txb_prio, prio); 1001 priv->txb_prio = prio; 1002 ctucan_write32(priv, CTUCANFD_TX_PRIORITY, prio); 1003 } 1004 1005 /** 1006 * ctucan_tx_interrupt() - Tx done Isr 1007 * @ndev: net_device pointer 1008 */ 1009 static void ctucan_tx_interrupt(struct net_device *ndev) 1010 { 1011 struct ctucan_priv *priv = netdev_priv(ndev); 1012 struct net_device_stats *stats = &ndev->stats; 1013 bool first = true; 1014 bool some_buffers_processed; 1015 unsigned long flags; 1016 enum ctucan_txtb_status txtb_status; 1017 u32 txtb_id; 1018 1019 /* read tx_status 1020 * if txb[n].finished (bit 2) 1021 * if ok -> echo 1022 * if error / aborted -> ?? (find how to handle oneshot mode) 1023 * txb_tail++ 1024 */ 1025 do { 1026 spin_lock_irqsave(&priv->tx_lock, flags); 1027 1028 some_buffers_processed = false; 1029 while ((int)(priv->txb_head - priv->txb_tail) > 0) { 1030 txtb_id = priv->txb_tail % priv->ntxbufs; 1031 txtb_status = ctucan_get_tx_status(priv, txtb_id); 1032 1033 ctucan_netdev_dbg(ndev, "TXI: TXB#%u: status 0x%x\n", txtb_id, txtb_status); 1034 1035 switch (txtb_status) { 1036 case TXT_TOK: 1037 ctucan_netdev_dbg(ndev, "TXT_OK\n"); 1038 stats->tx_bytes += can_get_echo_skb(ndev, txtb_id, NULL); 1039 stats->tx_packets++; 1040 break; 1041 case TXT_ERR: 1042 /* This indicated that retransmit limit has been reached. Obviously 1043 * we should not echo the frame, but also not indicate any kind of 1044 * error. If desired, it was already reported (possible multiple 1045 * times) on each arbitration lost. 1046 */ 1047 netdev_warn(ndev, "TXB in Error state\n"); 1048 can_free_echo_skb(ndev, txtb_id, NULL); 1049 stats->tx_dropped++; 1050 break; 1051 case TXT_ABT: 1052 /* Same as for TXT_ERR, only with different cause. We *could* 1053 * re-queue the frame, but multiqueue/abort is not supported yet 1054 * anyway. 1055 */ 1056 netdev_warn(ndev, "TXB in Aborted state\n"); 1057 can_free_echo_skb(ndev, txtb_id, NULL); 1058 stats->tx_dropped++; 1059 break; 1060 default: 1061 /* Bug only if the first buffer is not finished, otherwise it is 1062 * pretty much expected. 1063 */ 1064 if (first) { 1065 netdev_err(ndev, 1066 "BUG: TXB#%u not in a finished state (0x%x)!\n", 1067 txtb_id, txtb_status); 1068 spin_unlock_irqrestore(&priv->tx_lock, flags); 1069 /* do not clear nor wake */ 1070 return; 1071 } 1072 goto clear; 1073 } 1074 priv->txb_tail++; 1075 first = false; 1076 some_buffers_processed = true; 1077 /* Adjust priorities *before* marking the buffer as empty. */ 1078 ctucan_rotate_txb_prio(ndev); 1079 ctucan_give_txtb_cmd(priv, TXT_CMD_SET_EMPTY, txtb_id); 1080 } 1081 clear: 1082 spin_unlock_irqrestore(&priv->tx_lock, flags); 1083 1084 /* If no buffers were processed this time, we cannot clear - that would introduce 1085 * a race condition. 1086 */ 1087 if (some_buffers_processed) { 1088 /* Clear the interrupt again. We do not want to receive again interrupt for 1089 * the buffer already handled. If it is the last finished one then it would 1090 * cause log of spurious interrupt. 1091 */ 1092 ctucan_write32(priv, CTUCANFD_INT_STAT, REG_INT_STAT_TXBHCI); 1093 } 1094 } while (some_buffers_processed); 1095 1096 can_led_event(ndev, CAN_LED_EVENT_TX); 1097 1098 spin_lock_irqsave(&priv->tx_lock, flags); 1099 1100 /* Check if at least one TX buffer is free */ 1101 if (CTU_CAN_FD_TXTNF(priv)) 1102 netif_wake_queue(ndev); 1103 1104 spin_unlock_irqrestore(&priv->tx_lock, flags); 1105 } 1106 1107 /** 1108 * ctucan_interrupt() - CAN Isr 1109 * @irq: irq number 1110 * @dev_id: device id poniter 1111 * 1112 * This is the CTU CAN FD ISR. It checks for the type of interrupt 1113 * and invokes the corresponding ISR. 1114 * 1115 * Return: 1116 * IRQ_NONE - If CAN device is in sleep mode, IRQ_HANDLED otherwise 1117 */ 1118 static irqreturn_t ctucan_interrupt(int irq, void *dev_id) 1119 { 1120 struct net_device *ndev = (struct net_device *)dev_id; 1121 struct ctucan_priv *priv = netdev_priv(ndev); 1122 u32 isr, icr; 1123 u32 imask; 1124 int irq_loops; 1125 1126 ctucan_netdev_dbg(ndev, "%s\n", __func__); 1127 1128 for (irq_loops = 0; irq_loops < 10000; irq_loops++) { 1129 /* Get the interrupt status */ 1130 isr = ctucan_read32(priv, CTUCANFD_INT_STAT); 1131 1132 if (!isr) 1133 return irq_loops ? IRQ_HANDLED : IRQ_NONE; 1134 1135 /* Receive Buffer Not Empty Interrupt */ 1136 if (FIELD_GET(REG_INT_STAT_RBNEI, isr)) { 1137 ctucan_netdev_dbg(ndev, "RXBNEI\n"); 1138 /* Mask RXBNEI the first, then clear interrupt and schedule NAPI. Even if 1139 * another IRQ fires, RBNEI will always be 0 (masked). 1140 */ 1141 icr = REG_INT_STAT_RBNEI; 1142 ctucan_write32(priv, CTUCANFD_INT_MASK_SET, icr); 1143 ctucan_write32(priv, CTUCANFD_INT_STAT, icr); 1144 napi_schedule(&priv->napi); 1145 } 1146 1147 /* TXT Buffer HW Command Interrupt */ 1148 if (FIELD_GET(REG_INT_STAT_TXBHCI, isr)) { 1149 ctucan_netdev_dbg(ndev, "TXBHCI\n"); 1150 /* Cleared inside */ 1151 ctucan_tx_interrupt(ndev); 1152 } 1153 1154 /* Error interrupts */ 1155 if (FIELD_GET(REG_INT_STAT_EWLI, isr) || 1156 FIELD_GET(REG_INT_STAT_FCSI, isr) || 1157 FIELD_GET(REG_INT_STAT_ALI, isr)) { 1158 icr = isr & (REG_INT_STAT_EWLI | REG_INT_STAT_FCSI | REG_INT_STAT_ALI); 1159 1160 ctucan_netdev_dbg(ndev, "some ERR interrupt: clearing 0x%08x\n", icr); 1161 ctucan_write32(priv, CTUCANFD_INT_STAT, icr); 1162 ctucan_err_interrupt(ndev, isr); 1163 } 1164 /* Ignore RI, TI, LFI, RFI, BSI */ 1165 } 1166 1167 netdev_err(ndev, "%s: stuck interrupt (isr=0x%08x), stopping\n", __func__, isr); 1168 1169 if (FIELD_GET(REG_INT_STAT_TXBHCI, isr)) { 1170 int i; 1171 1172 netdev_err(ndev, "txb_head=0x%08x txb_tail=0x%08x\n", 1173 priv->txb_head, priv->txb_tail); 1174 for (i = 0; i < priv->ntxbufs; i++) { 1175 u32 status = ctucan_get_tx_status(priv, i); 1176 1177 netdev_err(ndev, "txb[%d] txb status=0x%08x\n", i, status); 1178 } 1179 } 1180 1181 imask = 0xffffffff; 1182 ctucan_write32(priv, CTUCANFD_INT_ENA_CLR, imask); 1183 ctucan_write32(priv, CTUCANFD_INT_MASK_SET, imask); 1184 1185 return IRQ_HANDLED; 1186 } 1187 1188 /** 1189 * ctucan_chip_stop() - Driver stop routine 1190 * @ndev: Pointer to net_device structure 1191 * 1192 * This is the drivers stop routine. It will disable the 1193 * interrupts and disable the controller. 1194 */ 1195 static void ctucan_chip_stop(struct net_device *ndev) 1196 { 1197 struct ctucan_priv *priv = netdev_priv(ndev); 1198 u32 mask = 0xffffffff; 1199 u32 mode; 1200 1201 ctucan_netdev_dbg(ndev, "%s\n", __func__); 1202 1203 /* Disable interrupts and disable CAN */ 1204 ctucan_write32(priv, CTUCANFD_INT_ENA_CLR, mask); 1205 ctucan_write32(priv, CTUCANFD_INT_MASK_SET, mask); 1206 mode = ctucan_read32(priv, CTUCANFD_MODE); 1207 mode &= ~REG_MODE_ENA; 1208 ctucan_write32(priv, CTUCANFD_MODE, mode); 1209 1210 priv->can.state = CAN_STATE_STOPPED; 1211 } 1212 1213 /** 1214 * ctucan_open() - Driver open routine 1215 * @ndev: Pointer to net_device structure 1216 * 1217 * This is the driver open routine. 1218 * Return: 0 on success and failure value on error 1219 */ 1220 static int ctucan_open(struct net_device *ndev) 1221 { 1222 struct ctucan_priv *priv = netdev_priv(ndev); 1223 int ret; 1224 1225 ctucan_netdev_dbg(ndev, "%s\n", __func__); 1226 1227 ret = pm_runtime_get_sync(priv->dev); 1228 if (ret < 0) { 1229 netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n", 1230 __func__, ret); 1231 pm_runtime_put_noidle(priv->dev); 1232 return ret; 1233 } 1234 1235 ret = ctucan_reset(ndev); 1236 if (ret < 0) 1237 goto err_reset; 1238 1239 /* Common open */ 1240 ret = open_candev(ndev); 1241 if (ret) { 1242 netdev_warn(ndev, "open_candev failed!\n"); 1243 goto err_open; 1244 } 1245 1246 ret = request_irq(ndev->irq, ctucan_interrupt, priv->irq_flags, ndev->name, ndev); 1247 if (ret < 0) { 1248 netdev_err(ndev, "irq allocation for CAN failed\n"); 1249 goto err_irq; 1250 } 1251 1252 ret = ctucan_chip_start(ndev); 1253 if (ret < 0) { 1254 netdev_err(ndev, "ctucan_chip_start failed!\n"); 1255 goto err_chip_start; 1256 } 1257 1258 netdev_info(ndev, "ctu_can_fd device registered\n"); 1259 can_led_event(ndev, CAN_LED_EVENT_OPEN); 1260 napi_enable(&priv->napi); 1261 netif_start_queue(ndev); 1262 1263 return 0; 1264 1265 err_chip_start: 1266 free_irq(ndev->irq, ndev); 1267 err_irq: 1268 close_candev(ndev); 1269 err_open: 1270 err_reset: 1271 pm_runtime_put(priv->dev); 1272 1273 return ret; 1274 } 1275 1276 /** 1277 * ctucan_close() - Driver close routine 1278 * @ndev: Pointer to net_device structure 1279 * 1280 * Return: 0 always 1281 */ 1282 static int ctucan_close(struct net_device *ndev) 1283 { 1284 struct ctucan_priv *priv = netdev_priv(ndev); 1285 1286 ctucan_netdev_dbg(ndev, "%s\n", __func__); 1287 1288 netif_stop_queue(ndev); 1289 napi_disable(&priv->napi); 1290 ctucan_chip_stop(ndev); 1291 free_irq(ndev->irq, ndev); 1292 close_candev(ndev); 1293 1294 can_led_event(ndev, CAN_LED_EVENT_STOP); 1295 pm_runtime_put(priv->dev); 1296 1297 return 0; 1298 } 1299 1300 /** 1301 * ctucan_get_berr_counter() - error counter routine 1302 * @ndev: Pointer to net_device structure 1303 * @bec: Pointer to can_berr_counter structure 1304 * 1305 * This is the driver error counter routine. 1306 * Return: 0 on success and failure value on error 1307 */ 1308 static int ctucan_get_berr_counter(const struct net_device *ndev, struct can_berr_counter *bec) 1309 { 1310 struct ctucan_priv *priv = netdev_priv(ndev); 1311 int ret; 1312 1313 ctucan_netdev_dbg(ndev, "%s\n", __func__); 1314 1315 ret = pm_runtime_get_sync(priv->dev); 1316 if (ret < 0) { 1317 netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n", __func__, ret); 1318 pm_runtime_put_noidle(priv->dev); 1319 return ret; 1320 } 1321 1322 ctucan_get_rec_tec(priv, bec); 1323 pm_runtime_put(priv->dev); 1324 1325 return 0; 1326 } 1327 1328 static const struct net_device_ops ctucan_netdev_ops = { 1329 .ndo_open = ctucan_open, 1330 .ndo_stop = ctucan_close, 1331 .ndo_start_xmit = ctucan_start_xmit, 1332 .ndo_change_mtu = can_change_mtu, 1333 }; 1334 1335 int ctucan_suspend(struct device *dev) 1336 { 1337 struct net_device *ndev = dev_get_drvdata(dev); 1338 struct ctucan_priv *priv = netdev_priv(ndev); 1339 1340 ctucan_netdev_dbg(ndev, "%s\n", __func__); 1341 1342 if (netif_running(ndev)) { 1343 netif_stop_queue(ndev); 1344 netif_device_detach(ndev); 1345 } 1346 1347 priv->can.state = CAN_STATE_SLEEPING; 1348 1349 return 0; 1350 } 1351 EXPORT_SYMBOL(ctucan_suspend); 1352 1353 int ctucan_resume(struct device *dev) 1354 { 1355 struct net_device *ndev = dev_get_drvdata(dev); 1356 struct ctucan_priv *priv = netdev_priv(ndev); 1357 1358 ctucan_netdev_dbg(ndev, "%s\n", __func__); 1359 1360 priv->can.state = CAN_STATE_ERROR_ACTIVE; 1361 1362 if (netif_running(ndev)) { 1363 netif_device_attach(ndev); 1364 netif_start_queue(ndev); 1365 } 1366 1367 return 0; 1368 } 1369 EXPORT_SYMBOL(ctucan_resume); 1370 1371 int ctucan_probe_common(struct device *dev, void __iomem *addr, int irq, unsigned int ntxbufs, 1372 unsigned long can_clk_rate, int pm_enable_call, 1373 void (*set_drvdata_fnc)(struct device *dev, struct net_device *ndev)) 1374 { 1375 struct ctucan_priv *priv; 1376 struct net_device *ndev; 1377 int ret; 1378 1379 /* Create a CAN device instance */ 1380 ndev = alloc_candev(sizeof(struct ctucan_priv), ntxbufs); 1381 if (!ndev) 1382 return -ENOMEM; 1383 1384 priv = netdev_priv(ndev); 1385 spin_lock_init(&priv->tx_lock); 1386 INIT_LIST_HEAD(&priv->peers_on_pdev); 1387 priv->ntxbufs = ntxbufs; 1388 priv->dev = dev; 1389 priv->can.bittiming_const = &ctu_can_fd_bit_timing_max; 1390 priv->can.data_bittiming_const = &ctu_can_fd_bit_timing_data_max; 1391 priv->can.do_set_mode = ctucan_do_set_mode; 1392 1393 /* Needed for timing adjustment to be performed as soon as possible */ 1394 priv->can.do_set_bittiming = ctucan_set_bittiming; 1395 priv->can.do_set_data_bittiming = ctucan_set_data_bittiming; 1396 1397 priv->can.do_get_berr_counter = ctucan_get_berr_counter; 1398 priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK 1399 | CAN_CTRLMODE_LISTENONLY 1400 | CAN_CTRLMODE_FD 1401 | CAN_CTRLMODE_PRESUME_ACK 1402 | CAN_CTRLMODE_BERR_REPORTING 1403 | CAN_CTRLMODE_FD_NON_ISO 1404 | CAN_CTRLMODE_ONE_SHOT; 1405 priv->mem_base = addr; 1406 1407 /* Get IRQ for the device */ 1408 ndev->irq = irq; 1409 ndev->flags |= IFF_ECHO; /* We support local echo */ 1410 1411 if (set_drvdata_fnc) 1412 set_drvdata_fnc(dev, ndev); 1413 SET_NETDEV_DEV(ndev, dev); 1414 ndev->netdev_ops = &ctucan_netdev_ops; 1415 1416 /* Getting the can_clk info */ 1417 if (!can_clk_rate) { 1418 priv->can_clk = devm_clk_get(dev, NULL); 1419 if (IS_ERR(priv->can_clk)) { 1420 dev_err(dev, "Device clock not found.\n"); 1421 ret = PTR_ERR(priv->can_clk); 1422 goto err_free; 1423 } 1424 can_clk_rate = clk_get_rate(priv->can_clk); 1425 } 1426 1427 priv->write_reg = ctucan_write32_le; 1428 priv->read_reg = ctucan_read32_le; 1429 1430 if (pm_enable_call) 1431 pm_runtime_enable(dev); 1432 ret = pm_runtime_get_sync(dev); 1433 if (ret < 0) { 1434 netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n", 1435 __func__, ret); 1436 pm_runtime_put_noidle(priv->dev); 1437 goto err_pmdisable; 1438 } 1439 1440 /* Check for big-endianity and set according IO-accessors */ 1441 if ((ctucan_read32(priv, CTUCANFD_DEVICE_ID) & 0xFFFF) != CTUCANFD_ID) { 1442 priv->write_reg = ctucan_write32_be; 1443 priv->read_reg = ctucan_read32_be; 1444 if ((ctucan_read32(priv, CTUCANFD_DEVICE_ID) & 0xFFFF) != CTUCANFD_ID) { 1445 netdev_err(ndev, "CTU_CAN_FD signature not found\n"); 1446 ret = -ENODEV; 1447 goto err_deviceoff; 1448 } 1449 } 1450 1451 ret = ctucan_reset(ndev); 1452 if (ret < 0) 1453 goto err_deviceoff; 1454 1455 priv->can.clock.freq = can_clk_rate; 1456 1457 netif_napi_add(ndev, &priv->napi, ctucan_rx_poll, NAPI_POLL_WEIGHT); 1458 1459 ret = register_candev(ndev); 1460 if (ret) { 1461 dev_err(dev, "fail to register failed (err=%d)\n", ret); 1462 goto err_deviceoff; 1463 } 1464 1465 devm_can_led_init(ndev); 1466 1467 pm_runtime_put(dev); 1468 1469 netdev_dbg(ndev, "mem_base=0x%p irq=%d clock=%d, no. of txt buffers:%d\n", 1470 priv->mem_base, ndev->irq, priv->can.clock.freq, priv->ntxbufs); 1471 1472 return 0; 1473 1474 err_deviceoff: 1475 pm_runtime_put(priv->dev); 1476 err_pmdisable: 1477 if (pm_enable_call) 1478 pm_runtime_disable(dev); 1479 err_free: 1480 list_del_init(&priv->peers_on_pdev); 1481 free_candev(ndev); 1482 return ret; 1483 } 1484 EXPORT_SYMBOL(ctucan_probe_common); 1485 1486 MODULE_LICENSE("GPL"); 1487 MODULE_AUTHOR("Martin Jerabek <martin.jerabek01@gmail.com>"); 1488 MODULE_AUTHOR("Pavel Pisa <pisa@cmp.felk.cvut.cz>"); 1489 MODULE_AUTHOR("Ondrej Ille <ondrej.ille@gmail.com>"); 1490 MODULE_DESCRIPTION("CTU CAN FD interface"); 1491