1 /* 2 * Platform CAN bus driver for Bosch C_CAN controller 3 * 4 * Copyright (C) 2010 ST Microelectronics 5 * Bhupesh Sharma <bhupesh.sharma@st.com> 6 * 7 * Borrowed heavily from the C_CAN driver originally written by: 8 * Copyright (C) 2007 9 * - Sascha Hauer, Marc Kleine-Budde, Pengutronix <s.hauer@pengutronix.de> 10 * - Simon Kallweit, intefo AG <simon.kallweit@intefo.ch> 11 * 12 * Bosch C_CAN controller is compliant to CAN protocol version 2.0 part A and B. 13 * Bosch C_CAN user manual can be obtained from: 14 * http://www.semiconductors.bosch.de/media/en/pdf/ipmodules_1/c_can/ 15 * users_manual_c_can.pdf 16 * 17 * This file is licensed under the terms of the GNU General Public 18 * License version 2. This program is licensed "as is" without any 19 * warranty of any kind, whether express or implied. 20 */ 21 22 #include <linux/kernel.h> 23 #include <linux/version.h> 24 #include <linux/module.h> 25 #include <linux/interrupt.h> 26 #include <linux/delay.h> 27 #include <linux/netdevice.h> 28 #include <linux/if_arp.h> 29 #include <linux/if_ether.h> 30 #include <linux/list.h> 31 #include <linux/delay.h> 32 #include <linux/io.h> 33 #include <linux/platform_device.h> 34 #include <linux/clk.h> 35 36 #include <linux/can/dev.h> 37 38 #include "c_can.h" 39 40 /* 41 * 16-bit c_can registers can be arranged differently in the memory 42 * architecture of different implementations. For example: 16-bit 43 * registers can be aligned to a 16-bit boundary or 32-bit boundary etc. 44 * Handle the same by providing a common read/write interface. 45 */ 46 static u16 c_can_plat_read_reg_aligned_to_16bit(struct c_can_priv *priv, 47 void *reg) 48 { 49 return readw(reg); 50 } 51 52 static void c_can_plat_write_reg_aligned_to_16bit(struct c_can_priv *priv, 53 void *reg, u16 val) 54 { 55 writew(val, reg); 56 } 57 58 static u16 c_can_plat_read_reg_aligned_to_32bit(struct c_can_priv *priv, 59 void *reg) 60 { 61 return readw(reg + (long)reg - (long)priv->regs); 62 } 63 64 static void c_can_plat_write_reg_aligned_to_32bit(struct c_can_priv *priv, 65 void *reg, u16 val) 66 { 67 writew(val, reg + (long)reg - (long)priv->regs); 68 } 69 70 static int __devinit c_can_plat_probe(struct platform_device *pdev) 71 { 72 int ret; 73 void __iomem *addr; 74 struct net_device *dev; 75 struct c_can_priv *priv; 76 struct resource *mem; 77 int irq; 78 #ifdef CONFIG_HAVE_CLK 79 struct clk *clk; 80 81 /* get the appropriate clk */ 82 clk = clk_get(&pdev->dev, NULL); 83 if (IS_ERR(clk)) { 84 dev_err(&pdev->dev, "no clock defined\n"); 85 ret = -ENODEV; 86 goto exit; 87 } 88 #endif 89 90 /* get the platform data */ 91 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 92 irq = platform_get_irq(pdev, 0); 93 if (!mem || irq <= 0) { 94 ret = -ENODEV; 95 goto exit_free_clk; 96 } 97 98 if (!request_mem_region(mem->start, resource_size(mem), 99 KBUILD_MODNAME)) { 100 dev_err(&pdev->dev, "resource unavailable\n"); 101 ret = -ENODEV; 102 goto exit_free_clk; 103 } 104 105 addr = ioremap(mem->start, resource_size(mem)); 106 if (!addr) { 107 dev_err(&pdev->dev, "failed to map can port\n"); 108 ret = -ENOMEM; 109 goto exit_release_mem; 110 } 111 112 /* allocate the c_can device */ 113 dev = alloc_c_can_dev(); 114 if (!dev) { 115 ret = -ENOMEM; 116 goto exit_iounmap; 117 } 118 119 priv = netdev_priv(dev); 120 121 dev->irq = irq; 122 priv->regs = addr; 123 #ifdef CONFIG_HAVE_CLK 124 priv->can.clock.freq = clk_get_rate(clk); 125 priv->priv = clk; 126 #endif 127 128 switch (mem->flags & IORESOURCE_MEM_TYPE_MASK) { 129 case IORESOURCE_MEM_32BIT: 130 priv->read_reg = c_can_plat_read_reg_aligned_to_32bit; 131 priv->write_reg = c_can_plat_write_reg_aligned_to_32bit; 132 break; 133 case IORESOURCE_MEM_16BIT: 134 default: 135 priv->read_reg = c_can_plat_read_reg_aligned_to_16bit; 136 priv->write_reg = c_can_plat_write_reg_aligned_to_16bit; 137 break; 138 } 139 140 platform_set_drvdata(pdev, dev); 141 SET_NETDEV_DEV(dev, &pdev->dev); 142 143 ret = register_c_can_dev(dev); 144 if (ret) { 145 dev_err(&pdev->dev, "registering %s failed (err=%d)\n", 146 KBUILD_MODNAME, ret); 147 goto exit_free_device; 148 } 149 150 dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n", 151 KBUILD_MODNAME, priv->regs, dev->irq); 152 return 0; 153 154 exit_free_device: 155 platform_set_drvdata(pdev, NULL); 156 free_c_can_dev(dev); 157 exit_iounmap: 158 iounmap(addr); 159 exit_release_mem: 160 release_mem_region(mem->start, resource_size(mem)); 161 exit_free_clk: 162 #ifdef CONFIG_HAVE_CLK 163 clk_put(clk); 164 exit: 165 #endif 166 dev_err(&pdev->dev, "probe failed\n"); 167 168 return ret; 169 } 170 171 static int __devexit c_can_plat_remove(struct platform_device *pdev) 172 { 173 struct net_device *dev = platform_get_drvdata(pdev); 174 struct c_can_priv *priv = netdev_priv(dev); 175 struct resource *mem; 176 177 unregister_c_can_dev(dev); 178 platform_set_drvdata(pdev, NULL); 179 180 free_c_can_dev(dev); 181 iounmap(priv->regs); 182 183 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); 184 release_mem_region(mem->start, resource_size(mem)); 185 186 #ifdef CONFIG_HAVE_CLK 187 clk_put(priv->priv); 188 #endif 189 190 return 0; 191 } 192 193 static struct platform_driver c_can_plat_driver = { 194 .driver = { 195 .name = KBUILD_MODNAME, 196 .owner = THIS_MODULE, 197 }, 198 .probe = c_can_plat_probe, 199 .remove = __devexit_p(c_can_plat_remove), 200 }; 201 202 static int __init c_can_plat_init(void) 203 { 204 return platform_driver_register(&c_can_plat_driver); 205 } 206 module_init(c_can_plat_init); 207 208 static void __exit c_can_plat_exit(void) 209 { 210 platform_driver_unregister(&c_can_plat_driver); 211 } 212 module_exit(c_can_plat_exit); 213 214 MODULE_AUTHOR("Bhupesh Sharma <bhupesh.sharma@st.com>"); 215 MODULE_LICENSE("GPL v2"); 216 MODULE_DESCRIPTION("Platform CAN bus driver for Bosch C_CAN controller"); 217