1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7 #include <linux/slab.h> 8 #include <linux/sort.h> 9 #include <linux/mtd/spi-nor.h> 10 11 #include "core.h" 12 13 #define SFDP_PARAM_HEADER_ID(p) (((p)->id_msb << 8) | (p)->id_lsb) 14 #define SFDP_PARAM_HEADER_PTP(p) \ 15 (((p)->parameter_table_pointer[2] << 16) | \ 16 ((p)->parameter_table_pointer[1] << 8) | \ 17 ((p)->parameter_table_pointer[0] << 0)) 18 19 #define SFDP_BFPT_ID 0xff00 /* Basic Flash Parameter Table */ 20 #define SFDP_SECTOR_MAP_ID 0xff81 /* Sector Map Table */ 21 #define SFDP_4BAIT_ID 0xff84 /* 4-byte Address Instruction Table */ 22 23 #define SFDP_SIGNATURE 0x50444653U 24 #define SFDP_JESD216_MAJOR 1 25 #define SFDP_JESD216_MINOR 0 26 #define SFDP_JESD216A_MINOR 5 27 #define SFDP_JESD216B_MINOR 6 28 29 struct sfdp_header { 30 u32 signature; /* Ox50444653U <=> "SFDP" */ 31 u8 minor; 32 u8 major; 33 u8 nph; /* 0-base number of parameter headers */ 34 u8 unused; 35 36 /* Basic Flash Parameter Table. */ 37 struct sfdp_parameter_header bfpt_header; 38 }; 39 40 /* Fast Read settings. */ 41 struct sfdp_bfpt_read { 42 /* The Fast Read x-y-z hardware capability in params->hwcaps.mask. */ 43 u32 hwcaps; 44 45 /* 46 * The <supported_bit> bit in <supported_dword> BFPT DWORD tells us 47 * whether the Fast Read x-y-z command is supported. 48 */ 49 u32 supported_dword; 50 u32 supported_bit; 51 52 /* 53 * The half-word at offset <setting_shift> in <setting_dword> BFPT DWORD 54 * encodes the op code, the number of mode clocks and the number of wait 55 * states to be used by Fast Read x-y-z command. 56 */ 57 u32 settings_dword; 58 u32 settings_shift; 59 60 /* The SPI protocol for this Fast Read x-y-z command. */ 61 enum spi_nor_protocol proto; 62 }; 63 64 struct sfdp_bfpt_erase { 65 /* 66 * The half-word at offset <shift> in DWORD <dwoard> encodes the 67 * op code and erase sector size to be used by Sector Erase commands. 68 */ 69 u32 dword; 70 u32 shift; 71 }; 72 73 #define SMPT_CMD_ADDRESS_LEN_MASK GENMASK(23, 22) 74 #define SMPT_CMD_ADDRESS_LEN_0 (0x0UL << 22) 75 #define SMPT_CMD_ADDRESS_LEN_3 (0x1UL << 22) 76 #define SMPT_CMD_ADDRESS_LEN_4 (0x2UL << 22) 77 #define SMPT_CMD_ADDRESS_LEN_USE_CURRENT (0x3UL << 22) 78 79 #define SMPT_CMD_READ_DUMMY_MASK GENMASK(19, 16) 80 #define SMPT_CMD_READ_DUMMY_SHIFT 16 81 #define SMPT_CMD_READ_DUMMY(_cmd) \ 82 (((_cmd) & SMPT_CMD_READ_DUMMY_MASK) >> SMPT_CMD_READ_DUMMY_SHIFT) 83 #define SMPT_CMD_READ_DUMMY_IS_VARIABLE 0xfUL 84 85 #define SMPT_CMD_READ_DATA_MASK GENMASK(31, 24) 86 #define SMPT_CMD_READ_DATA_SHIFT 24 87 #define SMPT_CMD_READ_DATA(_cmd) \ 88 (((_cmd) & SMPT_CMD_READ_DATA_MASK) >> SMPT_CMD_READ_DATA_SHIFT) 89 90 #define SMPT_CMD_OPCODE_MASK GENMASK(15, 8) 91 #define SMPT_CMD_OPCODE_SHIFT 8 92 #define SMPT_CMD_OPCODE(_cmd) \ 93 (((_cmd) & SMPT_CMD_OPCODE_MASK) >> SMPT_CMD_OPCODE_SHIFT) 94 95 #define SMPT_MAP_REGION_COUNT_MASK GENMASK(23, 16) 96 #define SMPT_MAP_REGION_COUNT_SHIFT 16 97 #define SMPT_MAP_REGION_COUNT(_header) \ 98 ((((_header) & SMPT_MAP_REGION_COUNT_MASK) >> \ 99 SMPT_MAP_REGION_COUNT_SHIFT) + 1) 100 101 #define SMPT_MAP_ID_MASK GENMASK(15, 8) 102 #define SMPT_MAP_ID_SHIFT 8 103 #define SMPT_MAP_ID(_header) \ 104 (((_header) & SMPT_MAP_ID_MASK) >> SMPT_MAP_ID_SHIFT) 105 106 #define SMPT_MAP_REGION_SIZE_MASK GENMASK(31, 8) 107 #define SMPT_MAP_REGION_SIZE_SHIFT 8 108 #define SMPT_MAP_REGION_SIZE(_region) \ 109 (((((_region) & SMPT_MAP_REGION_SIZE_MASK) >> \ 110 SMPT_MAP_REGION_SIZE_SHIFT) + 1) * 256) 111 112 #define SMPT_MAP_REGION_ERASE_TYPE_MASK GENMASK(3, 0) 113 #define SMPT_MAP_REGION_ERASE_TYPE(_region) \ 114 ((_region) & SMPT_MAP_REGION_ERASE_TYPE_MASK) 115 116 #define SMPT_DESC_TYPE_MAP BIT(1) 117 #define SMPT_DESC_END BIT(0) 118 119 #define SFDP_4BAIT_DWORD_MAX 2 120 121 struct sfdp_4bait { 122 /* The hardware capability. */ 123 u32 hwcaps; 124 125 /* 126 * The <supported_bit> bit in DWORD1 of the 4BAIT tells us whether 127 * the associated 4-byte address op code is supported. 128 */ 129 u32 supported_bit; 130 }; 131 132 /** 133 * spi_nor_read_raw() - raw read of serial flash memory. read_opcode, 134 * addr_width and read_dummy members of the struct spi_nor 135 * should be previously 136 * set. 137 * @nor: pointer to a 'struct spi_nor' 138 * @addr: offset in the serial flash memory 139 * @len: number of bytes to read 140 * @buf: buffer where the data is copied into (dma-safe memory) 141 * 142 * Return: 0 on success, -errno otherwise. 143 */ 144 static int spi_nor_read_raw(struct spi_nor *nor, u32 addr, size_t len, u8 *buf) 145 { 146 ssize_t ret; 147 148 while (len) { 149 ret = spi_nor_read_data(nor, addr, len, buf); 150 if (ret < 0) 151 return ret; 152 if (!ret || ret > len) 153 return -EIO; 154 155 buf += ret; 156 addr += ret; 157 len -= ret; 158 } 159 return 0; 160 } 161 162 /** 163 * spi_nor_read_sfdp() - read Serial Flash Discoverable Parameters. 164 * @nor: pointer to a 'struct spi_nor' 165 * @addr: offset in the SFDP area to start reading data from 166 * @len: number of bytes to read 167 * @buf: buffer where the SFDP data are copied into (dma-safe memory) 168 * 169 * Whatever the actual numbers of bytes for address and dummy cycles are 170 * for (Fast) Read commands, the Read SFDP (5Ah) instruction is always 171 * followed by a 3-byte address and 8 dummy clock cycles. 172 * 173 * Return: 0 on success, -errno otherwise. 174 */ 175 static int spi_nor_read_sfdp(struct spi_nor *nor, u32 addr, 176 size_t len, void *buf) 177 { 178 u8 addr_width, read_opcode, read_dummy; 179 int ret; 180 181 read_opcode = nor->read_opcode; 182 addr_width = nor->addr_width; 183 read_dummy = nor->read_dummy; 184 185 nor->read_opcode = SPINOR_OP_RDSFDP; 186 nor->addr_width = 3; 187 nor->read_dummy = 8; 188 189 ret = spi_nor_read_raw(nor, addr, len, buf); 190 191 nor->read_opcode = read_opcode; 192 nor->addr_width = addr_width; 193 nor->read_dummy = read_dummy; 194 195 return ret; 196 } 197 198 /** 199 * spi_nor_read_sfdp_dma_unsafe() - read Serial Flash Discoverable Parameters. 200 * @nor: pointer to a 'struct spi_nor' 201 * @addr: offset in the SFDP area to start reading data from 202 * @len: number of bytes to read 203 * @buf: buffer where the SFDP data are copied into 204 * 205 * Wrap spi_nor_read_sfdp() using a kmalloc'ed bounce buffer as @buf is now not 206 * guaranteed to be dma-safe. 207 * 208 * Return: -ENOMEM if kmalloc() fails, the return code of spi_nor_read_sfdp() 209 * otherwise. 210 */ 211 static int spi_nor_read_sfdp_dma_unsafe(struct spi_nor *nor, u32 addr, 212 size_t len, void *buf) 213 { 214 void *dma_safe_buf; 215 int ret; 216 217 dma_safe_buf = kmalloc(len, GFP_KERNEL); 218 if (!dma_safe_buf) 219 return -ENOMEM; 220 221 ret = spi_nor_read_sfdp(nor, addr, len, dma_safe_buf); 222 memcpy(buf, dma_safe_buf, len); 223 kfree(dma_safe_buf); 224 225 return ret; 226 } 227 228 static void 229 spi_nor_set_read_settings_from_bfpt(struct spi_nor_read_command *read, 230 u16 half, 231 enum spi_nor_protocol proto) 232 { 233 read->num_mode_clocks = (half >> 5) & 0x07; 234 read->num_wait_states = (half >> 0) & 0x1f; 235 read->opcode = (half >> 8) & 0xff; 236 read->proto = proto; 237 } 238 239 static const struct sfdp_bfpt_read sfdp_bfpt_reads[] = { 240 /* Fast Read 1-1-2 */ 241 { 242 SNOR_HWCAPS_READ_1_1_2, 243 BFPT_DWORD(1), BIT(16), /* Supported bit */ 244 BFPT_DWORD(4), 0, /* Settings */ 245 SNOR_PROTO_1_1_2, 246 }, 247 248 /* Fast Read 1-2-2 */ 249 { 250 SNOR_HWCAPS_READ_1_2_2, 251 BFPT_DWORD(1), BIT(20), /* Supported bit */ 252 BFPT_DWORD(4), 16, /* Settings */ 253 SNOR_PROTO_1_2_2, 254 }, 255 256 /* Fast Read 2-2-2 */ 257 { 258 SNOR_HWCAPS_READ_2_2_2, 259 BFPT_DWORD(5), BIT(0), /* Supported bit */ 260 BFPT_DWORD(6), 16, /* Settings */ 261 SNOR_PROTO_2_2_2, 262 }, 263 264 /* Fast Read 1-1-4 */ 265 { 266 SNOR_HWCAPS_READ_1_1_4, 267 BFPT_DWORD(1), BIT(22), /* Supported bit */ 268 BFPT_DWORD(3), 16, /* Settings */ 269 SNOR_PROTO_1_1_4, 270 }, 271 272 /* Fast Read 1-4-4 */ 273 { 274 SNOR_HWCAPS_READ_1_4_4, 275 BFPT_DWORD(1), BIT(21), /* Supported bit */ 276 BFPT_DWORD(3), 0, /* Settings */ 277 SNOR_PROTO_1_4_4, 278 }, 279 280 /* Fast Read 4-4-4 */ 281 { 282 SNOR_HWCAPS_READ_4_4_4, 283 BFPT_DWORD(5), BIT(4), /* Supported bit */ 284 BFPT_DWORD(7), 16, /* Settings */ 285 SNOR_PROTO_4_4_4, 286 }, 287 }; 288 289 static const struct sfdp_bfpt_erase sfdp_bfpt_erases[] = { 290 /* Erase Type 1 in DWORD8 bits[15:0] */ 291 {BFPT_DWORD(8), 0}, 292 293 /* Erase Type 2 in DWORD8 bits[31:16] */ 294 {BFPT_DWORD(8), 16}, 295 296 /* Erase Type 3 in DWORD9 bits[15:0] */ 297 {BFPT_DWORD(9), 0}, 298 299 /* Erase Type 4 in DWORD9 bits[31:16] */ 300 {BFPT_DWORD(9), 16}, 301 }; 302 303 /** 304 * spi_nor_set_erase_settings_from_bfpt() - set erase type settings from BFPT 305 * @erase: pointer to a structure that describes a SPI NOR erase type 306 * @size: the size of the sector/block erased by the erase type 307 * @opcode: the SPI command op code to erase the sector/block 308 * @i: erase type index as sorted in the Basic Flash Parameter Table 309 * 310 * The supported Erase Types will be sorted at init in ascending order, with 311 * the smallest Erase Type size being the first member in the erase_type array 312 * of the spi_nor_erase_map structure. Save the Erase Type index as sorted in 313 * the Basic Flash Parameter Table since it will be used later on to 314 * synchronize with the supported Erase Types defined in SFDP optional tables. 315 */ 316 static void 317 spi_nor_set_erase_settings_from_bfpt(struct spi_nor_erase_type *erase, 318 u32 size, u8 opcode, u8 i) 319 { 320 erase->idx = i; 321 spi_nor_set_erase_type(erase, size, opcode); 322 } 323 324 /** 325 * spi_nor_map_cmp_erase_type() - compare the map's erase types by size 326 * @l: member in the left half of the map's erase_type array 327 * @r: member in the right half of the map's erase_type array 328 * 329 * Comparison function used in the sort() call to sort in ascending order the 330 * map's erase types, the smallest erase type size being the first member in the 331 * sorted erase_type array. 332 * 333 * Return: the result of @l->size - @r->size 334 */ 335 static int spi_nor_map_cmp_erase_type(const void *l, const void *r) 336 { 337 const struct spi_nor_erase_type *left = l, *right = r; 338 339 return left->size - right->size; 340 } 341 342 /** 343 * spi_nor_sort_erase_mask() - sort erase mask 344 * @map: the erase map of the SPI NOR 345 * @erase_mask: the erase type mask to be sorted 346 * 347 * Replicate the sort done for the map's erase types in BFPT: sort the erase 348 * mask in ascending order with the smallest erase type size starting from 349 * BIT(0) in the sorted erase mask. 350 * 351 * Return: sorted erase mask. 352 */ 353 static u8 spi_nor_sort_erase_mask(struct spi_nor_erase_map *map, u8 erase_mask) 354 { 355 struct spi_nor_erase_type *erase_type = map->erase_type; 356 int i; 357 u8 sorted_erase_mask = 0; 358 359 if (!erase_mask) 360 return 0; 361 362 /* Replicate the sort done for the map's erase types. */ 363 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) 364 if (erase_type[i].size && erase_mask & BIT(erase_type[i].idx)) 365 sorted_erase_mask |= BIT(i); 366 367 return sorted_erase_mask; 368 } 369 370 /** 371 * spi_nor_regions_sort_erase_types() - sort erase types in each region 372 * @map: the erase map of the SPI NOR 373 * 374 * Function assumes that the erase types defined in the erase map are already 375 * sorted in ascending order, with the smallest erase type size being the first 376 * member in the erase_type array. It replicates the sort done for the map's 377 * erase types. Each region's erase bitmask will indicate which erase types are 378 * supported from the sorted erase types defined in the erase map. 379 * Sort the all region's erase type at init in order to speed up the process of 380 * finding the best erase command at runtime. 381 */ 382 static void spi_nor_regions_sort_erase_types(struct spi_nor_erase_map *map) 383 { 384 struct spi_nor_erase_region *region = map->regions; 385 u8 region_erase_mask, sorted_erase_mask; 386 387 while (region) { 388 region_erase_mask = region->offset & SNOR_ERASE_TYPE_MASK; 389 390 sorted_erase_mask = spi_nor_sort_erase_mask(map, 391 region_erase_mask); 392 393 /* Overwrite erase mask. */ 394 region->offset = (region->offset & ~SNOR_ERASE_TYPE_MASK) | 395 sorted_erase_mask; 396 397 region = spi_nor_region_next(region); 398 } 399 } 400 401 /** 402 * spi_nor_parse_bfpt() - read and parse the Basic Flash Parameter Table. 403 * @nor: pointer to a 'struct spi_nor' 404 * @bfpt_header: pointer to the 'struct sfdp_parameter_header' describing 405 * the Basic Flash Parameter Table length and version 406 * @params: pointer to the 'struct spi_nor_flash_parameter' to be 407 * filled 408 * 409 * The Basic Flash Parameter Table is the main and only mandatory table as 410 * defined by the SFDP (JESD216) specification. 411 * It provides us with the total size (memory density) of the data array and 412 * the number of address bytes for Fast Read, Page Program and Sector Erase 413 * commands. 414 * For Fast READ commands, it also gives the number of mode clock cycles and 415 * wait states (regrouped in the number of dummy clock cycles) for each 416 * supported instruction op code. 417 * For Page Program, the page size is now available since JESD216 rev A, however 418 * the supported instruction op codes are still not provided. 419 * For Sector Erase commands, this table stores the supported instruction op 420 * codes and the associated sector sizes. 421 * Finally, the Quad Enable Requirements (QER) are also available since JESD216 422 * rev A. The QER bits encode the manufacturer dependent procedure to be 423 * executed to set the Quad Enable (QE) bit in some internal register of the 424 * Quad SPI memory. Indeed the QE bit, when it exists, must be set before 425 * sending any Quad SPI command to the memory. Actually, setting the QE bit 426 * tells the memory to reassign its WP# and HOLD#/RESET# pins to functions IO2 427 * and IO3 hence enabling 4 (Quad) I/O lines. 428 * 429 * Return: 0 on success, -errno otherwise. 430 */ 431 static int spi_nor_parse_bfpt(struct spi_nor *nor, 432 const struct sfdp_parameter_header *bfpt_header, 433 struct spi_nor_flash_parameter *params) 434 { 435 struct spi_nor_erase_map *map = ¶ms->erase_map; 436 struct spi_nor_erase_type *erase_type = map->erase_type; 437 struct sfdp_bfpt bfpt; 438 size_t len; 439 int i, cmd, err; 440 u32 addr; 441 u16 half; 442 u8 erase_mask; 443 444 /* JESD216 Basic Flash Parameter Table length is at least 9 DWORDs. */ 445 if (bfpt_header->length < BFPT_DWORD_MAX_JESD216) 446 return -EINVAL; 447 448 /* Read the Basic Flash Parameter Table. */ 449 len = min_t(size_t, sizeof(bfpt), 450 bfpt_header->length * sizeof(u32)); 451 addr = SFDP_PARAM_HEADER_PTP(bfpt_header); 452 memset(&bfpt, 0, sizeof(bfpt)); 453 err = spi_nor_read_sfdp_dma_unsafe(nor, addr, len, &bfpt); 454 if (err < 0) 455 return err; 456 457 /* Fix endianness of the BFPT DWORDs. */ 458 le32_to_cpu_array(bfpt.dwords, BFPT_DWORD_MAX); 459 460 /* Number of address bytes. */ 461 switch (bfpt.dwords[BFPT_DWORD(1)] & BFPT_DWORD1_ADDRESS_BYTES_MASK) { 462 case BFPT_DWORD1_ADDRESS_BYTES_3_ONLY: 463 nor->addr_width = 3; 464 break; 465 466 case BFPT_DWORD1_ADDRESS_BYTES_4_ONLY: 467 nor->addr_width = 4; 468 break; 469 470 default: 471 break; 472 } 473 474 /* Flash Memory Density (in bits). */ 475 params->size = bfpt.dwords[BFPT_DWORD(2)]; 476 if (params->size & BIT(31)) { 477 params->size &= ~BIT(31); 478 479 /* 480 * Prevent overflows on params->size. Anyway, a NOR of 2^64 481 * bits is unlikely to exist so this error probably means 482 * the BFPT we are reading is corrupted/wrong. 483 */ 484 if (params->size > 63) 485 return -EINVAL; 486 487 params->size = 1ULL << params->size; 488 } else { 489 params->size++; 490 } 491 params->size >>= 3; /* Convert to bytes. */ 492 493 /* Fast Read settings. */ 494 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_reads); i++) { 495 const struct sfdp_bfpt_read *rd = &sfdp_bfpt_reads[i]; 496 struct spi_nor_read_command *read; 497 498 if (!(bfpt.dwords[rd->supported_dword] & rd->supported_bit)) { 499 params->hwcaps.mask &= ~rd->hwcaps; 500 continue; 501 } 502 503 params->hwcaps.mask |= rd->hwcaps; 504 cmd = spi_nor_hwcaps_read2cmd(rd->hwcaps); 505 read = ¶ms->reads[cmd]; 506 half = bfpt.dwords[rd->settings_dword] >> rd->settings_shift; 507 spi_nor_set_read_settings_from_bfpt(read, half, rd->proto); 508 } 509 510 /* 511 * Sector Erase settings. Reinitialize the uniform erase map using the 512 * Erase Types defined in the bfpt table. 513 */ 514 erase_mask = 0; 515 memset(¶ms->erase_map, 0, sizeof(params->erase_map)); 516 for (i = 0; i < ARRAY_SIZE(sfdp_bfpt_erases); i++) { 517 const struct sfdp_bfpt_erase *er = &sfdp_bfpt_erases[i]; 518 u32 erasesize; 519 u8 opcode; 520 521 half = bfpt.dwords[er->dword] >> er->shift; 522 erasesize = half & 0xff; 523 524 /* erasesize == 0 means this Erase Type is not supported. */ 525 if (!erasesize) 526 continue; 527 528 erasesize = 1U << erasesize; 529 opcode = (half >> 8) & 0xff; 530 erase_mask |= BIT(i); 531 spi_nor_set_erase_settings_from_bfpt(&erase_type[i], erasesize, 532 opcode, i); 533 } 534 spi_nor_init_uniform_erase_map(map, erase_mask, params->size); 535 /* 536 * Sort all the map's Erase Types in ascending order with the smallest 537 * erase size being the first member in the erase_type array. 538 */ 539 sort(erase_type, SNOR_ERASE_TYPE_MAX, sizeof(erase_type[0]), 540 spi_nor_map_cmp_erase_type, NULL); 541 /* 542 * Sort the erase types in the uniform region in order to update the 543 * uniform_erase_type bitmask. The bitmask will be used later on when 544 * selecting the uniform erase. 545 */ 546 spi_nor_regions_sort_erase_types(map); 547 map->uniform_erase_type = map->uniform_region.offset & 548 SNOR_ERASE_TYPE_MASK; 549 550 /* Stop here if not JESD216 rev A or later. */ 551 if (bfpt_header->length < BFPT_DWORD_MAX) 552 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, 553 params); 554 555 /* Page size: this field specifies 'N' so the page size = 2^N bytes. */ 556 params->page_size = bfpt.dwords[BFPT_DWORD(11)]; 557 params->page_size &= BFPT_DWORD11_PAGE_SIZE_MASK; 558 params->page_size >>= BFPT_DWORD11_PAGE_SIZE_SHIFT; 559 params->page_size = 1U << params->page_size; 560 561 /* Quad Enable Requirements. */ 562 switch (bfpt.dwords[BFPT_DWORD(15)] & BFPT_DWORD15_QER_MASK) { 563 case BFPT_DWORD15_QER_NONE: 564 params->quad_enable = NULL; 565 break; 566 567 case BFPT_DWORD15_QER_SR2_BIT1_BUGGY: 568 /* 569 * Writing only one byte to the Status Register has the 570 * side-effect of clearing Status Register 2. 571 */ 572 case BFPT_DWORD15_QER_SR2_BIT1_NO_RD: 573 /* 574 * Read Configuration Register (35h) instruction is not 575 * supported. 576 */ 577 nor->flags |= SNOR_F_HAS_16BIT_SR | SNOR_F_NO_READ_CR; 578 params->quad_enable = spi_nor_sr2_bit1_quad_enable; 579 break; 580 581 case BFPT_DWORD15_QER_SR1_BIT6: 582 nor->flags &= ~SNOR_F_HAS_16BIT_SR; 583 params->quad_enable = spi_nor_sr1_bit6_quad_enable; 584 break; 585 586 case BFPT_DWORD15_QER_SR2_BIT7: 587 nor->flags &= ~SNOR_F_HAS_16BIT_SR; 588 params->quad_enable = spi_nor_sr2_bit7_quad_enable; 589 break; 590 591 case BFPT_DWORD15_QER_SR2_BIT1: 592 /* 593 * JESD216 rev B or later does not specify if writing only one 594 * byte to the Status Register clears or not the Status 595 * Register 2, so let's be cautious and keep the default 596 * assumption of a 16-bit Write Status (01h) command. 597 */ 598 nor->flags |= SNOR_F_HAS_16BIT_SR; 599 600 params->quad_enable = spi_nor_sr2_bit1_quad_enable; 601 break; 602 603 default: 604 return -EINVAL; 605 } 606 607 return spi_nor_post_bfpt_fixups(nor, bfpt_header, &bfpt, params); 608 } 609 610 /** 611 * spi_nor_smpt_addr_width() - return the address width used in the 612 * configuration detection command. 613 * @nor: pointer to a 'struct spi_nor' 614 * @settings: configuration detection command descriptor, dword1 615 */ 616 static u8 spi_nor_smpt_addr_width(const struct spi_nor *nor, const u32 settings) 617 { 618 switch (settings & SMPT_CMD_ADDRESS_LEN_MASK) { 619 case SMPT_CMD_ADDRESS_LEN_0: 620 return 0; 621 case SMPT_CMD_ADDRESS_LEN_3: 622 return 3; 623 case SMPT_CMD_ADDRESS_LEN_4: 624 return 4; 625 case SMPT_CMD_ADDRESS_LEN_USE_CURRENT: 626 default: 627 return nor->addr_width; 628 } 629 } 630 631 /** 632 * spi_nor_smpt_read_dummy() - return the configuration detection command read 633 * latency, in clock cycles. 634 * @nor: pointer to a 'struct spi_nor' 635 * @settings: configuration detection command descriptor, dword1 636 * 637 * Return: the number of dummy cycles for an SMPT read 638 */ 639 static u8 spi_nor_smpt_read_dummy(const struct spi_nor *nor, const u32 settings) 640 { 641 u8 read_dummy = SMPT_CMD_READ_DUMMY(settings); 642 643 if (read_dummy == SMPT_CMD_READ_DUMMY_IS_VARIABLE) 644 return nor->read_dummy; 645 return read_dummy; 646 } 647 648 /** 649 * spi_nor_get_map_in_use() - get the configuration map in use 650 * @nor: pointer to a 'struct spi_nor' 651 * @smpt: pointer to the sector map parameter table 652 * @smpt_len: sector map parameter table length 653 * 654 * Return: pointer to the map in use, ERR_PTR(-errno) otherwise. 655 */ 656 static const u32 *spi_nor_get_map_in_use(struct spi_nor *nor, const u32 *smpt, 657 u8 smpt_len) 658 { 659 const u32 *ret; 660 u8 *buf; 661 u32 addr; 662 int err; 663 u8 i; 664 u8 addr_width, read_opcode, read_dummy; 665 u8 read_data_mask, map_id; 666 667 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */ 668 buf = kmalloc(sizeof(*buf), GFP_KERNEL); 669 if (!buf) 670 return ERR_PTR(-ENOMEM); 671 672 addr_width = nor->addr_width; 673 read_dummy = nor->read_dummy; 674 read_opcode = nor->read_opcode; 675 676 map_id = 0; 677 /* Determine if there are any optional Detection Command Descriptors */ 678 for (i = 0; i < smpt_len; i += 2) { 679 if (smpt[i] & SMPT_DESC_TYPE_MAP) 680 break; 681 682 read_data_mask = SMPT_CMD_READ_DATA(smpt[i]); 683 nor->addr_width = spi_nor_smpt_addr_width(nor, smpt[i]); 684 nor->read_dummy = spi_nor_smpt_read_dummy(nor, smpt[i]); 685 nor->read_opcode = SMPT_CMD_OPCODE(smpt[i]); 686 addr = smpt[i + 1]; 687 688 err = spi_nor_read_raw(nor, addr, 1, buf); 689 if (err) { 690 ret = ERR_PTR(err); 691 goto out; 692 } 693 694 /* 695 * Build an index value that is used to select the Sector Map 696 * Configuration that is currently in use. 697 */ 698 map_id = map_id << 1 | !!(*buf & read_data_mask); 699 } 700 701 /* 702 * If command descriptors are provided, they always precede map 703 * descriptors in the table. There is no need to start the iteration 704 * over smpt array all over again. 705 * 706 * Find the matching configuration map. 707 */ 708 ret = ERR_PTR(-EINVAL); 709 while (i < smpt_len) { 710 if (SMPT_MAP_ID(smpt[i]) == map_id) { 711 ret = smpt + i; 712 break; 713 } 714 715 /* 716 * If there are no more configuration map descriptors and no 717 * configuration ID matched the configuration identifier, the 718 * sector address map is unknown. 719 */ 720 if (smpt[i] & SMPT_DESC_END) 721 break; 722 723 /* increment the table index to the next map */ 724 i += SMPT_MAP_REGION_COUNT(smpt[i]) + 1; 725 } 726 727 /* fall through */ 728 out: 729 kfree(buf); 730 nor->addr_width = addr_width; 731 nor->read_dummy = read_dummy; 732 nor->read_opcode = read_opcode; 733 return ret; 734 } 735 736 static void spi_nor_region_mark_end(struct spi_nor_erase_region *region) 737 { 738 region->offset |= SNOR_LAST_REGION; 739 } 740 741 static void spi_nor_region_mark_overlay(struct spi_nor_erase_region *region) 742 { 743 region->offset |= SNOR_OVERLAID_REGION; 744 } 745 746 /** 747 * spi_nor_region_check_overlay() - set overlay bit when the region is overlaid 748 * @region: pointer to a structure that describes a SPI NOR erase region 749 * @erase: pointer to a structure that describes a SPI NOR erase type 750 * @erase_type: erase type bitmask 751 */ 752 static void 753 spi_nor_region_check_overlay(struct spi_nor_erase_region *region, 754 const struct spi_nor_erase_type *erase, 755 const u8 erase_type) 756 { 757 int i; 758 759 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) { 760 if (!(erase_type & BIT(i))) 761 continue; 762 if (region->size & erase[i].size_mask) { 763 spi_nor_region_mark_overlay(region); 764 return; 765 } 766 } 767 } 768 769 /** 770 * spi_nor_init_non_uniform_erase_map() - initialize the non-uniform erase map 771 * @nor: pointer to a 'struct spi_nor' 772 * @params: pointer to a duplicate 'struct spi_nor_flash_parameter' that is 773 * used for storing SFDP parsed data 774 * @smpt: pointer to the sector map parameter table 775 * 776 * Return: 0 on success, -errno otherwise. 777 */ 778 static int 779 spi_nor_init_non_uniform_erase_map(struct spi_nor *nor, 780 struct spi_nor_flash_parameter *params, 781 const u32 *smpt) 782 { 783 struct spi_nor_erase_map *map = ¶ms->erase_map; 784 struct spi_nor_erase_type *erase = map->erase_type; 785 struct spi_nor_erase_region *region; 786 u64 offset; 787 u32 region_count; 788 int i, j; 789 u8 uniform_erase_type, save_uniform_erase_type; 790 u8 erase_type, regions_erase_type; 791 792 region_count = SMPT_MAP_REGION_COUNT(*smpt); 793 /* 794 * The regions will be freed when the driver detaches from the 795 * device. 796 */ 797 region = devm_kcalloc(nor->dev, region_count, sizeof(*region), 798 GFP_KERNEL); 799 if (!region) 800 return -ENOMEM; 801 map->regions = region; 802 803 uniform_erase_type = 0xff; 804 regions_erase_type = 0; 805 offset = 0; 806 /* Populate regions. */ 807 for (i = 0; i < region_count; i++) { 808 j = i + 1; /* index for the region dword */ 809 region[i].size = SMPT_MAP_REGION_SIZE(smpt[j]); 810 erase_type = SMPT_MAP_REGION_ERASE_TYPE(smpt[j]); 811 region[i].offset = offset | erase_type; 812 813 spi_nor_region_check_overlay(®ion[i], erase, erase_type); 814 815 /* 816 * Save the erase types that are supported in all regions and 817 * can erase the entire flash memory. 818 */ 819 uniform_erase_type &= erase_type; 820 821 /* 822 * regions_erase_type mask will indicate all the erase types 823 * supported in this configuration map. 824 */ 825 regions_erase_type |= erase_type; 826 827 offset = (region[i].offset & ~SNOR_ERASE_FLAGS_MASK) + 828 region[i].size; 829 } 830 831 save_uniform_erase_type = map->uniform_erase_type; 832 map->uniform_erase_type = spi_nor_sort_erase_mask(map, 833 uniform_erase_type); 834 835 if (!regions_erase_type) { 836 /* 837 * Roll back to the previous uniform_erase_type mask, SMPT is 838 * broken. 839 */ 840 map->uniform_erase_type = save_uniform_erase_type; 841 return -EINVAL; 842 } 843 844 /* 845 * BFPT advertises all the erase types supported by all the possible 846 * map configurations. Mask out the erase types that are not supported 847 * by the current map configuration. 848 */ 849 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) 850 if (!(regions_erase_type & BIT(erase[i].idx))) 851 spi_nor_set_erase_type(&erase[i], 0, 0xFF); 852 853 spi_nor_region_mark_end(®ion[i - 1]); 854 855 return 0; 856 } 857 858 /** 859 * spi_nor_parse_smpt() - parse Sector Map Parameter Table 860 * @nor: pointer to a 'struct spi_nor' 861 * @smpt_header: sector map parameter table header 862 * @params: pointer to a duplicate 'struct spi_nor_flash_parameter' 863 * that is used for storing SFDP parsed data 864 * 865 * This table is optional, but when available, we parse it to identify the 866 * location and size of sectors within the main data array of the flash memory 867 * device and to identify which Erase Types are supported by each sector. 868 * 869 * Return: 0 on success, -errno otherwise. 870 */ 871 static int spi_nor_parse_smpt(struct spi_nor *nor, 872 const struct sfdp_parameter_header *smpt_header, 873 struct spi_nor_flash_parameter *params) 874 { 875 const u32 *sector_map; 876 u32 *smpt; 877 size_t len; 878 u32 addr; 879 int ret; 880 881 /* Read the Sector Map Parameter Table. */ 882 len = smpt_header->length * sizeof(*smpt); 883 smpt = kmalloc(len, GFP_KERNEL); 884 if (!smpt) 885 return -ENOMEM; 886 887 addr = SFDP_PARAM_HEADER_PTP(smpt_header); 888 ret = spi_nor_read_sfdp(nor, addr, len, smpt); 889 if (ret) 890 goto out; 891 892 /* Fix endianness of the SMPT DWORDs. */ 893 le32_to_cpu_array(smpt, smpt_header->length); 894 895 sector_map = spi_nor_get_map_in_use(nor, smpt, smpt_header->length); 896 if (IS_ERR(sector_map)) { 897 ret = PTR_ERR(sector_map); 898 goto out; 899 } 900 901 ret = spi_nor_init_non_uniform_erase_map(nor, params, sector_map); 902 if (ret) 903 goto out; 904 905 spi_nor_regions_sort_erase_types(¶ms->erase_map); 906 /* fall through */ 907 out: 908 kfree(smpt); 909 return ret; 910 } 911 912 /** 913 * spi_nor_parse_4bait() - parse the 4-Byte Address Instruction Table 914 * @nor: pointer to a 'struct spi_nor'. 915 * @param_header: pointer to the 'struct sfdp_parameter_header' describing 916 * the 4-Byte Address Instruction Table length and version. 917 * @params: pointer to the 'struct spi_nor_flash_parameter' to be. 918 * 919 * Return: 0 on success, -errno otherwise. 920 */ 921 static int spi_nor_parse_4bait(struct spi_nor *nor, 922 const struct sfdp_parameter_header *param_header, 923 struct spi_nor_flash_parameter *params) 924 { 925 static const struct sfdp_4bait reads[] = { 926 { SNOR_HWCAPS_READ, BIT(0) }, 927 { SNOR_HWCAPS_READ_FAST, BIT(1) }, 928 { SNOR_HWCAPS_READ_1_1_2, BIT(2) }, 929 { SNOR_HWCAPS_READ_1_2_2, BIT(3) }, 930 { SNOR_HWCAPS_READ_1_1_4, BIT(4) }, 931 { SNOR_HWCAPS_READ_1_4_4, BIT(5) }, 932 { SNOR_HWCAPS_READ_1_1_1_DTR, BIT(13) }, 933 { SNOR_HWCAPS_READ_1_2_2_DTR, BIT(14) }, 934 { SNOR_HWCAPS_READ_1_4_4_DTR, BIT(15) }, 935 }; 936 static const struct sfdp_4bait programs[] = { 937 { SNOR_HWCAPS_PP, BIT(6) }, 938 { SNOR_HWCAPS_PP_1_1_4, BIT(7) }, 939 { SNOR_HWCAPS_PP_1_4_4, BIT(8) }, 940 }; 941 static const struct sfdp_4bait erases[SNOR_ERASE_TYPE_MAX] = { 942 { 0u /* not used */, BIT(9) }, 943 { 0u /* not used */, BIT(10) }, 944 { 0u /* not used */, BIT(11) }, 945 { 0u /* not used */, BIT(12) }, 946 }; 947 struct spi_nor_pp_command *params_pp = params->page_programs; 948 struct spi_nor_erase_map *map = ¶ms->erase_map; 949 struct spi_nor_erase_type *erase_type = map->erase_type; 950 u32 *dwords; 951 size_t len; 952 u32 addr, discard_hwcaps, read_hwcaps, pp_hwcaps, erase_mask; 953 int i, ret; 954 955 if (param_header->major != SFDP_JESD216_MAJOR || 956 param_header->length < SFDP_4BAIT_DWORD_MAX) 957 return -EINVAL; 958 959 /* Read the 4-byte Address Instruction Table. */ 960 len = sizeof(*dwords) * SFDP_4BAIT_DWORD_MAX; 961 962 /* Use a kmalloc'ed bounce buffer to guarantee it is DMA-able. */ 963 dwords = kmalloc(len, GFP_KERNEL); 964 if (!dwords) 965 return -ENOMEM; 966 967 addr = SFDP_PARAM_HEADER_PTP(param_header); 968 ret = spi_nor_read_sfdp(nor, addr, len, dwords); 969 if (ret) 970 goto out; 971 972 /* Fix endianness of the 4BAIT DWORDs. */ 973 le32_to_cpu_array(dwords, SFDP_4BAIT_DWORD_MAX); 974 975 /* 976 * Compute the subset of (Fast) Read commands for which the 4-byte 977 * version is supported. 978 */ 979 discard_hwcaps = 0; 980 read_hwcaps = 0; 981 for (i = 0; i < ARRAY_SIZE(reads); i++) { 982 const struct sfdp_4bait *read = &reads[i]; 983 984 discard_hwcaps |= read->hwcaps; 985 if ((params->hwcaps.mask & read->hwcaps) && 986 (dwords[0] & read->supported_bit)) 987 read_hwcaps |= read->hwcaps; 988 } 989 990 /* 991 * Compute the subset of Page Program commands for which the 4-byte 992 * version is supported. 993 */ 994 pp_hwcaps = 0; 995 for (i = 0; i < ARRAY_SIZE(programs); i++) { 996 const struct sfdp_4bait *program = &programs[i]; 997 998 /* 999 * The 4 Byte Address Instruction (Optional) Table is the only 1000 * SFDP table that indicates support for Page Program Commands. 1001 * Bypass the params->hwcaps.mask and consider 4BAIT the biggest 1002 * authority for specifying Page Program support. 1003 */ 1004 discard_hwcaps |= program->hwcaps; 1005 if (dwords[0] & program->supported_bit) 1006 pp_hwcaps |= program->hwcaps; 1007 } 1008 1009 /* 1010 * Compute the subset of Sector Erase commands for which the 4-byte 1011 * version is supported. 1012 */ 1013 erase_mask = 0; 1014 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) { 1015 const struct sfdp_4bait *erase = &erases[i]; 1016 1017 if (dwords[0] & erase->supported_bit) 1018 erase_mask |= BIT(i); 1019 } 1020 1021 /* Replicate the sort done for the map's erase types in BFPT. */ 1022 erase_mask = spi_nor_sort_erase_mask(map, erase_mask); 1023 1024 /* 1025 * We need at least one 4-byte op code per read, program and erase 1026 * operation; the .read(), .write() and .erase() hooks share the 1027 * nor->addr_width value. 1028 */ 1029 if (!read_hwcaps || !pp_hwcaps || !erase_mask) 1030 goto out; 1031 1032 /* 1033 * Discard all operations from the 4-byte instruction set which are 1034 * not supported by this memory. 1035 */ 1036 params->hwcaps.mask &= ~discard_hwcaps; 1037 params->hwcaps.mask |= (read_hwcaps | pp_hwcaps); 1038 1039 /* Use the 4-byte address instruction set. */ 1040 for (i = 0; i < SNOR_CMD_READ_MAX; i++) { 1041 struct spi_nor_read_command *read_cmd = ¶ms->reads[i]; 1042 1043 read_cmd->opcode = spi_nor_convert_3to4_read(read_cmd->opcode); 1044 } 1045 1046 /* 4BAIT is the only SFDP table that indicates page program support. */ 1047 if (pp_hwcaps & SNOR_HWCAPS_PP) 1048 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP], 1049 SPINOR_OP_PP_4B, SNOR_PROTO_1_1_1); 1050 if (pp_hwcaps & SNOR_HWCAPS_PP_1_1_4) 1051 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_1_4], 1052 SPINOR_OP_PP_1_1_4_4B, 1053 SNOR_PROTO_1_1_4); 1054 if (pp_hwcaps & SNOR_HWCAPS_PP_1_4_4) 1055 spi_nor_set_pp_settings(¶ms_pp[SNOR_CMD_PP_1_4_4], 1056 SPINOR_OP_PP_1_4_4_4B, 1057 SNOR_PROTO_1_4_4); 1058 1059 for (i = 0; i < SNOR_ERASE_TYPE_MAX; i++) { 1060 if (erase_mask & BIT(i)) 1061 erase_type[i].opcode = (dwords[1] >> 1062 erase_type[i].idx * 8) & 0xFF; 1063 else 1064 spi_nor_set_erase_type(&erase_type[i], 0u, 0xFF); 1065 } 1066 1067 /* 1068 * We set SNOR_F_HAS_4BAIT in order to skip spi_nor_set_4byte_opcodes() 1069 * later because we already did the conversion to 4byte opcodes. Also, 1070 * this latest function implements a legacy quirk for the erase size of 1071 * Spansion memory. However this quirk is no longer needed with new 1072 * SFDP compliant memories. 1073 */ 1074 nor->addr_width = 4; 1075 nor->flags |= SNOR_F_4B_OPCODES | SNOR_F_HAS_4BAIT; 1076 1077 /* fall through */ 1078 out: 1079 kfree(dwords); 1080 return ret; 1081 } 1082 1083 /** 1084 * spi_nor_parse_sfdp() - parse the Serial Flash Discoverable Parameters. 1085 * @nor: pointer to a 'struct spi_nor' 1086 * @params: pointer to the 'struct spi_nor_flash_parameter' to be 1087 * filled 1088 * 1089 * The Serial Flash Discoverable Parameters are described by the JEDEC JESD216 1090 * specification. This is a standard which tends to supported by almost all 1091 * (Q)SPI memory manufacturers. Those hard-coded tables allow us to learn at 1092 * runtime the main parameters needed to perform basic SPI flash operations such 1093 * as Fast Read, Page Program or Sector Erase commands. 1094 * 1095 * Return: 0 on success, -errno otherwise. 1096 */ 1097 int spi_nor_parse_sfdp(struct spi_nor *nor, 1098 struct spi_nor_flash_parameter *params) 1099 { 1100 const struct sfdp_parameter_header *param_header, *bfpt_header; 1101 struct sfdp_parameter_header *param_headers = NULL; 1102 struct sfdp_header header; 1103 struct device *dev = nor->dev; 1104 size_t psize; 1105 int i, err; 1106 1107 /* Get the SFDP header. */ 1108 err = spi_nor_read_sfdp_dma_unsafe(nor, 0, sizeof(header), &header); 1109 if (err < 0) 1110 return err; 1111 1112 /* Check the SFDP header version. */ 1113 if (le32_to_cpu(header.signature) != SFDP_SIGNATURE || 1114 header.major != SFDP_JESD216_MAJOR) 1115 return -EINVAL; 1116 1117 /* 1118 * Verify that the first and only mandatory parameter header is a 1119 * Basic Flash Parameter Table header as specified in JESD216. 1120 */ 1121 bfpt_header = &header.bfpt_header; 1122 if (SFDP_PARAM_HEADER_ID(bfpt_header) != SFDP_BFPT_ID || 1123 bfpt_header->major != SFDP_JESD216_MAJOR) 1124 return -EINVAL; 1125 1126 /* 1127 * Allocate memory then read all parameter headers with a single 1128 * Read SFDP command. These parameter headers will actually be parsed 1129 * twice: a first time to get the latest revision of the basic flash 1130 * parameter table, then a second time to handle the supported optional 1131 * tables. 1132 * Hence we read the parameter headers once for all to reduce the 1133 * processing time. Also we use kmalloc() instead of devm_kmalloc() 1134 * because we don't need to keep these parameter headers: the allocated 1135 * memory is always released with kfree() before exiting this function. 1136 */ 1137 if (header.nph) { 1138 psize = header.nph * sizeof(*param_headers); 1139 1140 param_headers = kmalloc(psize, GFP_KERNEL); 1141 if (!param_headers) 1142 return -ENOMEM; 1143 1144 err = spi_nor_read_sfdp(nor, sizeof(header), 1145 psize, param_headers); 1146 if (err < 0) { 1147 dev_dbg(dev, "failed to read SFDP parameter headers\n"); 1148 goto exit; 1149 } 1150 } 1151 1152 /* 1153 * Check other parameter headers to get the latest revision of 1154 * the basic flash parameter table. 1155 */ 1156 for (i = 0; i < header.nph; i++) { 1157 param_header = ¶m_headers[i]; 1158 1159 if (SFDP_PARAM_HEADER_ID(param_header) == SFDP_BFPT_ID && 1160 param_header->major == SFDP_JESD216_MAJOR && 1161 (param_header->minor > bfpt_header->minor || 1162 (param_header->minor == bfpt_header->minor && 1163 param_header->length > bfpt_header->length))) 1164 bfpt_header = param_header; 1165 } 1166 1167 err = spi_nor_parse_bfpt(nor, bfpt_header, params); 1168 if (err) 1169 goto exit; 1170 1171 /* Parse optional parameter tables. */ 1172 for (i = 0; i < header.nph; i++) { 1173 param_header = ¶m_headers[i]; 1174 1175 switch (SFDP_PARAM_HEADER_ID(param_header)) { 1176 case SFDP_SECTOR_MAP_ID: 1177 err = spi_nor_parse_smpt(nor, param_header, params); 1178 break; 1179 1180 case SFDP_4BAIT_ID: 1181 err = spi_nor_parse_4bait(nor, param_header, params); 1182 break; 1183 1184 default: 1185 break; 1186 } 1187 1188 if (err) { 1189 dev_warn(dev, "Failed to parse optional parameter table: %04x\n", 1190 SFDP_PARAM_HEADER_ID(param_header)); 1191 /* 1192 * Let's not drop all information we extracted so far 1193 * if optional table parsers fail. In case of failing, 1194 * each optional parser is responsible to roll back to 1195 * the previously known spi_nor data. 1196 */ 1197 err = 0; 1198 } 1199 } 1200 1201 exit: 1202 kfree(param_headers); 1203 return err; 1204 } 1205