1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (C) 2005, Intec Automation Inc. 4 * Copyright (C) 2014, Freescale Semiconductor, Inc. 5 */ 6 7 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H 8 #define __LINUX_MTD_SPI_NOR_INTERNAL_H 9 10 #include "sfdp.h" 11 12 #define SPI_NOR_MAX_ID_LEN 6 13 14 /* Standard SPI NOR flash operations. */ 15 #define SPI_NOR_READID_OP(naddr, ndummy, buf, len) \ 16 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0), \ 17 SPI_MEM_OP_ADDR(naddr, 0, 0), \ 18 SPI_MEM_OP_DUMMY(ndummy, 0), \ 19 SPI_MEM_OP_DATA_IN(len, buf, 0)) 20 21 #define SPI_NOR_WREN_OP \ 22 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0), \ 23 SPI_MEM_OP_NO_ADDR, \ 24 SPI_MEM_OP_NO_DUMMY, \ 25 SPI_MEM_OP_NO_DATA) 26 27 #define SPI_NOR_WRDI_OP \ 28 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0), \ 29 SPI_MEM_OP_NO_ADDR, \ 30 SPI_MEM_OP_NO_DUMMY, \ 31 SPI_MEM_OP_NO_DATA) 32 33 #define SPI_NOR_RDSR_OP(buf) \ 34 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0), \ 35 SPI_MEM_OP_NO_ADDR, \ 36 SPI_MEM_OP_NO_DUMMY, \ 37 SPI_MEM_OP_DATA_IN(1, buf, 0)) 38 39 #define SPI_NOR_WRSR_OP(buf, len) \ 40 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0), \ 41 SPI_MEM_OP_NO_ADDR, \ 42 SPI_MEM_OP_NO_DUMMY, \ 43 SPI_MEM_OP_DATA_OUT(len, buf, 0)) 44 45 #define SPI_NOR_RDSR2_OP(buf) \ 46 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0), \ 47 SPI_MEM_OP_NO_ADDR, \ 48 SPI_MEM_OP_NO_DUMMY, \ 49 SPI_MEM_OP_DATA_OUT(1, buf, 0)) 50 51 #define SPI_NOR_WRSR2_OP(buf) \ 52 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0), \ 53 SPI_MEM_OP_NO_ADDR, \ 54 SPI_MEM_OP_NO_DUMMY, \ 55 SPI_MEM_OP_DATA_OUT(1, buf, 0)) 56 57 #define SPI_NOR_RDCR_OP(buf) \ 58 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0), \ 59 SPI_MEM_OP_NO_ADDR, \ 60 SPI_MEM_OP_NO_DUMMY, \ 61 SPI_MEM_OP_DATA_IN(1, buf, 0)) 62 63 #define SPI_NOR_EN4B_EX4B_OP(enable) \ 64 SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \ 65 SPI_MEM_OP_NO_ADDR, \ 66 SPI_MEM_OP_NO_DUMMY, \ 67 SPI_MEM_OP_NO_DATA) 68 69 #define SPI_NOR_BRWR_OP(buf) \ 70 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0), \ 71 SPI_MEM_OP_NO_ADDR, \ 72 SPI_MEM_OP_NO_DUMMY, \ 73 SPI_MEM_OP_DATA_OUT(1, buf, 0)) 74 75 #define SPI_NOR_GBULK_OP \ 76 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0), \ 77 SPI_MEM_OP_NO_ADDR, \ 78 SPI_MEM_OP_NO_DUMMY, \ 79 SPI_MEM_OP_NO_DATA) 80 81 #define SPI_NOR_CHIP_ERASE_OP \ 82 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CHIP_ERASE, 0), \ 83 SPI_MEM_OP_NO_ADDR, \ 84 SPI_MEM_OP_NO_DUMMY, \ 85 SPI_MEM_OP_NO_DATA) 86 87 #define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_nbytes, addr) \ 88 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ 89 SPI_MEM_OP_ADDR(addr_nbytes, addr, 0), \ 90 SPI_MEM_OP_NO_DUMMY, \ 91 SPI_MEM_OP_NO_DATA) 92 93 #define SPI_NOR_READ_OP(opcode) \ 94 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ 95 SPI_MEM_OP_ADDR(3, 0, 0), \ 96 SPI_MEM_OP_DUMMY(1, 0), \ 97 SPI_MEM_OP_DATA_IN(2, NULL, 0)) 98 99 #define SPI_NOR_PP_OP(opcode) \ 100 SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0), \ 101 SPI_MEM_OP_ADDR(3, 0, 0), \ 102 SPI_MEM_OP_NO_DUMMY, \ 103 SPI_MEM_OP_DATA_OUT(2, NULL, 0)) 104 105 #define SPINOR_SRSTEN_OP \ 106 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0), \ 107 SPI_MEM_OP_NO_DUMMY, \ 108 SPI_MEM_OP_NO_ADDR, \ 109 SPI_MEM_OP_NO_DATA) 110 111 #define SPINOR_SRST_OP \ 112 SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0), \ 113 SPI_MEM_OP_NO_DUMMY, \ 114 SPI_MEM_OP_NO_ADDR, \ 115 SPI_MEM_OP_NO_DATA) 116 117 /* Keep these in sync with the list in debugfs.c */ 118 enum spi_nor_option_flags { 119 SNOR_F_HAS_SR_TB = BIT(0), 120 SNOR_F_NO_OP_CHIP_ERASE = BIT(1), 121 SNOR_F_BROKEN_RESET = BIT(2), 122 SNOR_F_4B_OPCODES = BIT(3), 123 SNOR_F_HAS_4BAIT = BIT(4), 124 SNOR_F_HAS_LOCK = BIT(5), 125 SNOR_F_HAS_16BIT_SR = BIT(6), 126 SNOR_F_NO_READ_CR = BIT(7), 127 SNOR_F_HAS_SR_TB_BIT6 = BIT(8), 128 SNOR_F_HAS_4BIT_BP = BIT(9), 129 SNOR_F_HAS_SR_BP3_BIT6 = BIT(10), 130 SNOR_F_IO_MODE_EN_VOLATILE = BIT(11), 131 SNOR_F_SOFT_RESET = BIT(12), 132 SNOR_F_SWP_IS_VOLATILE = BIT(13), 133 SNOR_F_RWW = BIT(14), 134 SNOR_F_ECC = BIT(15), 135 SNOR_F_NO_WP = BIT(16), 136 }; 137 138 struct spi_nor_read_command { 139 u8 num_mode_clocks; 140 u8 num_wait_states; 141 u8 opcode; 142 enum spi_nor_protocol proto; 143 }; 144 145 struct spi_nor_pp_command { 146 u8 opcode; 147 enum spi_nor_protocol proto; 148 }; 149 150 enum spi_nor_read_command_index { 151 SNOR_CMD_READ, 152 SNOR_CMD_READ_FAST, 153 SNOR_CMD_READ_1_1_1_DTR, 154 155 /* Dual SPI */ 156 SNOR_CMD_READ_1_1_2, 157 SNOR_CMD_READ_1_2_2, 158 SNOR_CMD_READ_2_2_2, 159 SNOR_CMD_READ_1_2_2_DTR, 160 161 /* Quad SPI */ 162 SNOR_CMD_READ_1_1_4, 163 SNOR_CMD_READ_1_4_4, 164 SNOR_CMD_READ_4_4_4, 165 SNOR_CMD_READ_1_4_4_DTR, 166 167 /* Octal SPI */ 168 SNOR_CMD_READ_1_1_8, 169 SNOR_CMD_READ_1_8_8, 170 SNOR_CMD_READ_8_8_8, 171 SNOR_CMD_READ_1_8_8_DTR, 172 SNOR_CMD_READ_8_8_8_DTR, 173 174 SNOR_CMD_READ_MAX 175 }; 176 177 enum spi_nor_pp_command_index { 178 SNOR_CMD_PP, 179 180 /* Quad SPI */ 181 SNOR_CMD_PP_1_1_4, 182 SNOR_CMD_PP_1_4_4, 183 SNOR_CMD_PP_4_4_4, 184 185 /* Octal SPI */ 186 SNOR_CMD_PP_1_1_8, 187 SNOR_CMD_PP_1_8_8, 188 SNOR_CMD_PP_8_8_8, 189 SNOR_CMD_PP_8_8_8_DTR, 190 191 SNOR_CMD_PP_MAX 192 }; 193 194 /** 195 * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type 196 * @size: the size of the sector/block erased by the erase type. 197 * JEDEC JESD216B imposes erase sizes to be a power of 2. 198 * @size_shift: @size is a power of 2, the shift is stored in 199 * @size_shift. 200 * @size_mask: the size mask based on @size_shift. 201 * @opcode: the SPI command op code to erase the sector/block. 202 * @idx: Erase Type index as sorted in the Basic Flash Parameter 203 * Table. It will be used to synchronize the supported 204 * Erase Types with the ones identified in the SFDP 205 * optional tables. 206 */ 207 struct spi_nor_erase_type { 208 u32 size; 209 u32 size_shift; 210 u32 size_mask; 211 u8 opcode; 212 u8 idx; 213 }; 214 215 /** 216 * struct spi_nor_erase_command - Used for non-uniform erases 217 * The structure is used to describe a list of erase commands to be executed 218 * once we validate that the erase can be performed. The elements in the list 219 * are run-length encoded. 220 * @list: for inclusion into the list of erase commands. 221 * @count: how many times the same erase command should be 222 * consecutively used. 223 * @size: the size of the sector/block erased by the command. 224 * @opcode: the SPI command op code to erase the sector/block. 225 */ 226 struct spi_nor_erase_command { 227 struct list_head list; 228 u32 count; 229 u32 size; 230 u8 opcode; 231 }; 232 233 /** 234 * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region 235 * @offset: the offset in the data array of erase region start. 236 * LSB bits are used as a bitmask encoding flags to 237 * determine if this region is overlaid, if this region is 238 * the last in the SPI NOR flash memory and to indicate 239 * all the supported erase commands inside this region. 240 * The erase types are sorted in ascending order with the 241 * smallest Erase Type size being at BIT(0). 242 * @size: the size of the region in bytes. 243 */ 244 struct spi_nor_erase_region { 245 u64 offset; 246 u64 size; 247 }; 248 249 #define SNOR_ERASE_TYPE_MAX 4 250 #define SNOR_ERASE_TYPE_MASK GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0) 251 252 #define SNOR_LAST_REGION BIT(4) 253 #define SNOR_OVERLAID_REGION BIT(5) 254 255 #define SNOR_ERASE_FLAGS_MAX 6 256 #define SNOR_ERASE_FLAGS_MASK GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0) 257 258 /** 259 * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map 260 * @regions: array of erase regions. The regions are consecutive in 261 * address space. Walking through the regions is done 262 * incrementally. 263 * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform 264 * sector size (legacy implementation). 265 * @erase_type: an array of erase types shared by all the regions. 266 * The erase types are sorted in ascending order, with the 267 * smallest Erase Type size being the first member in the 268 * erase_type array. 269 * @uniform_erase_type: bitmask encoding erase types that can erase the 270 * entire memory. This member is completed at init by 271 * uniform and non-uniform SPI NOR flash memories if they 272 * support at least one erase type that can erase the 273 * entire memory. 274 */ 275 struct spi_nor_erase_map { 276 struct spi_nor_erase_region *regions; 277 struct spi_nor_erase_region uniform_region; 278 struct spi_nor_erase_type erase_type[SNOR_ERASE_TYPE_MAX]; 279 u8 uniform_erase_type; 280 }; 281 282 /** 283 * struct spi_nor_locking_ops - SPI NOR locking methods 284 * @lock: lock a region of the SPI NOR. 285 * @unlock: unlock a region of the SPI NOR. 286 * @is_locked: check if a region of the SPI NOR is completely locked 287 */ 288 struct spi_nor_locking_ops { 289 int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len); 290 int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len); 291 int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len); 292 }; 293 294 /** 295 * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions 296 * @len: size of one OTP region in bytes. 297 * @base: start address of the OTP area. 298 * @offset: offset between consecutive OTP regions if there are more 299 * than one. 300 * @n_regions: number of individual OTP regions. 301 */ 302 struct spi_nor_otp_organization { 303 size_t len; 304 loff_t base; 305 loff_t offset; 306 unsigned int n_regions; 307 }; 308 309 /** 310 * struct spi_nor_otp_ops - SPI NOR OTP methods 311 * @read: read from the SPI NOR OTP area. 312 * @write: write to the SPI NOR OTP area. 313 * @lock: lock an OTP region. 314 * @erase: erase an OTP region. 315 * @is_locked: check if an OTP region of the SPI NOR is locked. 316 */ 317 struct spi_nor_otp_ops { 318 int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); 319 int (*write)(struct spi_nor *nor, loff_t addr, size_t len, 320 const u8 *buf); 321 int (*lock)(struct spi_nor *nor, unsigned int region); 322 int (*erase)(struct spi_nor *nor, loff_t addr); 323 int (*is_locked)(struct spi_nor *nor, unsigned int region); 324 }; 325 326 /** 327 * struct spi_nor_otp - SPI NOR OTP grouping structure 328 * @org: OTP region organization 329 * @ops: OTP access ops 330 */ 331 struct spi_nor_otp { 332 const struct spi_nor_otp_organization *org; 333 const struct spi_nor_otp_ops *ops; 334 }; 335 336 /** 337 * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings. 338 * Includes legacy flash parameters and settings that can be overwritten 339 * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216 340 * Serial Flash Discoverable Parameters (SFDP) tables. 341 * 342 * @bank_size: the flash memory bank density in bytes. 343 * @size: the total flash memory density in bytes. 344 * @writesize Minimal writable flash unit size. Defaults to 1. Set to 345 * ECC unit size for ECC-ed flashes. 346 * @page_size: the page size of the SPI NOR flash memory. 347 * @addr_nbytes: number of address bytes to send. 348 * @addr_mode_nbytes: number of address bytes of current address mode. Useful 349 * when the flash operates with 4B opcodes but needs the 350 * internal address mode for opcodes that don't have a 4B 351 * opcode correspondent. 352 * @rdsr_dummy: dummy cycles needed for Read Status Register command 353 * in octal DTR mode. 354 * @rdsr_addr_nbytes: dummy address bytes needed for Read Status Register 355 * command in octal DTR mode. 356 * @n_dice: number of dice in the flash memory. 357 * @vreg_offset: volatile register offset for each die. 358 * @hwcaps: describes the read and page program hardware 359 * capabilities. 360 * @reads: read capabilities ordered by priority: the higher index 361 * in the array, the higher priority. 362 * @page_programs: page program capabilities ordered by priority: the 363 * higher index in the array, the higher priority. 364 * @erase_map: the erase map parsed from the SFDP Sector Map Parameter 365 * Table. 366 * @otp: SPI NOR OTP info. 367 * @set_octal_dtr: enables or disables SPI NOR octal DTR mode. 368 * @quad_enable: enables SPI NOR quad mode. 369 * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode. 370 * @convert_addr: converts an absolute address into something the flash 371 * will understand. Particularly useful when pagesize is 372 * not a power-of-2. 373 * @setup: (optional) configures the SPI NOR memory. Useful for 374 * SPI NOR flashes that have peculiarities to the SPI NOR 375 * standard e.g. different opcodes, specific address 376 * calculation, page size, etc. 377 * @ready: (optional) flashes might use a different mechanism 378 * than reading the status register to indicate they 379 * are ready for a new command 380 * @locking_ops: SPI NOR locking methods. 381 * @priv: flash's private data. 382 */ 383 struct spi_nor_flash_parameter { 384 u64 bank_size; 385 u64 size; 386 u32 writesize; 387 u32 page_size; 388 u8 addr_nbytes; 389 u8 addr_mode_nbytes; 390 u8 rdsr_dummy; 391 u8 rdsr_addr_nbytes; 392 u8 n_dice; 393 u32 *vreg_offset; 394 395 struct spi_nor_hwcaps hwcaps; 396 struct spi_nor_read_command reads[SNOR_CMD_READ_MAX]; 397 struct spi_nor_pp_command page_programs[SNOR_CMD_PP_MAX]; 398 399 struct spi_nor_erase_map erase_map; 400 struct spi_nor_otp otp; 401 402 int (*set_octal_dtr)(struct spi_nor *nor, bool enable); 403 int (*quad_enable)(struct spi_nor *nor); 404 int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable); 405 u32 (*convert_addr)(struct spi_nor *nor, u32 addr); 406 int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps); 407 int (*ready)(struct spi_nor *nor); 408 409 const struct spi_nor_locking_ops *locking_ops; 410 void *priv; 411 }; 412 413 /** 414 * struct spi_nor_fixups - SPI NOR fixup hooks 415 * @default_init: called after default flash parameters init. Used to tweak 416 * flash parameters when information provided by the flash_info 417 * table is incomplete or wrong. 418 * @post_bfpt: called after the BFPT table has been parsed 419 * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs 420 * that do not support RDSFDP). Typically used to tweak various 421 * parameters that could not be extracted by other means (i.e. 422 * when information provided by the SFDP/flash_info tables are 423 * incomplete or wrong). 424 * @late_init: used to initialize flash parameters that are not declared in the 425 * JESD216 SFDP standard, or where SFDP tables not defined at all. 426 * Will replace the default_init() hook. 427 * 428 * Those hooks can be used to tweak the SPI NOR configuration when the SFDP 429 * table is broken or not available. 430 */ 431 struct spi_nor_fixups { 432 void (*default_init)(struct spi_nor *nor); 433 int (*post_bfpt)(struct spi_nor *nor, 434 const struct sfdp_parameter_header *bfpt_header, 435 const struct sfdp_bfpt *bfpt); 436 int (*post_sfdp)(struct spi_nor *nor); 437 int (*late_init)(struct spi_nor *nor); 438 }; 439 440 /** 441 * struct flash_info - SPI NOR flash_info entry. 442 * @name: the name of the flash. 443 * @id: the flash's ID bytes. The first three bytes are the 444 * JEDIC ID. JEDEC ID zero means "no ID" (mostly older chips). 445 * @id_len: the number of bytes of ID. 446 * @sector_size: the size listed here is what works with SPINOR_OP_SE, which 447 * isn't necessarily called a "sector" by the vendor. 448 * @n_sectors: the number of sectors. 449 * @n_banks: the number of banks. 450 * @page_size: the flash's page size. 451 * @addr_nbytes: number of address bytes to send. 452 * 453 * @parse_sfdp: true when flash supports SFDP tables. The false value has no 454 * meaning. If one wants to skip the SFDP tables, one should 455 * instead use the SPI_NOR_SKIP_SFDP sfdp_flag. 456 * @flags: flags that indicate support that is not defined by the 457 * JESD216 standard in its SFDP tables. Flag meanings: 458 * SPI_NOR_HAS_LOCK: flash supports lock/unlock via SR 459 * SPI_NOR_HAS_TB: flash SR has Top/Bottom (TB) protect bit. Must be 460 * used with SPI_NOR_HAS_LOCK. 461 * SPI_NOR_TB_SR_BIT6: Top/Bottom (TB) is bit 6 of status register. 462 * Must be used with SPI_NOR_HAS_TB. 463 * SPI_NOR_4BIT_BP: flash SR has 4 bit fields (BP0-3) for block 464 * protection. 465 * SPI_NOR_BP3_SR_BIT6: BP3 is bit 6 of status register. Must be used with 466 * SPI_NOR_4BIT_BP. 467 * SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits. 468 * Usually these will power-up in a write-protected 469 * state. 470 * SPI_NOR_NO_ERASE: no erase command needed. 471 * NO_CHIP_ERASE: chip does not support chip erase. 472 * SPI_NOR_NO_FR: can't do fastread. 473 * SPI_NOR_QUAD_PP: flash supports Quad Input Page Program. 474 * SPI_NOR_RWW: flash supports reads while write. 475 * 476 * @no_sfdp_flags: flags that indicate support that can be discovered via SFDP. 477 * Used when SFDP tables are not defined in the flash. These 478 * flags are used together with the SPI_NOR_SKIP_SFDP flag. 479 * SPI_NOR_SKIP_SFDP: skip parsing of SFDP tables. 480 * SECT_4K: SPINOR_OP_BE_4K works uniformly. 481 * SPI_NOR_DUAL_READ: flash supports Dual Read. 482 * SPI_NOR_QUAD_READ: flash supports Quad Read. 483 * SPI_NOR_OCTAL_READ: flash supports Octal Read. 484 * SPI_NOR_OCTAL_DTR_READ: flash supports octal DTR Read. 485 * SPI_NOR_OCTAL_DTR_PP: flash supports Octal DTR Page Program. 486 * 487 * @fixup_flags: flags that indicate support that can be discovered via SFDP 488 * ideally, but can not be discovered for this particular flash 489 * because the SFDP table that indicates this support is not 490 * defined by the flash. In case the table for this support is 491 * defined but has wrong values, one should instead use a 492 * post_sfdp() hook to set the SNOR_F equivalent flag. 493 * 494 * SPI_NOR_4B_OPCODES: use dedicated 4byte address op codes to support 495 * memory size above 128Mib. 496 * SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode 497 * via a volatile bit. 498 * @mfr_flags: manufacturer private flags. Used in the manufacturer fixup 499 * hooks to differentiate support between flashes of the same 500 * manufacturer. 501 * @otp_org: flash's OTP organization. 502 * @fixups: part specific fixup hooks. 503 */ 504 struct flash_info { 505 char *name; 506 u8 id[SPI_NOR_MAX_ID_LEN]; 507 u8 id_len; 508 unsigned sector_size; 509 u16 n_sectors; 510 u16 page_size; 511 u8 n_banks; 512 u8 addr_nbytes; 513 514 bool parse_sfdp; 515 u16 flags; 516 #define SPI_NOR_HAS_LOCK BIT(0) 517 #define SPI_NOR_HAS_TB BIT(1) 518 #define SPI_NOR_TB_SR_BIT6 BIT(2) 519 #define SPI_NOR_4BIT_BP BIT(3) 520 #define SPI_NOR_BP3_SR_BIT6 BIT(4) 521 #define SPI_NOR_SWP_IS_VOLATILE BIT(5) 522 #define SPI_NOR_NO_ERASE BIT(6) 523 #define NO_CHIP_ERASE BIT(7) 524 #define SPI_NOR_NO_FR BIT(8) 525 #define SPI_NOR_QUAD_PP BIT(9) 526 #define SPI_NOR_RWW BIT(10) 527 528 u8 no_sfdp_flags; 529 #define SPI_NOR_SKIP_SFDP BIT(0) 530 #define SECT_4K BIT(1) 531 #define SPI_NOR_DUAL_READ BIT(3) 532 #define SPI_NOR_QUAD_READ BIT(4) 533 #define SPI_NOR_OCTAL_READ BIT(5) 534 #define SPI_NOR_OCTAL_DTR_READ BIT(6) 535 #define SPI_NOR_OCTAL_DTR_PP BIT(7) 536 537 u8 fixup_flags; 538 #define SPI_NOR_4B_OPCODES BIT(0) 539 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1) 540 541 u8 mfr_flags; 542 543 const struct spi_nor_otp_organization otp_org; 544 const struct spi_nor_fixups *fixups; 545 }; 546 547 #define SPI_NOR_ID_2ITEMS(_id) ((_id) >> 8) & 0xff, (_id) & 0xff 548 #define SPI_NOR_ID_3ITEMS(_id) ((_id) >> 16) & 0xff, SPI_NOR_ID_2ITEMS(_id) 549 550 #define SPI_NOR_ID(_jedec_id, _ext_id) \ 551 .id = { SPI_NOR_ID_3ITEMS(_jedec_id), SPI_NOR_ID_2ITEMS(_ext_id) }, \ 552 .id_len = !(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0)) 553 554 #define SPI_NOR_ID6(_jedec_id, _ext_id) \ 555 .id = { SPI_NOR_ID_3ITEMS(_jedec_id), SPI_NOR_ID_3ITEMS(_ext_id) }, \ 556 .id_len = 6 557 558 #define SPI_NOR_GEOMETRY(_sector_size, _n_sectors, _n_banks) \ 559 .sector_size = (_sector_size), \ 560 .n_sectors = (_n_sectors), \ 561 .page_size = 256, \ 562 .n_banks = (_n_banks) 563 564 /* Used when the "_ext_id" is two bytes at most */ 565 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors) \ 566 SPI_NOR_ID((_jedec_id), (_ext_id)), \ 567 SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1), 568 569 #define INFOB(_jedec_id, _ext_id, _sector_size, _n_sectors, _n_banks) \ 570 SPI_NOR_ID((_jedec_id), (_ext_id)), \ 571 SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), (_n_banks)), 572 573 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors) \ 574 SPI_NOR_ID6((_jedec_id), (_ext_id)), \ 575 SPI_NOR_GEOMETRY((_sector_size), (_n_sectors), 1), 576 577 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes) \ 578 .sector_size = (_sector_size), \ 579 .n_sectors = (_n_sectors), \ 580 .page_size = (_page_size), \ 581 .n_banks = 1, \ 582 .addr_nbytes = (_addr_nbytes), \ 583 .flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR, \ 584 585 #define OTP_INFO(_len, _n_regions, _base, _offset) \ 586 .otp_org = { \ 587 .len = (_len), \ 588 .base = (_base), \ 589 .offset = (_offset), \ 590 .n_regions = (_n_regions), \ 591 }, 592 593 #define PARSE_SFDP \ 594 .parse_sfdp = true, \ 595 596 #define FLAGS(_flags) \ 597 .flags = (_flags), \ 598 599 #define NO_SFDP_FLAGS(_no_sfdp_flags) \ 600 .no_sfdp_flags = (_no_sfdp_flags), \ 601 602 #define FIXUP_FLAGS(_fixup_flags) \ 603 .fixup_flags = (_fixup_flags), \ 604 605 #define MFR_FLAGS(_mfr_flags) \ 606 .mfr_flags = (_mfr_flags), \ 607 608 /** 609 * struct spi_nor_manufacturer - SPI NOR manufacturer object 610 * @name: manufacturer name 611 * @parts: array of parts supported by this manufacturer 612 * @nparts: number of entries in the parts array 613 * @fixups: hooks called at various points in time during spi_nor_scan() 614 */ 615 struct spi_nor_manufacturer { 616 const char *name; 617 const struct flash_info *parts; 618 unsigned int nparts; 619 const struct spi_nor_fixups *fixups; 620 }; 621 622 /** 623 * struct sfdp - SFDP data 624 * @num_dwords: number of entries in the dwords array 625 * @dwords: array of double words of the SFDP data 626 */ 627 struct sfdp { 628 size_t num_dwords; 629 u32 *dwords; 630 }; 631 632 /* Manufacturer drivers. */ 633 extern const struct spi_nor_manufacturer spi_nor_atmel; 634 extern const struct spi_nor_manufacturer spi_nor_catalyst; 635 extern const struct spi_nor_manufacturer spi_nor_eon; 636 extern const struct spi_nor_manufacturer spi_nor_esmt; 637 extern const struct spi_nor_manufacturer spi_nor_everspin; 638 extern const struct spi_nor_manufacturer spi_nor_fujitsu; 639 extern const struct spi_nor_manufacturer spi_nor_gigadevice; 640 extern const struct spi_nor_manufacturer spi_nor_intel; 641 extern const struct spi_nor_manufacturer spi_nor_issi; 642 extern const struct spi_nor_manufacturer spi_nor_macronix; 643 extern const struct spi_nor_manufacturer spi_nor_micron; 644 extern const struct spi_nor_manufacturer spi_nor_st; 645 extern const struct spi_nor_manufacturer spi_nor_spansion; 646 extern const struct spi_nor_manufacturer spi_nor_sst; 647 extern const struct spi_nor_manufacturer spi_nor_winbond; 648 extern const struct spi_nor_manufacturer spi_nor_xilinx; 649 extern const struct spi_nor_manufacturer spi_nor_xmc; 650 651 extern const struct attribute_group *spi_nor_sysfs_groups[]; 652 653 void spi_nor_spimem_setup_op(const struct spi_nor *nor, 654 struct spi_mem_op *op, 655 const enum spi_nor_protocol proto); 656 int spi_nor_write_enable(struct spi_nor *nor); 657 int spi_nor_write_disable(struct spi_nor *nor); 658 int spi_nor_set_4byte_addr_mode_en4b_ex4b(struct spi_nor *nor, bool enable); 659 int spi_nor_set_4byte_addr_mode_wren_en4b_ex4b(struct spi_nor *nor, 660 bool enable); 661 int spi_nor_set_4byte_addr_mode_brwr(struct spi_nor *nor, bool enable); 662 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable); 663 int spi_nor_wait_till_ready(struct spi_nor *nor); 664 int spi_nor_global_block_unlock(struct spi_nor *nor); 665 int spi_nor_prep_and_lock(struct spi_nor *nor); 666 void spi_nor_unlock_and_unprep(struct spi_nor *nor); 667 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor); 668 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor); 669 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor); 670 int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id, 671 enum spi_nor_protocol reg_proto); 672 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr); 673 int spi_nor_sr_ready(struct spi_nor *nor); 674 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr); 675 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len); 676 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1); 677 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr); 678 679 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len, 680 u8 *buf); 681 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len, 682 const u8 *buf); 683 int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op, 684 enum spi_nor_protocol proto); 685 int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op, 686 enum spi_nor_protocol proto); 687 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr); 688 689 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf); 690 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len, 691 const u8 *buf); 692 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr); 693 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region); 694 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region); 695 696 int spi_nor_hwcaps_read2cmd(u32 hwcaps); 697 int spi_nor_hwcaps_pp2cmd(u32 hwcaps); 698 u8 spi_nor_convert_3to4_read(u8 opcode); 699 void spi_nor_set_read_settings(struct spi_nor_read_command *read, 700 u8 num_mode_clocks, 701 u8 num_wait_states, 702 u8 opcode, 703 enum spi_nor_protocol proto); 704 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode, 705 enum spi_nor_protocol proto); 706 707 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size, 708 u8 opcode); 709 void spi_nor_mask_erase_type(struct spi_nor_erase_type *erase); 710 struct spi_nor_erase_region * 711 spi_nor_region_next(struct spi_nor_erase_region *region); 712 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map, 713 u8 erase_mask, u64 flash_size); 714 715 int spi_nor_post_bfpt_fixups(struct spi_nor *nor, 716 const struct sfdp_parameter_header *bfpt_header, 717 const struct sfdp_bfpt *bfpt); 718 719 void spi_nor_init_default_locking_ops(struct spi_nor *nor); 720 void spi_nor_try_unlock_all(struct spi_nor *nor); 721 void spi_nor_set_mtd_locking_ops(struct spi_nor *nor); 722 void spi_nor_set_mtd_otp_ops(struct spi_nor *nor); 723 724 int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode, 725 u8 *buf, size_t len); 726 int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode, 727 const u8 *buf, size_t len); 728 729 int spi_nor_check_sfdp_signature(struct spi_nor *nor); 730 int spi_nor_parse_sfdp(struct spi_nor *nor); 731 732 static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd) 733 { 734 return container_of(mtd, struct spi_nor, mtd); 735 } 736 737 #ifdef CONFIG_DEBUG_FS 738 void spi_nor_debugfs_register(struct spi_nor *nor); 739 void spi_nor_debugfs_shutdown(void); 740 #else 741 static inline void spi_nor_debugfs_register(struct spi_nor *nor) {} 742 static inline void spi_nor_debugfs_shutdown(void) {} 743 #endif 744 745 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */ 746