1 /* 2 * Copyright (C) 2004 Richard Purdie 3 * Copyright (C) 2008 Dmitry Baryshkov 4 * 5 * Based on Sharp's NAND driver sharp_sl.c 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License version 2 as 9 * published by the Free Software Foundation. 10 * 11 */ 12 13 #include <linux/genhd.h> 14 #include <linux/slab.h> 15 #include <linux/module.h> 16 #include <linux/delay.h> 17 #include <linux/mtd/mtd.h> 18 #include <linux/mtd/rawnand.h> 19 #include <linux/mtd/nand_ecc.h> 20 #include <linux/mtd/partitions.h> 21 #include <linux/mtd/sharpsl.h> 22 #include <linux/interrupt.h> 23 #include <linux/platform_device.h> 24 #include <linux/io.h> 25 26 struct sharpsl_nand { 27 struct nand_chip chip; 28 29 void __iomem *io; 30 }; 31 32 static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd) 33 { 34 return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip); 35 } 36 37 /* register offset */ 38 #define ECCLPLB 0x00 /* line parity 7 - 0 bit */ 39 #define ECCLPUB 0x04 /* line parity 15 - 8 bit */ 40 #define ECCCP 0x08 /* column parity 5 - 0 bit */ 41 #define ECCCNTR 0x0C /* ECC byte counter */ 42 #define ECCCLRR 0x10 /* cleare ECC */ 43 #define FLASHIO 0x14 /* Flash I/O */ 44 #define FLASHCTL 0x18 /* Flash Control */ 45 46 /* Flash control bit */ 47 #define FLRYBY (1 << 5) 48 #define FLCE1 (1 << 4) 49 #define FLWP (1 << 3) 50 #define FLALE (1 << 2) 51 #define FLCLE (1 << 1) 52 #define FLCE0 (1 << 0) 53 54 /* 55 * hardware specific access to control-lines 56 * ctrl: 57 * NAND_CNE: bit 0 -> ! bit 0 & 4 58 * NAND_CLE: bit 1 -> bit 1 59 * NAND_ALE: bit 2 -> bit 2 60 * 61 */ 62 static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd, 63 unsigned int ctrl) 64 { 65 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); 66 struct nand_chip *chip = mtd_to_nand(mtd); 67 68 if (ctrl & NAND_CTRL_CHANGE) { 69 unsigned char bits = ctrl & 0x07; 70 71 bits |= (ctrl & 0x01) << 4; 72 73 bits ^= 0x11; 74 75 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL); 76 } 77 78 if (cmd != NAND_CMD_NONE) 79 writeb(cmd, chip->IO_ADDR_W); 80 } 81 82 static int sharpsl_nand_dev_ready(struct mtd_info *mtd) 83 { 84 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); 85 return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0); 86 } 87 88 static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode) 89 { 90 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); 91 writeb(0, sharpsl->io + ECCCLRR); 92 } 93 94 static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code) 95 { 96 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd); 97 ecc_code[0] = ~readb(sharpsl->io + ECCLPUB); 98 ecc_code[1] = ~readb(sharpsl->io + ECCLPLB); 99 ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03; 100 return readb(sharpsl->io + ECCCNTR) != 0; 101 } 102 103 /* 104 * Main initialization routine 105 */ 106 static int sharpsl_nand_probe(struct platform_device *pdev) 107 { 108 struct nand_chip *this; 109 struct mtd_info *mtd; 110 struct resource *r; 111 int err = 0; 112 struct sharpsl_nand *sharpsl; 113 struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev); 114 115 if (!data) { 116 dev_err(&pdev->dev, "no platform data!\n"); 117 return -EINVAL; 118 } 119 120 /* Allocate memory for MTD device structure and private data */ 121 sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL); 122 if (!sharpsl) 123 return -ENOMEM; 124 125 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 126 if (!r) { 127 dev_err(&pdev->dev, "no io memory resource defined!\n"); 128 err = -ENODEV; 129 goto err_get_res; 130 } 131 132 /* map physical address */ 133 sharpsl->io = ioremap(r->start, resource_size(r)); 134 if (!sharpsl->io) { 135 dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n"); 136 err = -EIO; 137 goto err_ioremap; 138 } 139 140 /* Get pointer to private data */ 141 this = (struct nand_chip *)(&sharpsl->chip); 142 143 /* Link the private data with the MTD structure */ 144 mtd = nand_to_mtd(this); 145 mtd->dev.parent = &pdev->dev; 146 mtd_set_ooblayout(mtd, data->ecc_layout); 147 148 platform_set_drvdata(pdev, sharpsl); 149 150 /* 151 * PXA initialize 152 */ 153 writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL); 154 155 /* Set address of NAND IO lines */ 156 this->IO_ADDR_R = sharpsl->io + FLASHIO; 157 this->IO_ADDR_W = sharpsl->io + FLASHIO; 158 /* Set address of hardware control function */ 159 this->cmd_ctrl = sharpsl_nand_hwcontrol; 160 this->dev_ready = sharpsl_nand_dev_ready; 161 /* 15 us command delay time */ 162 this->chip_delay = 15; 163 /* set eccmode using hardware ECC */ 164 this->ecc.mode = NAND_ECC_HW; 165 this->ecc.size = 256; 166 this->ecc.bytes = 3; 167 this->ecc.strength = 1; 168 this->badblock_pattern = data->badblock_pattern; 169 this->ecc.hwctl = sharpsl_nand_enable_hwecc; 170 this->ecc.calculate = sharpsl_nand_calculate_ecc; 171 this->ecc.correct = nand_correct_data; 172 173 /* Scan to find existence of the device */ 174 err = nand_scan(mtd, 1); 175 if (err) 176 goto err_scan; 177 178 /* Register the partitions */ 179 mtd->name = "sharpsl-nand"; 180 181 err = mtd_device_parse_register(mtd, data->part_parsers, NULL, 182 data->partitions, data->nr_partitions); 183 if (err) 184 goto err_add; 185 186 /* Return happy */ 187 return 0; 188 189 err_add: 190 nand_release(mtd); 191 192 err_scan: 193 iounmap(sharpsl->io); 194 err_ioremap: 195 err_get_res: 196 kfree(sharpsl); 197 return err; 198 } 199 200 /* 201 * Clean up routine 202 */ 203 static int sharpsl_nand_remove(struct platform_device *pdev) 204 { 205 struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev); 206 207 /* Release resources, unregister device */ 208 nand_release(nand_to_mtd(&sharpsl->chip)); 209 210 iounmap(sharpsl->io); 211 212 /* Free the MTD device structure */ 213 kfree(sharpsl); 214 215 return 0; 216 } 217 218 static struct platform_driver sharpsl_nand_driver = { 219 .driver = { 220 .name = "sharpsl-nand", 221 }, 222 .probe = sharpsl_nand_probe, 223 .remove = sharpsl_nand_remove, 224 }; 225 226 module_platform_driver(sharpsl_nand_driver); 227 228 MODULE_LICENSE("GPL"); 229 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); 230 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series"); 231