1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * Copyright (C) 2004 Richard Purdie 4 * Copyright (C) 2008 Dmitry Baryshkov 5 * 6 * Based on Sharp's NAND driver sharp_sl.c 7 */ 8 9 #include <linux/genhd.h> 10 #include <linux/slab.h> 11 #include <linux/module.h> 12 #include <linux/delay.h> 13 #include <linux/mtd/mtd.h> 14 #include <linux/mtd/rawnand.h> 15 #include <linux/mtd/partitions.h> 16 #include <linux/mtd/sharpsl.h> 17 #include <linux/interrupt.h> 18 #include <linux/platform_device.h> 19 #include <linux/io.h> 20 21 struct sharpsl_nand { 22 struct nand_controller controller; 23 struct nand_chip chip; 24 25 void __iomem *io; 26 }; 27 28 static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd) 29 { 30 return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip); 31 } 32 33 /* register offset */ 34 #define ECCLPLB 0x00 /* line parity 7 - 0 bit */ 35 #define ECCLPUB 0x04 /* line parity 15 - 8 bit */ 36 #define ECCCP 0x08 /* column parity 5 - 0 bit */ 37 #define ECCCNTR 0x0C /* ECC byte counter */ 38 #define ECCCLRR 0x10 /* cleare ECC */ 39 #define FLASHIO 0x14 /* Flash I/O */ 40 #define FLASHCTL 0x18 /* Flash Control */ 41 42 /* Flash control bit */ 43 #define FLRYBY (1 << 5) 44 #define FLCE1 (1 << 4) 45 #define FLWP (1 << 3) 46 #define FLALE (1 << 2) 47 #define FLCLE (1 << 1) 48 #define FLCE0 (1 << 0) 49 50 /* 51 * hardware specific access to control-lines 52 * ctrl: 53 * NAND_CNE: bit 0 -> ! bit 0 & 4 54 * NAND_CLE: bit 1 -> bit 1 55 * NAND_ALE: bit 2 -> bit 2 56 * 57 */ 58 static void sharpsl_nand_hwcontrol(struct nand_chip *chip, int cmd, 59 unsigned int ctrl) 60 { 61 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip)); 62 63 if (ctrl & NAND_CTRL_CHANGE) { 64 unsigned char bits = ctrl & 0x07; 65 66 bits |= (ctrl & 0x01) << 4; 67 68 bits ^= 0x11; 69 70 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL); 71 } 72 73 if (cmd != NAND_CMD_NONE) 74 writeb(cmd, chip->legacy.IO_ADDR_W); 75 } 76 77 static int sharpsl_nand_dev_ready(struct nand_chip *chip) 78 { 79 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip)); 80 return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0); 81 } 82 83 static void sharpsl_nand_enable_hwecc(struct nand_chip *chip, int mode) 84 { 85 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip)); 86 writeb(0, sharpsl->io + ECCCLRR); 87 } 88 89 static int sharpsl_nand_calculate_ecc(struct nand_chip *chip, 90 const u_char * dat, u_char * ecc_code) 91 { 92 struct sharpsl_nand *sharpsl = mtd_to_sharpsl(nand_to_mtd(chip)); 93 ecc_code[0] = ~readb(sharpsl->io + ECCLPUB); 94 ecc_code[1] = ~readb(sharpsl->io + ECCLPLB); 95 ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03; 96 return readb(sharpsl->io + ECCCNTR) != 0; 97 } 98 99 static int sharpsl_attach_chip(struct nand_chip *chip) 100 { 101 if (chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_HOST) 102 return 0; 103 104 chip->ecc.size = 256; 105 chip->ecc.bytes = 3; 106 chip->ecc.strength = 1; 107 chip->ecc.hwctl = sharpsl_nand_enable_hwecc; 108 chip->ecc.calculate = sharpsl_nand_calculate_ecc; 109 chip->ecc.correct = rawnand_sw_hamming_correct; 110 111 return 0; 112 } 113 114 static const struct nand_controller_ops sharpsl_ops = { 115 .attach_chip = sharpsl_attach_chip, 116 }; 117 118 /* 119 * Main initialization routine 120 */ 121 static int sharpsl_nand_probe(struct platform_device *pdev) 122 { 123 struct nand_chip *this; 124 struct mtd_info *mtd; 125 struct resource *r; 126 int err = 0; 127 struct sharpsl_nand *sharpsl; 128 struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev); 129 130 if (!data) { 131 dev_err(&pdev->dev, "no platform data!\n"); 132 return -EINVAL; 133 } 134 135 /* Allocate memory for MTD device structure and private data */ 136 sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL); 137 if (!sharpsl) 138 return -ENOMEM; 139 140 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 141 if (!r) { 142 dev_err(&pdev->dev, "no io memory resource defined!\n"); 143 err = -ENODEV; 144 goto err_get_res; 145 } 146 147 /* map physical address */ 148 sharpsl->io = ioremap(r->start, resource_size(r)); 149 if (!sharpsl->io) { 150 dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n"); 151 err = -EIO; 152 goto err_ioremap; 153 } 154 155 /* Get pointer to private data */ 156 this = (struct nand_chip *)(&sharpsl->chip); 157 158 nand_controller_init(&sharpsl->controller); 159 sharpsl->controller.ops = &sharpsl_ops; 160 this->controller = &sharpsl->controller; 161 162 /* Link the private data with the MTD structure */ 163 mtd = nand_to_mtd(this); 164 mtd->dev.parent = &pdev->dev; 165 mtd_set_ooblayout(mtd, data->ecc_layout); 166 167 platform_set_drvdata(pdev, sharpsl); 168 169 /* 170 * PXA initialize 171 */ 172 writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL); 173 174 /* Set address of NAND IO lines */ 175 this->legacy.IO_ADDR_R = sharpsl->io + FLASHIO; 176 this->legacy.IO_ADDR_W = sharpsl->io + FLASHIO; 177 /* Set address of hardware control function */ 178 this->legacy.cmd_ctrl = sharpsl_nand_hwcontrol; 179 this->legacy.dev_ready = sharpsl_nand_dev_ready; 180 /* 15 us command delay time */ 181 this->legacy.chip_delay = 15; 182 this->badblock_pattern = data->badblock_pattern; 183 184 /* Scan to find existence of the device */ 185 err = nand_scan(this, 1); 186 if (err) 187 goto err_scan; 188 189 /* Register the partitions */ 190 mtd->name = "sharpsl-nand"; 191 192 err = mtd_device_parse_register(mtd, data->part_parsers, NULL, 193 data->partitions, data->nr_partitions); 194 if (err) 195 goto err_add; 196 197 /* Return happy */ 198 return 0; 199 200 err_add: 201 nand_cleanup(this); 202 203 err_scan: 204 iounmap(sharpsl->io); 205 err_ioremap: 206 err_get_res: 207 kfree(sharpsl); 208 return err; 209 } 210 211 /* 212 * Clean up routine 213 */ 214 static int sharpsl_nand_remove(struct platform_device *pdev) 215 { 216 struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev); 217 struct nand_chip *chip = &sharpsl->chip; 218 int ret; 219 220 /* Unregister device */ 221 ret = mtd_device_unregister(nand_to_mtd(chip)); 222 WARN_ON(ret); 223 224 /* Release resources */ 225 nand_cleanup(chip); 226 227 iounmap(sharpsl->io); 228 229 /* Free the driver's structure */ 230 kfree(sharpsl); 231 232 return 0; 233 } 234 235 static struct platform_driver sharpsl_nand_driver = { 236 .driver = { 237 .name = "sharpsl-nand", 238 }, 239 .probe = sharpsl_nand_probe, 240 .remove = sharpsl_nand_remove, 241 }; 242 243 module_platform_driver(sharpsl_nand_driver); 244 245 MODULE_LICENSE("GPL"); 246 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>"); 247 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series"); 248