1 /* 2 * Copyright © 2009 - Maxim Levitsky 3 * driver for Ricoh xD readers 4 * 5 * This program is free software; you can redistribute it and/or modify 6 * it under the terms of the GNU General Public License version 2 as 7 * published by the Free Software Foundation. 8 */ 9 10 #define DRV_NAME "r852" 11 #define pr_fmt(fmt) DRV_NAME ": " fmt 12 13 #include <linux/kernel.h> 14 #include <linux/module.h> 15 #include <linux/jiffies.h> 16 #include <linux/workqueue.h> 17 #include <linux/interrupt.h> 18 #include <linux/pci.h> 19 #include <linux/pci_ids.h> 20 #include <linux/delay.h> 21 #include <linux/slab.h> 22 #include <asm/byteorder.h> 23 #include <linux/sched.h> 24 #include "sm_common.h" 25 #include "r852.h" 26 27 28 static bool r852_enable_dma = 1; 29 module_param(r852_enable_dma, bool, S_IRUGO); 30 MODULE_PARM_DESC(r852_enable_dma, "Enable usage of the DMA (default)"); 31 32 static int debug; 33 module_param(debug, int, S_IRUGO | S_IWUSR); 34 MODULE_PARM_DESC(debug, "Debug level (0-2)"); 35 36 /* read register */ 37 static inline uint8_t r852_read_reg(struct r852_device *dev, int address) 38 { 39 uint8_t reg = readb(dev->mmio + address); 40 return reg; 41 } 42 43 /* write register */ 44 static inline void r852_write_reg(struct r852_device *dev, 45 int address, uint8_t value) 46 { 47 writeb(value, dev->mmio + address); 48 mmiowb(); 49 } 50 51 52 /* read dword sized register */ 53 static inline uint32_t r852_read_reg_dword(struct r852_device *dev, int address) 54 { 55 uint32_t reg = le32_to_cpu(readl(dev->mmio + address)); 56 return reg; 57 } 58 59 /* write dword sized register */ 60 static inline void r852_write_reg_dword(struct r852_device *dev, 61 int address, uint32_t value) 62 { 63 writel(cpu_to_le32(value), dev->mmio + address); 64 mmiowb(); 65 } 66 67 /* returns pointer to our private structure */ 68 static inline struct r852_device *r852_get_dev(struct mtd_info *mtd) 69 { 70 struct nand_chip *chip = mtd_to_nand(mtd); 71 return nand_get_controller_data(chip); 72 } 73 74 75 /* check if controller supports dma */ 76 static void r852_dma_test(struct r852_device *dev) 77 { 78 dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) & 79 (R852_DMA1 | R852_DMA2)) == (R852_DMA1 | R852_DMA2); 80 81 if (!dev->dma_usable) 82 message("Non dma capable device detected, dma disabled"); 83 84 if (!r852_enable_dma) { 85 message("disabling dma on user request"); 86 dev->dma_usable = 0; 87 } 88 } 89 90 /* 91 * Enable dma. Enables ether first or second stage of the DMA, 92 * Expects dev->dma_dir and dev->dma_state be set 93 */ 94 static void r852_dma_enable(struct r852_device *dev) 95 { 96 uint8_t dma_reg, dma_irq_reg; 97 98 /* Set up dma settings */ 99 dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS); 100 dma_reg &= ~(R852_DMA_READ | R852_DMA_INTERNAL | R852_DMA_MEMORY); 101 102 if (dev->dma_dir) 103 dma_reg |= R852_DMA_READ; 104 105 if (dev->dma_state == DMA_INTERNAL) { 106 dma_reg |= R852_DMA_INTERNAL; 107 /* Precaution to make sure HW doesn't write */ 108 /* to random kernel memory */ 109 r852_write_reg_dword(dev, R852_DMA_ADDR, 110 cpu_to_le32(dev->phys_bounce_buffer)); 111 } else { 112 dma_reg |= R852_DMA_MEMORY; 113 r852_write_reg_dword(dev, R852_DMA_ADDR, 114 cpu_to_le32(dev->phys_dma_addr)); 115 } 116 117 /* Precaution: make sure write reached the device */ 118 r852_read_reg_dword(dev, R852_DMA_ADDR); 119 120 r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg); 121 122 /* Set dma irq */ 123 dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE); 124 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 125 dma_irq_reg | 126 R852_DMA_IRQ_INTERNAL | 127 R852_DMA_IRQ_ERROR | 128 R852_DMA_IRQ_MEMORY); 129 } 130 131 /* 132 * Disable dma, called from the interrupt handler, which specifies 133 * success of the operation via 'error' argument 134 */ 135 static void r852_dma_done(struct r852_device *dev, int error) 136 { 137 WARN_ON(dev->dma_stage == 0); 138 139 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, 140 r852_read_reg_dword(dev, R852_DMA_IRQ_STA)); 141 142 r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0); 143 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0); 144 145 /* Precaution to make sure HW doesn't write to random kernel memory */ 146 r852_write_reg_dword(dev, R852_DMA_ADDR, 147 cpu_to_le32(dev->phys_bounce_buffer)); 148 r852_read_reg_dword(dev, R852_DMA_ADDR); 149 150 dev->dma_error = error; 151 dev->dma_stage = 0; 152 153 if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer) 154 dma_unmap_single(&dev->pci_dev->dev, dev->phys_dma_addr, 155 R852_DMA_LEN, 156 dev->dma_dir ? DMA_FROM_DEVICE : DMA_TO_DEVICE); 157 } 158 159 /* 160 * Wait, till dma is done, which includes both phases of it 161 */ 162 static int r852_dma_wait(struct r852_device *dev) 163 { 164 long timeout = wait_for_completion_timeout(&dev->dma_done, 165 msecs_to_jiffies(1000)); 166 if (!timeout) { 167 dbg("timeout waiting for DMA interrupt"); 168 return -ETIMEDOUT; 169 } 170 171 return 0; 172 } 173 174 /* 175 * Read/Write one page using dma. Only pages can be read (512 bytes) 176 */ 177 static void r852_do_dma(struct r852_device *dev, uint8_t *buf, int do_read) 178 { 179 int bounce = 0; 180 unsigned long flags; 181 int error; 182 183 dev->dma_error = 0; 184 185 /* Set dma direction */ 186 dev->dma_dir = do_read; 187 dev->dma_stage = 1; 188 reinit_completion(&dev->dma_done); 189 190 dbg_verbose("doing dma %s ", do_read ? "read" : "write"); 191 192 /* Set initial dma state: for reading first fill on board buffer, 193 from device, for writes first fill the buffer from memory*/ 194 dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY; 195 196 /* if incoming buffer is not page aligned, we should do bounce */ 197 if ((unsigned long)buf & (R852_DMA_LEN-1)) 198 bounce = 1; 199 200 if (!bounce) { 201 dev->phys_dma_addr = dma_map_single(&dev->pci_dev->dev, buf, 202 R852_DMA_LEN, 203 do_read ? DMA_FROM_DEVICE : DMA_TO_DEVICE); 204 if (dma_mapping_error(&dev->pci_dev->dev, dev->phys_dma_addr)) 205 bounce = 1; 206 } 207 208 if (bounce) { 209 dbg_verbose("dma: using bounce buffer"); 210 dev->phys_dma_addr = dev->phys_bounce_buffer; 211 if (!do_read) 212 memcpy(dev->bounce_buffer, buf, R852_DMA_LEN); 213 } 214 215 /* Enable DMA */ 216 spin_lock_irqsave(&dev->irqlock, flags); 217 r852_dma_enable(dev); 218 spin_unlock_irqrestore(&dev->irqlock, flags); 219 220 /* Wait till complete */ 221 error = r852_dma_wait(dev); 222 223 if (error) { 224 r852_dma_done(dev, error); 225 return; 226 } 227 228 if (do_read && bounce) 229 memcpy((void *)buf, dev->bounce_buffer, R852_DMA_LEN); 230 } 231 232 /* 233 * Program data lines of the nand chip to send data to it 234 */ 235 static void r852_write_buf(struct nand_chip *chip, const uint8_t *buf, int len) 236 { 237 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip)); 238 uint32_t reg; 239 240 /* Don't allow any access to hardware if we suspect card removal */ 241 if (dev->card_unstable) 242 return; 243 244 /* Special case for whole sector read */ 245 if (len == R852_DMA_LEN && dev->dma_usable) { 246 r852_do_dma(dev, (uint8_t *)buf, 0); 247 return; 248 } 249 250 /* write DWORD chinks - faster */ 251 while (len >= 4) { 252 reg = buf[0] | buf[1] << 8 | buf[2] << 16 | buf[3] << 24; 253 r852_write_reg_dword(dev, R852_DATALINE, reg); 254 buf += 4; 255 len -= 4; 256 257 } 258 259 /* write rest */ 260 while (len > 0) { 261 r852_write_reg(dev, R852_DATALINE, *buf++); 262 len--; 263 } 264 } 265 266 /* 267 * Read data lines of the nand chip to retrieve data 268 */ 269 static void r852_read_buf(struct nand_chip *chip, uint8_t *buf, int len) 270 { 271 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip)); 272 uint32_t reg; 273 274 if (dev->card_unstable) { 275 /* since we can't signal error here, at least, return 276 predictable buffer */ 277 memset(buf, 0, len); 278 return; 279 } 280 281 /* special case for whole sector read */ 282 if (len == R852_DMA_LEN && dev->dma_usable) { 283 r852_do_dma(dev, buf, 1); 284 return; 285 } 286 287 /* read in dword sized chunks */ 288 while (len >= 4) { 289 290 reg = r852_read_reg_dword(dev, R852_DATALINE); 291 *buf++ = reg & 0xFF; 292 *buf++ = (reg >> 8) & 0xFF; 293 *buf++ = (reg >> 16) & 0xFF; 294 *buf++ = (reg >> 24) & 0xFF; 295 len -= 4; 296 } 297 298 /* read the reset by bytes */ 299 while (len--) 300 *buf++ = r852_read_reg(dev, R852_DATALINE); 301 } 302 303 /* 304 * Read one byte from nand chip 305 */ 306 static uint8_t r852_read_byte(struct nand_chip *chip) 307 { 308 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip)); 309 310 /* Same problem as in r852_read_buf.... */ 311 if (dev->card_unstable) 312 return 0; 313 314 return r852_read_reg(dev, R852_DATALINE); 315 } 316 317 /* 318 * Control several chip lines & send commands 319 */ 320 static void r852_cmdctl(struct nand_chip *chip, int dat, unsigned int ctrl) 321 { 322 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip)); 323 324 if (dev->card_unstable) 325 return; 326 327 if (ctrl & NAND_CTRL_CHANGE) { 328 329 dev->ctlreg &= ~(R852_CTL_DATA | R852_CTL_COMMAND | 330 R852_CTL_ON | R852_CTL_CARDENABLE); 331 332 if (ctrl & NAND_ALE) 333 dev->ctlreg |= R852_CTL_DATA; 334 335 if (ctrl & NAND_CLE) 336 dev->ctlreg |= R852_CTL_COMMAND; 337 338 if (ctrl & NAND_NCE) 339 dev->ctlreg |= (R852_CTL_CARDENABLE | R852_CTL_ON); 340 else 341 dev->ctlreg &= ~R852_CTL_WRITE; 342 343 /* when write is stareted, enable write access */ 344 if (dat == NAND_CMD_ERASE1) 345 dev->ctlreg |= R852_CTL_WRITE; 346 347 r852_write_reg(dev, R852_CTL, dev->ctlreg); 348 } 349 350 /* HACK: NAND_CMD_SEQIN is called without NAND_CTRL_CHANGE, but we need 351 to set write mode */ 352 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) { 353 dev->ctlreg |= R852_CTL_WRITE; 354 r852_write_reg(dev, R852_CTL, dev->ctlreg); 355 } 356 357 if (dat != NAND_CMD_NONE) 358 r852_write_reg(dev, R852_DATALINE, dat); 359 } 360 361 /* 362 * Wait till card is ready. 363 * based on nand_wait, but returns errors on DMA error 364 */ 365 static int r852_wait(struct nand_chip *chip) 366 { 367 struct r852_device *dev = nand_get_controller_data(chip); 368 369 unsigned long timeout; 370 u8 status; 371 372 timeout = jiffies + msecs_to_jiffies(400); 373 374 while (time_before(jiffies, timeout)) 375 if (chip->legacy.dev_ready(chip)) 376 break; 377 378 nand_status_op(chip, &status); 379 380 /* Unfortunelly, no way to send detailed error status... */ 381 if (dev->dma_error) { 382 status |= NAND_STATUS_FAIL; 383 dev->dma_error = 0; 384 } 385 return status; 386 } 387 388 /* 389 * Check if card is ready 390 */ 391 392 static int r852_ready(struct nand_chip *chip) 393 { 394 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip)); 395 return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY); 396 } 397 398 399 /* 400 * Set ECC engine mode 401 */ 402 403 static void r852_ecc_hwctl(struct nand_chip *chip, int mode) 404 { 405 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip)); 406 407 if (dev->card_unstable) 408 return; 409 410 switch (mode) { 411 case NAND_ECC_READ: 412 case NAND_ECC_WRITE: 413 /* enable ecc generation/check*/ 414 dev->ctlreg |= R852_CTL_ECC_ENABLE; 415 416 /* flush ecc buffer */ 417 r852_write_reg(dev, R852_CTL, 418 dev->ctlreg | R852_CTL_ECC_ACCESS); 419 420 r852_read_reg_dword(dev, R852_DATALINE); 421 r852_write_reg(dev, R852_CTL, dev->ctlreg); 422 return; 423 424 case NAND_ECC_READSYN: 425 /* disable ecc generation */ 426 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; 427 r852_write_reg(dev, R852_CTL, dev->ctlreg); 428 } 429 } 430 431 /* 432 * Calculate ECC, only used for writes 433 */ 434 435 static int r852_ecc_calculate(struct nand_chip *chip, const uint8_t *dat, 436 uint8_t *ecc_code) 437 { 438 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip)); 439 struct sm_oob *oob = (struct sm_oob *)ecc_code; 440 uint32_t ecc1, ecc2; 441 442 if (dev->card_unstable) 443 return 0; 444 445 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; 446 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); 447 448 ecc1 = r852_read_reg_dword(dev, R852_DATALINE); 449 ecc2 = r852_read_reg_dword(dev, R852_DATALINE); 450 451 oob->ecc1[0] = (ecc1) & 0xFF; 452 oob->ecc1[1] = (ecc1 >> 8) & 0xFF; 453 oob->ecc1[2] = (ecc1 >> 16) & 0xFF; 454 455 oob->ecc2[0] = (ecc2) & 0xFF; 456 oob->ecc2[1] = (ecc2 >> 8) & 0xFF; 457 oob->ecc2[2] = (ecc2 >> 16) & 0xFF; 458 459 r852_write_reg(dev, R852_CTL, dev->ctlreg); 460 return 0; 461 } 462 463 /* 464 * Correct the data using ECC, hw did almost everything for us 465 */ 466 467 static int r852_ecc_correct(struct nand_chip *chip, uint8_t *dat, 468 uint8_t *read_ecc, uint8_t *calc_ecc) 469 { 470 uint32_t ecc_reg; 471 uint8_t ecc_status, err_byte; 472 int i, error = 0; 473 474 struct r852_device *dev = r852_get_dev(nand_to_mtd(chip)); 475 476 if (dev->card_unstable) 477 return 0; 478 479 if (dev->dma_error) { 480 dev->dma_error = 0; 481 return -EIO; 482 } 483 484 r852_write_reg(dev, R852_CTL, dev->ctlreg | R852_CTL_ECC_ACCESS); 485 ecc_reg = r852_read_reg_dword(dev, R852_DATALINE); 486 r852_write_reg(dev, R852_CTL, dev->ctlreg); 487 488 for (i = 0 ; i <= 1 ; i++) { 489 490 ecc_status = (ecc_reg >> 8) & 0xFF; 491 492 /* ecc uncorrectable error */ 493 if (ecc_status & R852_ECC_FAIL) { 494 dbg("ecc: unrecoverable error, in half %d", i); 495 error = -EBADMSG; 496 goto exit; 497 } 498 499 /* correctable error */ 500 if (ecc_status & R852_ECC_CORRECTABLE) { 501 502 err_byte = ecc_reg & 0xFF; 503 dbg("ecc: recoverable error, " 504 "in half %d, byte %d, bit %d", i, 505 err_byte, ecc_status & R852_ECC_ERR_BIT_MSK); 506 507 dat[err_byte] ^= 508 1 << (ecc_status & R852_ECC_ERR_BIT_MSK); 509 error++; 510 } 511 512 dat += 256; 513 ecc_reg >>= 16; 514 } 515 exit: 516 return error; 517 } 518 519 /* 520 * This is copy of nand_read_oob_std 521 * nand_read_oob_syndrome assumes we can send column address - we can't 522 */ 523 static int r852_read_oob(struct nand_chip *chip, int page) 524 { 525 struct mtd_info *mtd = nand_to_mtd(chip); 526 527 return nand_read_oob_op(chip, page, 0, chip->oob_poi, mtd->oobsize); 528 } 529 530 /* 531 * Start the nand engine 532 */ 533 534 static void r852_engine_enable(struct r852_device *dev) 535 { 536 if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) { 537 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON); 538 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED); 539 } else { 540 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED); 541 r852_write_reg(dev, R852_CTL, R852_CTL_RESET | R852_CTL_ON); 542 } 543 msleep(300); 544 r852_write_reg(dev, R852_CTL, 0); 545 } 546 547 548 /* 549 * Stop the nand engine 550 */ 551 552 static void r852_engine_disable(struct r852_device *dev) 553 { 554 r852_write_reg_dword(dev, R852_HW, 0); 555 r852_write_reg(dev, R852_CTL, R852_CTL_RESET); 556 } 557 558 /* 559 * Test if card is present 560 */ 561 562 static void r852_card_update_present(struct r852_device *dev) 563 { 564 unsigned long flags; 565 uint8_t reg; 566 567 spin_lock_irqsave(&dev->irqlock, flags); 568 reg = r852_read_reg(dev, R852_CARD_STA); 569 dev->card_detected = !!(reg & R852_CARD_STA_PRESENT); 570 spin_unlock_irqrestore(&dev->irqlock, flags); 571 } 572 573 /* 574 * Update card detection IRQ state according to current card state 575 * which is read in r852_card_update_present 576 */ 577 static void r852_update_card_detect(struct r852_device *dev) 578 { 579 int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE); 580 dev->card_unstable = 0; 581 582 card_detect_reg &= ~(R852_CARD_IRQ_REMOVE | R852_CARD_IRQ_INSERT); 583 card_detect_reg |= R852_CARD_IRQ_GENABLE; 584 585 card_detect_reg |= dev->card_detected ? 586 R852_CARD_IRQ_REMOVE : R852_CARD_IRQ_INSERT; 587 588 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg); 589 } 590 591 static ssize_t r852_media_type_show(struct device *sys_dev, 592 struct device_attribute *attr, char *buf) 593 { 594 struct mtd_info *mtd = container_of(sys_dev, struct mtd_info, dev); 595 struct r852_device *dev = r852_get_dev(mtd); 596 char *data = dev->sm ? "smartmedia" : "xd"; 597 598 strcpy(buf, data); 599 return strlen(data); 600 } 601 602 static DEVICE_ATTR(media_type, S_IRUGO, r852_media_type_show, NULL); 603 604 605 /* Detect properties of card in slot */ 606 static void r852_update_media_status(struct r852_device *dev) 607 { 608 uint8_t reg; 609 unsigned long flags; 610 int readonly; 611 612 spin_lock_irqsave(&dev->irqlock, flags); 613 if (!dev->card_detected) { 614 message("card removed"); 615 spin_unlock_irqrestore(&dev->irqlock, flags); 616 return ; 617 } 618 619 readonly = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO; 620 reg = r852_read_reg(dev, R852_DMA_CAP); 621 dev->sm = (reg & (R852_DMA1 | R852_DMA2)) && (reg & R852_SMBIT); 622 623 message("detected %s %s card in slot", 624 dev->sm ? "SmartMedia" : "xD", 625 readonly ? "readonly" : "writeable"); 626 627 dev->readonly = readonly; 628 spin_unlock_irqrestore(&dev->irqlock, flags); 629 } 630 631 /* 632 * Register the nand device 633 * Called when the card is detected 634 */ 635 static int r852_register_nand_device(struct r852_device *dev) 636 { 637 struct mtd_info *mtd = nand_to_mtd(dev->chip); 638 639 WARN_ON(dev->card_registered); 640 641 mtd->dev.parent = &dev->pci_dev->dev; 642 643 if (dev->readonly) 644 dev->chip->options |= NAND_ROM; 645 646 r852_engine_enable(dev); 647 648 if (sm_register_device(mtd, dev->sm)) 649 goto error1; 650 651 if (device_create_file(&mtd->dev, &dev_attr_media_type)) { 652 message("can't create media type sysfs attribute"); 653 goto error3; 654 } 655 656 dev->card_registered = 1; 657 return 0; 658 error3: 659 nand_release(dev->chip); 660 error1: 661 /* Force card redetect */ 662 dev->card_detected = 0; 663 return -1; 664 } 665 666 /* 667 * Unregister the card 668 */ 669 670 static void r852_unregister_nand_device(struct r852_device *dev) 671 { 672 struct mtd_info *mtd = nand_to_mtd(dev->chip); 673 674 if (!dev->card_registered) 675 return; 676 677 device_remove_file(&mtd->dev, &dev_attr_media_type); 678 nand_release(dev->chip); 679 r852_engine_disable(dev); 680 dev->card_registered = 0; 681 } 682 683 /* Card state updater */ 684 static void r852_card_detect_work(struct work_struct *work) 685 { 686 struct r852_device *dev = 687 container_of(work, struct r852_device, card_detect_work.work); 688 689 r852_card_update_present(dev); 690 r852_update_card_detect(dev); 691 dev->card_unstable = 0; 692 693 /* False alarm */ 694 if (dev->card_detected == dev->card_registered) 695 goto exit; 696 697 /* Read media properties */ 698 r852_update_media_status(dev); 699 700 /* Register the card */ 701 if (dev->card_detected) 702 r852_register_nand_device(dev); 703 else 704 r852_unregister_nand_device(dev); 705 exit: 706 r852_update_card_detect(dev); 707 } 708 709 /* Ack + disable IRQ generation */ 710 static void r852_disable_irqs(struct r852_device *dev) 711 { 712 uint8_t reg; 713 reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE); 714 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK); 715 716 reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE); 717 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 718 reg & ~R852_DMA_IRQ_MASK); 719 720 r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK); 721 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK); 722 } 723 724 /* Interrupt handler */ 725 static irqreturn_t r852_irq(int irq, void *data) 726 { 727 struct r852_device *dev = (struct r852_device *)data; 728 729 uint8_t card_status, dma_status; 730 unsigned long flags; 731 irqreturn_t ret = IRQ_NONE; 732 733 spin_lock_irqsave(&dev->irqlock, flags); 734 735 /* handle card detection interrupts first */ 736 card_status = r852_read_reg(dev, R852_CARD_IRQ_STA); 737 r852_write_reg(dev, R852_CARD_IRQ_STA, card_status); 738 739 if (card_status & (R852_CARD_IRQ_INSERT|R852_CARD_IRQ_REMOVE)) { 740 741 ret = IRQ_HANDLED; 742 dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT); 743 744 /* we shouldn't receive any interrupts if we wait for card 745 to settle */ 746 WARN_ON(dev->card_unstable); 747 748 /* disable irqs while card is unstable */ 749 /* this will timeout DMA if active, but better that garbage */ 750 r852_disable_irqs(dev); 751 752 if (dev->card_unstable) 753 goto out; 754 755 /* let, card state to settle a bit, and then do the work */ 756 dev->card_unstable = 1; 757 queue_delayed_work(dev->card_workqueue, 758 &dev->card_detect_work, msecs_to_jiffies(100)); 759 goto out; 760 } 761 762 763 /* Handle dma interrupts */ 764 dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA); 765 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status); 766 767 if (dma_status & R852_DMA_IRQ_MASK) { 768 769 ret = IRQ_HANDLED; 770 771 if (dma_status & R852_DMA_IRQ_ERROR) { 772 dbg("received dma error IRQ"); 773 r852_dma_done(dev, -EIO); 774 complete(&dev->dma_done); 775 goto out; 776 } 777 778 /* received DMA interrupt out of nowhere? */ 779 WARN_ON_ONCE(dev->dma_stage == 0); 780 781 if (dev->dma_stage == 0) 782 goto out; 783 784 /* done device access */ 785 if (dev->dma_state == DMA_INTERNAL && 786 (dma_status & R852_DMA_IRQ_INTERNAL)) { 787 788 dev->dma_state = DMA_MEMORY; 789 dev->dma_stage++; 790 } 791 792 /* done memory DMA */ 793 if (dev->dma_state == DMA_MEMORY && 794 (dma_status & R852_DMA_IRQ_MEMORY)) { 795 dev->dma_state = DMA_INTERNAL; 796 dev->dma_stage++; 797 } 798 799 /* Enable 2nd half of dma dance */ 800 if (dev->dma_stage == 2) 801 r852_dma_enable(dev); 802 803 /* Operation done */ 804 if (dev->dma_stage == 3) { 805 r852_dma_done(dev, 0); 806 complete(&dev->dma_done); 807 } 808 goto out; 809 } 810 811 /* Handle unknown interrupts */ 812 if (dma_status) 813 dbg("bad dma IRQ status = %x", dma_status); 814 815 if (card_status & ~R852_CARD_STA_CD) 816 dbg("strange card status = %x", card_status); 817 818 out: 819 spin_unlock_irqrestore(&dev->irqlock, flags); 820 return ret; 821 } 822 823 static int r852_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) 824 { 825 int error; 826 struct nand_chip *chip; 827 struct r852_device *dev; 828 829 /* pci initialization */ 830 error = pci_enable_device(pci_dev); 831 832 if (error) 833 goto error1; 834 835 pci_set_master(pci_dev); 836 837 error = dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(32)); 838 if (error) 839 goto error2; 840 841 error = pci_request_regions(pci_dev, DRV_NAME); 842 843 if (error) 844 goto error3; 845 846 error = -ENOMEM; 847 848 /* init nand chip, but register it only on card insert */ 849 chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL); 850 851 if (!chip) 852 goto error4; 853 854 /* commands */ 855 chip->legacy.cmd_ctrl = r852_cmdctl; 856 chip->legacy.waitfunc = r852_wait; 857 chip->legacy.dev_ready = r852_ready; 858 859 /* I/O */ 860 chip->legacy.read_byte = r852_read_byte; 861 chip->legacy.read_buf = r852_read_buf; 862 chip->legacy.write_buf = r852_write_buf; 863 864 /* ecc */ 865 chip->ecc.mode = NAND_ECC_HW_SYNDROME; 866 chip->ecc.size = R852_DMA_LEN; 867 chip->ecc.bytes = SM_OOB_SIZE; 868 chip->ecc.strength = 2; 869 chip->ecc.hwctl = r852_ecc_hwctl; 870 chip->ecc.calculate = r852_ecc_calculate; 871 chip->ecc.correct = r852_ecc_correct; 872 873 /* TODO: hack */ 874 chip->ecc.read_oob = r852_read_oob; 875 876 /* init our device structure */ 877 dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL); 878 879 if (!dev) 880 goto error5; 881 882 nand_set_controller_data(chip, dev); 883 dev->chip = chip; 884 dev->pci_dev = pci_dev; 885 pci_set_drvdata(pci_dev, dev); 886 887 dev->bounce_buffer = dma_alloc_coherent(&pci_dev->dev, R852_DMA_LEN, 888 &dev->phys_bounce_buffer, GFP_KERNEL); 889 890 if (!dev->bounce_buffer) 891 goto error6; 892 893 894 error = -ENODEV; 895 dev->mmio = pci_ioremap_bar(pci_dev, 0); 896 897 if (!dev->mmio) 898 goto error7; 899 900 error = -ENOMEM; 901 dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL); 902 903 if (!dev->tmp_buffer) 904 goto error8; 905 906 init_completion(&dev->dma_done); 907 908 dev->card_workqueue = create_freezable_workqueue(DRV_NAME); 909 910 if (!dev->card_workqueue) 911 goto error9; 912 913 INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work); 914 915 /* shutdown everything - precation */ 916 r852_engine_disable(dev); 917 r852_disable_irqs(dev); 918 919 r852_dma_test(dev); 920 921 dev->irq = pci_dev->irq; 922 spin_lock_init(&dev->irqlock); 923 924 dev->card_detected = 0; 925 r852_card_update_present(dev); 926 927 /*register irq handler*/ 928 error = -ENODEV; 929 if (request_irq(pci_dev->irq, &r852_irq, IRQF_SHARED, 930 DRV_NAME, dev)) 931 goto error10; 932 933 /* kick initial present test */ 934 queue_delayed_work(dev->card_workqueue, 935 &dev->card_detect_work, 0); 936 937 938 pr_notice("driver loaded successfully\n"); 939 return 0; 940 941 error10: 942 destroy_workqueue(dev->card_workqueue); 943 error9: 944 kfree(dev->tmp_buffer); 945 error8: 946 pci_iounmap(pci_dev, dev->mmio); 947 error7: 948 dma_free_coherent(&pci_dev->dev, R852_DMA_LEN, dev->bounce_buffer, 949 dev->phys_bounce_buffer); 950 error6: 951 kfree(dev); 952 error5: 953 kfree(chip); 954 error4: 955 pci_release_regions(pci_dev); 956 error3: 957 error2: 958 pci_disable_device(pci_dev); 959 error1: 960 return error; 961 } 962 963 static void r852_remove(struct pci_dev *pci_dev) 964 { 965 struct r852_device *dev = pci_get_drvdata(pci_dev); 966 967 /* Stop detect workqueue - 968 we are going to unregister the device anyway*/ 969 cancel_delayed_work_sync(&dev->card_detect_work); 970 destroy_workqueue(dev->card_workqueue); 971 972 /* Unregister the device, this might make more IO */ 973 r852_unregister_nand_device(dev); 974 975 /* Stop interrupts */ 976 r852_disable_irqs(dev); 977 free_irq(dev->irq, dev); 978 979 /* Cleanup */ 980 kfree(dev->tmp_buffer); 981 pci_iounmap(pci_dev, dev->mmio); 982 dma_free_coherent(&pci_dev->dev, R852_DMA_LEN, dev->bounce_buffer, 983 dev->phys_bounce_buffer); 984 985 kfree(dev->chip); 986 kfree(dev); 987 988 /* Shutdown the PCI device */ 989 pci_release_regions(pci_dev); 990 pci_disable_device(pci_dev); 991 } 992 993 static void r852_shutdown(struct pci_dev *pci_dev) 994 { 995 struct r852_device *dev = pci_get_drvdata(pci_dev); 996 997 cancel_delayed_work_sync(&dev->card_detect_work); 998 r852_disable_irqs(dev); 999 synchronize_irq(dev->irq); 1000 pci_disable_device(pci_dev); 1001 } 1002 1003 #ifdef CONFIG_PM_SLEEP 1004 static int r852_suspend(struct device *device) 1005 { 1006 struct r852_device *dev = pci_get_drvdata(to_pci_dev(device)); 1007 1008 if (dev->ctlreg & R852_CTL_CARDENABLE) 1009 return -EBUSY; 1010 1011 /* First make sure the detect work is gone */ 1012 cancel_delayed_work_sync(&dev->card_detect_work); 1013 1014 /* Turn off the interrupts and stop the device */ 1015 r852_disable_irqs(dev); 1016 r852_engine_disable(dev); 1017 1018 /* If card was pulled off just during the suspend, which is very 1019 unlikely, we will remove it on resume, it too late now 1020 anyway... */ 1021 dev->card_unstable = 0; 1022 return 0; 1023 } 1024 1025 static int r852_resume(struct device *device) 1026 { 1027 struct r852_device *dev = pci_get_drvdata(to_pci_dev(device)); 1028 1029 r852_disable_irqs(dev); 1030 r852_card_update_present(dev); 1031 r852_engine_disable(dev); 1032 1033 1034 /* If card status changed, just do the work */ 1035 if (dev->card_detected != dev->card_registered) { 1036 dbg("card was %s during low power state", 1037 dev->card_detected ? "added" : "removed"); 1038 1039 queue_delayed_work(dev->card_workqueue, 1040 &dev->card_detect_work, msecs_to_jiffies(1000)); 1041 return 0; 1042 } 1043 1044 /* Otherwise, initialize the card */ 1045 if (dev->card_registered) { 1046 r852_engine_enable(dev); 1047 nand_select_target(dev->chip, 0); 1048 nand_reset_op(dev->chip); 1049 nand_deselect_target(dev->chip); 1050 } 1051 1052 /* Program card detection IRQ */ 1053 r852_update_card_detect(dev); 1054 return 0; 1055 } 1056 #endif 1057 1058 static const struct pci_device_id r852_pci_id_tbl[] = { 1059 1060 { PCI_VDEVICE(RICOH, 0x0852), }, 1061 { }, 1062 }; 1063 1064 MODULE_DEVICE_TABLE(pci, r852_pci_id_tbl); 1065 1066 static SIMPLE_DEV_PM_OPS(r852_pm_ops, r852_suspend, r852_resume); 1067 1068 static struct pci_driver r852_pci_driver = { 1069 .name = DRV_NAME, 1070 .id_table = r852_pci_id_tbl, 1071 .probe = r852_probe, 1072 .remove = r852_remove, 1073 .shutdown = r852_shutdown, 1074 .driver.pm = &r852_pm_ops, 1075 }; 1076 1077 module_pci_driver(r852_pci_driver); 1078 1079 MODULE_LICENSE("GPL"); 1080 MODULE_AUTHOR("Maxim Levitsky <maximlevitsky@gmail.com>"); 1081 MODULE_DESCRIPTION("Ricoh 85xx xD/smartmedia card reader driver"); 1082