xref: /linux/drivers/mtd/nand/raw/pasemi_nand.c (revision bfd5bb6f90af092aa345b15cd78143956a13c2a8)
1 /*
2  * Copyright (C) 2006-2007 PA Semi, Inc
3  *
4  * Author: Egor Martovetsky <egor@pasemi.com>
5  * Maintained by: Olof Johansson <olof@lixom.net>
6  *
7  * Driver for the PWRficient onchip NAND flash interface
8  *
9  * This program is free software; you can redistribute it and/or modify
10  * it under the terms of the GNU General Public License version 2 as
11  * published by the Free Software Foundation.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
21  */
22 
23 #undef DEBUG
24 
25 #include <linux/slab.h>
26 #include <linux/module.h>
27 #include <linux/mtd/mtd.h>
28 #include <linux/mtd/rawnand.h>
29 #include <linux/mtd/nand_ecc.h>
30 #include <linux/of_address.h>
31 #include <linux/of_irq.h>
32 #include <linux/of_platform.h>
33 #include <linux/platform_device.h>
34 #include <linux/pci.h>
35 
36 #include <asm/io.h>
37 
38 #define LBICTRL_LPCCTL_NR		0x00004000
39 #define CLE_PIN_CTL			15
40 #define ALE_PIN_CTL			14
41 
42 static unsigned int lpcctl;
43 static struct mtd_info *pasemi_nand_mtd;
44 static const char driver_name[] = "pasemi-nand";
45 
46 static void pasemi_read_buf(struct mtd_info *mtd, u_char *buf, int len)
47 {
48 	struct nand_chip *chip = mtd_to_nand(mtd);
49 
50 	while (len > 0x800) {
51 		memcpy_fromio(buf, chip->IO_ADDR_R, 0x800);
52 		buf += 0x800;
53 		len -= 0x800;
54 	}
55 	memcpy_fromio(buf, chip->IO_ADDR_R, len);
56 }
57 
58 static void pasemi_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
59 {
60 	struct nand_chip *chip = mtd_to_nand(mtd);
61 
62 	while (len > 0x800) {
63 		memcpy_toio(chip->IO_ADDR_R, buf, 0x800);
64 		buf += 0x800;
65 		len -= 0x800;
66 	}
67 	memcpy_toio(chip->IO_ADDR_R, buf, len);
68 }
69 
70 static void pasemi_hwcontrol(struct mtd_info *mtd, int cmd,
71 			     unsigned int ctrl)
72 {
73 	struct nand_chip *chip = mtd_to_nand(mtd);
74 
75 	if (cmd == NAND_CMD_NONE)
76 		return;
77 
78 	if (ctrl & NAND_CLE)
79 		out_8(chip->IO_ADDR_W + (1 << CLE_PIN_CTL), cmd);
80 	else
81 		out_8(chip->IO_ADDR_W + (1 << ALE_PIN_CTL), cmd);
82 
83 	/* Push out posted writes */
84 	eieio();
85 	inl(lpcctl);
86 }
87 
88 int pasemi_device_ready(struct mtd_info *mtd)
89 {
90 	return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR);
91 }
92 
93 static int pasemi_nand_probe(struct platform_device *ofdev)
94 {
95 	struct device *dev = &ofdev->dev;
96 	struct pci_dev *pdev;
97 	struct device_node *np = dev->of_node;
98 	struct resource res;
99 	struct nand_chip *chip;
100 	int err = 0;
101 
102 	err = of_address_to_resource(np, 0, &res);
103 
104 	if (err)
105 		return -EINVAL;
106 
107 	/* We only support one device at the moment */
108 	if (pasemi_nand_mtd)
109 		return -ENODEV;
110 
111 	dev_dbg(dev, "pasemi_nand at %pR\n", &res);
112 
113 	/* Allocate memory for MTD device structure and private data */
114 	chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
115 	if (!chip) {
116 		err = -ENOMEM;
117 		goto out;
118 	}
119 
120 	pasemi_nand_mtd = nand_to_mtd(chip);
121 
122 	/* Link the private data with the MTD structure */
123 	pasemi_nand_mtd->dev.parent = dev;
124 
125 	chip->IO_ADDR_R = of_iomap(np, 0);
126 	chip->IO_ADDR_W = chip->IO_ADDR_R;
127 
128 	if (!chip->IO_ADDR_R) {
129 		err = -EIO;
130 		goto out_mtd;
131 	}
132 
133 	pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa008, NULL);
134 	if (!pdev) {
135 		err = -ENODEV;
136 		goto out_ior;
137 	}
138 
139 	lpcctl = pci_resource_start(pdev, 0);
140 	pci_dev_put(pdev);
141 
142 	if (!request_region(lpcctl, 4, driver_name)) {
143 		err = -EBUSY;
144 		goto out_ior;
145 	}
146 
147 	chip->cmd_ctrl = pasemi_hwcontrol;
148 	chip->dev_ready = pasemi_device_ready;
149 	chip->read_buf = pasemi_read_buf;
150 	chip->write_buf = pasemi_write_buf;
151 	chip->chip_delay = 0;
152 	chip->ecc.mode = NAND_ECC_SOFT;
153 	chip->ecc.algo = NAND_ECC_HAMMING;
154 
155 	/* Enable the following for a flash based bad block table */
156 	chip->bbt_options = NAND_BBT_USE_FLASH;
157 
158 	/* Scan to find existence of the device */
159 	err = nand_scan(pasemi_nand_mtd, 1);
160 	if (err)
161 		goto out_lpc;
162 
163 	if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) {
164 		dev_err(dev, "Unable to register MTD device\n");
165 		err = -ENODEV;
166 		goto out_lpc;
167 	}
168 
169 	dev_info(dev, "PA Semi NAND flash at %pR, control at I/O %x\n", &res,
170 		 lpcctl);
171 
172 	return 0;
173 
174  out_lpc:
175 	release_region(lpcctl, 4);
176  out_ior:
177 	iounmap(chip->IO_ADDR_R);
178  out_mtd:
179 	kfree(chip);
180  out:
181 	return err;
182 }
183 
184 static int pasemi_nand_remove(struct platform_device *ofdev)
185 {
186 	struct nand_chip *chip;
187 
188 	if (!pasemi_nand_mtd)
189 		return 0;
190 
191 	chip = mtd_to_nand(pasemi_nand_mtd);
192 
193 	/* Release resources, unregister device */
194 	nand_release(pasemi_nand_mtd);
195 
196 	release_region(lpcctl, 4);
197 
198 	iounmap(chip->IO_ADDR_R);
199 
200 	/* Free the MTD device structure */
201 	kfree(chip);
202 
203 	pasemi_nand_mtd = NULL;
204 
205 	return 0;
206 }
207 
208 static const struct of_device_id pasemi_nand_match[] =
209 {
210 	{
211 		.compatible   = "pasemi,localbus-nand",
212 	},
213 	{},
214 };
215 
216 MODULE_DEVICE_TABLE(of, pasemi_nand_match);
217 
218 static struct platform_driver pasemi_nand_driver =
219 {
220 	.driver = {
221 		.name = driver_name,
222 		.of_match_table = pasemi_nand_match,
223 	},
224 	.probe		= pasemi_nand_probe,
225 	.remove		= pasemi_nand_remove,
226 };
227 
228 module_platform_driver(pasemi_nand_driver);
229 
230 MODULE_LICENSE("GPL");
231 MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
232 MODULE_DESCRIPTION("NAND flash interface driver for PA Semi PWRficient");
233