xref: /linux/drivers/mtd/nand/raw/pasemi_nand.c (revision a8dfb61d6349b7b7173ec6829b920449239c472f)
1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Copyright (C) 2006-2007 PA Semi, Inc
4  *
5  * Author: Egor Martovetsky <egor@pasemi.com>
6  * Maintained by: Olof Johansson <olof@lixom.net>
7  *
8  * Driver for the PWRficient onchip NAND flash interface
9  */
10 
11 #undef DEBUG
12 
13 #include <linux/slab.h>
14 #include <linux/module.h>
15 #include <linux/mtd/mtd.h>
16 #include <linux/mtd/rawnand.h>
17 #include <linux/mtd/nand_ecc.h>
18 #include <linux/of_address.h>
19 #include <linux/of_irq.h>
20 #include <linux/of_platform.h>
21 #include <linux/platform_device.h>
22 #include <linux/pci.h>
23 
24 #include <asm/io.h>
25 
26 #define LBICTRL_LPCCTL_NR		0x00004000
27 #define CLE_PIN_CTL			15
28 #define ALE_PIN_CTL			14
29 
30 static unsigned int lpcctl;
31 static struct mtd_info *pasemi_nand_mtd;
32 static const char driver_name[] = "pasemi-nand";
33 
34 static void pasemi_read_buf(struct nand_chip *chip, u_char *buf, int len)
35 {
36 	while (len > 0x800) {
37 		memcpy_fromio(buf, chip->legacy.IO_ADDR_R, 0x800);
38 		buf += 0x800;
39 		len -= 0x800;
40 	}
41 	memcpy_fromio(buf, chip->legacy.IO_ADDR_R, len);
42 }
43 
44 static void pasemi_write_buf(struct nand_chip *chip, const u_char *buf,
45 			     int len)
46 {
47 	while (len > 0x800) {
48 		memcpy_toio(chip->legacy.IO_ADDR_R, buf, 0x800);
49 		buf += 0x800;
50 		len -= 0x800;
51 	}
52 	memcpy_toio(chip->legacy.IO_ADDR_R, buf, len);
53 }
54 
55 static void pasemi_hwcontrol(struct nand_chip *chip, int cmd,
56 			     unsigned int ctrl)
57 {
58 	if (cmd == NAND_CMD_NONE)
59 		return;
60 
61 	if (ctrl & NAND_CLE)
62 		out_8(chip->legacy.IO_ADDR_W + (1 << CLE_PIN_CTL), cmd);
63 	else
64 		out_8(chip->legacy.IO_ADDR_W + (1 << ALE_PIN_CTL), cmd);
65 
66 	/* Push out posted writes */
67 	eieio();
68 	inl(lpcctl);
69 }
70 
71 int pasemi_device_ready(struct nand_chip *chip)
72 {
73 	return !!(inl(lpcctl) & LBICTRL_LPCCTL_NR);
74 }
75 
76 static int pasemi_nand_probe(struct platform_device *ofdev)
77 {
78 	struct device *dev = &ofdev->dev;
79 	struct pci_dev *pdev;
80 	struct device_node *np = dev->of_node;
81 	struct resource res;
82 	struct nand_chip *chip;
83 	int err = 0;
84 
85 	err = of_address_to_resource(np, 0, &res);
86 
87 	if (err)
88 		return -EINVAL;
89 
90 	/* We only support one device at the moment */
91 	if (pasemi_nand_mtd)
92 		return -ENODEV;
93 
94 	dev_dbg(dev, "pasemi_nand at %pR\n", &res);
95 
96 	/* Allocate memory for MTD device structure and private data */
97 	chip = kzalloc(sizeof(struct nand_chip), GFP_KERNEL);
98 	if (!chip) {
99 		err = -ENOMEM;
100 		goto out;
101 	}
102 
103 	pasemi_nand_mtd = nand_to_mtd(chip);
104 
105 	/* Link the private data with the MTD structure */
106 	pasemi_nand_mtd->dev.parent = dev;
107 
108 	chip->legacy.IO_ADDR_R = of_iomap(np, 0);
109 	chip->legacy.IO_ADDR_W = chip->legacy.IO_ADDR_R;
110 
111 	if (!chip->legacy.IO_ADDR_R) {
112 		err = -EIO;
113 		goto out_mtd;
114 	}
115 
116 	pdev = pci_get_device(PCI_VENDOR_ID_PASEMI, 0xa008, NULL);
117 	if (!pdev) {
118 		err = -ENODEV;
119 		goto out_ior;
120 	}
121 
122 	lpcctl = pci_resource_start(pdev, 0);
123 	pci_dev_put(pdev);
124 
125 	if (!request_region(lpcctl, 4, driver_name)) {
126 		err = -EBUSY;
127 		goto out_ior;
128 	}
129 
130 	chip->legacy.cmd_ctrl = pasemi_hwcontrol;
131 	chip->legacy.dev_ready = pasemi_device_ready;
132 	chip->legacy.read_buf = pasemi_read_buf;
133 	chip->legacy.write_buf = pasemi_write_buf;
134 	chip->legacy.chip_delay = 0;
135 	chip->ecc.mode = NAND_ECC_SOFT;
136 	chip->ecc.algo = NAND_ECC_HAMMING;
137 
138 	/* Enable the following for a flash based bad block table */
139 	chip->bbt_options = NAND_BBT_USE_FLASH;
140 
141 	/* Scan to find existence of the device */
142 	err = nand_scan(chip, 1);
143 	if (err)
144 		goto out_lpc;
145 
146 	if (mtd_device_register(pasemi_nand_mtd, NULL, 0)) {
147 		dev_err(dev, "Unable to register MTD device\n");
148 		err = -ENODEV;
149 		goto out_cleanup_nand;
150 	}
151 
152 	dev_info(dev, "PA Semi NAND flash at %pR, control at I/O %x\n", &res,
153 		 lpcctl);
154 
155 	return 0;
156 
157  out_cleanup_nand:
158 	nand_cleanup(chip);
159  out_lpc:
160 	release_region(lpcctl, 4);
161  out_ior:
162 	iounmap(chip->legacy.IO_ADDR_R);
163  out_mtd:
164 	kfree(chip);
165  out:
166 	return err;
167 }
168 
169 static int pasemi_nand_remove(struct platform_device *ofdev)
170 {
171 	struct nand_chip *chip;
172 	int ret;
173 
174 	if (!pasemi_nand_mtd)
175 		return 0;
176 
177 	chip = mtd_to_nand(pasemi_nand_mtd);
178 
179 	/* Release resources, unregister device */
180 	ret = mtd_device_unregister(pasemi_nand_mtd);
181 	WARN_ON(ret);
182 	nand_cleanup(chip);
183 
184 	release_region(lpcctl, 4);
185 
186 	iounmap(chip->legacy.IO_ADDR_R);
187 
188 	/* Free the MTD device structure */
189 	kfree(chip);
190 
191 	pasemi_nand_mtd = NULL;
192 
193 	return 0;
194 }
195 
196 static const struct of_device_id pasemi_nand_match[] =
197 {
198 	{
199 		.compatible   = "pasemi,localbus-nand",
200 	},
201 	{},
202 };
203 
204 MODULE_DEVICE_TABLE(of, pasemi_nand_match);
205 
206 static struct platform_driver pasemi_nand_driver =
207 {
208 	.driver = {
209 		.name = driver_name,
210 		.of_match_table = pasemi_nand_match,
211 	},
212 	.probe		= pasemi_nand_probe,
213 	.remove		= pasemi_nand_remove,
214 };
215 
216 module_platform_driver(pasemi_nand_driver);
217 
218 MODULE_LICENSE("GPL");
219 MODULE_AUTHOR("Egor Martovetsky <egor@pasemi.com>");
220 MODULE_DESCRIPTION("NAND flash interface driver for PA Semi PWRficient");
221