1c942fddfSThomas Gleixner // SPDX-License-Identifier: GPL-2.0-or-later 293db446aSBoris Brezillon /* 393db446aSBoris Brezillon * Error Location Module 493db446aSBoris Brezillon * 53d19792aSAlexander A. Klimov * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 693db446aSBoris Brezillon */ 793db446aSBoris Brezillon 893db446aSBoris Brezillon #define DRIVER_NAME "omap-elm" 993db446aSBoris Brezillon 1093db446aSBoris Brezillon #include <linux/platform_device.h> 1193db446aSBoris Brezillon #include <linux/module.h> 1293db446aSBoris Brezillon #include <linux/interrupt.h> 1393db446aSBoris Brezillon #include <linux/io.h> 1493db446aSBoris Brezillon #include <linux/of.h> 1593db446aSBoris Brezillon #include <linux/sched.h> 1693db446aSBoris Brezillon #include <linux/pm_runtime.h> 1793db446aSBoris Brezillon #include <linux/platform_data/elm.h> 1893db446aSBoris Brezillon 1993db446aSBoris Brezillon #define ELM_SYSCONFIG 0x010 2093db446aSBoris Brezillon #define ELM_IRQSTATUS 0x018 2193db446aSBoris Brezillon #define ELM_IRQENABLE 0x01c 2293db446aSBoris Brezillon #define ELM_LOCATION_CONFIG 0x020 2393db446aSBoris Brezillon #define ELM_PAGE_CTRL 0x080 2493db446aSBoris Brezillon #define ELM_SYNDROME_FRAGMENT_0 0x400 2593db446aSBoris Brezillon #define ELM_SYNDROME_FRAGMENT_1 0x404 2693db446aSBoris Brezillon #define ELM_SYNDROME_FRAGMENT_2 0x408 2793db446aSBoris Brezillon #define ELM_SYNDROME_FRAGMENT_3 0x40c 2893db446aSBoris Brezillon #define ELM_SYNDROME_FRAGMENT_4 0x410 2993db446aSBoris Brezillon #define ELM_SYNDROME_FRAGMENT_5 0x414 3093db446aSBoris Brezillon #define ELM_SYNDROME_FRAGMENT_6 0x418 3193db446aSBoris Brezillon #define ELM_LOCATION_STATUS 0x800 3293db446aSBoris Brezillon #define ELM_ERROR_LOCATION_0 0x880 3393db446aSBoris Brezillon 3493db446aSBoris Brezillon /* ELM Interrupt Status Register */ 3593db446aSBoris Brezillon #define INTR_STATUS_PAGE_VALID BIT(8) 3693db446aSBoris Brezillon 3793db446aSBoris Brezillon /* ELM Interrupt Enable Register */ 3893db446aSBoris Brezillon #define INTR_EN_PAGE_MASK BIT(8) 3993db446aSBoris Brezillon 4093db446aSBoris Brezillon /* ELM Location Configuration Register */ 4193db446aSBoris Brezillon #define ECC_BCH_LEVEL_MASK 0x3 4293db446aSBoris Brezillon 4393db446aSBoris Brezillon /* ELM syndrome */ 4493db446aSBoris Brezillon #define ELM_SYNDROME_VALID BIT(16) 4593db446aSBoris Brezillon 4693db446aSBoris Brezillon /* ELM_LOCATION_STATUS Register */ 4793db446aSBoris Brezillon #define ECC_CORRECTABLE_MASK BIT(8) 4893db446aSBoris Brezillon #define ECC_NB_ERRORS_MASK 0x1f 4993db446aSBoris Brezillon 5093db446aSBoris Brezillon /* ELM_ERROR_LOCATION_0-15 Registers */ 5193db446aSBoris Brezillon #define ECC_ERROR_LOCATION_MASK 0x1fff 5293db446aSBoris Brezillon 5393db446aSBoris Brezillon #define ELM_ECC_SIZE 0x7ff 5493db446aSBoris Brezillon 5593db446aSBoris Brezillon #define SYNDROME_FRAGMENT_REG_SIZE 0x40 5693db446aSBoris Brezillon #define ERROR_LOCATION_SIZE 0x100 5793db446aSBoris Brezillon 5893db446aSBoris Brezillon struct elm_registers { 5993db446aSBoris Brezillon u32 elm_irqenable; 6093db446aSBoris Brezillon u32 elm_sysconfig; 6193db446aSBoris Brezillon u32 elm_location_config; 6293db446aSBoris Brezillon u32 elm_page_ctrl; 6393db446aSBoris Brezillon u32 elm_syndrome_fragment_6[ERROR_VECTOR_MAX]; 6493db446aSBoris Brezillon u32 elm_syndrome_fragment_5[ERROR_VECTOR_MAX]; 6593db446aSBoris Brezillon u32 elm_syndrome_fragment_4[ERROR_VECTOR_MAX]; 6693db446aSBoris Brezillon u32 elm_syndrome_fragment_3[ERROR_VECTOR_MAX]; 6793db446aSBoris Brezillon u32 elm_syndrome_fragment_2[ERROR_VECTOR_MAX]; 6893db446aSBoris Brezillon u32 elm_syndrome_fragment_1[ERROR_VECTOR_MAX]; 6993db446aSBoris Brezillon u32 elm_syndrome_fragment_0[ERROR_VECTOR_MAX]; 7093db446aSBoris Brezillon }; 7193db446aSBoris Brezillon 7293db446aSBoris Brezillon struct elm_info { 7393db446aSBoris Brezillon struct device *dev; 7493db446aSBoris Brezillon void __iomem *elm_base; 7593db446aSBoris Brezillon struct completion elm_completion; 7693db446aSBoris Brezillon struct list_head list; 7793db446aSBoris Brezillon enum bch_ecc bch_type; 7893db446aSBoris Brezillon struct elm_registers elm_regs; 7993db446aSBoris Brezillon int ecc_steps; 8093db446aSBoris Brezillon int ecc_syndrome_size; 8193db446aSBoris Brezillon }; 8293db446aSBoris Brezillon 8393db446aSBoris Brezillon static LIST_HEAD(elm_devices); 8493db446aSBoris Brezillon 8593db446aSBoris Brezillon static void elm_write_reg(struct elm_info *info, int offset, u32 val) 8693db446aSBoris Brezillon { 8793db446aSBoris Brezillon writel(val, info->elm_base + offset); 8893db446aSBoris Brezillon } 8993db446aSBoris Brezillon 9093db446aSBoris Brezillon static u32 elm_read_reg(struct elm_info *info, int offset) 9193db446aSBoris Brezillon { 9293db446aSBoris Brezillon return readl(info->elm_base + offset); 9393db446aSBoris Brezillon } 9493db446aSBoris Brezillon 9593db446aSBoris Brezillon /** 9693db446aSBoris Brezillon * elm_config - Configure ELM module 9793db446aSBoris Brezillon * @dev: ELM device 9893db446aSBoris Brezillon * @bch_type: Type of BCH ecc 99a318b95aSLee Jones * @ecc_steps: ECC steps to assign to config 100a318b95aSLee Jones * @ecc_step_size: ECC step size to assign to config 101a318b95aSLee Jones * @ecc_syndrome_size: ECC syndrome size to assign to config 10293db446aSBoris Brezillon */ 10393db446aSBoris Brezillon int elm_config(struct device *dev, enum bch_ecc bch_type, 10493db446aSBoris Brezillon int ecc_steps, int ecc_step_size, int ecc_syndrome_size) 10593db446aSBoris Brezillon { 10693db446aSBoris Brezillon u32 reg_val; 10793db446aSBoris Brezillon struct elm_info *info = dev_get_drvdata(dev); 10893db446aSBoris Brezillon 10993db446aSBoris Brezillon if (!info) { 11093db446aSBoris Brezillon dev_err(dev, "Unable to configure elm - device not probed?\n"); 11193db446aSBoris Brezillon return -EPROBE_DEFER; 11293db446aSBoris Brezillon } 11393db446aSBoris Brezillon /* ELM cannot detect ECC errors for chunks > 1KB */ 11493db446aSBoris Brezillon if (ecc_step_size > ((ELM_ECC_SIZE + 1) / 2)) { 11593db446aSBoris Brezillon dev_err(dev, "unsupported config ecc-size=%d\n", ecc_step_size); 11693db446aSBoris Brezillon return -EINVAL; 11793db446aSBoris Brezillon } 11893db446aSBoris Brezillon /* ELM support 8 error syndrome process */ 119c06dd49fSMiquel Raynal if (ecc_steps > ERROR_VECTOR_MAX && ecc_steps % ERROR_VECTOR_MAX) { 12093db446aSBoris Brezillon dev_err(dev, "unsupported config ecc-step=%d\n", ecc_steps); 12193db446aSBoris Brezillon return -EINVAL; 12293db446aSBoris Brezillon } 12393db446aSBoris Brezillon 12493db446aSBoris Brezillon reg_val = (bch_type & ECC_BCH_LEVEL_MASK) | (ELM_ECC_SIZE << 16); 12593db446aSBoris Brezillon elm_write_reg(info, ELM_LOCATION_CONFIG, reg_val); 12693db446aSBoris Brezillon info->bch_type = bch_type; 12793db446aSBoris Brezillon info->ecc_steps = ecc_steps; 12893db446aSBoris Brezillon info->ecc_syndrome_size = ecc_syndrome_size; 12993db446aSBoris Brezillon 13093db446aSBoris Brezillon return 0; 13193db446aSBoris Brezillon } 13293db446aSBoris Brezillon EXPORT_SYMBOL(elm_config); 13393db446aSBoris Brezillon 13493db446aSBoris Brezillon /** 13593db446aSBoris Brezillon * elm_configure_page_mode - Enable/Disable page mode 13693db446aSBoris Brezillon * @info: elm info 13793db446aSBoris Brezillon * @index: index number of syndrome fragment vector 13893db446aSBoris Brezillon * @enable: enable/disable flag for page mode 13993db446aSBoris Brezillon * 14093db446aSBoris Brezillon * Enable page mode for syndrome fragment index 14193db446aSBoris Brezillon */ 14293db446aSBoris Brezillon static void elm_configure_page_mode(struct elm_info *info, int index, 14393db446aSBoris Brezillon bool enable) 14493db446aSBoris Brezillon { 14593db446aSBoris Brezillon u32 reg_val; 14693db446aSBoris Brezillon 14793db446aSBoris Brezillon reg_val = elm_read_reg(info, ELM_PAGE_CTRL); 14893db446aSBoris Brezillon if (enable) 14993db446aSBoris Brezillon reg_val |= BIT(index); /* enable page mode */ 15093db446aSBoris Brezillon else 15193db446aSBoris Brezillon reg_val &= ~BIT(index); /* disable page mode */ 15293db446aSBoris Brezillon 15393db446aSBoris Brezillon elm_write_reg(info, ELM_PAGE_CTRL, reg_val); 15493db446aSBoris Brezillon } 15593db446aSBoris Brezillon 15693db446aSBoris Brezillon /** 15793db446aSBoris Brezillon * elm_load_syndrome - Load ELM syndrome reg 15893db446aSBoris Brezillon * @info: elm info 15993db446aSBoris Brezillon * @err_vec: elm error vectors 16093db446aSBoris Brezillon * @ecc: buffer with calculated ecc 16193db446aSBoris Brezillon * 16293db446aSBoris Brezillon * Load syndrome fragment registers with calculated ecc in reverse order. 16393db446aSBoris Brezillon */ 16493db446aSBoris Brezillon static void elm_load_syndrome(struct elm_info *info, 16593db446aSBoris Brezillon struct elm_errorvec *err_vec, u8 *ecc) 16693db446aSBoris Brezillon { 16793db446aSBoris Brezillon int i, offset; 16893db446aSBoris Brezillon u32 val; 16993db446aSBoris Brezillon 17093db446aSBoris Brezillon for (i = 0; i < info->ecc_steps; i++) { 17193db446aSBoris Brezillon 17293db446aSBoris Brezillon /* Check error reported */ 17393db446aSBoris Brezillon if (err_vec[i].error_reported) { 17493db446aSBoris Brezillon elm_configure_page_mode(info, i, true); 17593db446aSBoris Brezillon offset = ELM_SYNDROME_FRAGMENT_0 + 17693db446aSBoris Brezillon SYNDROME_FRAGMENT_REG_SIZE * i; 17793db446aSBoris Brezillon switch (info->bch_type) { 17893db446aSBoris Brezillon case BCH8_ECC: 17993db446aSBoris Brezillon /* syndrome fragment 0 = ecc[9-12B] */ 18093db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[9]); 18193db446aSBoris Brezillon elm_write_reg(info, offset, val); 18293db446aSBoris Brezillon 18393db446aSBoris Brezillon /* syndrome fragment 1 = ecc[5-8B] */ 18493db446aSBoris Brezillon offset += 4; 18593db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[5]); 18693db446aSBoris Brezillon elm_write_reg(info, offset, val); 18793db446aSBoris Brezillon 18893db446aSBoris Brezillon /* syndrome fragment 2 = ecc[1-4B] */ 18993db446aSBoris Brezillon offset += 4; 19093db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[1]); 19193db446aSBoris Brezillon elm_write_reg(info, offset, val); 19293db446aSBoris Brezillon 19393db446aSBoris Brezillon /* syndrome fragment 3 = ecc[0B] */ 19493db446aSBoris Brezillon offset += 4; 19593db446aSBoris Brezillon val = ecc[0]; 19693db446aSBoris Brezillon elm_write_reg(info, offset, val); 19793db446aSBoris Brezillon break; 19893db446aSBoris Brezillon case BCH4_ECC: 19993db446aSBoris Brezillon /* syndrome fragment 0 = ecc[20-52b] bits */ 20093db446aSBoris Brezillon val = (cpu_to_be32(*(u32 *) &ecc[3]) >> 4) | 20193db446aSBoris Brezillon ((ecc[2] & 0xf) << 28); 20293db446aSBoris Brezillon elm_write_reg(info, offset, val); 20393db446aSBoris Brezillon 20493db446aSBoris Brezillon /* syndrome fragment 1 = ecc[0-20b] bits */ 20593db446aSBoris Brezillon offset += 4; 20693db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[0]) >> 12; 20793db446aSBoris Brezillon elm_write_reg(info, offset, val); 20893db446aSBoris Brezillon break; 20993db446aSBoris Brezillon case BCH16_ECC: 21093db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[22]); 21193db446aSBoris Brezillon elm_write_reg(info, offset, val); 21293db446aSBoris Brezillon offset += 4; 21393db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[18]); 21493db446aSBoris Brezillon elm_write_reg(info, offset, val); 21593db446aSBoris Brezillon offset += 4; 21693db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[14]); 21793db446aSBoris Brezillon elm_write_reg(info, offset, val); 21893db446aSBoris Brezillon offset += 4; 21993db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[10]); 22093db446aSBoris Brezillon elm_write_reg(info, offset, val); 22193db446aSBoris Brezillon offset += 4; 22293db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[6]); 22393db446aSBoris Brezillon elm_write_reg(info, offset, val); 22493db446aSBoris Brezillon offset += 4; 22593db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[2]); 22693db446aSBoris Brezillon elm_write_reg(info, offset, val); 22793db446aSBoris Brezillon offset += 4; 22893db446aSBoris Brezillon val = cpu_to_be32(*(u32 *) &ecc[0]) >> 16; 22993db446aSBoris Brezillon elm_write_reg(info, offset, val); 23093db446aSBoris Brezillon break; 23193db446aSBoris Brezillon default: 23293db446aSBoris Brezillon pr_err("invalid config bch_type\n"); 23393db446aSBoris Brezillon } 23493db446aSBoris Brezillon } 23593db446aSBoris Brezillon 23693db446aSBoris Brezillon /* Update ecc pointer with ecc byte size */ 23793db446aSBoris Brezillon ecc += info->ecc_syndrome_size; 23893db446aSBoris Brezillon } 23993db446aSBoris Brezillon } 24093db446aSBoris Brezillon 24193db446aSBoris Brezillon /** 24293db446aSBoris Brezillon * elm_start_processing - start elm syndrome processing 24393db446aSBoris Brezillon * @info: elm info 24493db446aSBoris Brezillon * @err_vec: elm error vectors 24593db446aSBoris Brezillon * 24693db446aSBoris Brezillon * Set syndrome valid bit for syndrome fragment registers for which 24793db446aSBoris Brezillon * elm syndrome fragment registers are loaded. This enables elm module 24893db446aSBoris Brezillon * to start processing syndrome vectors. 24993db446aSBoris Brezillon */ 25093db446aSBoris Brezillon static void elm_start_processing(struct elm_info *info, 25193db446aSBoris Brezillon struct elm_errorvec *err_vec) 25293db446aSBoris Brezillon { 25393db446aSBoris Brezillon int i, offset; 25493db446aSBoris Brezillon u32 reg_val; 25593db446aSBoris Brezillon 25693db446aSBoris Brezillon /* 25793db446aSBoris Brezillon * Set syndrome vector valid, so that ELM module 25893db446aSBoris Brezillon * will process it for vectors error is reported 25993db446aSBoris Brezillon */ 26093db446aSBoris Brezillon for (i = 0; i < info->ecc_steps; i++) { 26193db446aSBoris Brezillon if (err_vec[i].error_reported) { 26293db446aSBoris Brezillon offset = ELM_SYNDROME_FRAGMENT_6 + 26393db446aSBoris Brezillon SYNDROME_FRAGMENT_REG_SIZE * i; 26493db446aSBoris Brezillon reg_val = elm_read_reg(info, offset); 26593db446aSBoris Brezillon reg_val |= ELM_SYNDROME_VALID; 26693db446aSBoris Brezillon elm_write_reg(info, offset, reg_val); 26793db446aSBoris Brezillon } 26893db446aSBoris Brezillon } 26993db446aSBoris Brezillon } 27093db446aSBoris Brezillon 27193db446aSBoris Brezillon /** 27293db446aSBoris Brezillon * elm_error_correction - locate correctable error position 27393db446aSBoris Brezillon * @info: elm info 27493db446aSBoris Brezillon * @err_vec: elm error vectors 27593db446aSBoris Brezillon * 27693db446aSBoris Brezillon * On completion of processing by elm module, error location status 27793db446aSBoris Brezillon * register updated with correctable/uncorrectable error information. 27893db446aSBoris Brezillon * In case of correctable errors, number of errors located from 27993db446aSBoris Brezillon * elm location status register & read the positions from 28093db446aSBoris Brezillon * elm error location register. 28193db446aSBoris Brezillon */ 28293db446aSBoris Brezillon static void elm_error_correction(struct elm_info *info, 28393db446aSBoris Brezillon struct elm_errorvec *err_vec) 28493db446aSBoris Brezillon { 285*2212c19eSColin Ian King int i, j; 28693db446aSBoris Brezillon int offset; 28793db446aSBoris Brezillon u32 reg_val; 28893db446aSBoris Brezillon 28993db446aSBoris Brezillon for (i = 0; i < info->ecc_steps; i++) { 29093db446aSBoris Brezillon 29193db446aSBoris Brezillon /* Check error reported */ 29293db446aSBoris Brezillon if (err_vec[i].error_reported) { 29393db446aSBoris Brezillon offset = ELM_LOCATION_STATUS + ERROR_LOCATION_SIZE * i; 29493db446aSBoris Brezillon reg_val = elm_read_reg(info, offset); 29593db446aSBoris Brezillon 29693db446aSBoris Brezillon /* Check correctable error or not */ 29793db446aSBoris Brezillon if (reg_val & ECC_CORRECTABLE_MASK) { 29893db446aSBoris Brezillon offset = ELM_ERROR_LOCATION_0 + 29993db446aSBoris Brezillon ERROR_LOCATION_SIZE * i; 30093db446aSBoris Brezillon 30193db446aSBoris Brezillon /* Read count of correctable errors */ 30293db446aSBoris Brezillon err_vec[i].error_count = reg_val & 30393db446aSBoris Brezillon ECC_NB_ERRORS_MASK; 30493db446aSBoris Brezillon 30593db446aSBoris Brezillon /* Update the error locations in error vector */ 30693db446aSBoris Brezillon for (j = 0; j < err_vec[i].error_count; j++) { 30793db446aSBoris Brezillon 30893db446aSBoris Brezillon reg_val = elm_read_reg(info, offset); 30993db446aSBoris Brezillon err_vec[i].error_loc[j] = reg_val & 31093db446aSBoris Brezillon ECC_ERROR_LOCATION_MASK; 31193db446aSBoris Brezillon 31293db446aSBoris Brezillon /* Update error location register */ 31393db446aSBoris Brezillon offset += 4; 31493db446aSBoris Brezillon } 31593db446aSBoris Brezillon } else { 31693db446aSBoris Brezillon err_vec[i].error_uncorrectable = true; 31793db446aSBoris Brezillon } 31893db446aSBoris Brezillon 31993db446aSBoris Brezillon /* Clearing interrupts for processed error vectors */ 32093db446aSBoris Brezillon elm_write_reg(info, ELM_IRQSTATUS, BIT(i)); 32193db446aSBoris Brezillon 32293db446aSBoris Brezillon /* Disable page mode */ 32393db446aSBoris Brezillon elm_configure_page_mode(info, i, false); 32493db446aSBoris Brezillon } 32593db446aSBoris Brezillon } 32693db446aSBoris Brezillon } 32793db446aSBoris Brezillon 32893db446aSBoris Brezillon /** 32993db446aSBoris Brezillon * elm_decode_bch_error_page - Locate error position 33093db446aSBoris Brezillon * @dev: device pointer 33193db446aSBoris Brezillon * @ecc_calc: calculated ECC bytes from GPMC 33293db446aSBoris Brezillon * @err_vec: elm error vectors 33393db446aSBoris Brezillon * 33493db446aSBoris Brezillon * Called with one or more error reported vectors & vectors with 33593db446aSBoris Brezillon * error reported is updated in err_vec[].error_reported 33693db446aSBoris Brezillon */ 33793db446aSBoris Brezillon void elm_decode_bch_error_page(struct device *dev, u8 *ecc_calc, 33893db446aSBoris Brezillon struct elm_errorvec *err_vec) 33993db446aSBoris Brezillon { 34093db446aSBoris Brezillon struct elm_info *info = dev_get_drvdata(dev); 34193db446aSBoris Brezillon u32 reg_val; 34293db446aSBoris Brezillon 34393db446aSBoris Brezillon /* Enable page mode interrupt */ 34493db446aSBoris Brezillon reg_val = elm_read_reg(info, ELM_IRQSTATUS); 34593db446aSBoris Brezillon elm_write_reg(info, ELM_IRQSTATUS, reg_val & INTR_STATUS_PAGE_VALID); 34693db446aSBoris Brezillon elm_write_reg(info, ELM_IRQENABLE, INTR_EN_PAGE_MASK); 34793db446aSBoris Brezillon 34893db446aSBoris Brezillon /* Load valid ecc byte to syndrome fragment register */ 34993db446aSBoris Brezillon elm_load_syndrome(info, err_vec, ecc_calc); 35093db446aSBoris Brezillon 35193db446aSBoris Brezillon /* Enable syndrome processing for which syndrome fragment is updated */ 35293db446aSBoris Brezillon elm_start_processing(info, err_vec); 35393db446aSBoris Brezillon 35493db446aSBoris Brezillon /* Wait for ELM module to finish locating error correction */ 35593db446aSBoris Brezillon wait_for_completion(&info->elm_completion); 35693db446aSBoris Brezillon 35793db446aSBoris Brezillon /* Disable page mode interrupt */ 35893db446aSBoris Brezillon reg_val = elm_read_reg(info, ELM_IRQENABLE); 35993db446aSBoris Brezillon elm_write_reg(info, ELM_IRQENABLE, reg_val & ~INTR_EN_PAGE_MASK); 36093db446aSBoris Brezillon elm_error_correction(info, err_vec); 36193db446aSBoris Brezillon } 36293db446aSBoris Brezillon EXPORT_SYMBOL(elm_decode_bch_error_page); 36393db446aSBoris Brezillon 36493db446aSBoris Brezillon static irqreturn_t elm_isr(int this_irq, void *dev_id) 36593db446aSBoris Brezillon { 36693db446aSBoris Brezillon u32 reg_val; 36793db446aSBoris Brezillon struct elm_info *info = dev_id; 36893db446aSBoris Brezillon 36993db446aSBoris Brezillon reg_val = elm_read_reg(info, ELM_IRQSTATUS); 37093db446aSBoris Brezillon 37193db446aSBoris Brezillon /* All error vectors processed */ 37293db446aSBoris Brezillon if (reg_val & INTR_STATUS_PAGE_VALID) { 37393db446aSBoris Brezillon elm_write_reg(info, ELM_IRQSTATUS, 37493db446aSBoris Brezillon reg_val & INTR_STATUS_PAGE_VALID); 37593db446aSBoris Brezillon complete(&info->elm_completion); 37693db446aSBoris Brezillon return IRQ_HANDLED; 37793db446aSBoris Brezillon } 37893db446aSBoris Brezillon 37993db446aSBoris Brezillon return IRQ_NONE; 38093db446aSBoris Brezillon } 38193db446aSBoris Brezillon 38293db446aSBoris Brezillon static int elm_probe(struct platform_device *pdev) 38393db446aSBoris Brezillon { 38493db446aSBoris Brezillon int ret = 0; 38593db446aSBoris Brezillon struct elm_info *info; 3863b2af5c6SLad Prabhakar int irq; 38793db446aSBoris Brezillon 38893db446aSBoris Brezillon info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL); 38993db446aSBoris Brezillon if (!info) 39093db446aSBoris Brezillon return -ENOMEM; 39193db446aSBoris Brezillon 39293db446aSBoris Brezillon info->dev = &pdev->dev; 39393db446aSBoris Brezillon 3943b2af5c6SLad Prabhakar irq = platform_get_irq(pdev, 0); 3953b2af5c6SLad Prabhakar if (irq < 0) 3963b2af5c6SLad Prabhakar return irq; 39793db446aSBoris Brezillon 3987b7be218SCai Huoqing info->elm_base = devm_platform_ioremap_resource(pdev, 0); 39993db446aSBoris Brezillon if (IS_ERR(info->elm_base)) 40093db446aSBoris Brezillon return PTR_ERR(info->elm_base); 40193db446aSBoris Brezillon 4023b2af5c6SLad Prabhakar ret = devm_request_irq(&pdev->dev, irq, elm_isr, 0, 40393db446aSBoris Brezillon pdev->name, info); 40493db446aSBoris Brezillon if (ret) { 4053b2af5c6SLad Prabhakar dev_err(&pdev->dev, "failure requesting %d\n", irq); 40693db446aSBoris Brezillon return ret; 40793db446aSBoris Brezillon } 40893db446aSBoris Brezillon 40993db446aSBoris Brezillon pm_runtime_enable(&pdev->dev); 41093db446aSBoris Brezillon if (pm_runtime_get_sync(&pdev->dev) < 0) { 41193db446aSBoris Brezillon ret = -EINVAL; 41237f72121SDinghao Liu pm_runtime_put_sync(&pdev->dev); 41393db446aSBoris Brezillon pm_runtime_disable(&pdev->dev); 41493db446aSBoris Brezillon dev_err(&pdev->dev, "can't enable clock\n"); 41593db446aSBoris Brezillon return ret; 41693db446aSBoris Brezillon } 41793db446aSBoris Brezillon 41893db446aSBoris Brezillon init_completion(&info->elm_completion); 41993db446aSBoris Brezillon INIT_LIST_HEAD(&info->list); 42093db446aSBoris Brezillon list_add(&info->list, &elm_devices); 42193db446aSBoris Brezillon platform_set_drvdata(pdev, info); 42293db446aSBoris Brezillon return ret; 42393db446aSBoris Brezillon } 42493db446aSBoris Brezillon 42593db446aSBoris Brezillon static int elm_remove(struct platform_device *pdev) 42693db446aSBoris Brezillon { 42793db446aSBoris Brezillon pm_runtime_put_sync(&pdev->dev); 42893db446aSBoris Brezillon pm_runtime_disable(&pdev->dev); 42993db446aSBoris Brezillon return 0; 43093db446aSBoris Brezillon } 43193db446aSBoris Brezillon 43293db446aSBoris Brezillon #ifdef CONFIG_PM_SLEEP 433a318b95aSLee Jones /* 43493db446aSBoris Brezillon * elm_context_save 43593db446aSBoris Brezillon * saves ELM configurations to preserve them across Hardware powered-down 43693db446aSBoris Brezillon */ 43793db446aSBoris Brezillon static int elm_context_save(struct elm_info *info) 43893db446aSBoris Brezillon { 43993db446aSBoris Brezillon struct elm_registers *regs = &info->elm_regs; 44093db446aSBoris Brezillon enum bch_ecc bch_type = info->bch_type; 44193db446aSBoris Brezillon u32 offset = 0, i; 44293db446aSBoris Brezillon 44393db446aSBoris Brezillon regs->elm_irqenable = elm_read_reg(info, ELM_IRQENABLE); 44493db446aSBoris Brezillon regs->elm_sysconfig = elm_read_reg(info, ELM_SYSCONFIG); 44593db446aSBoris Brezillon regs->elm_location_config = elm_read_reg(info, ELM_LOCATION_CONFIG); 44693db446aSBoris Brezillon regs->elm_page_ctrl = elm_read_reg(info, ELM_PAGE_CTRL); 44793db446aSBoris Brezillon for (i = 0; i < ERROR_VECTOR_MAX; i++) { 44893db446aSBoris Brezillon offset = i * SYNDROME_FRAGMENT_REG_SIZE; 44993db446aSBoris Brezillon switch (bch_type) { 45093db446aSBoris Brezillon case BCH16_ECC: 45193db446aSBoris Brezillon regs->elm_syndrome_fragment_6[i] = elm_read_reg(info, 45293db446aSBoris Brezillon ELM_SYNDROME_FRAGMENT_6 + offset); 45393db446aSBoris Brezillon regs->elm_syndrome_fragment_5[i] = elm_read_reg(info, 45493db446aSBoris Brezillon ELM_SYNDROME_FRAGMENT_5 + offset); 45593db446aSBoris Brezillon regs->elm_syndrome_fragment_4[i] = elm_read_reg(info, 45693db446aSBoris Brezillon ELM_SYNDROME_FRAGMENT_4 + offset); 457025a06c1SMiquel Raynal fallthrough; 45893db446aSBoris Brezillon case BCH8_ECC: 45993db446aSBoris Brezillon regs->elm_syndrome_fragment_3[i] = elm_read_reg(info, 46093db446aSBoris Brezillon ELM_SYNDROME_FRAGMENT_3 + offset); 46193db446aSBoris Brezillon regs->elm_syndrome_fragment_2[i] = elm_read_reg(info, 46293db446aSBoris Brezillon ELM_SYNDROME_FRAGMENT_2 + offset); 463025a06c1SMiquel Raynal fallthrough; 46493db446aSBoris Brezillon case BCH4_ECC: 46593db446aSBoris Brezillon regs->elm_syndrome_fragment_1[i] = elm_read_reg(info, 46693db446aSBoris Brezillon ELM_SYNDROME_FRAGMENT_1 + offset); 46793db446aSBoris Brezillon regs->elm_syndrome_fragment_0[i] = elm_read_reg(info, 46893db446aSBoris Brezillon ELM_SYNDROME_FRAGMENT_0 + offset); 46993db446aSBoris Brezillon break; 47093db446aSBoris Brezillon default: 47193db446aSBoris Brezillon return -EINVAL; 47293db446aSBoris Brezillon } 47393db446aSBoris Brezillon /* ELM SYNDROME_VALID bit in SYNDROME_FRAGMENT_6[] needs 47493db446aSBoris Brezillon * to be saved for all BCH schemes*/ 47593db446aSBoris Brezillon regs->elm_syndrome_fragment_6[i] = elm_read_reg(info, 47693db446aSBoris Brezillon ELM_SYNDROME_FRAGMENT_6 + offset); 47793db446aSBoris Brezillon } 47893db446aSBoris Brezillon return 0; 47993db446aSBoris Brezillon } 48093db446aSBoris Brezillon 481a318b95aSLee Jones /* 48293db446aSBoris Brezillon * elm_context_restore 48393db446aSBoris Brezillon * writes configurations saved duing power-down back into ELM registers 48493db446aSBoris Brezillon */ 48593db446aSBoris Brezillon static int elm_context_restore(struct elm_info *info) 48693db446aSBoris Brezillon { 48793db446aSBoris Brezillon struct elm_registers *regs = &info->elm_regs; 48893db446aSBoris Brezillon enum bch_ecc bch_type = info->bch_type; 48993db446aSBoris Brezillon u32 offset = 0, i; 49093db446aSBoris Brezillon 49193db446aSBoris Brezillon elm_write_reg(info, ELM_IRQENABLE, regs->elm_irqenable); 49293db446aSBoris Brezillon elm_write_reg(info, ELM_SYSCONFIG, regs->elm_sysconfig); 49393db446aSBoris Brezillon elm_write_reg(info, ELM_LOCATION_CONFIG, regs->elm_location_config); 49493db446aSBoris Brezillon elm_write_reg(info, ELM_PAGE_CTRL, regs->elm_page_ctrl); 49593db446aSBoris Brezillon for (i = 0; i < ERROR_VECTOR_MAX; i++) { 49693db446aSBoris Brezillon offset = i * SYNDROME_FRAGMENT_REG_SIZE; 49793db446aSBoris Brezillon switch (bch_type) { 49893db446aSBoris Brezillon case BCH16_ECC: 49993db446aSBoris Brezillon elm_write_reg(info, ELM_SYNDROME_FRAGMENT_6 + offset, 50093db446aSBoris Brezillon regs->elm_syndrome_fragment_6[i]); 50193db446aSBoris Brezillon elm_write_reg(info, ELM_SYNDROME_FRAGMENT_5 + offset, 50293db446aSBoris Brezillon regs->elm_syndrome_fragment_5[i]); 50393db446aSBoris Brezillon elm_write_reg(info, ELM_SYNDROME_FRAGMENT_4 + offset, 50493db446aSBoris Brezillon regs->elm_syndrome_fragment_4[i]); 505025a06c1SMiquel Raynal fallthrough; 50693db446aSBoris Brezillon case BCH8_ECC: 50793db446aSBoris Brezillon elm_write_reg(info, ELM_SYNDROME_FRAGMENT_3 + offset, 50893db446aSBoris Brezillon regs->elm_syndrome_fragment_3[i]); 50993db446aSBoris Brezillon elm_write_reg(info, ELM_SYNDROME_FRAGMENT_2 + offset, 51093db446aSBoris Brezillon regs->elm_syndrome_fragment_2[i]); 511025a06c1SMiquel Raynal fallthrough; 51293db446aSBoris Brezillon case BCH4_ECC: 51393db446aSBoris Brezillon elm_write_reg(info, ELM_SYNDROME_FRAGMENT_1 + offset, 51493db446aSBoris Brezillon regs->elm_syndrome_fragment_1[i]); 51593db446aSBoris Brezillon elm_write_reg(info, ELM_SYNDROME_FRAGMENT_0 + offset, 51693db446aSBoris Brezillon regs->elm_syndrome_fragment_0[i]); 51793db446aSBoris Brezillon break; 51893db446aSBoris Brezillon default: 51993db446aSBoris Brezillon return -EINVAL; 52093db446aSBoris Brezillon } 52193db446aSBoris Brezillon /* ELM_SYNDROME_VALID bit to be set in last to trigger FSM */ 52293db446aSBoris Brezillon elm_write_reg(info, ELM_SYNDROME_FRAGMENT_6 + offset, 52393db446aSBoris Brezillon regs->elm_syndrome_fragment_6[i] & 52493db446aSBoris Brezillon ELM_SYNDROME_VALID); 52593db446aSBoris Brezillon } 52693db446aSBoris Brezillon return 0; 52793db446aSBoris Brezillon } 52893db446aSBoris Brezillon 52993db446aSBoris Brezillon static int elm_suspend(struct device *dev) 53093db446aSBoris Brezillon { 53193db446aSBoris Brezillon struct elm_info *info = dev_get_drvdata(dev); 53293db446aSBoris Brezillon elm_context_save(info); 53393db446aSBoris Brezillon pm_runtime_put_sync(dev); 53493db446aSBoris Brezillon return 0; 53593db446aSBoris Brezillon } 53693db446aSBoris Brezillon 53793db446aSBoris Brezillon static int elm_resume(struct device *dev) 53893db446aSBoris Brezillon { 53993db446aSBoris Brezillon struct elm_info *info = dev_get_drvdata(dev); 54093db446aSBoris Brezillon pm_runtime_get_sync(dev); 54193db446aSBoris Brezillon elm_context_restore(info); 54293db446aSBoris Brezillon return 0; 54393db446aSBoris Brezillon } 54493db446aSBoris Brezillon #endif 54593db446aSBoris Brezillon 54693db446aSBoris Brezillon static SIMPLE_DEV_PM_OPS(elm_pm_ops, elm_suspend, elm_resume); 54793db446aSBoris Brezillon 54893db446aSBoris Brezillon #ifdef CONFIG_OF 54993db446aSBoris Brezillon static const struct of_device_id elm_of_match[] = { 55093db446aSBoris Brezillon { .compatible = "ti,am3352-elm" }, 55193db446aSBoris Brezillon {}, 55293db446aSBoris Brezillon }; 55393db446aSBoris Brezillon MODULE_DEVICE_TABLE(of, elm_of_match); 55493db446aSBoris Brezillon #endif 55593db446aSBoris Brezillon 55693db446aSBoris Brezillon static struct platform_driver elm_driver = { 55793db446aSBoris Brezillon .driver = { 55893db446aSBoris Brezillon .name = DRIVER_NAME, 55993db446aSBoris Brezillon .of_match_table = of_match_ptr(elm_of_match), 56093db446aSBoris Brezillon .pm = &elm_pm_ops, 56193db446aSBoris Brezillon }, 56293db446aSBoris Brezillon .probe = elm_probe, 56393db446aSBoris Brezillon .remove = elm_remove, 56493db446aSBoris Brezillon }; 56593db446aSBoris Brezillon 56693db446aSBoris Brezillon module_platform_driver(elm_driver); 56793db446aSBoris Brezillon 56893db446aSBoris Brezillon MODULE_DESCRIPTION("ELM driver for BCH error correction"); 56993db446aSBoris Brezillon MODULE_AUTHOR("Texas Instruments"); 57093db446aSBoris Brezillon MODULE_ALIAS("platform:" DRIVER_NAME); 57193db446aSBoris Brezillon MODULE_LICENSE("GPL v2"); 572