xref: /linux/drivers/mtd/nand/raw/gpmi-nand/gpmi-nand.h (revision bfd5bb6f90af092aa345b15cd78143956a13c2a8)
1 /*
2  * Freescale GPMI NAND Flash Driver
3  *
4  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
5  * Copyright (C) 2008 Embedded Alley Solutions, Inc.
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  *
12  * This program is distributed in the hope that it will be useful,
13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
15  * GNU General Public License for more details.
16  */
17 #ifndef __DRIVERS_MTD_NAND_GPMI_NAND_H
18 #define __DRIVERS_MTD_NAND_GPMI_NAND_H
19 
20 #include <linux/mtd/rawnand.h>
21 #include <linux/platform_device.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/dmaengine.h>
24 
25 #define GPMI_CLK_MAX 5 /* MX6Q needs five clocks */
26 struct resources {
27 	void __iomem  *gpmi_regs;
28 	void __iomem  *bch_regs;
29 	unsigned int  dma_low_channel;
30 	unsigned int  dma_high_channel;
31 	struct clk    *clock[GPMI_CLK_MAX];
32 };
33 
34 /**
35  * struct bch_geometry - BCH geometry description.
36  * @gf_len:                   The length of Galois Field. (e.g., 13 or 14)
37  * @ecc_strength:             A number that describes the strength of the ECC
38  *                            algorithm.
39  * @page_size:                The size, in bytes, of a physical page, including
40  *                            both data and OOB.
41  * @metadata_size:            The size, in bytes, of the metadata.
42  * @ecc_chunk_size:           The size, in bytes, of a single ECC chunk. Note
43  *                            the first chunk in the page includes both data and
44  *                            metadata, so it's a bit larger than this value.
45  * @ecc_chunk_count:          The number of ECC chunks in the page,
46  * @payload_size:             The size, in bytes, of the payload buffer.
47  * @auxiliary_size:           The size, in bytes, of the auxiliary buffer.
48  * @auxiliary_status_offset:  The offset into the auxiliary buffer at which
49  *                            the ECC status appears.
50  * @block_mark_byte_offset:   The byte offset in the ECC-based page view at
51  *                            which the underlying physical block mark appears.
52  * @block_mark_bit_offset:    The bit offset into the ECC-based page view at
53  *                            which the underlying physical block mark appears.
54  */
55 struct bch_geometry {
56 	unsigned int  gf_len;
57 	unsigned int  ecc_strength;
58 	unsigned int  page_size;
59 	unsigned int  metadata_size;
60 	unsigned int  ecc_chunk_size;
61 	unsigned int  ecc_chunk_count;
62 	unsigned int  payload_size;
63 	unsigned int  auxiliary_size;
64 	unsigned int  auxiliary_status_offset;
65 	unsigned int  block_mark_byte_offset;
66 	unsigned int  block_mark_bit_offset;
67 };
68 
69 /**
70  * struct boot_rom_geometry - Boot ROM geometry description.
71  * @stride_size_in_pages:        The size of a boot block stride, in pages.
72  * @search_area_stride_exponent: The logarithm to base 2 of the size of a
73  *                               search area in boot block strides.
74  */
75 struct boot_rom_geometry {
76 	unsigned int  stride_size_in_pages;
77 	unsigned int  search_area_stride_exponent;
78 };
79 
80 enum gpmi_type {
81 	IS_MX23,
82 	IS_MX28,
83 	IS_MX6Q,
84 	IS_MX6SX,
85 	IS_MX7D,
86 };
87 
88 struct gpmi_devdata {
89 	enum gpmi_type type;
90 	int bch_max_ecc_strength;
91 	int max_chain_delay; /* See the async EDO mode */
92 	const char * const *clks;
93 	const int clks_count;
94 };
95 
96 /**
97  * struct gpmi_nfc_hardware_timing - GPMI hardware timing parameters.
98  * @must_apply_timings:        Whether controller timings have already been
99  *                             applied or not (useful only while there is
100  *                             support for only one chip select)
101  * @clk_rate:                  The clock rate that must be used to derive the
102  *                             following parameters
103  * @timing0:                   HW_GPMI_TIMING0 register
104  * @timing1:                   HW_GPMI_TIMING1 register
105  * @ctrl1n:                    HW_GPMI_CTRL1n register
106  */
107 struct gpmi_nfc_hardware_timing {
108 	bool must_apply_timings;
109 	unsigned long int clk_rate;
110 	u32 timing0;
111 	u32 timing1;
112 	u32 ctrl1n;
113 };
114 
115 struct gpmi_nand_data {
116 	/* Devdata */
117 	const struct gpmi_devdata *devdata;
118 
119 	/* System Interface */
120 	struct device		*dev;
121 	struct platform_device	*pdev;
122 
123 	/* Resources */
124 	struct resources	resources;
125 
126 	/* Flash Hardware */
127 	struct gpmi_nfc_hardware_timing hw;
128 
129 	/* BCH */
130 	struct bch_geometry	bch_geometry;
131 	struct completion	bch_done;
132 
133 	/* NAND Boot issue */
134 	bool			swap_block_mark;
135 	struct boot_rom_geometry rom_geometry;
136 
137 	/* MTD / NAND */
138 	struct nand_chip	nand;
139 
140 	/* General-use Variables */
141 	int			current_chip;
142 	unsigned int		command_length;
143 
144 	struct scatterlist	cmd_sgl;
145 	char			*cmd_buffer;
146 
147 	struct scatterlist	data_sgl;
148 	char			*data_buffer_dma;
149 
150 	void			*page_buffer_virt;
151 	dma_addr_t		page_buffer_phys;
152 	unsigned int		page_buffer_size;
153 
154 	void			*payload_virt;
155 	dma_addr_t		payload_phys;
156 
157 	void			*auxiliary_virt;
158 	dma_addr_t		auxiliary_phys;
159 
160 	void			*raw_buffer;
161 
162 	/* DMA channels */
163 #define DMA_CHANS		8
164 	struct dma_chan		*dma_chans[DMA_CHANS];
165 	struct completion	dma_done;
166 
167 	/* private */
168 	void			*private;
169 };
170 
171 /* Common Services */
172 int common_nfc_set_geometry(struct gpmi_nand_data *);
173 struct dma_chan *get_dma_chan(struct gpmi_nand_data *);
174 bool prepare_data_dma(struct gpmi_nand_data *, const void *buf, int len,
175 		      enum dma_data_direction dr);
176 int start_dma_without_bch_irq(struct gpmi_nand_data *,
177 			      struct dma_async_tx_descriptor *);
178 int start_dma_with_bch_irq(struct gpmi_nand_data *,
179 			   struct dma_async_tx_descriptor *);
180 
181 /* GPMI-NAND helper function library */
182 int gpmi_init(struct gpmi_nand_data *);
183 void gpmi_clear_bch(struct gpmi_nand_data *);
184 void gpmi_dump_info(struct gpmi_nand_data *);
185 int bch_set_geometry(struct gpmi_nand_data *);
186 int gpmi_is_ready(struct gpmi_nand_data *, unsigned chip);
187 int gpmi_send_command(struct gpmi_nand_data *);
188 int gpmi_enable_clk(struct gpmi_nand_data *this);
189 int gpmi_disable_clk(struct gpmi_nand_data *this);
190 int gpmi_setup_data_interface(struct mtd_info *mtd, int chipnr,
191 			      const struct nand_data_interface *conf);
192 void gpmi_nfc_apply_timings(struct gpmi_nand_data *this);
193 int gpmi_read_data(struct gpmi_nand_data *, void *buf, int len);
194 int gpmi_send_data(struct gpmi_nand_data *, const void *buf, int len);
195 
196 int gpmi_send_page(struct gpmi_nand_data *,
197 		   dma_addr_t payload, dma_addr_t auxiliary);
198 int gpmi_read_page(struct gpmi_nand_data *,
199 		   dma_addr_t payload, dma_addr_t auxiliary);
200 
201 void gpmi_copy_bits(u8 *dst, size_t dst_bit_off,
202 		    const u8 *src, size_t src_bit_off,
203 		    size_t nbits);
204 
205 /* BCH : Status Block Completion Codes */
206 #define STATUS_GOOD		0x00
207 #define STATUS_ERASED		0xff
208 #define STATUS_UNCORRECTABLE	0xfe
209 
210 /* Use the devdata to distinguish different Archs. */
211 #define GPMI_IS_MX23(x)		((x)->devdata->type == IS_MX23)
212 #define GPMI_IS_MX28(x)		((x)->devdata->type == IS_MX28)
213 #define GPMI_IS_MX6Q(x)		((x)->devdata->type == IS_MX6Q)
214 #define GPMI_IS_MX6SX(x)	((x)->devdata->type == IS_MX6SX)
215 #define GPMI_IS_MX7D(x)		((x)->devdata->type == IS_MX7D)
216 
217 #define GPMI_IS_MX6(x)		(GPMI_IS_MX6Q(x) || GPMI_IS_MX6SX(x) || \
218 				 GPMI_IS_MX7D(x))
219 #endif
220