1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * Freescale GPMI NAND Flash Driver 4 * 5 * Copyright (C) 2010-2015 Freescale Semiconductor, Inc. 6 * Copyright (C) 2008 Embedded Alley Solutions, Inc. 7 */ 8 #include <linux/clk.h> 9 #include <linux/slab.h> 10 #include <linux/sched/task_stack.h> 11 #include <linux/interrupt.h> 12 #include <linux/module.h> 13 #include <linux/mtd/partitions.h> 14 #include <linux/of.h> 15 #include <linux/of_device.h> 16 #include "gpmi-nand.h" 17 #include "bch-regs.h" 18 19 /* Resource names for the GPMI NAND driver. */ 20 #define GPMI_NAND_GPMI_REGS_ADDR_RES_NAME "gpmi-nand" 21 #define GPMI_NAND_BCH_REGS_ADDR_RES_NAME "bch" 22 #define GPMI_NAND_BCH_INTERRUPT_RES_NAME "bch" 23 24 /* add our owner bbt descriptor */ 25 static uint8_t scan_ff_pattern[] = { 0xff }; 26 static struct nand_bbt_descr gpmi_bbt_descr = { 27 .options = 0, 28 .offs = 0, 29 .len = 1, 30 .pattern = scan_ff_pattern 31 }; 32 33 /* 34 * We may change the layout if we can get the ECC info from the datasheet, 35 * else we will use all the (page + OOB). 36 */ 37 static int gpmi_ooblayout_ecc(struct mtd_info *mtd, int section, 38 struct mtd_oob_region *oobregion) 39 { 40 struct nand_chip *chip = mtd_to_nand(mtd); 41 struct gpmi_nand_data *this = nand_get_controller_data(chip); 42 struct bch_geometry *geo = &this->bch_geometry; 43 44 if (section) 45 return -ERANGE; 46 47 oobregion->offset = 0; 48 oobregion->length = geo->page_size - mtd->writesize; 49 50 return 0; 51 } 52 53 static int gpmi_ooblayout_free(struct mtd_info *mtd, int section, 54 struct mtd_oob_region *oobregion) 55 { 56 struct nand_chip *chip = mtd_to_nand(mtd); 57 struct gpmi_nand_data *this = nand_get_controller_data(chip); 58 struct bch_geometry *geo = &this->bch_geometry; 59 60 if (section) 61 return -ERANGE; 62 63 /* The available oob size we have. */ 64 if (geo->page_size < mtd->writesize + mtd->oobsize) { 65 oobregion->offset = geo->page_size - mtd->writesize; 66 oobregion->length = mtd->oobsize - oobregion->offset; 67 } 68 69 return 0; 70 } 71 72 static const char * const gpmi_clks_for_mx2x[] = { 73 "gpmi_io", 74 }; 75 76 static const struct mtd_ooblayout_ops gpmi_ooblayout_ops = { 77 .ecc = gpmi_ooblayout_ecc, 78 .free = gpmi_ooblayout_free, 79 }; 80 81 static const struct gpmi_devdata gpmi_devdata_imx23 = { 82 .type = IS_MX23, 83 .bch_max_ecc_strength = 20, 84 .max_chain_delay = 16000, 85 .clks = gpmi_clks_for_mx2x, 86 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx2x), 87 }; 88 89 static const struct gpmi_devdata gpmi_devdata_imx28 = { 90 .type = IS_MX28, 91 .bch_max_ecc_strength = 20, 92 .max_chain_delay = 16000, 93 .clks = gpmi_clks_for_mx2x, 94 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx2x), 95 }; 96 97 static const char * const gpmi_clks_for_mx6[] = { 98 "gpmi_io", "gpmi_apb", "gpmi_bch", "gpmi_bch_apb", "per1_bch", 99 }; 100 101 static const struct gpmi_devdata gpmi_devdata_imx6q = { 102 .type = IS_MX6Q, 103 .bch_max_ecc_strength = 40, 104 .max_chain_delay = 12000, 105 .clks = gpmi_clks_for_mx6, 106 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx6), 107 }; 108 109 static const struct gpmi_devdata gpmi_devdata_imx6sx = { 110 .type = IS_MX6SX, 111 .bch_max_ecc_strength = 62, 112 .max_chain_delay = 12000, 113 .clks = gpmi_clks_for_mx6, 114 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx6), 115 }; 116 117 static const char * const gpmi_clks_for_mx7d[] = { 118 "gpmi_io", "gpmi_bch_apb", 119 }; 120 121 static const struct gpmi_devdata gpmi_devdata_imx7d = { 122 .type = IS_MX7D, 123 .bch_max_ecc_strength = 62, 124 .max_chain_delay = 12000, 125 .clks = gpmi_clks_for_mx7d, 126 .clks_count = ARRAY_SIZE(gpmi_clks_for_mx7d), 127 }; 128 129 static irqreturn_t bch_irq(int irq, void *cookie) 130 { 131 struct gpmi_nand_data *this = cookie; 132 133 gpmi_clear_bch(this); 134 complete(&this->bch_done); 135 return IRQ_HANDLED; 136 } 137 138 /* 139 * Calculate the ECC strength by hand: 140 * E : The ECC strength. 141 * G : the length of Galois Field. 142 * N : The chunk count of per page. 143 * O : the oobsize of the NAND chip. 144 * M : the metasize of per page. 145 * 146 * The formula is : 147 * E * G * N 148 * ------------ <= (O - M) 149 * 8 150 * 151 * So, we get E by: 152 * (O - M) * 8 153 * E <= ------------- 154 * G * N 155 */ 156 static inline int get_ecc_strength(struct gpmi_nand_data *this) 157 { 158 struct bch_geometry *geo = &this->bch_geometry; 159 struct mtd_info *mtd = nand_to_mtd(&this->nand); 160 int ecc_strength; 161 162 ecc_strength = ((mtd->oobsize - geo->metadata_size) * 8) 163 / (geo->gf_len * geo->ecc_chunk_count); 164 165 /* We need the minor even number. */ 166 return round_down(ecc_strength, 2); 167 } 168 169 static inline bool gpmi_check_ecc(struct gpmi_nand_data *this) 170 { 171 struct bch_geometry *geo = &this->bch_geometry; 172 173 /* Do the sanity check. */ 174 if (GPMI_IS_MXS(this)) { 175 /* The mx23/mx28 only support the GF13. */ 176 if (geo->gf_len == 14) 177 return false; 178 } 179 return geo->ecc_strength <= this->devdata->bch_max_ecc_strength; 180 } 181 182 /* 183 * If we can get the ECC information from the nand chip, we do not 184 * need to calculate them ourselves. 185 * 186 * We may have available oob space in this case. 187 */ 188 static int set_geometry_by_ecc_info(struct gpmi_nand_data *this, 189 unsigned int ecc_strength, 190 unsigned int ecc_step) 191 { 192 struct bch_geometry *geo = &this->bch_geometry; 193 struct nand_chip *chip = &this->nand; 194 struct mtd_info *mtd = nand_to_mtd(chip); 195 unsigned int block_mark_bit_offset; 196 197 switch (ecc_step) { 198 case SZ_512: 199 geo->gf_len = 13; 200 break; 201 case SZ_1K: 202 geo->gf_len = 14; 203 break; 204 default: 205 dev_err(this->dev, 206 "unsupported nand chip. ecc bits : %d, ecc size : %d\n", 207 chip->base.eccreq.strength, 208 chip->base.eccreq.step_size); 209 return -EINVAL; 210 } 211 geo->ecc_chunk_size = ecc_step; 212 geo->ecc_strength = round_up(ecc_strength, 2); 213 if (!gpmi_check_ecc(this)) 214 return -EINVAL; 215 216 /* Keep the C >= O */ 217 if (geo->ecc_chunk_size < mtd->oobsize) { 218 dev_err(this->dev, 219 "unsupported nand chip. ecc size: %d, oob size : %d\n", 220 ecc_step, mtd->oobsize); 221 return -EINVAL; 222 } 223 224 /* The default value, see comment in the legacy_set_geometry(). */ 225 geo->metadata_size = 10; 226 227 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; 228 229 /* 230 * Now, the NAND chip with 2K page(data chunk is 512byte) shows below: 231 * 232 * | P | 233 * |<----------------------------------------------------->| 234 * | | 235 * | (Block Mark) | 236 * | P' | | | | 237 * |<-------------------------------------------->| D | | O' | 238 * | |<---->| |<--->| 239 * V V V V V 240 * +---+----------+-+----------+-+----------+-+----------+-+-----+ 241 * | M | data |E| data |E| data |E| data |E| | 242 * +---+----------+-+----------+-+----------+-+----------+-+-----+ 243 * ^ ^ 244 * | O | 245 * |<------------>| 246 * | | 247 * 248 * P : the page size for BCH module. 249 * E : The ECC strength. 250 * G : the length of Galois Field. 251 * N : The chunk count of per page. 252 * M : the metasize of per page. 253 * C : the ecc chunk size, aka the "data" above. 254 * P': the nand chip's page size. 255 * O : the nand chip's oob size. 256 * O': the free oob. 257 * 258 * The formula for P is : 259 * 260 * E * G * N 261 * P = ------------ + P' + M 262 * 8 263 * 264 * The position of block mark moves forward in the ECC-based view 265 * of page, and the delta is: 266 * 267 * E * G * (N - 1) 268 * D = (---------------- + M) 269 * 8 270 * 271 * Please see the comment in legacy_set_geometry(). 272 * With the condition C >= O , we still can get same result. 273 * So the bit position of the physical block mark within the ECC-based 274 * view of the page is : 275 * (P' - D) * 8 276 */ 277 geo->page_size = mtd->writesize + geo->metadata_size + 278 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; 279 280 geo->payload_size = mtd->writesize; 281 282 geo->auxiliary_status_offset = ALIGN(geo->metadata_size, 4); 283 geo->auxiliary_size = ALIGN(geo->metadata_size, 4) 284 + ALIGN(geo->ecc_chunk_count, 4); 285 286 if (!this->swap_block_mark) 287 return 0; 288 289 /* For bit swap. */ 290 block_mark_bit_offset = mtd->writesize * 8 - 291 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) 292 + geo->metadata_size * 8); 293 294 geo->block_mark_byte_offset = block_mark_bit_offset / 8; 295 geo->block_mark_bit_offset = block_mark_bit_offset % 8; 296 return 0; 297 } 298 299 static int legacy_set_geometry(struct gpmi_nand_data *this) 300 { 301 struct bch_geometry *geo = &this->bch_geometry; 302 struct mtd_info *mtd = nand_to_mtd(&this->nand); 303 unsigned int metadata_size; 304 unsigned int status_size; 305 unsigned int block_mark_bit_offset; 306 307 /* 308 * The size of the metadata can be changed, though we set it to 10 309 * bytes now. But it can't be too large, because we have to save 310 * enough space for BCH. 311 */ 312 geo->metadata_size = 10; 313 314 /* The default for the length of Galois Field. */ 315 geo->gf_len = 13; 316 317 /* The default for chunk size. */ 318 geo->ecc_chunk_size = 512; 319 while (geo->ecc_chunk_size < mtd->oobsize) { 320 geo->ecc_chunk_size *= 2; /* keep C >= O */ 321 geo->gf_len = 14; 322 } 323 324 geo->ecc_chunk_count = mtd->writesize / geo->ecc_chunk_size; 325 326 /* We use the same ECC strength for all chunks. */ 327 geo->ecc_strength = get_ecc_strength(this); 328 if (!gpmi_check_ecc(this)) { 329 dev_err(this->dev, 330 "ecc strength: %d cannot be supported by the controller (%d)\n" 331 "try to use minimum ecc strength that NAND chip required\n", 332 geo->ecc_strength, 333 this->devdata->bch_max_ecc_strength); 334 return -EINVAL; 335 } 336 337 geo->page_size = mtd->writesize + geo->metadata_size + 338 (geo->gf_len * geo->ecc_strength * geo->ecc_chunk_count) / 8; 339 geo->payload_size = mtd->writesize; 340 341 /* 342 * The auxiliary buffer contains the metadata and the ECC status. The 343 * metadata is padded to the nearest 32-bit boundary. The ECC status 344 * contains one byte for every ECC chunk, and is also padded to the 345 * nearest 32-bit boundary. 346 */ 347 metadata_size = ALIGN(geo->metadata_size, 4); 348 status_size = ALIGN(geo->ecc_chunk_count, 4); 349 350 geo->auxiliary_size = metadata_size + status_size; 351 geo->auxiliary_status_offset = metadata_size; 352 353 if (!this->swap_block_mark) 354 return 0; 355 356 /* 357 * We need to compute the byte and bit offsets of 358 * the physical block mark within the ECC-based view of the page. 359 * 360 * NAND chip with 2K page shows below: 361 * (Block Mark) 362 * | | 363 * | D | 364 * |<---->| 365 * V V 366 * +---+----------+-+----------+-+----------+-+----------+-+ 367 * | M | data |E| data |E| data |E| data |E| 368 * +---+----------+-+----------+-+----------+-+----------+-+ 369 * 370 * The position of block mark moves forward in the ECC-based view 371 * of page, and the delta is: 372 * 373 * E * G * (N - 1) 374 * D = (---------------- + M) 375 * 8 376 * 377 * With the formula to compute the ECC strength, and the condition 378 * : C >= O (C is the ecc chunk size) 379 * 380 * It's easy to deduce to the following result: 381 * 382 * E * G (O - M) C - M C - M 383 * ----------- <= ------- <= -------- < --------- 384 * 8 N N (N - 1) 385 * 386 * So, we get: 387 * 388 * E * G * (N - 1) 389 * D = (---------------- + M) < C 390 * 8 391 * 392 * The above inequality means the position of block mark 393 * within the ECC-based view of the page is still in the data chunk, 394 * and it's NOT in the ECC bits of the chunk. 395 * 396 * Use the following to compute the bit position of the 397 * physical block mark within the ECC-based view of the page: 398 * (page_size - D) * 8 399 * 400 * --Huang Shijie 401 */ 402 block_mark_bit_offset = mtd->writesize * 8 - 403 (geo->ecc_strength * geo->gf_len * (geo->ecc_chunk_count - 1) 404 + geo->metadata_size * 8); 405 406 geo->block_mark_byte_offset = block_mark_bit_offset / 8; 407 geo->block_mark_bit_offset = block_mark_bit_offset % 8; 408 return 0; 409 } 410 411 int common_nfc_set_geometry(struct gpmi_nand_data *this) 412 { 413 struct nand_chip *chip = &this->nand; 414 415 if (chip->ecc.strength > 0 && chip->ecc.size > 0) 416 return set_geometry_by_ecc_info(this, chip->ecc.strength, 417 chip->ecc.size); 418 419 if ((of_property_read_bool(this->dev->of_node, "fsl,use-minimum-ecc")) 420 || legacy_set_geometry(this)) { 421 if (!(chip->base.eccreq.strength > 0 && 422 chip->base.eccreq.step_size > 0)) 423 return -EINVAL; 424 425 return set_geometry_by_ecc_info(this, 426 chip->base.eccreq.strength, 427 chip->base.eccreq.step_size); 428 } 429 430 return 0; 431 } 432 433 struct dma_chan *get_dma_chan(struct gpmi_nand_data *this) 434 { 435 /* We use the DMA channel 0 to access all the nand chips. */ 436 return this->dma_chans[0]; 437 } 438 439 /* Can we use the upper's buffer directly for DMA? */ 440 bool prepare_data_dma(struct gpmi_nand_data *this, const void *buf, int len, 441 enum dma_data_direction dr) 442 { 443 struct scatterlist *sgl = &this->data_sgl; 444 int ret; 445 446 /* first try to map the upper buffer directly */ 447 if (virt_addr_valid(buf) && !object_is_on_stack(buf)) { 448 sg_init_one(sgl, buf, len); 449 ret = dma_map_sg(this->dev, sgl, 1, dr); 450 if (ret == 0) 451 goto map_fail; 452 453 return true; 454 } 455 456 map_fail: 457 /* We have to use our own DMA buffer. */ 458 sg_init_one(sgl, this->data_buffer_dma, len); 459 460 if (dr == DMA_TO_DEVICE) 461 memcpy(this->data_buffer_dma, buf, len); 462 463 dma_map_sg(this->dev, sgl, 1, dr); 464 465 return false; 466 } 467 468 /* This will be called after the DMA operation is finished. */ 469 static void dma_irq_callback(void *param) 470 { 471 struct gpmi_nand_data *this = param; 472 struct completion *dma_c = &this->dma_done; 473 474 complete(dma_c); 475 } 476 477 int start_dma_without_bch_irq(struct gpmi_nand_data *this, 478 struct dma_async_tx_descriptor *desc) 479 { 480 struct completion *dma_c = &this->dma_done; 481 unsigned long timeout; 482 483 init_completion(dma_c); 484 485 desc->callback = dma_irq_callback; 486 desc->callback_param = this; 487 dmaengine_submit(desc); 488 dma_async_issue_pending(get_dma_chan(this)); 489 490 /* Wait for the interrupt from the DMA block. */ 491 timeout = wait_for_completion_timeout(dma_c, msecs_to_jiffies(1000)); 492 if (!timeout) { 493 dev_err(this->dev, "DMA timeout, last DMA\n"); 494 gpmi_dump_info(this); 495 return -ETIMEDOUT; 496 } 497 return 0; 498 } 499 500 /* 501 * This function is used in BCH reading or BCH writing pages. 502 * It will wait for the BCH interrupt as long as ONE second. 503 * Actually, we must wait for two interrupts : 504 * [1] firstly the DMA interrupt and 505 * [2] secondly the BCH interrupt. 506 */ 507 int start_dma_with_bch_irq(struct gpmi_nand_data *this, 508 struct dma_async_tx_descriptor *desc) 509 { 510 struct completion *bch_c = &this->bch_done; 511 unsigned long timeout; 512 513 /* Prepare to receive an interrupt from the BCH block. */ 514 init_completion(bch_c); 515 516 /* start the DMA */ 517 start_dma_without_bch_irq(this, desc); 518 519 /* Wait for the interrupt from the BCH block. */ 520 timeout = wait_for_completion_timeout(bch_c, msecs_to_jiffies(1000)); 521 if (!timeout) { 522 dev_err(this->dev, "BCH timeout\n"); 523 gpmi_dump_info(this); 524 return -ETIMEDOUT; 525 } 526 return 0; 527 } 528 529 static int acquire_register_block(struct gpmi_nand_data *this, 530 const char *res_name) 531 { 532 struct platform_device *pdev = this->pdev; 533 struct resources *res = &this->resources; 534 struct resource *r; 535 void __iomem *p; 536 537 r = platform_get_resource_byname(pdev, IORESOURCE_MEM, res_name); 538 p = devm_ioremap_resource(&pdev->dev, r); 539 if (IS_ERR(p)) 540 return PTR_ERR(p); 541 542 if (!strcmp(res_name, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME)) 543 res->gpmi_regs = p; 544 else if (!strcmp(res_name, GPMI_NAND_BCH_REGS_ADDR_RES_NAME)) 545 res->bch_regs = p; 546 else 547 dev_err(this->dev, "unknown resource name : %s\n", res_name); 548 549 return 0; 550 } 551 552 static int acquire_bch_irq(struct gpmi_nand_data *this, irq_handler_t irq_h) 553 { 554 struct platform_device *pdev = this->pdev; 555 const char *res_name = GPMI_NAND_BCH_INTERRUPT_RES_NAME; 556 struct resource *r; 557 int err; 558 559 r = platform_get_resource_byname(pdev, IORESOURCE_IRQ, res_name); 560 if (!r) { 561 dev_err(this->dev, "Can't get resource for %s\n", res_name); 562 return -ENODEV; 563 } 564 565 err = devm_request_irq(this->dev, r->start, irq_h, 0, res_name, this); 566 if (err) 567 dev_err(this->dev, "error requesting BCH IRQ\n"); 568 569 return err; 570 } 571 572 static void release_dma_channels(struct gpmi_nand_data *this) 573 { 574 unsigned int i; 575 for (i = 0; i < DMA_CHANS; i++) 576 if (this->dma_chans[i]) { 577 dma_release_channel(this->dma_chans[i]); 578 this->dma_chans[i] = NULL; 579 } 580 } 581 582 static int acquire_dma_channels(struct gpmi_nand_data *this) 583 { 584 struct platform_device *pdev = this->pdev; 585 struct dma_chan *dma_chan; 586 587 /* request dma channel */ 588 dma_chan = dma_request_slave_channel(&pdev->dev, "rx-tx"); 589 if (!dma_chan) { 590 dev_err(this->dev, "Failed to request DMA channel.\n"); 591 goto acquire_err; 592 } 593 594 this->dma_chans[0] = dma_chan; 595 return 0; 596 597 acquire_err: 598 release_dma_channels(this); 599 return -EINVAL; 600 } 601 602 static int gpmi_get_clks(struct gpmi_nand_data *this) 603 { 604 struct resources *r = &this->resources; 605 struct clk *clk; 606 int err, i; 607 608 for (i = 0; i < this->devdata->clks_count; i++) { 609 clk = devm_clk_get(this->dev, this->devdata->clks[i]); 610 if (IS_ERR(clk)) { 611 err = PTR_ERR(clk); 612 goto err_clock; 613 } 614 615 r->clock[i] = clk; 616 } 617 618 if (GPMI_IS_MX6(this)) 619 /* 620 * Set the default value for the gpmi clock. 621 * 622 * If you want to use the ONFI nand which is in the 623 * Synchronous Mode, you should change the clock as you need. 624 */ 625 clk_set_rate(r->clock[0], 22000000); 626 627 return 0; 628 629 err_clock: 630 dev_dbg(this->dev, "failed in finding the clocks.\n"); 631 return err; 632 } 633 634 static int acquire_resources(struct gpmi_nand_data *this) 635 { 636 int ret; 637 638 ret = acquire_register_block(this, GPMI_NAND_GPMI_REGS_ADDR_RES_NAME); 639 if (ret) 640 goto exit_regs; 641 642 ret = acquire_register_block(this, GPMI_NAND_BCH_REGS_ADDR_RES_NAME); 643 if (ret) 644 goto exit_regs; 645 646 ret = acquire_bch_irq(this, bch_irq); 647 if (ret) 648 goto exit_regs; 649 650 ret = acquire_dma_channels(this); 651 if (ret) 652 goto exit_regs; 653 654 ret = gpmi_get_clks(this); 655 if (ret) 656 goto exit_clock; 657 return 0; 658 659 exit_clock: 660 release_dma_channels(this); 661 exit_regs: 662 return ret; 663 } 664 665 static void release_resources(struct gpmi_nand_data *this) 666 { 667 release_dma_channels(this); 668 } 669 670 static int send_page_prepare(struct gpmi_nand_data *this, 671 const void *source, unsigned length, 672 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, 673 const void **use_virt, dma_addr_t *use_phys) 674 { 675 struct device *dev = this->dev; 676 677 if (virt_addr_valid(source)) { 678 dma_addr_t source_phys; 679 680 source_phys = dma_map_single(dev, (void *)source, length, 681 DMA_TO_DEVICE); 682 if (dma_mapping_error(dev, source_phys)) { 683 if (alt_size < length) { 684 dev_err(dev, "Alternate buffer is too small\n"); 685 return -ENOMEM; 686 } 687 goto map_failed; 688 } 689 *use_virt = source; 690 *use_phys = source_phys; 691 return 0; 692 } 693 map_failed: 694 /* 695 * Copy the content of the source buffer into the alternate 696 * buffer and set up the return values accordingly. 697 */ 698 memcpy(alt_virt, source, length); 699 700 *use_virt = alt_virt; 701 *use_phys = alt_phys; 702 return 0; 703 } 704 705 static void send_page_end(struct gpmi_nand_data *this, 706 const void *source, unsigned length, 707 void *alt_virt, dma_addr_t alt_phys, unsigned alt_size, 708 const void *used_virt, dma_addr_t used_phys) 709 { 710 struct device *dev = this->dev; 711 if (used_virt == source) 712 dma_unmap_single(dev, used_phys, length, DMA_TO_DEVICE); 713 } 714 715 static void gpmi_free_dma_buffer(struct gpmi_nand_data *this) 716 { 717 struct device *dev = this->dev; 718 719 if (this->page_buffer_virt && virt_addr_valid(this->page_buffer_virt)) 720 dma_free_coherent(dev, this->page_buffer_size, 721 this->page_buffer_virt, 722 this->page_buffer_phys); 723 kfree(this->cmd_buffer); 724 kfree(this->data_buffer_dma); 725 kfree(this->raw_buffer); 726 727 this->cmd_buffer = NULL; 728 this->data_buffer_dma = NULL; 729 this->raw_buffer = NULL; 730 this->page_buffer_virt = NULL; 731 this->page_buffer_size = 0; 732 } 733 734 /* Allocate the DMA buffers */ 735 static int gpmi_alloc_dma_buffer(struct gpmi_nand_data *this) 736 { 737 struct bch_geometry *geo = &this->bch_geometry; 738 struct device *dev = this->dev; 739 struct mtd_info *mtd = nand_to_mtd(&this->nand); 740 741 /* [1] Allocate a command buffer. PAGE_SIZE is enough. */ 742 this->cmd_buffer = kzalloc(PAGE_SIZE, GFP_DMA | GFP_KERNEL); 743 if (this->cmd_buffer == NULL) 744 goto error_alloc; 745 746 /* 747 * [2] Allocate a read/write data buffer. 748 * The gpmi_alloc_dma_buffer can be called twice. 749 * We allocate a PAGE_SIZE length buffer if gpmi_alloc_dma_buffer 750 * is called before the NAND identification; and we allocate a 751 * buffer of the real NAND page size when the gpmi_alloc_dma_buffer 752 * is called after. 753 */ 754 this->data_buffer_dma = kzalloc(mtd->writesize ?: PAGE_SIZE, 755 GFP_DMA | GFP_KERNEL); 756 if (this->data_buffer_dma == NULL) 757 goto error_alloc; 758 759 /* 760 * [3] Allocate the page buffer. 761 * 762 * Both the payload buffer and the auxiliary buffer must appear on 763 * 32-bit boundaries. We presume the size of the payload buffer is a 764 * power of two and is much larger than four, which guarantees the 765 * auxiliary buffer will appear on a 32-bit boundary. 766 */ 767 this->page_buffer_size = geo->payload_size + geo->auxiliary_size; 768 this->page_buffer_virt = dma_alloc_coherent(dev, this->page_buffer_size, 769 &this->page_buffer_phys, GFP_DMA); 770 if (!this->page_buffer_virt) 771 goto error_alloc; 772 773 this->raw_buffer = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); 774 if (!this->raw_buffer) 775 goto error_alloc; 776 777 /* Slice up the page buffer. */ 778 this->payload_virt = this->page_buffer_virt; 779 this->payload_phys = this->page_buffer_phys; 780 this->auxiliary_virt = this->payload_virt + geo->payload_size; 781 this->auxiliary_phys = this->payload_phys + geo->payload_size; 782 return 0; 783 784 error_alloc: 785 gpmi_free_dma_buffer(this); 786 return -ENOMEM; 787 } 788 789 static void gpmi_cmd_ctrl(struct nand_chip *chip, int data, unsigned int ctrl) 790 { 791 struct gpmi_nand_data *this = nand_get_controller_data(chip); 792 int ret; 793 794 /* 795 * Every operation begins with a command byte and a series of zero or 796 * more address bytes. These are distinguished by either the Address 797 * Latch Enable (ALE) or Command Latch Enable (CLE) signals being 798 * asserted. When MTD is ready to execute the command, it will deassert 799 * both latch enables. 800 * 801 * Rather than run a separate DMA operation for every single byte, we 802 * queue them up and run a single DMA operation for the entire series 803 * of command and data bytes. NAND_CMD_NONE means the END of the queue. 804 */ 805 if ((ctrl & (NAND_ALE | NAND_CLE))) { 806 if (data != NAND_CMD_NONE) 807 this->cmd_buffer[this->command_length++] = data; 808 return; 809 } 810 811 if (!this->command_length) 812 return; 813 814 ret = gpmi_send_command(this); 815 if (ret) 816 dev_err(this->dev, "Chip: %u, Error %d\n", 817 this->current_chip, ret); 818 819 this->command_length = 0; 820 } 821 822 static int gpmi_dev_ready(struct nand_chip *chip) 823 { 824 struct gpmi_nand_data *this = nand_get_controller_data(chip); 825 826 return gpmi_is_ready(this, this->current_chip); 827 } 828 829 static void gpmi_select_chip(struct nand_chip *chip, int chipnr) 830 { 831 struct gpmi_nand_data *this = nand_get_controller_data(chip); 832 int ret; 833 834 /* 835 * For power consumption matters, disable/enable the clock each time a 836 * die is selected/unselected. 837 */ 838 if (this->current_chip < 0 && chipnr >= 0) { 839 ret = gpmi_enable_clk(this); 840 if (ret) 841 dev_err(this->dev, "Failed to enable the clock\n"); 842 } else if (this->current_chip >= 0 && chipnr < 0) { 843 ret = gpmi_disable_clk(this); 844 if (ret) 845 dev_err(this->dev, "Failed to disable the clock\n"); 846 } 847 848 /* 849 * This driver currently supports only one NAND chip. Plus, dies share 850 * the same configuration. So once timings have been applied on the 851 * controller side, they will not change anymore. When the time will 852 * come, the check on must_apply_timings will have to be dropped. 853 */ 854 if (chipnr >= 0 && this->hw.must_apply_timings) { 855 this->hw.must_apply_timings = false; 856 gpmi_nfc_apply_timings(this); 857 } 858 859 this->current_chip = chipnr; 860 } 861 862 static void gpmi_read_buf(struct nand_chip *chip, uint8_t *buf, int len) 863 { 864 struct gpmi_nand_data *this = nand_get_controller_data(chip); 865 866 dev_dbg(this->dev, "len is %d\n", len); 867 868 gpmi_read_data(this, buf, len); 869 } 870 871 static void gpmi_write_buf(struct nand_chip *chip, const uint8_t *buf, int len) 872 { 873 struct gpmi_nand_data *this = nand_get_controller_data(chip); 874 875 dev_dbg(this->dev, "len is %d\n", len); 876 877 gpmi_send_data(this, buf, len); 878 } 879 880 static uint8_t gpmi_read_byte(struct nand_chip *chip) 881 { 882 struct gpmi_nand_data *this = nand_get_controller_data(chip); 883 uint8_t *buf = this->data_buffer_dma; 884 885 gpmi_read_buf(chip, buf, 1); 886 return buf[0]; 887 } 888 889 /* 890 * Handles block mark swapping. 891 * It can be called in swapping the block mark, or swapping it back, 892 * because the the operations are the same. 893 */ 894 static void block_mark_swapping(struct gpmi_nand_data *this, 895 void *payload, void *auxiliary) 896 { 897 struct bch_geometry *nfc_geo = &this->bch_geometry; 898 unsigned char *p; 899 unsigned char *a; 900 unsigned int bit; 901 unsigned char mask; 902 unsigned char from_data; 903 unsigned char from_oob; 904 905 if (!this->swap_block_mark) 906 return; 907 908 /* 909 * If control arrives here, we're swapping. Make some convenience 910 * variables. 911 */ 912 bit = nfc_geo->block_mark_bit_offset; 913 p = payload + nfc_geo->block_mark_byte_offset; 914 a = auxiliary; 915 916 /* 917 * Get the byte from the data area that overlays the block mark. Since 918 * the ECC engine applies its own view to the bits in the page, the 919 * physical block mark won't (in general) appear on a byte boundary in 920 * the data. 921 */ 922 from_data = (p[0] >> bit) | (p[1] << (8 - bit)); 923 924 /* Get the byte from the OOB. */ 925 from_oob = a[0]; 926 927 /* Swap them. */ 928 a[0] = from_data; 929 930 mask = (0x1 << bit) - 1; 931 p[0] = (p[0] & mask) | (from_oob << bit); 932 933 mask = ~0 << bit; 934 p[1] = (p[1] & mask) | (from_oob >> (8 - bit)); 935 } 936 937 static int gpmi_ecc_read_page_data(struct nand_chip *chip, 938 uint8_t *buf, int oob_required, 939 int page) 940 { 941 struct gpmi_nand_data *this = nand_get_controller_data(chip); 942 struct bch_geometry *nfc_geo = &this->bch_geometry; 943 struct mtd_info *mtd = nand_to_mtd(chip); 944 dma_addr_t payload_phys; 945 unsigned int i; 946 unsigned char *status; 947 unsigned int max_bitflips = 0; 948 int ret; 949 bool direct = false; 950 951 dev_dbg(this->dev, "page number is : %d\n", page); 952 953 payload_phys = this->payload_phys; 954 955 if (virt_addr_valid(buf)) { 956 dma_addr_t dest_phys; 957 958 dest_phys = dma_map_single(this->dev, buf, nfc_geo->payload_size, 959 DMA_FROM_DEVICE); 960 if (!dma_mapping_error(this->dev, dest_phys)) { 961 payload_phys = dest_phys; 962 direct = true; 963 } 964 } 965 966 /* go! */ 967 ret = gpmi_read_page(this, payload_phys, this->auxiliary_phys); 968 969 if (direct) 970 dma_unmap_single(this->dev, payload_phys, nfc_geo->payload_size, 971 DMA_FROM_DEVICE); 972 973 if (ret) { 974 dev_err(this->dev, "Error in ECC-based read: %d\n", ret); 975 return ret; 976 } 977 978 /* Loop over status bytes, accumulating ECC status. */ 979 status = this->auxiliary_virt + nfc_geo->auxiliary_status_offset; 980 981 if (!direct) 982 memcpy(buf, this->payload_virt, nfc_geo->payload_size); 983 984 for (i = 0; i < nfc_geo->ecc_chunk_count; i++, status++) { 985 if ((*status == STATUS_GOOD) || (*status == STATUS_ERASED)) 986 continue; 987 988 if (*status == STATUS_UNCORRECTABLE) { 989 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; 990 u8 *eccbuf = this->raw_buffer; 991 int offset, bitoffset; 992 int eccbytes; 993 int flips; 994 995 /* Read ECC bytes into our internal raw_buffer */ 996 offset = nfc_geo->metadata_size * 8; 997 offset += ((8 * nfc_geo->ecc_chunk_size) + eccbits) * (i + 1); 998 offset -= eccbits; 999 bitoffset = offset % 8; 1000 eccbytes = DIV_ROUND_UP(offset + eccbits, 8); 1001 offset /= 8; 1002 eccbytes -= offset; 1003 nand_change_read_column_op(chip, offset, eccbuf, 1004 eccbytes, false); 1005 1006 /* 1007 * ECC data are not byte aligned and we may have 1008 * in-band data in the first and last byte of 1009 * eccbuf. Set non-eccbits to one so that 1010 * nand_check_erased_ecc_chunk() does not count them 1011 * as bitflips. 1012 */ 1013 if (bitoffset) 1014 eccbuf[0] |= GENMASK(bitoffset - 1, 0); 1015 1016 bitoffset = (bitoffset + eccbits) % 8; 1017 if (bitoffset) 1018 eccbuf[eccbytes - 1] |= GENMASK(7, bitoffset); 1019 1020 /* 1021 * The ECC hardware has an uncorrectable ECC status 1022 * code in case we have bitflips in an erased page. As 1023 * nothing was written into this subpage the ECC is 1024 * obviously wrong and we can not trust it. We assume 1025 * at this point that we are reading an erased page and 1026 * try to correct the bitflips in buffer up to 1027 * ecc_strength bitflips. If this is a page with random 1028 * data, we exceed this number of bitflips and have a 1029 * ECC failure. Otherwise we use the corrected buffer. 1030 */ 1031 if (i == 0) { 1032 /* The first block includes metadata */ 1033 flips = nand_check_erased_ecc_chunk( 1034 buf + i * nfc_geo->ecc_chunk_size, 1035 nfc_geo->ecc_chunk_size, 1036 eccbuf, eccbytes, 1037 this->auxiliary_virt, 1038 nfc_geo->metadata_size, 1039 nfc_geo->ecc_strength); 1040 } else { 1041 flips = nand_check_erased_ecc_chunk( 1042 buf + i * nfc_geo->ecc_chunk_size, 1043 nfc_geo->ecc_chunk_size, 1044 eccbuf, eccbytes, 1045 NULL, 0, 1046 nfc_geo->ecc_strength); 1047 } 1048 1049 if (flips > 0) { 1050 max_bitflips = max_t(unsigned int, max_bitflips, 1051 flips); 1052 mtd->ecc_stats.corrected += flips; 1053 continue; 1054 } 1055 1056 mtd->ecc_stats.failed++; 1057 continue; 1058 } 1059 1060 mtd->ecc_stats.corrected += *status; 1061 max_bitflips = max_t(unsigned int, max_bitflips, *status); 1062 } 1063 1064 /* handle the block mark swapping */ 1065 block_mark_swapping(this, buf, this->auxiliary_virt); 1066 1067 if (oob_required) { 1068 /* 1069 * It's time to deliver the OOB bytes. See gpmi_ecc_read_oob() 1070 * for details about our policy for delivering the OOB. 1071 * 1072 * We fill the caller's buffer with set bits, and then copy the 1073 * block mark to th caller's buffer. Note that, if block mark 1074 * swapping was necessary, it has already been done, so we can 1075 * rely on the first byte of the auxiliary buffer to contain 1076 * the block mark. 1077 */ 1078 memset(chip->oob_poi, ~0, mtd->oobsize); 1079 chip->oob_poi[0] = ((uint8_t *)this->auxiliary_virt)[0]; 1080 } 1081 1082 return max_bitflips; 1083 } 1084 1085 static int gpmi_ecc_read_page(struct nand_chip *chip, uint8_t *buf, 1086 int oob_required, int page) 1087 { 1088 nand_read_page_op(chip, page, 0, NULL, 0); 1089 1090 return gpmi_ecc_read_page_data(chip, buf, oob_required, page); 1091 } 1092 1093 /* Fake a virtual small page for the subpage read */ 1094 static int gpmi_ecc_read_subpage(struct nand_chip *chip, uint32_t offs, 1095 uint32_t len, uint8_t *buf, int page) 1096 { 1097 struct gpmi_nand_data *this = nand_get_controller_data(chip); 1098 void __iomem *bch_regs = this->resources.bch_regs; 1099 struct bch_geometry old_geo = this->bch_geometry; 1100 struct bch_geometry *geo = &this->bch_geometry; 1101 int size = chip->ecc.size; /* ECC chunk size */ 1102 int meta, n, page_size; 1103 u32 r1_old, r2_old, r1_new, r2_new; 1104 unsigned int max_bitflips; 1105 int first, last, marker_pos; 1106 int ecc_parity_size; 1107 int col = 0; 1108 int old_swap_block_mark = this->swap_block_mark; 1109 1110 /* The size of ECC parity */ 1111 ecc_parity_size = geo->gf_len * geo->ecc_strength / 8; 1112 1113 /* Align it with the chunk size */ 1114 first = offs / size; 1115 last = (offs + len - 1) / size; 1116 1117 if (this->swap_block_mark) { 1118 /* 1119 * Find the chunk which contains the Block Marker. 1120 * If this chunk is in the range of [first, last], 1121 * we have to read out the whole page. 1122 * Why? since we had swapped the data at the position of Block 1123 * Marker to the metadata which is bound with the chunk 0. 1124 */ 1125 marker_pos = geo->block_mark_byte_offset / size; 1126 if (last >= marker_pos && first <= marker_pos) { 1127 dev_dbg(this->dev, 1128 "page:%d, first:%d, last:%d, marker at:%d\n", 1129 page, first, last, marker_pos); 1130 return gpmi_ecc_read_page(chip, buf, 0, page); 1131 } 1132 } 1133 1134 meta = geo->metadata_size; 1135 if (first) { 1136 col = meta + (size + ecc_parity_size) * first; 1137 meta = 0; 1138 buf = buf + first * size; 1139 } 1140 1141 nand_read_page_op(chip, page, col, NULL, 0); 1142 1143 /* Save the old environment */ 1144 r1_old = r1_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT0); 1145 r2_old = r2_new = readl(bch_regs + HW_BCH_FLASH0LAYOUT1); 1146 1147 /* change the BCH registers and bch_geometry{} */ 1148 n = last - first + 1; 1149 page_size = meta + (size + ecc_parity_size) * n; 1150 1151 r1_new &= ~(BM_BCH_FLASH0LAYOUT0_NBLOCKS | 1152 BM_BCH_FLASH0LAYOUT0_META_SIZE); 1153 r1_new |= BF_BCH_FLASH0LAYOUT0_NBLOCKS(n - 1) 1154 | BF_BCH_FLASH0LAYOUT0_META_SIZE(meta); 1155 writel(r1_new, bch_regs + HW_BCH_FLASH0LAYOUT0); 1156 1157 r2_new &= ~BM_BCH_FLASH0LAYOUT1_PAGE_SIZE; 1158 r2_new |= BF_BCH_FLASH0LAYOUT1_PAGE_SIZE(page_size); 1159 writel(r2_new, bch_regs + HW_BCH_FLASH0LAYOUT1); 1160 1161 geo->ecc_chunk_count = n; 1162 geo->payload_size = n * size; 1163 geo->page_size = page_size; 1164 geo->auxiliary_status_offset = ALIGN(meta, 4); 1165 1166 dev_dbg(this->dev, "page:%d(%d:%d)%d, chunk:(%d:%d), BCH PG size:%d\n", 1167 page, offs, len, col, first, n, page_size); 1168 1169 /* Read the subpage now */ 1170 this->swap_block_mark = false; 1171 max_bitflips = gpmi_ecc_read_page_data(chip, buf, 0, page); 1172 1173 /* Restore */ 1174 writel(r1_old, bch_regs + HW_BCH_FLASH0LAYOUT0); 1175 writel(r2_old, bch_regs + HW_BCH_FLASH0LAYOUT1); 1176 this->bch_geometry = old_geo; 1177 this->swap_block_mark = old_swap_block_mark; 1178 1179 return max_bitflips; 1180 } 1181 1182 static int gpmi_ecc_write_page(struct nand_chip *chip, const uint8_t *buf, 1183 int oob_required, int page) 1184 { 1185 struct mtd_info *mtd = nand_to_mtd(chip); 1186 struct gpmi_nand_data *this = nand_get_controller_data(chip); 1187 struct bch_geometry *nfc_geo = &this->bch_geometry; 1188 const void *payload_virt; 1189 dma_addr_t payload_phys; 1190 const void *auxiliary_virt; 1191 dma_addr_t auxiliary_phys; 1192 int ret; 1193 1194 dev_dbg(this->dev, "ecc write page.\n"); 1195 1196 nand_prog_page_begin_op(chip, page, 0, NULL, 0); 1197 1198 if (this->swap_block_mark) { 1199 /* 1200 * If control arrives here, we're doing block mark swapping. 1201 * Since we can't modify the caller's buffers, we must copy them 1202 * into our own. 1203 */ 1204 memcpy(this->payload_virt, buf, mtd->writesize); 1205 payload_virt = this->payload_virt; 1206 payload_phys = this->payload_phys; 1207 1208 memcpy(this->auxiliary_virt, chip->oob_poi, 1209 nfc_geo->auxiliary_size); 1210 auxiliary_virt = this->auxiliary_virt; 1211 auxiliary_phys = this->auxiliary_phys; 1212 1213 /* Handle block mark swapping. */ 1214 block_mark_swapping(this, 1215 (void *)payload_virt, (void *)auxiliary_virt); 1216 } else { 1217 /* 1218 * If control arrives here, we're not doing block mark swapping, 1219 * so we can to try and use the caller's buffers. 1220 */ 1221 ret = send_page_prepare(this, 1222 buf, mtd->writesize, 1223 this->payload_virt, this->payload_phys, 1224 nfc_geo->payload_size, 1225 &payload_virt, &payload_phys); 1226 if (ret) { 1227 dev_err(this->dev, "Inadequate payload DMA buffer\n"); 1228 return 0; 1229 } 1230 1231 ret = send_page_prepare(this, 1232 chip->oob_poi, mtd->oobsize, 1233 this->auxiliary_virt, this->auxiliary_phys, 1234 nfc_geo->auxiliary_size, 1235 &auxiliary_virt, &auxiliary_phys); 1236 if (ret) { 1237 dev_err(this->dev, "Inadequate auxiliary DMA buffer\n"); 1238 goto exit_auxiliary; 1239 } 1240 } 1241 1242 /* Ask the NFC. */ 1243 ret = gpmi_send_page(this, payload_phys, auxiliary_phys); 1244 if (ret) 1245 dev_err(this->dev, "Error in ECC-based write: %d\n", ret); 1246 1247 if (!this->swap_block_mark) { 1248 send_page_end(this, chip->oob_poi, mtd->oobsize, 1249 this->auxiliary_virt, this->auxiliary_phys, 1250 nfc_geo->auxiliary_size, 1251 auxiliary_virt, auxiliary_phys); 1252 exit_auxiliary: 1253 send_page_end(this, buf, mtd->writesize, 1254 this->payload_virt, this->payload_phys, 1255 nfc_geo->payload_size, 1256 payload_virt, payload_phys); 1257 } 1258 1259 if (ret) 1260 return ret; 1261 1262 return nand_prog_page_end_op(chip); 1263 } 1264 1265 /* 1266 * There are several places in this driver where we have to handle the OOB and 1267 * block marks. This is the function where things are the most complicated, so 1268 * this is where we try to explain it all. All the other places refer back to 1269 * here. 1270 * 1271 * These are the rules, in order of decreasing importance: 1272 * 1273 * 1) Nothing the caller does can be allowed to imperil the block mark. 1274 * 1275 * 2) In read operations, the first byte of the OOB we return must reflect the 1276 * true state of the block mark, no matter where that block mark appears in 1277 * the physical page. 1278 * 1279 * 3) ECC-based read operations return an OOB full of set bits (since we never 1280 * allow ECC-based writes to the OOB, it doesn't matter what ECC-based reads 1281 * return). 1282 * 1283 * 4) "Raw" read operations return a direct view of the physical bytes in the 1284 * page, using the conventional definition of which bytes are data and which 1285 * are OOB. This gives the caller a way to see the actual, physical bytes 1286 * in the page, without the distortions applied by our ECC engine. 1287 * 1288 * 1289 * What we do for this specific read operation depends on two questions: 1290 * 1291 * 1) Are we doing a "raw" read, or an ECC-based read? 1292 * 1293 * 2) Are we using block mark swapping or transcription? 1294 * 1295 * There are four cases, illustrated by the following Karnaugh map: 1296 * 1297 * | Raw | ECC-based | 1298 * -------------+-------------------------+-------------------------+ 1299 * | Read the conventional | | 1300 * | OOB at the end of the | | 1301 * Swapping | page and return it. It | | 1302 * | contains exactly what | | 1303 * | we want. | Read the block mark and | 1304 * -------------+-------------------------+ return it in a buffer | 1305 * | Read the conventional | full of set bits. | 1306 * | OOB at the end of the | | 1307 * | page and also the block | | 1308 * Transcribing | mark in the metadata. | | 1309 * | Copy the block mark | | 1310 * | into the first byte of | | 1311 * | the OOB. | | 1312 * -------------+-------------------------+-------------------------+ 1313 * 1314 * Note that we break rule #4 in the Transcribing/Raw case because we're not 1315 * giving an accurate view of the actual, physical bytes in the page (we're 1316 * overwriting the block mark). That's OK because it's more important to follow 1317 * rule #2. 1318 * 1319 * It turns out that knowing whether we want an "ECC-based" or "raw" read is not 1320 * easy. When reading a page, for example, the NAND Flash MTD code calls our 1321 * ecc.read_page or ecc.read_page_raw function. Thus, the fact that MTD wants an 1322 * ECC-based or raw view of the page is implicit in which function it calls 1323 * (there is a similar pair of ECC-based/raw functions for writing). 1324 */ 1325 static int gpmi_ecc_read_oob(struct nand_chip *chip, int page) 1326 { 1327 struct mtd_info *mtd = nand_to_mtd(chip); 1328 struct gpmi_nand_data *this = nand_get_controller_data(chip); 1329 1330 dev_dbg(this->dev, "page number is %d\n", page); 1331 /* clear the OOB buffer */ 1332 memset(chip->oob_poi, ~0, mtd->oobsize); 1333 1334 /* Read out the conventional OOB. */ 1335 nand_read_page_op(chip, page, mtd->writesize, NULL, 0); 1336 chip->legacy.read_buf(chip, chip->oob_poi, mtd->oobsize); 1337 1338 /* 1339 * Now, we want to make sure the block mark is correct. In the 1340 * non-transcribing case (!GPMI_IS_MX23()), we already have it. 1341 * Otherwise, we need to explicitly read it. 1342 */ 1343 if (GPMI_IS_MX23(this)) { 1344 /* Read the block mark into the first byte of the OOB buffer. */ 1345 nand_read_page_op(chip, page, 0, NULL, 0); 1346 chip->oob_poi[0] = chip->legacy.read_byte(chip); 1347 } 1348 1349 return 0; 1350 } 1351 1352 static int gpmi_ecc_write_oob(struct nand_chip *chip, int page) 1353 { 1354 struct mtd_info *mtd = nand_to_mtd(chip); 1355 struct mtd_oob_region of = { }; 1356 1357 /* Do we have available oob area? */ 1358 mtd_ooblayout_free(mtd, 0, &of); 1359 if (!of.length) 1360 return -EPERM; 1361 1362 if (!nand_is_slc(chip)) 1363 return -EPERM; 1364 1365 return nand_prog_page_op(chip, page, mtd->writesize + of.offset, 1366 chip->oob_poi + of.offset, of.length); 1367 } 1368 1369 /* 1370 * This function reads a NAND page without involving the ECC engine (no HW 1371 * ECC correction). 1372 * The tricky part in the GPMI/BCH controller is that it stores ECC bits 1373 * inline (interleaved with payload DATA), and do not align data chunk on 1374 * byte boundaries. 1375 * We thus need to take care moving the payload data and ECC bits stored in the 1376 * page into the provided buffers, which is why we're using gpmi_copy_bits. 1377 * 1378 * See set_geometry_by_ecc_info inline comments to have a full description 1379 * of the layout used by the GPMI controller. 1380 */ 1381 static int gpmi_ecc_read_page_raw(struct nand_chip *chip, uint8_t *buf, 1382 int oob_required, int page) 1383 { 1384 struct mtd_info *mtd = nand_to_mtd(chip); 1385 struct gpmi_nand_data *this = nand_get_controller_data(chip); 1386 struct bch_geometry *nfc_geo = &this->bch_geometry; 1387 int eccsize = nfc_geo->ecc_chunk_size; 1388 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; 1389 u8 *tmp_buf = this->raw_buffer; 1390 size_t src_bit_off; 1391 size_t oob_bit_off; 1392 size_t oob_byte_off; 1393 uint8_t *oob = chip->oob_poi; 1394 int step; 1395 1396 nand_read_page_op(chip, page, 0, tmp_buf, 1397 mtd->writesize + mtd->oobsize); 1398 1399 /* 1400 * If required, swap the bad block marker and the data stored in the 1401 * metadata section, so that we don't wrongly consider a block as bad. 1402 * 1403 * See the layout description for a detailed explanation on why this 1404 * is needed. 1405 */ 1406 if (this->swap_block_mark) 1407 swap(tmp_buf[0], tmp_buf[mtd->writesize]); 1408 1409 /* 1410 * Copy the metadata section into the oob buffer (this section is 1411 * guaranteed to be aligned on a byte boundary). 1412 */ 1413 if (oob_required) 1414 memcpy(oob, tmp_buf, nfc_geo->metadata_size); 1415 1416 oob_bit_off = nfc_geo->metadata_size * 8; 1417 src_bit_off = oob_bit_off; 1418 1419 /* Extract interleaved payload data and ECC bits */ 1420 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { 1421 if (buf) 1422 gpmi_copy_bits(buf, step * eccsize * 8, 1423 tmp_buf, src_bit_off, 1424 eccsize * 8); 1425 src_bit_off += eccsize * 8; 1426 1427 /* Align last ECC block to align a byte boundary */ 1428 if (step == nfc_geo->ecc_chunk_count - 1 && 1429 (oob_bit_off + eccbits) % 8) 1430 eccbits += 8 - ((oob_bit_off + eccbits) % 8); 1431 1432 if (oob_required) 1433 gpmi_copy_bits(oob, oob_bit_off, 1434 tmp_buf, src_bit_off, 1435 eccbits); 1436 1437 src_bit_off += eccbits; 1438 oob_bit_off += eccbits; 1439 } 1440 1441 if (oob_required) { 1442 oob_byte_off = oob_bit_off / 8; 1443 1444 if (oob_byte_off < mtd->oobsize) 1445 memcpy(oob + oob_byte_off, 1446 tmp_buf + mtd->writesize + oob_byte_off, 1447 mtd->oobsize - oob_byte_off); 1448 } 1449 1450 return 0; 1451 } 1452 1453 /* 1454 * This function writes a NAND page without involving the ECC engine (no HW 1455 * ECC generation). 1456 * The tricky part in the GPMI/BCH controller is that it stores ECC bits 1457 * inline (interleaved with payload DATA), and do not align data chunk on 1458 * byte boundaries. 1459 * We thus need to take care moving the OOB area at the right place in the 1460 * final page, which is why we're using gpmi_copy_bits. 1461 * 1462 * See set_geometry_by_ecc_info inline comments to have a full description 1463 * of the layout used by the GPMI controller. 1464 */ 1465 static int gpmi_ecc_write_page_raw(struct nand_chip *chip, const uint8_t *buf, 1466 int oob_required, int page) 1467 { 1468 struct mtd_info *mtd = nand_to_mtd(chip); 1469 struct gpmi_nand_data *this = nand_get_controller_data(chip); 1470 struct bch_geometry *nfc_geo = &this->bch_geometry; 1471 int eccsize = nfc_geo->ecc_chunk_size; 1472 int eccbits = nfc_geo->ecc_strength * nfc_geo->gf_len; 1473 u8 *tmp_buf = this->raw_buffer; 1474 uint8_t *oob = chip->oob_poi; 1475 size_t dst_bit_off; 1476 size_t oob_bit_off; 1477 size_t oob_byte_off; 1478 int step; 1479 1480 /* 1481 * Initialize all bits to 1 in case we don't have a buffer for the 1482 * payload or oob data in order to leave unspecified bits of data 1483 * to their initial state. 1484 */ 1485 if (!buf || !oob_required) 1486 memset(tmp_buf, 0xff, mtd->writesize + mtd->oobsize); 1487 1488 /* 1489 * First copy the metadata section (stored in oob buffer) at the 1490 * beginning of the page, as imposed by the GPMI layout. 1491 */ 1492 memcpy(tmp_buf, oob, nfc_geo->metadata_size); 1493 oob_bit_off = nfc_geo->metadata_size * 8; 1494 dst_bit_off = oob_bit_off; 1495 1496 /* Interleave payload data and ECC bits */ 1497 for (step = 0; step < nfc_geo->ecc_chunk_count; step++) { 1498 if (buf) 1499 gpmi_copy_bits(tmp_buf, dst_bit_off, 1500 buf, step * eccsize * 8, eccsize * 8); 1501 dst_bit_off += eccsize * 8; 1502 1503 /* Align last ECC block to align a byte boundary */ 1504 if (step == nfc_geo->ecc_chunk_count - 1 && 1505 (oob_bit_off + eccbits) % 8) 1506 eccbits += 8 - ((oob_bit_off + eccbits) % 8); 1507 1508 if (oob_required) 1509 gpmi_copy_bits(tmp_buf, dst_bit_off, 1510 oob, oob_bit_off, eccbits); 1511 1512 dst_bit_off += eccbits; 1513 oob_bit_off += eccbits; 1514 } 1515 1516 oob_byte_off = oob_bit_off / 8; 1517 1518 if (oob_required && oob_byte_off < mtd->oobsize) 1519 memcpy(tmp_buf + mtd->writesize + oob_byte_off, 1520 oob + oob_byte_off, mtd->oobsize - oob_byte_off); 1521 1522 /* 1523 * If required, swap the bad block marker and the first byte of the 1524 * metadata section, so that we don't modify the bad block marker. 1525 * 1526 * See the layout description for a detailed explanation on why this 1527 * is needed. 1528 */ 1529 if (this->swap_block_mark) 1530 swap(tmp_buf[0], tmp_buf[mtd->writesize]); 1531 1532 return nand_prog_page_op(chip, page, 0, tmp_buf, 1533 mtd->writesize + mtd->oobsize); 1534 } 1535 1536 static int gpmi_ecc_read_oob_raw(struct nand_chip *chip, int page) 1537 { 1538 return gpmi_ecc_read_page_raw(chip, NULL, 1, page); 1539 } 1540 1541 static int gpmi_ecc_write_oob_raw(struct nand_chip *chip, int page) 1542 { 1543 return gpmi_ecc_write_page_raw(chip, NULL, 1, page); 1544 } 1545 1546 static int gpmi_block_markbad(struct nand_chip *chip, loff_t ofs) 1547 { 1548 struct mtd_info *mtd = nand_to_mtd(chip); 1549 struct gpmi_nand_data *this = nand_get_controller_data(chip); 1550 int ret = 0; 1551 uint8_t *block_mark; 1552 int column, page, chipnr; 1553 1554 chipnr = (int)(ofs >> chip->chip_shift); 1555 nand_select_target(chip, chipnr); 1556 1557 column = !GPMI_IS_MX23(this) ? mtd->writesize : 0; 1558 1559 /* Write the block mark. */ 1560 block_mark = this->data_buffer_dma; 1561 block_mark[0] = 0; /* bad block marker */ 1562 1563 /* Shift to get page */ 1564 page = (int)(ofs >> chip->page_shift); 1565 1566 ret = nand_prog_page_op(chip, page, column, block_mark, 1); 1567 1568 nand_deselect_target(chip); 1569 1570 return ret; 1571 } 1572 1573 static int nand_boot_set_geometry(struct gpmi_nand_data *this) 1574 { 1575 struct boot_rom_geometry *geometry = &this->rom_geometry; 1576 1577 /* 1578 * Set the boot block stride size. 1579 * 1580 * In principle, we should be reading this from the OTP bits, since 1581 * that's where the ROM is going to get it. In fact, we don't have any 1582 * way to read the OTP bits, so we go with the default and hope for the 1583 * best. 1584 */ 1585 geometry->stride_size_in_pages = 64; 1586 1587 /* 1588 * Set the search area stride exponent. 1589 * 1590 * In principle, we should be reading this from the OTP bits, since 1591 * that's where the ROM is going to get it. In fact, we don't have any 1592 * way to read the OTP bits, so we go with the default and hope for the 1593 * best. 1594 */ 1595 geometry->search_area_stride_exponent = 2; 1596 return 0; 1597 } 1598 1599 static const char *fingerprint = "STMP"; 1600 static int mx23_check_transcription_stamp(struct gpmi_nand_data *this) 1601 { 1602 struct boot_rom_geometry *rom_geo = &this->rom_geometry; 1603 struct device *dev = this->dev; 1604 struct nand_chip *chip = &this->nand; 1605 unsigned int search_area_size_in_strides; 1606 unsigned int stride; 1607 unsigned int page; 1608 u8 *buffer = nand_get_data_buf(chip); 1609 int saved_chip_number; 1610 int found_an_ncb_fingerprint = false; 1611 1612 /* Compute the number of strides in a search area. */ 1613 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; 1614 1615 saved_chip_number = this->current_chip; 1616 nand_select_target(chip, 0); 1617 1618 /* 1619 * Loop through the first search area, looking for the NCB fingerprint. 1620 */ 1621 dev_dbg(dev, "Scanning for an NCB fingerprint...\n"); 1622 1623 for (stride = 0; stride < search_area_size_in_strides; stride++) { 1624 /* Compute the page addresses. */ 1625 page = stride * rom_geo->stride_size_in_pages; 1626 1627 dev_dbg(dev, "Looking for a fingerprint in page 0x%x\n", page); 1628 1629 /* 1630 * Read the NCB fingerprint. The fingerprint is four bytes long 1631 * and starts in the 12th byte of the page. 1632 */ 1633 nand_read_page_op(chip, page, 12, NULL, 0); 1634 chip->legacy.read_buf(chip, buffer, strlen(fingerprint)); 1635 1636 /* Look for the fingerprint. */ 1637 if (!memcmp(buffer, fingerprint, strlen(fingerprint))) { 1638 found_an_ncb_fingerprint = true; 1639 break; 1640 } 1641 1642 } 1643 1644 if (saved_chip_number >= 0) 1645 nand_select_target(chip, saved_chip_number); 1646 else 1647 nand_deselect_target(chip); 1648 1649 if (found_an_ncb_fingerprint) 1650 dev_dbg(dev, "\tFound a fingerprint\n"); 1651 else 1652 dev_dbg(dev, "\tNo fingerprint found\n"); 1653 return found_an_ncb_fingerprint; 1654 } 1655 1656 /* Writes a transcription stamp. */ 1657 static int mx23_write_transcription_stamp(struct gpmi_nand_data *this) 1658 { 1659 struct device *dev = this->dev; 1660 struct boot_rom_geometry *rom_geo = &this->rom_geometry; 1661 struct nand_chip *chip = &this->nand; 1662 struct mtd_info *mtd = nand_to_mtd(chip); 1663 unsigned int block_size_in_pages; 1664 unsigned int search_area_size_in_strides; 1665 unsigned int search_area_size_in_pages; 1666 unsigned int search_area_size_in_blocks; 1667 unsigned int block; 1668 unsigned int stride; 1669 unsigned int page; 1670 u8 *buffer = nand_get_data_buf(chip); 1671 int saved_chip_number; 1672 int status; 1673 1674 /* Compute the search area geometry. */ 1675 block_size_in_pages = mtd->erasesize / mtd->writesize; 1676 search_area_size_in_strides = 1 << rom_geo->search_area_stride_exponent; 1677 search_area_size_in_pages = search_area_size_in_strides * 1678 rom_geo->stride_size_in_pages; 1679 search_area_size_in_blocks = 1680 (search_area_size_in_pages + (block_size_in_pages - 1)) / 1681 block_size_in_pages; 1682 1683 dev_dbg(dev, "Search Area Geometry :\n"); 1684 dev_dbg(dev, "\tin Blocks : %u\n", search_area_size_in_blocks); 1685 dev_dbg(dev, "\tin Strides: %u\n", search_area_size_in_strides); 1686 dev_dbg(dev, "\tin Pages : %u\n", search_area_size_in_pages); 1687 1688 /* Select chip 0. */ 1689 saved_chip_number = this->current_chip; 1690 nand_select_target(chip, 0); 1691 1692 /* Loop over blocks in the first search area, erasing them. */ 1693 dev_dbg(dev, "Erasing the search area...\n"); 1694 1695 for (block = 0; block < search_area_size_in_blocks; block++) { 1696 /* Erase this block. */ 1697 dev_dbg(dev, "\tErasing block 0x%x\n", block); 1698 status = nand_erase_op(chip, block); 1699 if (status) 1700 dev_err(dev, "[%s] Erase failed.\n", __func__); 1701 } 1702 1703 /* Write the NCB fingerprint into the page buffer. */ 1704 memset(buffer, ~0, mtd->writesize); 1705 memcpy(buffer + 12, fingerprint, strlen(fingerprint)); 1706 1707 /* Loop through the first search area, writing NCB fingerprints. */ 1708 dev_dbg(dev, "Writing NCB fingerprints...\n"); 1709 for (stride = 0; stride < search_area_size_in_strides; stride++) { 1710 /* Compute the page addresses. */ 1711 page = stride * rom_geo->stride_size_in_pages; 1712 1713 /* Write the first page of the current stride. */ 1714 dev_dbg(dev, "Writing an NCB fingerprint in page 0x%x\n", page); 1715 1716 status = chip->ecc.write_page_raw(chip, buffer, 0, page); 1717 if (status) 1718 dev_err(dev, "[%s] Write failed.\n", __func__); 1719 } 1720 1721 /* Deselect chip 0. */ 1722 if (saved_chip_number >= 0) 1723 nand_select_target(chip, saved_chip_number); 1724 else 1725 nand_deselect_target(chip); 1726 1727 return 0; 1728 } 1729 1730 static int mx23_boot_init(struct gpmi_nand_data *this) 1731 { 1732 struct device *dev = this->dev; 1733 struct nand_chip *chip = &this->nand; 1734 struct mtd_info *mtd = nand_to_mtd(chip); 1735 unsigned int block_count; 1736 unsigned int block; 1737 int chipnr; 1738 int page; 1739 loff_t byte; 1740 uint8_t block_mark; 1741 int ret = 0; 1742 1743 /* 1744 * If control arrives here, we can't use block mark swapping, which 1745 * means we're forced to use transcription. First, scan for the 1746 * transcription stamp. If we find it, then we don't have to do 1747 * anything -- the block marks are already transcribed. 1748 */ 1749 if (mx23_check_transcription_stamp(this)) 1750 return 0; 1751 1752 /* 1753 * If control arrives here, we couldn't find a transcription stamp, so 1754 * so we presume the block marks are in the conventional location. 1755 */ 1756 dev_dbg(dev, "Transcribing bad block marks...\n"); 1757 1758 /* Compute the number of blocks in the entire medium. */ 1759 block_count = nanddev_eraseblocks_per_target(&chip->base); 1760 1761 /* 1762 * Loop over all the blocks in the medium, transcribing block marks as 1763 * we go. 1764 */ 1765 for (block = 0; block < block_count; block++) { 1766 /* 1767 * Compute the chip, page and byte addresses for this block's 1768 * conventional mark. 1769 */ 1770 chipnr = block >> (chip->chip_shift - chip->phys_erase_shift); 1771 page = block << (chip->phys_erase_shift - chip->page_shift); 1772 byte = block << chip->phys_erase_shift; 1773 1774 /* Send the command to read the conventional block mark. */ 1775 nand_select_target(chip, chipnr); 1776 nand_read_page_op(chip, page, mtd->writesize, NULL, 0); 1777 block_mark = chip->legacy.read_byte(chip); 1778 nand_deselect_target(chip); 1779 1780 /* 1781 * Check if the block is marked bad. If so, we need to mark it 1782 * again, but this time the result will be a mark in the 1783 * location where we transcribe block marks. 1784 */ 1785 if (block_mark != 0xff) { 1786 dev_dbg(dev, "Transcribing mark in block %u\n", block); 1787 ret = chip->legacy.block_markbad(chip, byte); 1788 if (ret) 1789 dev_err(dev, 1790 "Failed to mark block bad with ret %d\n", 1791 ret); 1792 } 1793 } 1794 1795 /* Write the stamp that indicates we've transcribed the block marks. */ 1796 mx23_write_transcription_stamp(this); 1797 return 0; 1798 } 1799 1800 static int nand_boot_init(struct gpmi_nand_data *this) 1801 { 1802 nand_boot_set_geometry(this); 1803 1804 /* This is ROM arch-specific initilization before the BBT scanning. */ 1805 if (GPMI_IS_MX23(this)) 1806 return mx23_boot_init(this); 1807 return 0; 1808 } 1809 1810 static int gpmi_set_geometry(struct gpmi_nand_data *this) 1811 { 1812 int ret; 1813 1814 /* Free the temporary DMA memory for reading ID. */ 1815 gpmi_free_dma_buffer(this); 1816 1817 /* Set up the NFC geometry which is used by BCH. */ 1818 ret = bch_set_geometry(this); 1819 if (ret) { 1820 dev_err(this->dev, "Error setting BCH geometry : %d\n", ret); 1821 return ret; 1822 } 1823 1824 /* Alloc the new DMA buffers according to the pagesize and oobsize */ 1825 return gpmi_alloc_dma_buffer(this); 1826 } 1827 1828 static int gpmi_init_last(struct gpmi_nand_data *this) 1829 { 1830 struct nand_chip *chip = &this->nand; 1831 struct mtd_info *mtd = nand_to_mtd(chip); 1832 struct nand_ecc_ctrl *ecc = &chip->ecc; 1833 struct bch_geometry *bch_geo = &this->bch_geometry; 1834 int ret; 1835 1836 /* Set up the medium geometry */ 1837 ret = gpmi_set_geometry(this); 1838 if (ret) 1839 return ret; 1840 1841 /* Init the nand_ecc_ctrl{} */ 1842 ecc->read_page = gpmi_ecc_read_page; 1843 ecc->write_page = gpmi_ecc_write_page; 1844 ecc->read_oob = gpmi_ecc_read_oob; 1845 ecc->write_oob = gpmi_ecc_write_oob; 1846 ecc->read_page_raw = gpmi_ecc_read_page_raw; 1847 ecc->write_page_raw = gpmi_ecc_write_page_raw; 1848 ecc->read_oob_raw = gpmi_ecc_read_oob_raw; 1849 ecc->write_oob_raw = gpmi_ecc_write_oob_raw; 1850 ecc->mode = NAND_ECC_HW; 1851 ecc->size = bch_geo->ecc_chunk_size; 1852 ecc->strength = bch_geo->ecc_strength; 1853 mtd_set_ooblayout(mtd, &gpmi_ooblayout_ops); 1854 1855 /* 1856 * We only enable the subpage read when: 1857 * (1) the chip is imx6, and 1858 * (2) the size of the ECC parity is byte aligned. 1859 */ 1860 if (GPMI_IS_MX6(this) && 1861 ((bch_geo->gf_len * bch_geo->ecc_strength) % 8) == 0) { 1862 ecc->read_subpage = gpmi_ecc_read_subpage; 1863 chip->options |= NAND_SUBPAGE_READ; 1864 } 1865 1866 return 0; 1867 } 1868 1869 static int gpmi_nand_attach_chip(struct nand_chip *chip) 1870 { 1871 struct gpmi_nand_data *this = nand_get_controller_data(chip); 1872 int ret; 1873 1874 if (chip->bbt_options & NAND_BBT_USE_FLASH) { 1875 chip->bbt_options |= NAND_BBT_NO_OOB; 1876 1877 if (of_property_read_bool(this->dev->of_node, 1878 "fsl,no-blockmark-swap")) 1879 this->swap_block_mark = false; 1880 } 1881 dev_dbg(this->dev, "Blockmark swapping %sabled\n", 1882 this->swap_block_mark ? "en" : "dis"); 1883 1884 ret = gpmi_init_last(this); 1885 if (ret) 1886 return ret; 1887 1888 chip->options |= NAND_SKIP_BBTSCAN; 1889 1890 return 0; 1891 } 1892 1893 static const struct nand_controller_ops gpmi_nand_controller_ops = { 1894 .attach_chip = gpmi_nand_attach_chip, 1895 .setup_data_interface = gpmi_setup_data_interface, 1896 }; 1897 1898 static int gpmi_nand_init(struct gpmi_nand_data *this) 1899 { 1900 struct nand_chip *chip = &this->nand; 1901 struct mtd_info *mtd = nand_to_mtd(chip); 1902 int ret; 1903 1904 /* init current chip */ 1905 this->current_chip = -1; 1906 1907 /* init the MTD data structures */ 1908 mtd->name = "gpmi-nand"; 1909 mtd->dev.parent = this->dev; 1910 1911 /* init the nand_chip{}, we don't support a 16-bit NAND Flash bus. */ 1912 nand_set_controller_data(chip, this); 1913 nand_set_flash_node(chip, this->pdev->dev.of_node); 1914 chip->legacy.select_chip = gpmi_select_chip; 1915 chip->legacy.cmd_ctrl = gpmi_cmd_ctrl; 1916 chip->legacy.dev_ready = gpmi_dev_ready; 1917 chip->legacy.read_byte = gpmi_read_byte; 1918 chip->legacy.read_buf = gpmi_read_buf; 1919 chip->legacy.write_buf = gpmi_write_buf; 1920 chip->badblock_pattern = &gpmi_bbt_descr; 1921 chip->legacy.block_markbad = gpmi_block_markbad; 1922 chip->options |= NAND_NO_SUBPAGE_WRITE; 1923 1924 /* Set up swap_block_mark, must be set before the gpmi_set_geometry() */ 1925 this->swap_block_mark = !GPMI_IS_MX23(this); 1926 1927 /* 1928 * Allocate a temporary DMA buffer for reading ID in the 1929 * nand_scan_ident(). 1930 */ 1931 this->bch_geometry.payload_size = 1024; 1932 this->bch_geometry.auxiliary_size = 128; 1933 ret = gpmi_alloc_dma_buffer(this); 1934 if (ret) 1935 goto err_out; 1936 1937 chip->legacy.dummy_controller.ops = &gpmi_nand_controller_ops; 1938 ret = nand_scan(chip, GPMI_IS_MX6(this) ? 2 : 1); 1939 if (ret) 1940 goto err_out; 1941 1942 ret = nand_boot_init(this); 1943 if (ret) 1944 goto err_nand_cleanup; 1945 ret = nand_create_bbt(chip); 1946 if (ret) 1947 goto err_nand_cleanup; 1948 1949 ret = mtd_device_register(mtd, NULL, 0); 1950 if (ret) 1951 goto err_nand_cleanup; 1952 return 0; 1953 1954 err_nand_cleanup: 1955 nand_cleanup(chip); 1956 err_out: 1957 gpmi_free_dma_buffer(this); 1958 return ret; 1959 } 1960 1961 static const struct of_device_id gpmi_nand_id_table[] = { 1962 { 1963 .compatible = "fsl,imx23-gpmi-nand", 1964 .data = &gpmi_devdata_imx23, 1965 }, { 1966 .compatible = "fsl,imx28-gpmi-nand", 1967 .data = &gpmi_devdata_imx28, 1968 }, { 1969 .compatible = "fsl,imx6q-gpmi-nand", 1970 .data = &gpmi_devdata_imx6q, 1971 }, { 1972 .compatible = "fsl,imx6sx-gpmi-nand", 1973 .data = &gpmi_devdata_imx6sx, 1974 }, { 1975 .compatible = "fsl,imx7d-gpmi-nand", 1976 .data = &gpmi_devdata_imx7d, 1977 }, {} 1978 }; 1979 MODULE_DEVICE_TABLE(of, gpmi_nand_id_table); 1980 1981 static int gpmi_nand_probe(struct platform_device *pdev) 1982 { 1983 struct gpmi_nand_data *this; 1984 const struct of_device_id *of_id; 1985 int ret; 1986 1987 this = devm_kzalloc(&pdev->dev, sizeof(*this), GFP_KERNEL); 1988 if (!this) 1989 return -ENOMEM; 1990 1991 of_id = of_match_device(gpmi_nand_id_table, &pdev->dev); 1992 if (of_id) { 1993 this->devdata = of_id->data; 1994 } else { 1995 dev_err(&pdev->dev, "Failed to find the right device id.\n"); 1996 return -ENODEV; 1997 } 1998 1999 platform_set_drvdata(pdev, this); 2000 this->pdev = pdev; 2001 this->dev = &pdev->dev; 2002 2003 ret = acquire_resources(this); 2004 if (ret) 2005 goto exit_acquire_resources; 2006 2007 ret = gpmi_init(this); 2008 if (ret) 2009 goto exit_nfc_init; 2010 2011 ret = gpmi_nand_init(this); 2012 if (ret) 2013 goto exit_nfc_init; 2014 2015 dev_info(this->dev, "driver registered.\n"); 2016 2017 return 0; 2018 2019 exit_nfc_init: 2020 release_resources(this); 2021 exit_acquire_resources: 2022 2023 return ret; 2024 } 2025 2026 static int gpmi_nand_remove(struct platform_device *pdev) 2027 { 2028 struct gpmi_nand_data *this = platform_get_drvdata(pdev); 2029 2030 nand_release(&this->nand); 2031 gpmi_free_dma_buffer(this); 2032 release_resources(this); 2033 return 0; 2034 } 2035 2036 #ifdef CONFIG_PM_SLEEP 2037 static int gpmi_pm_suspend(struct device *dev) 2038 { 2039 struct gpmi_nand_data *this = dev_get_drvdata(dev); 2040 2041 release_dma_channels(this); 2042 return 0; 2043 } 2044 2045 static int gpmi_pm_resume(struct device *dev) 2046 { 2047 struct gpmi_nand_data *this = dev_get_drvdata(dev); 2048 int ret; 2049 2050 ret = acquire_dma_channels(this); 2051 if (ret < 0) 2052 return ret; 2053 2054 /* re-init the GPMI registers */ 2055 ret = gpmi_init(this); 2056 if (ret) { 2057 dev_err(this->dev, "Error setting GPMI : %d\n", ret); 2058 return ret; 2059 } 2060 2061 /* re-init the BCH registers */ 2062 ret = bch_set_geometry(this); 2063 if (ret) { 2064 dev_err(this->dev, "Error setting BCH : %d\n", ret); 2065 return ret; 2066 } 2067 2068 return 0; 2069 } 2070 #endif /* CONFIG_PM_SLEEP */ 2071 2072 static const struct dev_pm_ops gpmi_pm_ops = { 2073 SET_SYSTEM_SLEEP_PM_OPS(gpmi_pm_suspend, gpmi_pm_resume) 2074 }; 2075 2076 static struct platform_driver gpmi_nand_driver = { 2077 .driver = { 2078 .name = "gpmi-nand", 2079 .pm = &gpmi_pm_ops, 2080 .of_match_table = gpmi_nand_id_table, 2081 }, 2082 .probe = gpmi_nand_probe, 2083 .remove = gpmi_nand_remove, 2084 }; 2085 module_platform_driver(gpmi_nand_driver); 2086 2087 MODULE_AUTHOR("Freescale Semiconductor, Inc."); 2088 MODULE_DESCRIPTION("i.MX GPMI NAND Flash Controller Driver"); 2089 MODULE_LICENSE("GPL"); 2090