1 /* 2 * MTD map driver for flash on the DC21285 (the StrongARM-110 companion chip) 3 * 4 * (C) 2000 Nicolas Pitre <nico@cam.org> 5 * 6 * This code is GPL 7 * 8 * $Id: dc21285.c,v 1.24 2005/11/07 11:14:26 gleixner Exp $ 9 */ 10 #include <linux/config.h> 11 #include <linux/module.h> 12 #include <linux/types.h> 13 #include <linux/kernel.h> 14 #include <linux/init.h> 15 #include <linux/delay.h> 16 #include <linux/slab.h> 17 18 #include <linux/mtd/mtd.h> 19 #include <linux/mtd/map.h> 20 #include <linux/mtd/partitions.h> 21 22 #include <asm/io.h> 23 #include <asm/hardware/dec21285.h> 24 #include <asm/mach-types.h> 25 26 27 static struct mtd_info *dc21285_mtd; 28 29 #ifdef CONFIG_ARCH_NETWINDER 30 /* 31 * This is really ugly, but it seams to be the only 32 * realiable way to do it, as the cpld state machine 33 * is unpredictible. So we have a 25us penalty per 34 * write access. 35 */ 36 static void nw_en_write(void) 37 { 38 extern spinlock_t gpio_lock; 39 unsigned long flags; 40 41 /* 42 * we want to write a bit pattern XXX1 to Xilinx to enable 43 * the write gate, which will be open for about the next 2ms. 44 */ 45 spin_lock_irqsave(&gpio_lock, flags); 46 cpld_modify(1, 1); 47 spin_unlock_irqrestore(&gpio_lock, flags); 48 49 /* 50 * let the ISA bus to catch on... 51 */ 52 udelay(25); 53 } 54 #else 55 #define nw_en_write() do { } while (0) 56 #endif 57 58 static map_word dc21285_read8(struct map_info *map, unsigned long ofs) 59 { 60 map_word val; 61 val.x[0] = *(uint8_t*)(map->virt + ofs); 62 return val; 63 } 64 65 static map_word dc21285_read16(struct map_info *map, unsigned long ofs) 66 { 67 map_word val; 68 val.x[0] = *(uint16_t*)(map->virt + ofs); 69 return val; 70 } 71 72 static map_word dc21285_read32(struct map_info *map, unsigned long ofs) 73 { 74 map_word val; 75 val.x[0] = *(uint32_t*)(map->virt + ofs); 76 return val; 77 } 78 79 static void dc21285_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len) 80 { 81 memcpy(to, (void*)(map->virt + from), len); 82 } 83 84 static void dc21285_write8(struct map_info *map, const map_word d, unsigned long adr) 85 { 86 if (machine_is_netwinder()) 87 nw_en_write(); 88 *CSR_ROMWRITEREG = adr & 3; 89 adr &= ~3; 90 *(uint8_t*)(map->virt + adr) = d.x[0]; 91 } 92 93 static void dc21285_write16(struct map_info *map, const map_word d, unsigned long adr) 94 { 95 if (machine_is_netwinder()) 96 nw_en_write(); 97 *CSR_ROMWRITEREG = adr & 3; 98 adr &= ~3; 99 *(uint16_t*)(map->virt + adr) = d.x[0]; 100 } 101 102 static void dc21285_write32(struct map_info *map, const map_word d, unsigned long adr) 103 { 104 if (machine_is_netwinder()) 105 nw_en_write(); 106 *(uint32_t*)(map->virt + adr) = d.x[0]; 107 } 108 109 static void dc21285_copy_to_32(struct map_info *map, unsigned long to, const void *from, ssize_t len) 110 { 111 while (len > 0) { 112 map_word d; 113 d.x[0] = *((uint32_t*)from); 114 dc21285_write32(map, d, to); 115 from += 4; 116 to += 4; 117 len -= 4; 118 } 119 } 120 121 static void dc21285_copy_to_16(struct map_info *map, unsigned long to, const void *from, ssize_t len) 122 { 123 while (len > 0) { 124 map_word d; 125 d.x[0] = *((uint16_t*)from); 126 dc21285_write16(map, d, to); 127 from += 2; 128 to += 2; 129 len -= 2; 130 } 131 } 132 133 static void dc21285_copy_to_8(struct map_info *map, unsigned long to, const void *from, ssize_t len) 134 { 135 map_word d; 136 d.x[0] = *((uint8_t*)from); 137 dc21285_write8(map, d, to); 138 from++; 139 to++; 140 len--; 141 } 142 143 static struct map_info dc21285_map = { 144 .name = "DC21285 flash", 145 .phys = NO_XIP, 146 .size = 16*1024*1024, 147 .copy_from = dc21285_copy_from, 148 }; 149 150 151 /* Partition stuff */ 152 #ifdef CONFIG_MTD_PARTITIONS 153 static struct mtd_partition *dc21285_parts; 154 static const char *probes[] = { "RedBoot", "cmdlinepart", NULL }; 155 #endif 156 157 static int __init init_dc21285(void) 158 { 159 160 #ifdef CONFIG_MTD_PARTITIONS 161 int nrparts; 162 #endif 163 164 /* Determine bankwidth */ 165 switch (*CSR_SA110_CNTL & (3<<14)) { 166 case SA110_CNTL_ROMWIDTH_8: 167 dc21285_map.bankwidth = 1; 168 dc21285_map.read = dc21285_read8; 169 dc21285_map.write = dc21285_write8; 170 dc21285_map.copy_to = dc21285_copy_to_8; 171 break; 172 case SA110_CNTL_ROMWIDTH_16: 173 dc21285_map.bankwidth = 2; 174 dc21285_map.read = dc21285_read16; 175 dc21285_map.write = dc21285_write16; 176 dc21285_map.copy_to = dc21285_copy_to_16; 177 break; 178 case SA110_CNTL_ROMWIDTH_32: 179 dc21285_map.bankwidth = 4; 180 dc21285_map.read = dc21285_read32; 181 dc21285_map.write = dc21285_write32; 182 dc21285_map.copy_to = dc21285_copy_to_32; 183 break; 184 default: 185 printk (KERN_ERR "DC21285 flash: undefined bankwidth\n"); 186 return -ENXIO; 187 } 188 printk (KERN_NOTICE "DC21285 flash support (%d-bit bankwidth)\n", 189 dc21285_map.bankwidth*8); 190 191 /* Let's map the flash area */ 192 dc21285_map.virt = ioremap(DC21285_FLASH, 16*1024*1024); 193 if (!dc21285_map.virt) { 194 printk("Failed to ioremap\n"); 195 return -EIO; 196 } 197 198 if (machine_is_ebsa285()) { 199 dc21285_mtd = do_map_probe("cfi_probe", &dc21285_map); 200 } else { 201 dc21285_mtd = do_map_probe("jedec_probe", &dc21285_map); 202 } 203 204 if (!dc21285_mtd) { 205 iounmap(dc21285_map.virt); 206 return -ENXIO; 207 } 208 209 dc21285_mtd->owner = THIS_MODULE; 210 211 #ifdef CONFIG_MTD_PARTITIONS 212 nrparts = parse_mtd_partitions(dc21285_mtd, probes, &dc21285_parts, 0); 213 if (nrparts > 0) 214 add_mtd_partitions(dc21285_mtd, dc21285_parts, nrparts); 215 else 216 #endif 217 add_mtd_device(dc21285_mtd); 218 219 if(machine_is_ebsa285()) { 220 /* 221 * Flash timing is determined with bits 19-16 of the 222 * CSR_SA110_CNTL. The value is the number of wait cycles, or 223 * 0 for 16 cycles (the default). Cycles are 20 ns. 224 * Here we use 7 for 140 ns flash chips. 225 */ 226 /* access time */ 227 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x000f0000) | (7 << 16)); 228 /* burst time */ 229 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x00f00000) | (7 << 20)); 230 /* tristate time */ 231 *CSR_SA110_CNTL = ((*CSR_SA110_CNTL & ~0x0f000000) | (7 << 24)); 232 } 233 234 return 0; 235 } 236 237 static void __exit cleanup_dc21285(void) 238 { 239 #ifdef CONFIG_MTD_PARTITIONS 240 if (dc21285_parts) { 241 del_mtd_partitions(dc21285_mtd); 242 kfree(dc21285_parts); 243 } else 244 #endif 245 del_mtd_device(dc21285_mtd); 246 247 map_destroy(dc21285_mtd); 248 iounmap(dc21285_map.virt); 249 } 250 251 module_init(init_dc21285); 252 module_exit(cleanup_dc21285); 253 254 255 MODULE_LICENSE("GPL"); 256 MODULE_AUTHOR("Nicolas Pitre <nico@cam.org>"); 257 MODULE_DESCRIPTION("MTD map driver for DC21285 boards"); 258