xref: /linux/drivers/mtd/devices/bcm47xxsflash.h (revision f3a8b6645dc2e60d11f20c1c23afd964ff4e55ae)
1 #ifndef __BCM47XXSFLASH_H
2 #define __BCM47XXSFLASH_H
3 
4 #include <linux/mtd/mtd.h>
5 
6 /* Used for ST flashes only. */
7 #define OPCODE_ST_WREN		0x0006		/* Write Enable */
8 #define OPCODE_ST_WRDIS		0x0004		/* Write Disable */
9 #define OPCODE_ST_RDSR		0x0105		/* Read Status Register */
10 #define OPCODE_ST_WRSR		0x0101		/* Write Status Register */
11 #define OPCODE_ST_READ		0x0303		/* Read Data Bytes */
12 #define OPCODE_ST_PP		0x0302		/* Page Program */
13 #define OPCODE_ST_SE		0x02d8		/* Sector Erase */
14 #define OPCODE_ST_BE		0x00c7		/* Bulk Erase */
15 #define OPCODE_ST_DP		0x00b9		/* Deep Power-down */
16 #define OPCODE_ST_RES		0x03ab		/* Read Electronic Signature */
17 #define OPCODE_ST_CSA		0x1000		/* Keep chip select asserted */
18 #define OPCODE_ST_SSE		0x0220		/* Sub-sector Erase */
19 
20 /* Used for Atmel flashes only. */
21 #define OPCODE_AT_READ				0x07e8
22 #define OPCODE_AT_PAGE_READ			0x07d2
23 #define OPCODE_AT_STATUS			0x01d7
24 #define OPCODE_AT_BUF1_WRITE			0x0384
25 #define OPCODE_AT_BUF2_WRITE			0x0387
26 #define OPCODE_AT_BUF1_ERASE_PROGRAM		0x0283
27 #define OPCODE_AT_BUF2_ERASE_PROGRAM		0x0286
28 #define OPCODE_AT_BUF1_PROGRAM			0x0288
29 #define OPCODE_AT_BUF2_PROGRAM			0x0289
30 #define OPCODE_AT_PAGE_ERASE			0x0281
31 #define OPCODE_AT_BLOCK_ERASE			0x0250
32 #define OPCODE_AT_BUF1_WRITE_ERASE_PROGRAM	0x0382
33 #define OPCODE_AT_BUF2_WRITE_ERASE_PROGRAM	0x0385
34 #define OPCODE_AT_BUF1_LOAD			0x0253
35 #define OPCODE_AT_BUF2_LOAD			0x0255
36 #define OPCODE_AT_BUF1_COMPARE			0x0260
37 #define OPCODE_AT_BUF2_COMPARE			0x0261
38 #define OPCODE_AT_BUF1_REPROGRAM		0x0258
39 #define OPCODE_AT_BUF2_REPROGRAM		0x0259
40 
41 /* Status register bits for ST flashes */
42 #define SR_ST_WIP		0x01		/* Write In Progress */
43 #define SR_ST_WEL		0x02		/* Write Enable Latch */
44 #define SR_ST_BP_MASK		0x1c		/* Block Protect */
45 #define SR_ST_BP_SHIFT		2
46 #define SR_ST_SRWD		0x80		/* Status Register Write Disable */
47 
48 /* Status register bits for Atmel flashes */
49 #define SR_AT_READY		0x80
50 #define SR_AT_MISMATCH		0x40
51 #define SR_AT_ID_MASK		0x38
52 #define SR_AT_ID_SHIFT		3
53 
54 struct bcma_drv_cc;
55 
56 enum bcm47xxsflash_type {
57 	BCM47XXSFLASH_TYPE_ATMEL,
58 	BCM47XXSFLASH_TYPE_ST,
59 };
60 
61 struct bcm47xxsflash {
62 	struct bcma_drv_cc *bcma_cc;
63 	int (*cc_read)(struct bcm47xxsflash *b47s, u16 offset);
64 	void (*cc_write)(struct bcm47xxsflash *b47s, u16 offset, u32 value);
65 
66 	enum bcm47xxsflash_type type;
67 
68 	void __iomem *window;
69 
70 	u32 blocksize;
71 	u16 numblocks;
72 	u32 size;
73 
74 	struct mtd_info mtd;
75 };
76 
77 #endif /* BCM47XXSFLASH */
78