1# drivers/mtd/chips/Kconfig 2# $Id: Kconfig,v 1.18 2005/11/07 11:14:22 gleixner Exp $ 3 4menu "RAM/ROM/Flash chip drivers" 5 depends on MTD!=n 6 7config MTD_CFI 8 tristate "Detect flash chips by Common Flash Interface (CFI) probe" 9 select MTD_GEN_PROBE 10 help 11 The Common Flash Interface specification was developed by Intel, 12 AMD and other flash manufactures that provides a universal method 13 for probing the capabilities of flash devices. If you wish to 14 support any device that is CFI-compliant, you need to enable this 15 option. Visit <http://www.amd.com/products/nvd/overview/cfi.html> 16 for more information on CFI. 17 18config MTD_JEDECPROBE 19 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips" 20 select MTD_GEN_PROBE 21 help 22 This option enables JEDEC-style probing of flash chips which are not 23 compatible with the Common Flash Interface, but will use the common 24 CFI-targetted flash drivers for any chips which are identified which 25 are in fact compatible in all but the probe method. This actually 26 covers most AMD/Fujitsu-compatible chips and also non-CFI 27 Intel chips. 28 29config MTD_GEN_PROBE 30 tristate 31 32config MTD_CFI_ADV_OPTIONS 33 bool "Flash chip driver advanced configuration options" 34 depends on MTD_GEN_PROBE 35 help 36 If you need to specify a specific endianness for access to flash 37 chips, or if you wish to reduce the size of the kernel by including 38 support for only specific arrangements of flash chips, say 'Y'. This 39 option does not directly affect the code, but will enable other 40 configuration options which allow you to do so. 41 42 If unsure, say 'N'. 43 44choice 45 prompt "Flash cmd/query data swapping" 46 depends on MTD_CFI_ADV_OPTIONS 47 default MTD_CFI_NOSWAP 48 49config MTD_CFI_NOSWAP 50 bool "NO" 51 ---help--- 52 This option defines the way in which the CPU attempts to arrange 53 data bits when writing the 'magic' commands to the chips. Saying 54 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't 55 enabled, means that the CPU will not do any swapping; the chips 56 are expected to be wired to the CPU in 'host-endian' form. 57 Specific arrangements are possible with the BIG_ENDIAN_BYTE and 58 LITTLE_ENDIAN_BYTE, if the bytes are reversed. 59 60 If you have a LART, on which the data (and address) lines were 61 connected in a fashion which ensured that the nets were as short 62 as possible, resulting in a bit-shuffling which seems utterly 63 random to the untrained eye, you need the LART_ENDIAN_BYTE option. 64 65 Yes, there really exists something sicker than PDP-endian :) 66 67config MTD_CFI_BE_BYTE_SWAP 68 bool "BIG_ENDIAN_BYTE" 69 70config MTD_CFI_LE_BYTE_SWAP 71 bool "LITTLE_ENDIAN_BYTE" 72 73endchoice 74 75config MTD_CFI_GEOMETRY 76 bool "Specific CFI Flash geometry selection" 77 depends on MTD_CFI_ADV_OPTIONS 78 help 79 This option does not affect the code directly, but will enable 80 some other configuration options which would allow you to reduce 81 the size of the kernel by including support for only certain 82 arrangements of CFI chips. If unsure, say 'N' and all options 83 which are supported by the current code will be enabled. 84 85config MTD_MAP_BANK_WIDTH_1 86 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY 87 default y 88 help 89 If you wish to support CFI devices on a physical bus which is 90 8 bits wide, say 'Y'. 91 92config MTD_MAP_BANK_WIDTH_2 93 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY 94 default y 95 help 96 If you wish to support CFI devices on a physical bus which is 97 16 bits wide, say 'Y'. 98 99config MTD_MAP_BANK_WIDTH_4 100 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY 101 default y 102 help 103 If you wish to support CFI devices on a physical bus which is 104 32 bits wide, say 'Y'. 105 106config MTD_MAP_BANK_WIDTH_8 107 bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY 108 default n 109 help 110 If you wish to support CFI devices on a physical bus which is 111 64 bits wide, say 'Y'. 112 113config MTD_MAP_BANK_WIDTH_16 114 bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY 115 default n 116 help 117 If you wish to support CFI devices on a physical bus which is 118 128 bits wide, say 'Y'. 119 120config MTD_MAP_BANK_WIDTH_32 121 bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY 122 default n 123 help 124 If you wish to support CFI devices on a physical bus which is 125 256 bits wide, say 'Y'. 126 127config MTD_CFI_I1 128 bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY 129 default y 130 help 131 If your flash chips are not interleaved - i.e. you only have one 132 flash chip addressed by each bus cycle, then say 'Y'. 133 134config MTD_CFI_I2 135 bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY 136 default y 137 help 138 If your flash chips are interleaved in pairs - i.e. you have two 139 flash chips addressed by each bus cycle, then say 'Y'. 140 141config MTD_CFI_I4 142 bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY 143 default n 144 help 145 If your flash chips are interleaved in fours - i.e. you have four 146 flash chips addressed by each bus cycle, then say 'Y'. 147 148config MTD_CFI_I8 149 bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY 150 default n 151 help 152 If your flash chips are interleaved in eights - i.e. you have eight 153 flash chips addressed by each bus cycle, then say 'Y'. 154 155config MTD_OTP 156 bool "Protection Registers aka one-time programmable (OTP) bits" 157 depends on MTD_CFI_ADV_OPTIONS 158 default n 159 help 160 This enables support for reading, writing and locking so called 161 "Protection Registers" present on some flash chips. 162 A subset of them are pre-programmed at the factory with a 163 unique set of values. The rest is user-programmable. 164 165 The user-programmable Protection Registers contain one-time 166 programmable (OTP) bits; when programmed, register bits cannot be 167 erased. Each Protection Register can be accessed multiple times to 168 program individual bits, as long as the register remains unlocked. 169 170 Each Protection Register has an associated Lock Register bit. When a 171 Lock Register bit is programmed, the associated Protection Register 172 can only be read; it can no longer be programmed. Additionally, 173 because the Lock Register bits themselves are OTP, when programmed, 174 Lock Register bits cannot be erased. Therefore, when a Protection 175 Register is locked, it cannot be unlocked. 176 177 This feature should therefore be used with extreme care. Any mistake 178 in the programming of OTP bits will waste them. 179 180config MTD_CFI_INTELEXT 181 tristate "Support for Intel/Sharp flash chips" 182 depends on MTD_GEN_PROBE 183 select MTD_CFI_UTIL 184 help 185 The Common Flash Interface defines a number of different command 186 sets which a CFI-compliant chip may claim to implement. This code 187 provides support for one of those command sets, used on Intel 188 StrataFlash and other parts. 189 190config MTD_CFI_AMDSTD 191 tristate "Support for AMD/Fujitsu flash chips" 192 depends on MTD_GEN_PROBE 193 select MTD_CFI_UTIL 194 help 195 The Common Flash Interface defines a number of different command 196 sets which a CFI-compliant chip may claim to implement. This code 197 provides support for one of those command sets, used on chips 198 including the AMD Am29LV320. 199 200config MTD_CFI_STAA 201 tristate "Support for ST (Advanced Architecture) flash chips" 202 depends on MTD_GEN_PROBE 203 select MTD_CFI_UTIL 204 help 205 The Common Flash Interface defines a number of different command 206 sets which a CFI-compliant chip may claim to implement. This code 207 provides support for one of those command sets. 208 209config MTD_CFI_UTIL 210 tristate 211 212config MTD_RAM 213 tristate "Support for RAM chips in bus mapping" 214 help 215 This option enables basic support for RAM chips accessed through 216 a bus mapping driver. 217 218config MTD_ROM 219 tristate "Support for ROM chips in bus mapping" 220 help 221 This option enables basic support for ROM chips accessed through 222 a bus mapping driver. 223 224config MTD_ABSENT 225 tristate "Support for absent chips in bus mapping" 226 help 227 This option enables support for a dummy probing driver used to 228 allocated placeholder MTD devices on systems that have socketed 229 or removable media. Use of this driver as a fallback chip probe 230 preserves the expected registration order of MTD device nodes on 231 the system regardless of media presence. Device nodes created 232 with this driver will return -ENODEV upon access. 233 234config MTD_OBSOLETE_CHIPS 235 bool "Older (theoretically obsoleted now) drivers for non-CFI chips" 236 help 237 This option does not enable any code directly, but will allow you to 238 select some other chip drivers which are now considered obsolete, 239 because the generic CONFIG_JEDECPROBE code above should now detect 240 the chips which are supported by these drivers, and allow the generic 241 CFI-compatible drivers to drive the chips. Say 'N' here unless you have 242 already tried the CONFIG_JEDECPROBE method and reported its failure 243 to the MTD mailing list at <linux-mtd@lists.infradead.org> 244 245config MTD_AMDSTD 246 tristate "AMD compatible flash chip support (non-CFI)" 247 depends on MTD_OBSOLETE_CHIPS && BROKEN 248 help 249 This option enables support for flash chips using AMD-compatible 250 commands, including some which are not CFI-compatible and hence 251 cannot be used with the CONFIG_MTD_CFI_AMDSTD option. 252 253 It also works on AMD compatible chips that do conform to CFI. 254 255config MTD_SHARP 256 tristate "pre-CFI Sharp chip support" 257 depends on MTD_OBSOLETE_CHIPS 258 help 259 This option enables support for flash chips using Sharp-compatible 260 commands, including some which are not CFI-compatible and hence 261 cannot be used with the CONFIG_MTD_CFI_INTELxxx options. 262 263config MTD_JEDEC 264 tristate "JEDEC device support" 265 depends on MTD_OBSOLETE_CHIPS && BROKEN 266 help 267 Enable older JEDEC flash interface devices for self 268 programming flash. It is commonly used in older AMD chips. It is 269 only called JEDEC because the JEDEC association 270 <http://www.jedec.org/> distributes the identification codes for the 271 chips. 272 273config MTD_XIP 274 bool "XIP aware MTD support" 275 depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && EXPERIMENTAL && ARCH_MTD_XIP 276 default y if XIP_KERNEL 277 help 278 This allows MTD support to work with flash memory which is also 279 used for XIP purposes. If you're not sure what this is all about 280 then say N. 281 282endmenu 283 284