xref: /linux/drivers/mmc/host/wbsd.h (revision 1c6a0718f0bfdab0d9b7da5f7b74f38a0058c03a)
1*1c6a0718SPierre Ossman /*
2*1c6a0718SPierre Ossman  *  linux/drivers/mmc/wbsd.h - Winbond W83L51xD SD/MMC driver
3*1c6a0718SPierre Ossman  *
4*1c6a0718SPierre Ossman  *  Copyright (C) 2004-2007 Pierre Ossman, All Rights Reserved.
5*1c6a0718SPierre Ossman  *
6*1c6a0718SPierre Ossman  * This program is free software; you can redistribute it and/or modify
7*1c6a0718SPierre Ossman  * it under the terms of the GNU General Public License as published by
8*1c6a0718SPierre Ossman  * the Free Software Foundation; either version 2 of the License, or (at
9*1c6a0718SPierre Ossman  * your option) any later version.
10*1c6a0718SPierre Ossman  */
11*1c6a0718SPierre Ossman 
12*1c6a0718SPierre Ossman #define LOCK_CODE		0xAA
13*1c6a0718SPierre Ossman 
14*1c6a0718SPierre Ossman #define WBSD_CONF_SWRST		0x02
15*1c6a0718SPierre Ossman #define WBSD_CONF_DEVICE	0x07
16*1c6a0718SPierre Ossman #define WBSD_CONF_ID_HI		0x20
17*1c6a0718SPierre Ossman #define WBSD_CONF_ID_LO		0x21
18*1c6a0718SPierre Ossman #define WBSD_CONF_POWER		0x22
19*1c6a0718SPierre Ossman #define WBSD_CONF_PME		0x23
20*1c6a0718SPierre Ossman #define WBSD_CONF_PMES		0x24
21*1c6a0718SPierre Ossman 
22*1c6a0718SPierre Ossman #define WBSD_CONF_ENABLE	0x30
23*1c6a0718SPierre Ossman #define WBSD_CONF_PORT_HI	0x60
24*1c6a0718SPierre Ossman #define WBSD_CONF_PORT_LO	0x61
25*1c6a0718SPierre Ossman #define WBSD_CONF_IRQ		0x70
26*1c6a0718SPierre Ossman #define WBSD_CONF_DRQ		0x74
27*1c6a0718SPierre Ossman 
28*1c6a0718SPierre Ossman #define WBSD_CONF_PINS		0xF0
29*1c6a0718SPierre Ossman 
30*1c6a0718SPierre Ossman #define DEVICE_SD		0x03
31*1c6a0718SPierre Ossman 
32*1c6a0718SPierre Ossman #define WBSD_PINS_DAT3_HI	0x20
33*1c6a0718SPierre Ossman #define WBSD_PINS_DAT3_OUT	0x10
34*1c6a0718SPierre Ossman #define WBSD_PINS_GP11_HI	0x04
35*1c6a0718SPierre Ossman #define WBSD_PINS_DETECT_GP11	0x02
36*1c6a0718SPierre Ossman #define WBSD_PINS_DETECT_DAT3	0x01
37*1c6a0718SPierre Ossman 
38*1c6a0718SPierre Ossman #define WBSD_CMDR		0x00
39*1c6a0718SPierre Ossman #define WBSD_DFR		0x01
40*1c6a0718SPierre Ossman #define WBSD_EIR		0x02
41*1c6a0718SPierre Ossman #define WBSD_ISR		0x03
42*1c6a0718SPierre Ossman #define WBSD_FSR		0x04
43*1c6a0718SPierre Ossman #define WBSD_IDXR		0x05
44*1c6a0718SPierre Ossman #define WBSD_DATAR		0x06
45*1c6a0718SPierre Ossman #define WBSD_CSR		0x07
46*1c6a0718SPierre Ossman 
47*1c6a0718SPierre Ossman #define WBSD_EINT_CARD		0x40
48*1c6a0718SPierre Ossman #define WBSD_EINT_FIFO_THRE	0x20
49*1c6a0718SPierre Ossman #define WBSD_EINT_CRC		0x10
50*1c6a0718SPierre Ossman #define WBSD_EINT_TIMEOUT	0x08
51*1c6a0718SPierre Ossman #define WBSD_EINT_PROGEND	0x04
52*1c6a0718SPierre Ossman #define WBSD_EINT_BUSYEND	0x02
53*1c6a0718SPierre Ossman #define WBSD_EINT_TC		0x01
54*1c6a0718SPierre Ossman 
55*1c6a0718SPierre Ossman #define WBSD_INT_PENDING	0x80
56*1c6a0718SPierre Ossman #define WBSD_INT_CARD		0x40
57*1c6a0718SPierre Ossman #define WBSD_INT_FIFO_THRE	0x20
58*1c6a0718SPierre Ossman #define WBSD_INT_CRC		0x10
59*1c6a0718SPierre Ossman #define WBSD_INT_TIMEOUT	0x08
60*1c6a0718SPierre Ossman #define WBSD_INT_PROGEND	0x04
61*1c6a0718SPierre Ossman #define WBSD_INT_BUSYEND	0x02
62*1c6a0718SPierre Ossman #define WBSD_INT_TC		0x01
63*1c6a0718SPierre Ossman 
64*1c6a0718SPierre Ossman #define WBSD_FIFO_EMPTY		0x80
65*1c6a0718SPierre Ossman #define WBSD_FIFO_FULL		0x40
66*1c6a0718SPierre Ossman #define WBSD_FIFO_EMTHRE	0x20
67*1c6a0718SPierre Ossman #define WBSD_FIFO_FUTHRE	0x10
68*1c6a0718SPierre Ossman #define WBSD_FIFO_SZMASK	0x0F
69*1c6a0718SPierre Ossman 
70*1c6a0718SPierre Ossman #define WBSD_MSLED		0x20
71*1c6a0718SPierre Ossman #define WBSD_POWER_N		0x10
72*1c6a0718SPierre Ossman #define WBSD_WRPT		0x04
73*1c6a0718SPierre Ossman #define WBSD_CARDPRESENT	0x01
74*1c6a0718SPierre Ossman 
75*1c6a0718SPierre Ossman #define WBSD_IDX_CLK		0x01
76*1c6a0718SPierre Ossman #define WBSD_IDX_PBSMSB		0x02
77*1c6a0718SPierre Ossman #define WBSD_IDX_TAAC		0x03
78*1c6a0718SPierre Ossman #define WBSD_IDX_NSAC		0x04
79*1c6a0718SPierre Ossman #define WBSD_IDX_PBSLSB		0x05
80*1c6a0718SPierre Ossman #define WBSD_IDX_SETUP		0x06
81*1c6a0718SPierre Ossman #define WBSD_IDX_DMA		0x07
82*1c6a0718SPierre Ossman #define WBSD_IDX_FIFOEN		0x08
83*1c6a0718SPierre Ossman #define WBSD_IDX_STATUS		0x10
84*1c6a0718SPierre Ossman #define WBSD_IDX_RSPLEN		0x1E
85*1c6a0718SPierre Ossman #define WBSD_IDX_RESP0		0x1F
86*1c6a0718SPierre Ossman #define WBSD_IDX_RESP1		0x20
87*1c6a0718SPierre Ossman #define WBSD_IDX_RESP2		0x21
88*1c6a0718SPierre Ossman #define WBSD_IDX_RESP3		0x22
89*1c6a0718SPierre Ossman #define WBSD_IDX_RESP4		0x23
90*1c6a0718SPierre Ossman #define WBSD_IDX_RESP5		0x24
91*1c6a0718SPierre Ossman #define WBSD_IDX_RESP6		0x25
92*1c6a0718SPierre Ossman #define WBSD_IDX_RESP7		0x26
93*1c6a0718SPierre Ossman #define WBSD_IDX_RESP8		0x27
94*1c6a0718SPierre Ossman #define WBSD_IDX_RESP9		0x28
95*1c6a0718SPierre Ossman #define WBSD_IDX_RESP10		0x29
96*1c6a0718SPierre Ossman #define WBSD_IDX_RESP11		0x2A
97*1c6a0718SPierre Ossman #define WBSD_IDX_RESP12		0x2B
98*1c6a0718SPierre Ossman #define WBSD_IDX_RESP13		0x2C
99*1c6a0718SPierre Ossman #define WBSD_IDX_RESP14		0x2D
100*1c6a0718SPierre Ossman #define WBSD_IDX_RESP15		0x2E
101*1c6a0718SPierre Ossman #define WBSD_IDX_RESP16		0x2F
102*1c6a0718SPierre Ossman #define WBSD_IDX_CRCSTATUS	0x30
103*1c6a0718SPierre Ossman #define WBSD_IDX_ISR		0x3F
104*1c6a0718SPierre Ossman 
105*1c6a0718SPierre Ossman #define WBSD_CLK_375K		0x00
106*1c6a0718SPierre Ossman #define WBSD_CLK_12M		0x01
107*1c6a0718SPierre Ossman #define WBSD_CLK_16M		0x02
108*1c6a0718SPierre Ossman #define WBSD_CLK_24M		0x03
109*1c6a0718SPierre Ossman 
110*1c6a0718SPierre Ossman #define WBSD_DATA_WIDTH		0x01
111*1c6a0718SPierre Ossman 
112*1c6a0718SPierre Ossman #define WBSD_DAT3_H		0x08
113*1c6a0718SPierre Ossman #define WBSD_FIFO_RESET		0x04
114*1c6a0718SPierre Ossman #define WBSD_SOFT_RESET		0x02
115*1c6a0718SPierre Ossman #define WBSD_INC_INDEX		0x01
116*1c6a0718SPierre Ossman 
117*1c6a0718SPierre Ossman #define WBSD_DMA_SINGLE		0x02
118*1c6a0718SPierre Ossman #define WBSD_DMA_ENABLE		0x01
119*1c6a0718SPierre Ossman 
120*1c6a0718SPierre Ossman #define WBSD_FIFOEN_EMPTY	0x20
121*1c6a0718SPierre Ossman #define WBSD_FIFOEN_FULL	0x10
122*1c6a0718SPierre Ossman #define WBSD_FIFO_THREMASK	0x0F
123*1c6a0718SPierre Ossman 
124*1c6a0718SPierre Ossman #define WBSD_BLOCK_READ		0x80
125*1c6a0718SPierre Ossman #define WBSD_BLOCK_WRITE	0x40
126*1c6a0718SPierre Ossman #define WBSD_BUSY		0x20
127*1c6a0718SPierre Ossman #define WBSD_CARDTRAFFIC	0x04
128*1c6a0718SPierre Ossman #define WBSD_SENDCMD		0x02
129*1c6a0718SPierre Ossman #define WBSD_RECVRES		0x01
130*1c6a0718SPierre Ossman 
131*1c6a0718SPierre Ossman #define WBSD_RSP_SHORT		0x00
132*1c6a0718SPierre Ossman #define WBSD_RSP_LONG		0x01
133*1c6a0718SPierre Ossman 
134*1c6a0718SPierre Ossman #define WBSD_CRC_MASK		0x1F
135*1c6a0718SPierre Ossman #define WBSD_CRC_OK		0x05 /* S010E (00101) */
136*1c6a0718SPierre Ossman #define WBSD_CRC_FAIL		0x0B /* S101E (01011) */
137*1c6a0718SPierre Ossman 
138*1c6a0718SPierre Ossman #define WBSD_DMA_SIZE		65536
139*1c6a0718SPierre Ossman 
140*1c6a0718SPierre Ossman struct wbsd_host
141*1c6a0718SPierre Ossman {
142*1c6a0718SPierre Ossman 	struct mmc_host*	mmc;		/* MMC structure */
143*1c6a0718SPierre Ossman 
144*1c6a0718SPierre Ossman 	spinlock_t		lock;		/* Mutex */
145*1c6a0718SPierre Ossman 
146*1c6a0718SPierre Ossman 	int			flags;		/* Driver states */
147*1c6a0718SPierre Ossman 
148*1c6a0718SPierre Ossman #define WBSD_FCARD_PRESENT	(1<<0)		/* Card is present */
149*1c6a0718SPierre Ossman #define WBSD_FIGNORE_DETECT	(1<<1)		/* Ignore card detection */
150*1c6a0718SPierre Ossman 
151*1c6a0718SPierre Ossman 	struct mmc_request*	mrq;		/* Current request */
152*1c6a0718SPierre Ossman 
153*1c6a0718SPierre Ossman 	u8			isr;		/* Accumulated ISR */
154*1c6a0718SPierre Ossman 
155*1c6a0718SPierre Ossman 	struct scatterlist*	cur_sg;		/* Current SG entry */
156*1c6a0718SPierre Ossman 	unsigned int		num_sg;		/* Number of entries left */
157*1c6a0718SPierre Ossman 
158*1c6a0718SPierre Ossman 	unsigned int		offset;		/* Offset into current entry */
159*1c6a0718SPierre Ossman 	unsigned int		remain;		/* Data left in curren entry */
160*1c6a0718SPierre Ossman 
161*1c6a0718SPierre Ossman 	char*			dma_buffer;	/* ISA DMA buffer */
162*1c6a0718SPierre Ossman 	dma_addr_t		dma_addr;	/* Physical address for same */
163*1c6a0718SPierre Ossman 
164*1c6a0718SPierre Ossman 	int			firsterr;	/* See fifo functions */
165*1c6a0718SPierre Ossman 
166*1c6a0718SPierre Ossman 	u8			clk;		/* Current clock speed */
167*1c6a0718SPierre Ossman 	unsigned char		bus_width;	/* Current bus width */
168*1c6a0718SPierre Ossman 
169*1c6a0718SPierre Ossman 	int			config;		/* Config port */
170*1c6a0718SPierre Ossman 	u8			unlock_code;	/* Code to unlock config */
171*1c6a0718SPierre Ossman 
172*1c6a0718SPierre Ossman 	int			chip_id;	/* ID of controller */
173*1c6a0718SPierre Ossman 
174*1c6a0718SPierre Ossman 	int			base;		/* I/O port base */
175*1c6a0718SPierre Ossman 	int			irq;		/* Interrupt */
176*1c6a0718SPierre Ossman 	int			dma;		/* DMA channel */
177*1c6a0718SPierre Ossman 
178*1c6a0718SPierre Ossman 	struct tasklet_struct	card_tasklet;	/* Tasklet structures */
179*1c6a0718SPierre Ossman 	struct tasklet_struct	fifo_tasklet;
180*1c6a0718SPierre Ossman 	struct tasklet_struct	crc_tasklet;
181*1c6a0718SPierre Ossman 	struct tasklet_struct	timeout_tasklet;
182*1c6a0718SPierre Ossman 	struct tasklet_struct	finish_tasklet;
183*1c6a0718SPierre Ossman 
184*1c6a0718SPierre Ossman 	struct timer_list	ignore_timer;	/* Ignore detection timer */
185*1c6a0718SPierre Ossman };
186