xref: /linux/drivers/mmc/host/tmio_mmc_core.c (revision ece68749f86230ebf691bd7ee27eb3118140b1f1)
1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Driver for the MMC / SD / SDIO IP found in:
4  *
5  * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6  *
7  * Copyright (C) 2015-19 Renesas Electronics Corporation
8  * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
9  * Copyright (C) 2017 Horms Solutions, Simon Horman
10  * Copyright (C) 2011 Guennadi Liakhovetski
11  * Copyright (C) 2007 Ian Molton
12  * Copyright (C) 2004 Ian Molton
13  *
14  * This driver draws mainly on scattered spec sheets, Reverse engineering
15  * of the toshiba e800  SD driver and some parts of the 2.4 ASIC3 driver (4 bit
16  * support). (Further 4 bit support from a later datasheet).
17  *
18  * TODO:
19  *   Investigate using a workqueue for PIO transfers
20  *   Eliminate FIXMEs
21  *   Better Power management
22  *   Handle MMC errors better
23  *   double buffer support
24  *
25  */
26 
27 #include <linux/delay.h>
28 #include <linux/device.h>
29 #include <linux/dma-mapping.h>
30 #include <linux/highmem.h>
31 #include <linux/interrupt.h>
32 #include <linux/io.h>
33 #include <linux/irq.h>
34 #include <linux/mfd/tmio.h>
35 #include <linux/mmc/card.h>
36 #include <linux/mmc/host.h>
37 #include <linux/mmc/mmc.h>
38 #include <linux/mmc/slot-gpio.h>
39 #include <linux/module.h>
40 #include <linux/pagemap.h>
41 #include <linux/platform_device.h>
42 #include <linux/pm_qos.h>
43 #include <linux/pm_runtime.h>
44 #include <linux/regulator/consumer.h>
45 #include <linux/mmc/sdio.h>
46 #include <linux/scatterlist.h>
47 #include <linux/sizes.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
50 
51 #include "tmio_mmc.h"
52 
53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 				      struct mmc_data *data)
55 {
56 	if (host->dma_ops)
57 		host->dma_ops->start(host, data);
58 }
59 
60 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host)
61 {
62 	if (host->dma_ops && host->dma_ops->end)
63 		host->dma_ops->end(host);
64 }
65 
66 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
67 {
68 	if (host->dma_ops)
69 		host->dma_ops->enable(host, enable);
70 }
71 
72 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
73 					struct tmio_mmc_data *pdata)
74 {
75 	if (host->dma_ops) {
76 		host->dma_ops->request(host, pdata);
77 	} else {
78 		host->chan_tx = NULL;
79 		host->chan_rx = NULL;
80 	}
81 }
82 
83 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
84 {
85 	if (host->dma_ops)
86 		host->dma_ops->release(host);
87 }
88 
89 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
90 {
91 	if (host->dma_ops)
92 		host->dma_ops->abort(host);
93 }
94 
95 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
96 {
97 	if (host->dma_ops)
98 		host->dma_ops->dataend(host);
99 }
100 
101 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
102 {
103 	host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
104 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
105 }
106 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
107 
108 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
109 {
110 	host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
111 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
112 }
113 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
114 
115 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
116 {
117 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
118 }
119 
120 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
121 {
122 	host->sg_len = data->sg_len;
123 	host->sg_ptr = data->sg;
124 	host->sg_orig = data->sg;
125 	host->sg_off = 0;
126 }
127 
128 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
129 {
130 	host->sg_ptr = sg_next(host->sg_ptr);
131 	host->sg_off = 0;
132 	return --host->sg_len;
133 }
134 
135 #define CMDREQ_TIMEOUT	5000
136 
137 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
138 {
139 	struct tmio_mmc_host *host = mmc_priv(mmc);
140 
141 	if (enable && !host->sdio_irq_enabled) {
142 		u16 sdio_status;
143 
144 		/* Keep device active while SDIO irq is enabled */
145 		pm_runtime_get_sync(mmc_dev(mmc));
146 
147 		host->sdio_irq_enabled = true;
148 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
149 
150 		/* Clear obsolete interrupts before enabling */
151 		sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
152 		if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
153 			sdio_status |= TMIO_SDIO_SETBITS_MASK;
154 		sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
155 
156 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 	} else if (!enable && host->sdio_irq_enabled) {
158 		host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
159 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
160 
161 		host->sdio_irq_enabled = false;
162 		pm_runtime_mark_last_busy(mmc_dev(mmc));
163 		pm_runtime_put_autosuspend(mmc_dev(mmc));
164 	}
165 }
166 
167 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
168 				   unsigned char bus_width)
169 {
170 	u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
171 				& ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
172 
173 	/* reg now applies to MMC_BUS_WIDTH_4 */
174 	if (bus_width == MMC_BUS_WIDTH_1)
175 		reg |= CARD_OPT_WIDTH;
176 	else if (bus_width == MMC_BUS_WIDTH_8)
177 		reg |= CARD_OPT_WIDTH8;
178 
179 	sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
180 }
181 
182 static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve)
183 {
184 	u16 card_opt, clk_ctrl, sdif_mode;
185 
186 	if (preserve) {
187 		card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
188 		clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL);
189 		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
190 			sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE);
191 	}
192 
193 	/* FIXME - should we set stop clock reg here */
194 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
195 	usleep_range(10000, 11000);
196 	sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
197 	usleep_range(10000, 11000);
198 
199 	tmio_mmc_abort_dma(host);
200 
201 	if (host->reset)
202 		host->reset(host, preserve);
203 
204 	sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all);
205 	host->sdcard_irq_mask = host->sdcard_irq_mask_all;
206 
207 	if (host->native_hotplug)
208 		tmio_mmc_enable_mmc_irqs(host,
209 				TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
210 
211 	tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width);
212 
213 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
214 		sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
215 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
216 	}
217 
218 	if (preserve) {
219 		sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt);
220 		sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl);
221 		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
222 			sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode);
223 	}
224 
225 	if (host->mmc->card)
226 		mmc_retune_needed(host->mmc);
227 }
228 
229 static void tmio_mmc_reset_work(struct work_struct *work)
230 {
231 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
232 						  delayed_reset_work.work);
233 	struct mmc_request *mrq;
234 	unsigned long flags;
235 
236 	spin_lock_irqsave(&host->lock, flags);
237 	mrq = host->mrq;
238 
239 	/*
240 	 * is request already finished? Since we use a non-blocking
241 	 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
242 	 * us, so, have to check for IS_ERR(host->mrq)
243 	 */
244 	if (IS_ERR_OR_NULL(mrq) ||
245 	    time_is_after_jiffies(host->last_req_ts +
246 				  msecs_to_jiffies(CMDREQ_TIMEOUT))) {
247 		spin_unlock_irqrestore(&host->lock, flags);
248 		return;
249 	}
250 
251 	dev_warn(&host->pdev->dev,
252 		 "timeout waiting for hardware interrupt (CMD%u)\n",
253 		 mrq->cmd->opcode);
254 
255 	if (host->data)
256 		host->data->error = -ETIMEDOUT;
257 	else if (host->cmd)
258 		host->cmd->error = -ETIMEDOUT;
259 	else
260 		mrq->cmd->error = -ETIMEDOUT;
261 
262 	host->cmd = NULL;
263 	host->data = NULL;
264 
265 	spin_unlock_irqrestore(&host->lock, flags);
266 
267 	tmio_mmc_reset(host, true);
268 
269 	/* Ready for new calls */
270 	host->mrq = NULL;
271 	mmc_request_done(host->mmc, mrq);
272 }
273 
274 /* These are the bitmasks the tmio chip requires to implement the MMC response
275  * types. Note that R1 and R6 are the same in this scheme. */
276 #define APP_CMD        0x0040
277 #define RESP_NONE      0x0300
278 #define RESP_R1        0x0400
279 #define RESP_R1B       0x0500
280 #define RESP_R2        0x0600
281 #define RESP_R3        0x0700
282 #define DATA_PRESENT   0x0800
283 #define TRANSFER_READ  0x1000
284 #define TRANSFER_MULTI 0x2000
285 #define SECURITY_CMD   0x4000
286 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
287 
288 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
289 				  struct mmc_command *cmd)
290 {
291 	struct mmc_data *data = host->data;
292 	int c = cmd->opcode;
293 
294 	switch (mmc_resp_type(cmd)) {
295 	case MMC_RSP_NONE: c |= RESP_NONE; break;
296 	case MMC_RSP_R1:
297 	case MMC_RSP_R1_NO_CRC:
298 			   c |= RESP_R1;   break;
299 	case MMC_RSP_R1B:  c |= RESP_R1B;  break;
300 	case MMC_RSP_R2:   c |= RESP_R2;   break;
301 	case MMC_RSP_R3:   c |= RESP_R3;   break;
302 	default:
303 		pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
304 		return -EINVAL;
305 	}
306 
307 	host->cmd = cmd;
308 
309 /* FIXME - this seems to be ok commented out but the spec suggest this bit
310  *         should be set when issuing app commands.
311  *	if(cmd->flags & MMC_FLAG_ACMD)
312  *		c |= APP_CMD;
313  */
314 	if (data) {
315 		c |= DATA_PRESENT;
316 		if (data->blocks > 1) {
317 			sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
318 			c |= TRANSFER_MULTI;
319 
320 			/*
321 			 * Disable auto CMD12 at IO_RW_EXTENDED and
322 			 * SET_BLOCK_COUNT when doing multiple block transfer
323 			 */
324 			if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
325 			    (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
326 				c |= NO_CMD12_ISSUE;
327 		}
328 		if (data->flags & MMC_DATA_READ)
329 			c |= TRANSFER_READ;
330 	}
331 
332 	tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD);
333 
334 	/* Fire off the command */
335 	sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
336 	sd_ctrl_write16(host, CTL_SD_CMD, c);
337 
338 	return 0;
339 }
340 
341 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
342 				   unsigned short *buf,
343 				   unsigned int count)
344 {
345 	int is_read = host->data->flags & MMC_DATA_READ;
346 	u8  *buf8;
347 
348 	/*
349 	 * Transfer the data
350 	 */
351 	if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
352 		u32 data = 0;
353 		u32 *buf32 = (u32 *)buf;
354 
355 		if (is_read)
356 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
357 					   count >> 2);
358 		else
359 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
360 					    count >> 2);
361 
362 		/* if count was multiple of 4 */
363 		if (!(count & 0x3))
364 			return;
365 
366 		buf32 += count >> 2;
367 		count %= 4;
368 
369 		if (is_read) {
370 			sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
371 			memcpy(buf32, &data, count);
372 		} else {
373 			memcpy(&data, buf32, count);
374 			sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
375 		}
376 
377 		return;
378 	}
379 
380 	if (is_read)
381 		sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
382 	else
383 		sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
384 
385 	/* if count was even number */
386 	if (!(count & 0x1))
387 		return;
388 
389 	/* if count was odd number */
390 	buf8 = (u8 *)(buf + (count >> 1));
391 
392 	/*
393 	 * FIXME
394 	 *
395 	 * driver and this function are assuming that
396 	 * it is used as little endian
397 	 */
398 	if (is_read)
399 		*buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
400 	else
401 		sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
402 }
403 
404 /*
405  * This chip always returns (at least?) as much data as you ask for.
406  * I'm unsure what happens if you ask for less than a block. This should be
407  * looked into to ensure that a funny length read doesn't hose the controller.
408  */
409 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
410 {
411 	struct mmc_data *data = host->data;
412 	void *sg_virt;
413 	unsigned short *buf;
414 	unsigned int count;
415 
416 	if (host->dma_on) {
417 		pr_err("PIO IRQ in DMA mode!\n");
418 		return;
419 	} else if (!data) {
420 		pr_debug("Spurious PIO IRQ\n");
421 		return;
422 	}
423 
424 	sg_virt = kmap_local_page(sg_page(host->sg_ptr));
425 	buf = (unsigned short *)(sg_virt + host->sg_ptr->offset + host->sg_off);
426 
427 	count = host->sg_ptr->length - host->sg_off;
428 	if (count > data->blksz)
429 		count = data->blksz;
430 
431 	pr_debug("count: %08x offset: %08x flags %08x\n",
432 		 count, host->sg_off, data->flags);
433 
434 	/* Transfer the data */
435 	tmio_mmc_transfer_data(host, buf, count);
436 
437 	host->sg_off += count;
438 
439 	kunmap_local(sg_virt);
440 
441 	if (host->sg_off == host->sg_ptr->length)
442 		tmio_mmc_next_sg(host);
443 }
444 
445 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
446 {
447 	if (host->sg_ptr == &host->bounce_sg) {
448 		void *sg_virt = kmap_local_page(sg_page(host->sg_orig));
449 
450 		memcpy(sg_virt + host->sg_orig->offset, host->bounce_buf,
451 		       host->bounce_sg.length);
452 		kunmap_local(sg_virt);
453 	}
454 }
455 
456 /* needs to be called with host->lock held */
457 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
458 {
459 	struct mmc_data *data = host->data;
460 	struct mmc_command *stop;
461 
462 	host->data = NULL;
463 
464 	if (!data) {
465 		dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
466 		return;
467 	}
468 	stop = data->stop;
469 
470 	/* FIXME - return correct transfer count on errors */
471 	if (!data->error)
472 		data->bytes_xfered = data->blocks * data->blksz;
473 	else
474 		data->bytes_xfered = 0;
475 
476 	pr_debug("Completed data request\n");
477 
478 	/*
479 	 * FIXME: other drivers allow an optional stop command of any given type
480 	 *        which we dont do, as the chip can auto generate them.
481 	 *        Perhaps we can be smarter about when to use auto CMD12 and
482 	 *        only issue the auto request when we know this is the desired
483 	 *        stop command, allowing fallback to the stop command the
484 	 *        upper layers expect. For now, we do what works.
485 	 */
486 
487 	if (data->flags & MMC_DATA_READ) {
488 		if (host->dma_on)
489 			tmio_mmc_check_bounce_buffer(host);
490 		dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
491 			host->mrq);
492 	} else {
493 		dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
494 			host->mrq);
495 	}
496 
497 	if (stop && !host->mrq->sbc) {
498 		if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
499 			dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
500 				stop->opcode, stop->arg);
501 
502 		/* fill in response from auto CMD12 */
503 		stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
504 
505 		sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
506 	}
507 
508 	schedule_work(&host->done);
509 }
510 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
511 
512 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
513 {
514 	struct mmc_data *data;
515 
516 	spin_lock(&host->lock);
517 	data = host->data;
518 
519 	if (!data)
520 		goto out;
521 
522 	if (stat & TMIO_STAT_DATATIMEOUT)
523 		data->error = -ETIMEDOUT;
524 	else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
525 		 stat & TMIO_STAT_TXUNDERRUN)
526 		data->error = -EILSEQ;
527 	if (host->dma_on && (data->flags & MMC_DATA_WRITE)) {
528 		u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
529 		bool done = false;
530 
531 		/*
532 		 * Has all data been written out yet? Testing on SuperH showed,
533 		 * that in most cases the first interrupt comes already with the
534 		 * BUSY status bit clear, but on some operations, like mount or
535 		 * in the beginning of a write / sync / umount, there is one
536 		 * DATAEND interrupt with the BUSY bit set, in this cases
537 		 * waiting for one more interrupt fixes the problem.
538 		 */
539 		if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
540 			if (status & TMIO_STAT_SCLKDIVEN)
541 				done = true;
542 		} else {
543 			if (!(status & TMIO_STAT_CMD_BUSY))
544 				done = true;
545 		}
546 
547 		if (done) {
548 			tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
549 			tmio_mmc_dataend_dma(host);
550 		}
551 	} else if (host->dma_on && (data->flags & MMC_DATA_READ)) {
552 		tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
553 		tmio_mmc_dataend_dma(host);
554 	} else {
555 		tmio_mmc_do_data_irq(host);
556 		tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
557 	}
558 out:
559 	spin_unlock(&host->lock);
560 }
561 
562 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
563 {
564 	struct mmc_command *cmd = host->cmd;
565 	int i, addr;
566 
567 	spin_lock(&host->lock);
568 
569 	if (!host->cmd) {
570 		pr_debug("Spurious CMD irq\n");
571 		goto out;
572 	}
573 
574 	/* This controller is sicker than the PXA one. Not only do we need to
575 	 * drop the top 8 bits of the first response word, we also need to
576 	 * modify the order of the response for short response command types.
577 	 */
578 
579 	for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
580 		cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
581 
582 	if (cmd->flags &  MMC_RSP_136) {
583 		cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
584 		cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
585 		cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
586 		cmd->resp[3] <<= 8;
587 	} else if (cmd->flags & MMC_RSP_R3) {
588 		cmd->resp[0] = cmd->resp[3];
589 	}
590 
591 	if (stat & TMIO_STAT_CMDTIMEOUT)
592 		cmd->error = -ETIMEDOUT;
593 	else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
594 		 stat & TMIO_STAT_STOPBIT_ERR ||
595 		 stat & TMIO_STAT_CMD_IDX_ERR)
596 		cmd->error = -EILSEQ;
597 
598 	/* If there is data to handle we enable data IRQs here, and
599 	 * we will ultimatley finish the request in the data_end handler.
600 	 * If theres no data or we encountered an error, finish now.
601 	 */
602 	if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
603 		if (host->data->flags & MMC_DATA_READ) {
604 			if (!host->dma_on) {
605 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
606 			} else {
607 				tmio_mmc_disable_mmc_irqs(host,
608 							  TMIO_MASK_READOP);
609 				tasklet_schedule(&host->dma_issue);
610 			}
611 		} else {
612 			if (!host->dma_on) {
613 				tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
614 			} else {
615 				tmio_mmc_disable_mmc_irqs(host,
616 							  TMIO_MASK_WRITEOP);
617 				tasklet_schedule(&host->dma_issue);
618 			}
619 		}
620 	} else {
621 		schedule_work(&host->done);
622 	}
623 
624 out:
625 	spin_unlock(&host->lock);
626 }
627 
628 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
629 				       int ireg, int status)
630 {
631 	struct mmc_host *mmc = host->mmc;
632 
633 	/* Card insert / remove attempts */
634 	if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
635 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
636 			TMIO_STAT_CARD_REMOVE);
637 		if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
638 		     ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
639 		    !work_pending(&mmc->detect.work))
640 			mmc_detect_change(host->mmc, msecs_to_jiffies(100));
641 		return true;
642 	}
643 
644 	return false;
645 }
646 
647 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
648 				  int status)
649 {
650 	/* Command completion */
651 	if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
652 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
653 				      TMIO_STAT_CMDTIMEOUT);
654 		tmio_mmc_cmd_irq(host, status);
655 		return true;
656 	}
657 
658 	/* Data transfer */
659 	if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
660 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
661 		tmio_mmc_pio_irq(host);
662 		return true;
663 	}
664 
665 	/* Data transfer completion */
666 	if (ireg & TMIO_STAT_DATAEND) {
667 		tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
668 		tmio_mmc_data_irq(host, status);
669 		return true;
670 	}
671 
672 	if (host->dma_ops && host->dma_ops->dma_irq && host->dma_ops->dma_irq(host))
673 		return true;
674 
675 	return false;
676 }
677 
678 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
679 {
680 	struct mmc_host *mmc = host->mmc;
681 	struct tmio_mmc_data *pdata = host->pdata;
682 	unsigned int ireg, status;
683 	unsigned int sdio_status;
684 
685 	if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
686 		return false;
687 
688 	status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
689 	ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
690 
691 	sdio_status = status & ~TMIO_SDIO_MASK_ALL;
692 	if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
693 		sdio_status |= TMIO_SDIO_SETBITS_MASK;
694 
695 	sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
696 
697 	if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
698 		mmc_signal_sdio_irq(mmc);
699 
700 	return ireg;
701 }
702 
703 irqreturn_t tmio_mmc_irq(int irq, void *devid)
704 {
705 	struct tmio_mmc_host *host = devid;
706 	unsigned int ireg, status;
707 
708 	status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
709 	ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
710 
711 	/* Clear the status except the interrupt status */
712 	sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
713 
714 	if (__tmio_mmc_card_detect_irq(host, ireg, status))
715 		return IRQ_HANDLED;
716 	if (__tmio_mmc_sdcard_irq(host, ireg, status))
717 		return IRQ_HANDLED;
718 
719 	if (__tmio_mmc_sdio_irq(host))
720 		return IRQ_HANDLED;
721 
722 	return IRQ_NONE;
723 }
724 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
725 
726 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
727 			       struct mmc_data *data)
728 {
729 	struct tmio_mmc_data *pdata = host->pdata;
730 
731 	pr_debug("setup data transfer: blocksize %08x  nr_blocks %d\n",
732 		 data->blksz, data->blocks);
733 
734 	/* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
735 	if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
736 	    host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
737 		int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
738 
739 		if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
740 			pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
741 			       mmc_hostname(host->mmc), data->blksz);
742 			return -EINVAL;
743 		}
744 	}
745 
746 	tmio_mmc_init_sg(host, data);
747 	host->data = data;
748 	host->dma_on = false;
749 
750 	/* Set transfer length / blocksize */
751 	sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
752 	if (host->mmc->max_blk_count >= SZ_64K)
753 		sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks);
754 	else
755 		sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
756 
757 	tmio_mmc_start_dma(host, data);
758 
759 	return 0;
760 }
761 
762 static void tmio_process_mrq(struct tmio_mmc_host *host,
763 			     struct mmc_request *mrq)
764 {
765 	struct mmc_command *cmd;
766 	int ret;
767 
768 	if (mrq->sbc && host->cmd != mrq->sbc) {
769 		cmd = mrq->sbc;
770 	} else {
771 		cmd = mrq->cmd;
772 		if (mrq->data) {
773 			ret = tmio_mmc_start_data(host, mrq->data);
774 			if (ret)
775 				goto fail;
776 		}
777 	}
778 
779 	ret = tmio_mmc_start_command(host, cmd);
780 	if (ret)
781 		goto fail;
782 
783 	schedule_delayed_work(&host->delayed_reset_work,
784 			      msecs_to_jiffies(CMDREQ_TIMEOUT));
785 	return;
786 
787 fail:
788 	host->mrq = NULL;
789 	mrq->cmd->error = ret;
790 	mmc_request_done(host->mmc, mrq);
791 }
792 
793 /* Process requests from the MMC layer */
794 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
795 {
796 	struct tmio_mmc_host *host = mmc_priv(mmc);
797 	unsigned long flags;
798 
799 	spin_lock_irqsave(&host->lock, flags);
800 
801 	if (host->mrq) {
802 		pr_debug("request not null\n");
803 		if (IS_ERR(host->mrq)) {
804 			spin_unlock_irqrestore(&host->lock, flags);
805 			mrq->cmd->error = -EAGAIN;
806 			mmc_request_done(mmc, mrq);
807 			return;
808 		}
809 	}
810 
811 	host->last_req_ts = jiffies;
812 	wmb();
813 	host->mrq = mrq;
814 
815 	spin_unlock_irqrestore(&host->lock, flags);
816 
817 	tmio_process_mrq(host, mrq);
818 }
819 
820 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
821 {
822 	struct mmc_request *mrq;
823 	unsigned long flags;
824 
825 	spin_lock_irqsave(&host->lock, flags);
826 
827 	tmio_mmc_end_dma(host);
828 
829 	mrq = host->mrq;
830 	if (IS_ERR_OR_NULL(mrq)) {
831 		spin_unlock_irqrestore(&host->lock, flags);
832 		return;
833 	}
834 
835 	/* If not SET_BLOCK_COUNT, clear old data */
836 	if (host->cmd != mrq->sbc) {
837 		host->cmd = NULL;
838 		host->data = NULL;
839 		host->mrq = NULL;
840 	}
841 
842 	cancel_delayed_work(&host->delayed_reset_work);
843 
844 	spin_unlock_irqrestore(&host->lock, flags);
845 
846 	if (mrq->cmd->error || (mrq->data && mrq->data->error)) {
847 		tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */
848 		tmio_mmc_abort_dma(host);
849 	}
850 
851 	/* Error means retune, but executed command was still successful */
852 	if (host->check_retune && host->check_retune(host, mrq))
853 		mmc_retune_needed(host->mmc);
854 
855 	/* If SET_BLOCK_COUNT, continue with main command */
856 	if (host->mrq && !mrq->cmd->error) {
857 		tmio_process_mrq(host, mrq);
858 		return;
859 	}
860 
861 	if (host->fixup_request)
862 		host->fixup_request(host, mrq);
863 
864 	mmc_request_done(host->mmc, mrq);
865 }
866 
867 static void tmio_mmc_done_work(struct work_struct *work)
868 {
869 	struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
870 						  done);
871 	tmio_mmc_finish_request(host);
872 }
873 
874 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
875 {
876 	struct mmc_host *mmc = host->mmc;
877 	int ret = 0;
878 
879 	/* .set_ios() is returning void, so, no chance to report an error */
880 
881 	if (host->set_pwr)
882 		host->set_pwr(host->pdev, 1);
883 
884 	if (!IS_ERR(mmc->supply.vmmc)) {
885 		ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
886 		/*
887 		 * Attention: empiric value. With a b43 WiFi SDIO card this
888 		 * delay proved necessary for reliable card-insertion probing.
889 		 * 100us were not enough. Is this the same 140us delay, as in
890 		 * tmio_mmc_set_ios()?
891 		 */
892 		usleep_range(200, 300);
893 	}
894 	/*
895 	 * It seems, VccQ should be switched on after Vcc, this is also what the
896 	 * omap_hsmmc.c driver does.
897 	 */
898 	if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
899 		ret = regulator_enable(mmc->supply.vqmmc);
900 		usleep_range(200, 300);
901 	}
902 
903 	if (ret < 0)
904 		dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
905 			ret);
906 }
907 
908 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
909 {
910 	struct mmc_host *mmc = host->mmc;
911 
912 	if (!IS_ERR(mmc->supply.vqmmc))
913 		regulator_disable(mmc->supply.vqmmc);
914 
915 	if (!IS_ERR(mmc->supply.vmmc))
916 		mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
917 
918 	if (host->set_pwr)
919 		host->set_pwr(host->pdev, 0);
920 }
921 
922 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host)
923 {
924 	u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT);
925 
926 	val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT;
927 	return 1 << (13 + val);
928 }
929 
930 static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host)
931 {
932 	unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max;
933 
934 	host->mmc->max_busy_timeout = host->get_timeout_cycles(host) /
935 				      (clk_rate / MSEC_PER_SEC);
936 }
937 
938 /* Set MMC clock / power.
939  * Note: This controller uses a simple divider scheme therefore it cannot
940  * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
941  * MMC wont run that fast, it has to be clocked at 12MHz which is the next
942  * slowest setting.
943  */
944 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
945 {
946 	struct tmio_mmc_host *host = mmc_priv(mmc);
947 	struct device *dev = &host->pdev->dev;
948 	unsigned long flags;
949 
950 	mutex_lock(&host->ios_lock);
951 
952 	spin_lock_irqsave(&host->lock, flags);
953 	if (host->mrq) {
954 		if (IS_ERR(host->mrq)) {
955 			dev_dbg(dev,
956 				"%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
957 				current->comm, task_pid_nr(current),
958 				ios->clock, ios->power_mode);
959 			host->mrq = ERR_PTR(-EINTR);
960 		} else {
961 			dev_dbg(dev,
962 				"%s.%d: CMD%u active since %lu, now %lu!\n",
963 				current->comm, task_pid_nr(current),
964 				host->mrq->cmd->opcode, host->last_req_ts,
965 				jiffies);
966 		}
967 		spin_unlock_irqrestore(&host->lock, flags);
968 
969 		mutex_unlock(&host->ios_lock);
970 		return;
971 	}
972 
973 	host->mrq = ERR_PTR(-EBUSY);
974 
975 	spin_unlock_irqrestore(&host->lock, flags);
976 
977 	switch (ios->power_mode) {
978 	case MMC_POWER_OFF:
979 		tmio_mmc_power_off(host);
980 		/* For R-Car Gen2+, we need to reset SDHI specific SCC */
981 		if (host->pdata->flags & TMIO_MMC_MIN_RCAR2)
982 			tmio_mmc_reset(host, false);
983 
984 		host->set_clock(host, 0);
985 		break;
986 	case MMC_POWER_UP:
987 		tmio_mmc_power_on(host, ios->vdd);
988 		host->set_clock(host, ios->clock);
989 		tmio_mmc_set_bus_width(host, ios->bus_width);
990 		break;
991 	case MMC_POWER_ON:
992 		host->set_clock(host, ios->clock);
993 		tmio_mmc_set_bus_width(host, ios->bus_width);
994 		break;
995 	}
996 
997 	if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT)
998 		tmio_mmc_max_busy_timeout(host);
999 
1000 	/* Let things settle. delay taken from winCE driver */
1001 	usleep_range(140, 200);
1002 	if (PTR_ERR(host->mrq) == -EINTR)
1003 		dev_dbg(&host->pdev->dev,
1004 			"%s.%d: IOS interrupted: clk %u, mode %u",
1005 			current->comm, task_pid_nr(current),
1006 			ios->clock, ios->power_mode);
1007 	host->mrq = NULL;
1008 
1009 	host->clk_cache = ios->clock;
1010 
1011 	mutex_unlock(&host->ios_lock);
1012 }
1013 
1014 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1015 {
1016 	struct tmio_mmc_host *host = mmc_priv(mmc);
1017 
1018 	return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1019 		 TMIO_STAT_WRPROTECT);
1020 }
1021 
1022 static int tmio_mmc_get_cd(struct mmc_host *mmc)
1023 {
1024 	struct tmio_mmc_host *host = mmc_priv(mmc);
1025 
1026 	return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) &
1027 		  TMIO_STAT_SIGSTATE);
1028 }
1029 
1030 static int tmio_multi_io_quirk(struct mmc_card *card,
1031 			       unsigned int direction, int blk_size)
1032 {
1033 	struct tmio_mmc_host *host = mmc_priv(card->host);
1034 
1035 	if (host->multi_io_quirk)
1036 		return host->multi_io_quirk(card, direction, blk_size);
1037 
1038 	return blk_size;
1039 }
1040 
1041 static struct mmc_host_ops tmio_mmc_ops = {
1042 	.request	= tmio_mmc_request,
1043 	.set_ios	= tmio_mmc_set_ios,
1044 	.get_ro         = tmio_mmc_get_ro,
1045 	.get_cd		= tmio_mmc_get_cd,
1046 	.enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1047 	.multi_io_quirk	= tmio_multi_io_quirk,
1048 };
1049 
1050 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1051 {
1052 	struct tmio_mmc_data *pdata = host->pdata;
1053 	struct mmc_host *mmc = host->mmc;
1054 	int err;
1055 
1056 	err = mmc_regulator_get_supply(mmc);
1057 	if (err)
1058 		return err;
1059 
1060 	/* use ocr_mask if no regulator */
1061 	if (!mmc->ocr_avail)
1062 		mmc->ocr_avail = pdata->ocr_mask;
1063 
1064 	/*
1065 	 * try again.
1066 	 * There is possibility that regulator has not been probed
1067 	 */
1068 	if (!mmc->ocr_avail)
1069 		return -EPROBE_DEFER;
1070 
1071 	return 0;
1072 }
1073 
1074 static void tmio_mmc_of_parse(struct platform_device *pdev,
1075 			      struct mmc_host *mmc)
1076 {
1077 	const struct device_node *np = pdev->dev.of_node;
1078 
1079 	if (!np)
1080 		return;
1081 
1082 	/*
1083 	 * DEPRECATED:
1084 	 * For new platforms, please use "disable-wp" instead of
1085 	 * "toshiba,mmc-wrprotect-disable"
1086 	 */
1087 	if (of_property_read_bool(np, "toshiba,mmc-wrprotect-disable"))
1088 		mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
1089 }
1090 
1091 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
1092 					  struct tmio_mmc_data *pdata)
1093 {
1094 	struct tmio_mmc_host *host;
1095 	struct mmc_host *mmc;
1096 	void __iomem *ctl;
1097 	int ret;
1098 
1099 	ctl = devm_platform_ioremap_resource(pdev, 0);
1100 	if (IS_ERR(ctl))
1101 		return ERR_CAST(ctl);
1102 
1103 	mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1104 	if (!mmc)
1105 		return ERR_PTR(-ENOMEM);
1106 
1107 	host = mmc_priv(mmc);
1108 	host->ctl = ctl;
1109 	host->mmc = mmc;
1110 	host->pdev = pdev;
1111 	host->pdata = pdata;
1112 	host->ops = tmio_mmc_ops;
1113 	mmc->ops = &host->ops;
1114 
1115 	ret = mmc_of_parse(host->mmc);
1116 	if (ret) {
1117 		host = ERR_PTR(ret);
1118 		goto free;
1119 	}
1120 
1121 	tmio_mmc_of_parse(pdev, mmc);
1122 
1123 	platform_set_drvdata(pdev, host);
1124 
1125 	return host;
1126 free:
1127 	mmc_free_host(mmc);
1128 
1129 	return host;
1130 }
1131 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1132 
1133 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1134 {
1135 	mmc_free_host(host->mmc);
1136 }
1137 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1138 
1139 int tmio_mmc_host_probe(struct tmio_mmc_host *_host)
1140 {
1141 	struct platform_device *pdev = _host->pdev;
1142 	struct tmio_mmc_data *pdata = _host->pdata;
1143 	struct mmc_host *mmc = _host->mmc;
1144 	int ret;
1145 
1146 	/*
1147 	 * Check the sanity of mmc->f_min to prevent host->set_clock() from
1148 	 * looping forever...
1149 	 */
1150 	if (mmc->f_min == 0)
1151 		return -EINVAL;
1152 
1153 	if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1154 		_host->write16_hook = NULL;
1155 
1156 	if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles)
1157 		_host->get_timeout_cycles = tmio_mmc_get_timeout_cycles;
1158 
1159 	_host->set_pwr = pdata->set_pwr;
1160 
1161 	ret = tmio_mmc_init_ocr(_host);
1162 	if (ret < 0)
1163 		return ret;
1164 
1165 	/*
1166 	 * Look for a card detect GPIO, if it fails with anything
1167 	 * else than a probe deferral, just live without it.
1168 	 */
1169 	ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0);
1170 	if (ret == -EPROBE_DEFER)
1171 		return ret;
1172 
1173 	mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1174 	mmc->caps2 |= pdata->capabilities2;
1175 	mmc->max_segs = pdata->max_segs ? : 32;
1176 	mmc->max_blk_size = TMIO_MAX_BLK_SIZE;
1177 	mmc->max_blk_count = pdata->max_blk_count ? :
1178 		(PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1179 	mmc->max_req_size = min_t(size_t,
1180 				  mmc->max_blk_size * mmc->max_blk_count,
1181 				  dma_max_mapping_size(&pdev->dev));
1182 	mmc->max_seg_size = mmc->max_req_size;
1183 
1184 	if (mmc_can_gpio_ro(mmc))
1185 		_host->ops.get_ro = mmc_gpio_get_ro;
1186 
1187 	if (mmc_can_gpio_cd(mmc))
1188 		_host->ops.get_cd = mmc_gpio_get_cd;
1189 
1190 	/* must be set before tmio_mmc_reset() */
1191 	_host->native_hotplug = !(mmc_can_gpio_cd(mmc) ||
1192 				  mmc->caps & MMC_CAP_NEEDS_POLL ||
1193 				  !mmc_card_is_removable(mmc));
1194 
1195 	/*
1196 	 * While using internal tmio hardware logic for card detection, we need
1197 	 * to ensure it stays powered for it to work.
1198 	 */
1199 	if (_host->native_hotplug)
1200 		pm_runtime_get_noresume(&pdev->dev);
1201 
1202 	_host->sdio_irq_enabled = false;
1203 	if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1204 		_host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1205 
1206 	if (!_host->sdcard_irq_mask_all)
1207 		_host->sdcard_irq_mask_all = TMIO_MASK_ALL;
1208 
1209 	_host->set_clock(_host, 0);
1210 	tmio_mmc_reset(_host, false);
1211 
1212 	spin_lock_init(&_host->lock);
1213 	mutex_init(&_host->ios_lock);
1214 
1215 	/* Init delayed work for request timeouts */
1216 	INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1217 	INIT_WORK(&_host->done, tmio_mmc_done_work);
1218 
1219 	/* See if we also get DMA */
1220 	tmio_mmc_request_dma(_host, pdata);
1221 
1222 	pm_runtime_get_noresume(&pdev->dev);
1223 	pm_runtime_set_active(&pdev->dev);
1224 	pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1225 	pm_runtime_use_autosuspend(&pdev->dev);
1226 	pm_runtime_enable(&pdev->dev);
1227 
1228 	ret = mmc_add_host(mmc);
1229 	if (ret)
1230 		goto remove_host;
1231 
1232 	dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1233 	pm_runtime_put(&pdev->dev);
1234 
1235 	return 0;
1236 
1237 remove_host:
1238 	pm_runtime_put_noidle(&pdev->dev);
1239 	tmio_mmc_host_remove(_host);
1240 	return ret;
1241 }
1242 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1243 
1244 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1245 {
1246 	struct platform_device *pdev = host->pdev;
1247 	struct mmc_host *mmc = host->mmc;
1248 
1249 	pm_runtime_get_sync(&pdev->dev);
1250 
1251 	if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1252 		sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1253 
1254 	dev_pm_qos_hide_latency_limit(&pdev->dev);
1255 
1256 	mmc_remove_host(mmc);
1257 	cancel_work_sync(&host->done);
1258 	cancel_delayed_work_sync(&host->delayed_reset_work);
1259 	tmio_mmc_release_dma(host);
1260 	tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1261 
1262 	if (host->native_hotplug)
1263 		pm_runtime_put_noidle(&pdev->dev);
1264 
1265 	pm_runtime_disable(&pdev->dev);
1266 	pm_runtime_dont_use_autosuspend(&pdev->dev);
1267 	pm_runtime_put_noidle(&pdev->dev);
1268 }
1269 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1270 
1271 #ifdef CONFIG_PM
1272 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
1273 {
1274 	if (!host->clk_enable)
1275 		return -ENOTSUPP;
1276 
1277 	return host->clk_enable(host);
1278 }
1279 
1280 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
1281 {
1282 	if (host->clk_disable)
1283 		host->clk_disable(host);
1284 }
1285 
1286 int tmio_mmc_host_runtime_suspend(struct device *dev)
1287 {
1288 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1289 
1290 	tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all);
1291 
1292 	if (host->clk_cache)
1293 		host->set_clock(host, 0);
1294 
1295 	tmio_mmc_clk_disable(host);
1296 
1297 	return 0;
1298 }
1299 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1300 
1301 int tmio_mmc_host_runtime_resume(struct device *dev)
1302 {
1303 	struct tmio_mmc_host *host = dev_get_drvdata(dev);
1304 
1305 	tmio_mmc_clk_enable(host);
1306 	tmio_mmc_reset(host, false);
1307 
1308 	if (host->clk_cache)
1309 		host->set_clock(host, host->clk_cache);
1310 
1311 	tmio_mmc_enable_dma(host, true);
1312 
1313 	return 0;
1314 }
1315 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1316 #endif
1317 
1318 MODULE_LICENSE("GPL v2");
1319