1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Driver for the MMC / SD / SDIO IP found in: 4 * 5 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs 6 * 7 * Copyright (C) 2015-19 Renesas Electronics Corporation 8 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 9 * Copyright (C) 2017 Horms Solutions, Simon Horman 10 * Copyright (C) 2011 Guennadi Liakhovetski 11 * Copyright (C) 2007 Ian Molton 12 * Copyright (C) 2004 Ian Molton 13 * 14 * This driver draws mainly on scattered spec sheets, Reverse engineering 15 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit 16 * support). (Further 4 bit support from a later datasheet). 17 * 18 * TODO: 19 * Investigate using a workqueue for PIO transfers 20 * Eliminate FIXMEs 21 * Better Power management 22 * Handle MMC errors better 23 * double buffer support 24 * 25 */ 26 27 #include <linux/delay.h> 28 #include <linux/device.h> 29 #include <linux/dma-mapping.h> 30 #include <linux/highmem.h> 31 #include <linux/interrupt.h> 32 #include <linux/io.h> 33 #include <linux/irq.h> 34 #include <linux/mmc/card.h> 35 #include <linux/mmc/host.h> 36 #include <linux/mmc/mmc.h> 37 #include <linux/mmc/slot-gpio.h> 38 #include <linux/module.h> 39 #include <linux/of.h> 40 #include <linux/pagemap.h> 41 #include <linux/platform_data/tmio.h> 42 #include <linux/platform_device.h> 43 #include <linux/pm_qos.h> 44 #include <linux/pm_runtime.h> 45 #include <linux/regulator/consumer.h> 46 #include <linux/mmc/sdio.h> 47 #include <linux/scatterlist.h> 48 #include <linux/sizes.h> 49 #include <linux/spinlock.h> 50 #include <linux/workqueue.h> 51 52 #include "tmio_mmc.h" 53 54 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host, 55 struct mmc_data *data) 56 { 57 if (host->dma_ops) 58 host->dma_ops->start(host, data); 59 } 60 61 static inline void tmio_mmc_end_dma(struct tmio_mmc_host *host) 62 { 63 if (host->dma_ops && host->dma_ops->end) 64 host->dma_ops->end(host); 65 } 66 67 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable) 68 { 69 if (host->dma_ops) 70 host->dma_ops->enable(host, enable); 71 } 72 73 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host, 74 struct tmio_mmc_data *pdata) 75 { 76 if (host->dma_ops) { 77 host->dma_ops->request(host, pdata); 78 } else { 79 host->chan_tx = NULL; 80 host->chan_rx = NULL; 81 } 82 } 83 84 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host) 85 { 86 if (host->dma_ops) 87 host->dma_ops->release(host); 88 } 89 90 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host) 91 { 92 if (host->dma_ops) 93 host->dma_ops->abort(host); 94 } 95 96 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host) 97 { 98 if (host->dma_ops) 99 host->dma_ops->dataend(host); 100 } 101 102 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 103 { 104 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ); 105 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 106 } 107 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs); 108 109 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i) 110 { 111 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ); 112 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask); 113 } 114 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs); 115 116 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i) 117 { 118 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i); 119 } 120 121 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data) 122 { 123 host->sg_len = data->sg_len; 124 host->sg_ptr = data->sg; 125 host->sg_orig = data->sg; 126 host->sg_off = 0; 127 } 128 129 static int tmio_mmc_next_sg(struct tmio_mmc_host *host) 130 { 131 host->sg_ptr = sg_next(host->sg_ptr); 132 host->sg_off = 0; 133 return --host->sg_len; 134 } 135 136 #define CMDREQ_TIMEOUT 5000 137 138 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable) 139 { 140 struct tmio_mmc_host *host = mmc_priv(mmc); 141 142 if (enable && !host->sdio_irq_enabled) { 143 u16 sdio_status; 144 145 /* Keep device active while SDIO irq is enabled */ 146 pm_runtime_get_sync(mmc_dev(mmc)); 147 148 host->sdio_irq_enabled = true; 149 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ; 150 151 /* Clear obsolete interrupts before enabling */ 152 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL; 153 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 154 sdio_status |= TMIO_SDIO_SETBITS_MASK; 155 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 156 157 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 158 } else if (!enable && host->sdio_irq_enabled) { 159 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 160 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 161 162 host->sdio_irq_enabled = false; 163 pm_runtime_put_autosuspend(mmc_dev(mmc)); 164 } 165 } 166 167 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host, 168 unsigned char bus_width) 169 { 170 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT) 171 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8); 172 173 /* reg now applies to MMC_BUS_WIDTH_4 */ 174 if (bus_width == MMC_BUS_WIDTH_1) 175 reg |= CARD_OPT_WIDTH; 176 else if (bus_width == MMC_BUS_WIDTH_8) 177 reg |= CARD_OPT_WIDTH8; 178 179 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg); 180 } 181 182 static void tmio_mmc_reset(struct tmio_mmc_host *host, bool preserve) 183 { 184 u16 card_opt, clk_ctrl, sdif_mode; 185 186 if (preserve) { 187 card_opt = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT); 188 clk_ctrl = sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL); 189 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) 190 sdif_mode = sd_ctrl_read16(host, CTL_SDIF_MODE); 191 } 192 193 /* FIXME - should we set stop clock reg here */ 194 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000); 195 usleep_range(10000, 11000); 196 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001); 197 usleep_range(10000, 11000); 198 199 tmio_mmc_abort_dma(host); 200 201 if (host->reset) 202 host->reset(host, preserve); 203 204 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask_all); 205 host->sdcard_irq_mask = host->sdcard_irq_mask_all; 206 207 if (host->native_hotplug) 208 tmio_mmc_enable_mmc_irqs(host, 209 TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT); 210 211 tmio_mmc_set_bus_width(host, host->mmc->ios.bus_width); 212 213 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) { 214 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask); 215 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001); 216 } 217 218 if (preserve) { 219 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, card_opt); 220 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk_ctrl); 221 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) 222 sd_ctrl_write16(host, CTL_SDIF_MODE, sdif_mode); 223 } 224 225 if (host->mmc->card) 226 mmc_retune_needed(host->mmc); 227 } 228 229 static void tmio_mmc_reset_work(struct work_struct *work) 230 { 231 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 232 delayed_reset_work.work); 233 struct mmc_request *mrq; 234 unsigned long flags; 235 236 spin_lock_irqsave(&host->lock, flags); 237 mrq = host->mrq; 238 239 /* 240 * is request already finished? Since we use a non-blocking 241 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts 242 * us, so, have to check for IS_ERR(host->mrq) 243 */ 244 if (IS_ERR_OR_NULL(mrq) || 245 time_is_after_jiffies(host->last_req_ts + 246 msecs_to_jiffies(CMDREQ_TIMEOUT))) { 247 spin_unlock_irqrestore(&host->lock, flags); 248 return; 249 } 250 251 dev_warn(&host->pdev->dev, 252 "timeout waiting for hardware interrupt (CMD%u)\n", 253 mrq->cmd->opcode); 254 255 if (host->data) 256 host->data->error = -ETIMEDOUT; 257 else if (host->cmd) 258 host->cmd->error = -ETIMEDOUT; 259 else 260 mrq->cmd->error = -ETIMEDOUT; 261 262 /* No new calls yet, but disallow concurrent tmio_mmc_done_work() */ 263 host->mrq = ERR_PTR(-EBUSY); 264 host->cmd = NULL; 265 host->data = NULL; 266 267 spin_unlock_irqrestore(&host->lock, flags); 268 269 tmio_mmc_reset(host, true); 270 271 /* Ready for new calls */ 272 host->mrq = NULL; 273 mmc_request_done(host->mmc, mrq); 274 } 275 276 /* These are the bitmasks the tmio chip requires to implement the MMC response 277 * types. Note that R1 and R6 are the same in this scheme. */ 278 #define APP_CMD 0x0040 279 #define RESP_NONE 0x0300 280 #define RESP_R1 0x0400 281 #define RESP_R1B 0x0500 282 #define RESP_R2 0x0600 283 #define RESP_R3 0x0700 284 #define DATA_PRESENT 0x0800 285 #define TRANSFER_READ 0x1000 286 #define TRANSFER_MULTI 0x2000 287 #define SECURITY_CMD 0x4000 288 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */ 289 290 static int tmio_mmc_start_command(struct tmio_mmc_host *host, 291 struct mmc_command *cmd) 292 { 293 struct mmc_data *data = host->data; 294 int c = cmd->opcode; 295 296 switch (mmc_resp_type(cmd)) { 297 case MMC_RSP_NONE: c |= RESP_NONE; break; 298 case MMC_RSP_R1: 299 c |= RESP_R1; break; 300 case MMC_RSP_R1B: c |= RESP_R1B; break; 301 case MMC_RSP_R2: c |= RESP_R2; break; 302 case MMC_RSP_R3: c |= RESP_R3; break; 303 default: 304 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd)); 305 return -EINVAL; 306 } 307 308 host->cmd = cmd; 309 310 /* FIXME - this seems to be ok commented out but the spec suggest this bit 311 * should be set when issuing app commands. 312 * if(cmd->flags & MMC_FLAG_ACMD) 313 * c |= APP_CMD; 314 */ 315 if (data) { 316 c |= DATA_PRESENT; 317 if (data->blocks > 1) { 318 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC); 319 c |= TRANSFER_MULTI; 320 321 /* 322 * Disable auto CMD12 at IO_RW_EXTENDED and 323 * SET_BLOCK_COUNT when doing multiple block transfer 324 */ 325 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) && 326 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc)) 327 c |= NO_CMD12_ISSUE; 328 } 329 if (data->flags & MMC_DATA_READ) 330 c |= TRANSFER_READ; 331 } 332 333 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_CMD); 334 335 /* Fire off the command */ 336 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg); 337 sd_ctrl_write16(host, CTL_SD_CMD, c); 338 339 return 0; 340 } 341 342 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host, 343 unsigned short *buf, 344 unsigned int count) 345 { 346 int is_read = host->data->flags & MMC_DATA_READ; 347 u8 *buf8; 348 349 /* 350 * Transfer the data 351 */ 352 #ifdef CONFIG_64BIT 353 if (host->pdata->flags & TMIO_MMC_64BIT_DATA_PORT) { 354 u64 *buf64 = (u64 *)buf; 355 u64 data = 0; 356 357 if (count >= 8) { 358 if (is_read) 359 sd_ctrl_read64_rep(host, CTL_SD_DATA_PORT, 360 buf64, count >> 3); 361 else 362 sd_ctrl_write64_rep(host, CTL_SD_DATA_PORT, 363 buf64, count >> 3); 364 } 365 366 /* if count was multiple of 8 */ 367 if (!(count & 0x7)) 368 return; 369 370 buf64 += count >> 3; 371 count %= 8; 372 373 if (is_read) { 374 sd_ctrl_read64_rep(host, CTL_SD_DATA_PORT, &data, 1); 375 memcpy(buf64, &data, count); 376 } else { 377 memcpy(&data, buf64, count); 378 sd_ctrl_write64_rep(host, CTL_SD_DATA_PORT, &data, 1); 379 } 380 381 return; 382 } 383 #endif 384 385 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) { 386 u32 data = 0; 387 u32 *buf32 = (u32 *)buf; 388 389 if (is_read) 390 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32, 391 count >> 2); 392 else 393 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32, 394 count >> 2); 395 396 /* if count was multiple of 4 */ 397 if (!(count & 0x3)) 398 return; 399 400 buf32 += count >> 2; 401 count %= 4; 402 403 if (is_read) { 404 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1); 405 memcpy(buf32, &data, count); 406 } else { 407 memcpy(&data, buf32, count); 408 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1); 409 } 410 411 return; 412 } 413 414 if (is_read) 415 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 416 else 417 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1); 418 419 /* if count was even number */ 420 if (!(count & 0x1)) 421 return; 422 423 /* if count was odd number */ 424 buf8 = (u8 *)(buf + (count >> 1)); 425 426 /* 427 * FIXME 428 * 429 * driver and this function are assuming that 430 * it is used as little endian 431 */ 432 if (is_read) 433 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff; 434 else 435 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8); 436 } 437 438 /* 439 * This chip always returns (at least?) as much data as you ask for. 440 * I'm unsure what happens if you ask for less than a block. This should be 441 * looked into to ensure that a funny length read doesn't hose the controller. 442 */ 443 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host) 444 { 445 struct mmc_data *data = host->data; 446 void *sg_virt; 447 unsigned short *buf; 448 unsigned int count; 449 450 if (host->dma_on) { 451 pr_err("PIO IRQ in DMA mode!\n"); 452 return; 453 } else if (!data) { 454 pr_debug("Spurious PIO IRQ\n"); 455 return; 456 } 457 458 sg_virt = kmap_local_page(sg_page(host->sg_ptr)); 459 buf = (unsigned short *)(sg_virt + host->sg_ptr->offset + host->sg_off); 460 461 count = host->sg_ptr->length - host->sg_off; 462 if (count > data->blksz) 463 count = data->blksz; 464 465 pr_debug("count: %08x offset: %08x flags %08x\n", 466 count, host->sg_off, data->flags); 467 468 /* Transfer the data */ 469 tmio_mmc_transfer_data(host, buf, count); 470 471 host->sg_off += count; 472 473 kunmap_local(sg_virt); 474 475 if (host->sg_off == host->sg_ptr->length) 476 tmio_mmc_next_sg(host); 477 } 478 479 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host) 480 { 481 if (host->sg_ptr == &host->bounce_sg) { 482 void *sg_virt = kmap_local_page(sg_page(host->sg_orig)); 483 484 memcpy(sg_virt + host->sg_orig->offset, host->bounce_buf, 485 host->bounce_sg.length); 486 kunmap_local(sg_virt); 487 } 488 } 489 490 /* needs to be called with host->lock held */ 491 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host) 492 { 493 struct mmc_data *data = host->data; 494 struct mmc_command *stop; 495 496 host->data = NULL; 497 498 if (!data) { 499 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n"); 500 return; 501 } 502 stop = data->stop; 503 504 /* FIXME - return correct transfer count on errors */ 505 if (!data->error) 506 data->bytes_xfered = data->blocks * data->blksz; 507 else 508 data->bytes_xfered = 0; 509 510 pr_debug("Completed data request\n"); 511 512 /* 513 * FIXME: other drivers allow an optional stop command of any given type 514 * which we dont do, as the chip can auto generate them. 515 * Perhaps we can be smarter about when to use auto CMD12 and 516 * only issue the auto request when we know this is the desired 517 * stop command, allowing fallback to the stop command the 518 * upper layers expect. For now, we do what works. 519 */ 520 521 if (data->flags & MMC_DATA_READ) { 522 if (host->dma_on) 523 tmio_mmc_check_bounce_buffer(host); 524 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n", 525 host->mrq); 526 } else { 527 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n", 528 host->mrq); 529 } 530 531 if (stop && !host->mrq->sbc) { 532 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg) 533 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n", 534 stop->opcode, stop->arg); 535 536 /* fill in response from auto CMD12 */ 537 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE); 538 539 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0); 540 } 541 542 schedule_work(&host->done); 543 } 544 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq); 545 546 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat) 547 { 548 struct mmc_data *data; 549 550 spin_lock(&host->lock); 551 data = host->data; 552 553 if (!data) 554 goto out; 555 556 if (stat & TMIO_STAT_DATATIMEOUT) 557 data->error = -ETIMEDOUT; 558 else if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR || 559 stat & TMIO_STAT_TXUNDERRUN) 560 data->error = -EILSEQ; 561 if (host->dma_on && (data->flags & MMC_DATA_WRITE)) { 562 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 563 bool done = false; 564 565 /* 566 * Has all data been written out yet? Testing on SuperH showed, 567 * that in most cases the first interrupt comes already with the 568 * BUSY status bit clear, but on some operations, like mount or 569 * in the beginning of a write / sync / umount, there is one 570 * DATAEND interrupt with the BUSY bit set, in this cases 571 * waiting for one more interrupt fixes the problem. 572 */ 573 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) { 574 if (status & TMIO_STAT_SCLKDIVEN) 575 done = true; 576 } else { 577 if (!(status & TMIO_STAT_CMD_BUSY)) 578 done = true; 579 } 580 581 if (done) { 582 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 583 tmio_mmc_dataend_dma(host); 584 } 585 } else if (host->dma_on && (data->flags & MMC_DATA_READ)) { 586 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND); 587 tmio_mmc_dataend_dma(host); 588 } else { 589 tmio_mmc_do_data_irq(host); 590 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP); 591 } 592 out: 593 spin_unlock(&host->lock); 594 } 595 596 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat) 597 { 598 struct mmc_command *cmd = host->cmd; 599 int i, addr; 600 601 spin_lock(&host->lock); 602 603 if (!host->cmd) { 604 pr_debug("Spurious CMD irq\n"); 605 goto out; 606 } 607 608 /* This controller is sicker than the PXA one. Not only do we need to 609 * drop the top 8 bits of the first response word, we also need to 610 * modify the order of the response for short response command types. 611 */ 612 613 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4) 614 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr); 615 616 if (cmd->flags & MMC_RSP_136) { 617 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24); 618 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24); 619 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24); 620 cmd->resp[3] <<= 8; 621 } else if (cmd->flags & MMC_RSP_R3) { 622 cmd->resp[0] = cmd->resp[3]; 623 } 624 625 if (stat & TMIO_STAT_CMDTIMEOUT) 626 cmd->error = -ETIMEDOUT; 627 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) || 628 stat & TMIO_STAT_STOPBIT_ERR || 629 stat & TMIO_STAT_CMD_IDX_ERR) 630 cmd->error = -EILSEQ; 631 632 /* If there is data to handle we enable data IRQs here, and 633 * we will ultimatley finish the request in the data_end handler. 634 * If theres no data or we encountered an error, finish now. 635 */ 636 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) { 637 if (host->data->flags & MMC_DATA_READ) { 638 if (!host->dma_on) { 639 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP); 640 } else { 641 tmio_mmc_disable_mmc_irqs(host, 642 TMIO_MASK_READOP); 643 queue_work(system_bh_wq, &host->dma_issue); 644 } 645 } else { 646 if (!host->dma_on) { 647 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP); 648 } else { 649 tmio_mmc_disable_mmc_irqs(host, 650 TMIO_MASK_WRITEOP); 651 queue_work(system_bh_wq, &host->dma_issue); 652 } 653 } 654 } else { 655 schedule_work(&host->done); 656 } 657 658 out: 659 spin_unlock(&host->lock); 660 } 661 662 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host, 663 int ireg, int status) 664 { 665 struct mmc_host *mmc = host->mmc; 666 667 /* Card insert / remove attempts */ 668 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) { 669 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT | 670 TMIO_STAT_CARD_REMOVE); 671 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) || 672 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) && 673 !work_pending(&mmc->detect.work)) 674 mmc_detect_change(host->mmc, msecs_to_jiffies(100)); 675 return true; 676 } 677 678 return false; 679 } 680 681 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg, 682 int status) 683 { 684 /* Command completion */ 685 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) { 686 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND | 687 TMIO_STAT_CMDTIMEOUT); 688 tmio_mmc_cmd_irq(host, status); 689 return true; 690 } 691 692 /* Data transfer */ 693 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) { 694 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ); 695 tmio_mmc_pio_irq(host); 696 return true; 697 } 698 699 /* Data transfer completion */ 700 if (ireg & TMIO_STAT_DATAEND) { 701 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND); 702 tmio_mmc_data_irq(host, status); 703 return true; 704 } 705 706 if (host->dma_ops && host->dma_ops->dma_irq && host->dma_ops->dma_irq(host)) 707 return true; 708 709 return false; 710 } 711 712 static bool __tmio_mmc_sdio_irq(struct tmio_mmc_host *host) 713 { 714 struct mmc_host *mmc = host->mmc; 715 struct tmio_mmc_data *pdata = host->pdata; 716 unsigned int ireg, status; 717 unsigned int sdio_status; 718 719 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ)) 720 return false; 721 722 status = sd_ctrl_read16(host, CTL_SDIO_STATUS); 723 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask; 724 725 sdio_status = status & ~TMIO_SDIO_MASK_ALL; 726 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS) 727 sdio_status |= TMIO_SDIO_SETBITS_MASK; 728 729 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status); 730 731 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ) { 732 if (host->sdio_irq) 733 host->sdio_irq(host); 734 mmc_signal_sdio_irq(mmc); 735 } 736 737 return ireg; 738 } 739 740 irqreturn_t tmio_mmc_irq(int irq, void *devid) 741 { 742 struct tmio_mmc_host *host = devid; 743 unsigned int ireg, status; 744 745 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS); 746 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask; 747 748 /* Clear the status except the interrupt status */ 749 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ); 750 751 if (__tmio_mmc_card_detect_irq(host, ireg, status)) 752 return IRQ_HANDLED; 753 if (__tmio_mmc_sdcard_irq(host, ireg, status)) 754 return IRQ_HANDLED; 755 756 if (__tmio_mmc_sdio_irq(host)) 757 return IRQ_HANDLED; 758 759 return IRQ_NONE; 760 } 761 EXPORT_SYMBOL_GPL(tmio_mmc_irq); 762 763 static int tmio_mmc_start_data(struct tmio_mmc_host *host, 764 struct mmc_data *data) 765 { 766 struct tmio_mmc_data *pdata = host->pdata; 767 768 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n", 769 data->blksz, data->blocks); 770 771 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */ 772 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 || 773 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) { 774 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES; 775 776 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) { 777 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n", 778 mmc_hostname(host->mmc), data->blksz); 779 return -EINVAL; 780 } 781 } 782 783 tmio_mmc_init_sg(host, data); 784 host->data = data; 785 host->dma_on = false; 786 787 /* Set transfer length / blocksize */ 788 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz); 789 if (host->mmc->max_blk_count >= SZ_64K) 790 sd_ctrl_write32(host, CTL_XFER_BLK_COUNT, data->blocks); 791 else 792 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks); 793 794 tmio_mmc_start_dma(host, data); 795 796 return 0; 797 } 798 799 static void tmio_process_mrq(struct tmio_mmc_host *host, 800 struct mmc_request *mrq) 801 { 802 struct mmc_command *cmd; 803 int ret; 804 805 if (mrq->sbc && host->cmd != mrq->sbc) { 806 cmd = mrq->sbc; 807 } else { 808 cmd = mrq->cmd; 809 if (mrq->data) { 810 ret = tmio_mmc_start_data(host, mrq->data); 811 if (ret) 812 goto fail; 813 } 814 } 815 816 ret = tmio_mmc_start_command(host, cmd); 817 if (ret) 818 goto fail; 819 820 schedule_delayed_work(&host->delayed_reset_work, 821 msecs_to_jiffies(CMDREQ_TIMEOUT)); 822 return; 823 824 fail: 825 host->mrq = NULL; 826 mrq->cmd->error = ret; 827 mmc_request_done(host->mmc, mrq); 828 } 829 830 /* Process requests from the MMC layer */ 831 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 832 { 833 struct tmio_mmc_host *host = mmc_priv(mmc); 834 unsigned long flags; 835 836 spin_lock_irqsave(&host->lock, flags); 837 838 if (host->mrq) { 839 pr_debug("request not null\n"); 840 if (IS_ERR(host->mrq)) { 841 spin_unlock_irqrestore(&host->lock, flags); 842 mrq->cmd->error = -EAGAIN; 843 mmc_request_done(mmc, mrq); 844 return; 845 } 846 } 847 848 host->last_req_ts = jiffies; 849 wmb(); 850 host->mrq = mrq; 851 852 spin_unlock_irqrestore(&host->lock, flags); 853 854 tmio_process_mrq(host, mrq); 855 } 856 857 static void tmio_mmc_finish_request(struct tmio_mmc_host *host) 858 { 859 struct mmc_request *mrq; 860 unsigned long flags; 861 862 spin_lock_irqsave(&host->lock, flags); 863 864 tmio_mmc_end_dma(host); 865 866 mrq = host->mrq; 867 if (IS_ERR_OR_NULL(mrq)) { 868 spin_unlock_irqrestore(&host->lock, flags); 869 return; 870 } 871 872 /* If not SET_BLOCK_COUNT, clear old data */ 873 if (host->cmd != mrq->sbc) { 874 host->cmd = NULL; 875 host->data = NULL; 876 host->mrq = NULL; 877 } 878 879 cancel_delayed_work(&host->delayed_reset_work); 880 881 spin_unlock_irqrestore(&host->lock, flags); 882 883 if (mrq->cmd->error || (mrq->data && mrq->data->error)) { 884 tmio_mmc_ack_mmc_irqs(host, TMIO_MASK_IRQ); /* Clear all */ 885 tmio_mmc_abort_dma(host); 886 } 887 888 /* Error means retune, but executed command was still successful */ 889 if (host->check_retune && host->check_retune(host, mrq)) 890 mmc_retune_needed(host->mmc); 891 892 /* If SET_BLOCK_COUNT, continue with main command */ 893 if (host->mrq && !mrq->cmd->error) { 894 tmio_process_mrq(host, mrq); 895 return; 896 } 897 898 if (host->fixup_request) 899 host->fixup_request(host, mrq); 900 901 mmc_request_done(host->mmc, mrq); 902 } 903 904 static void tmio_mmc_done_work(struct work_struct *work) 905 { 906 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host, 907 done); 908 tmio_mmc_finish_request(host); 909 } 910 911 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd) 912 { 913 struct mmc_host *mmc = host->mmc; 914 int ret = 0; 915 916 /* .set_ios() is returning void, so, no chance to report an error */ 917 918 if (!IS_ERR(mmc->supply.vmmc)) { 919 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd); 920 /* 921 * Attention: empiric value. With a b43 WiFi SDIO card this 922 * delay proved necessary for reliable card-insertion probing. 923 * 100us were not enough. Is this the same 140us delay, as in 924 * tmio_mmc_set_ios()? 925 */ 926 usleep_range(200, 300); 927 } 928 /* 929 * It seems, VccQ should be switched on after Vcc, this is also what the 930 * omap_hsmmc.c driver does. 931 */ 932 if (!ret) { 933 ret = mmc_regulator_enable_vqmmc(mmc); 934 usleep_range(200, 300); 935 } 936 937 if (ret < 0) 938 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n", 939 ret); 940 } 941 942 static void tmio_mmc_power_off(struct tmio_mmc_host *host) 943 { 944 struct mmc_host *mmc = host->mmc; 945 946 mmc_regulator_disable_vqmmc(mmc); 947 948 if (!IS_ERR(mmc->supply.vmmc)) 949 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); 950 } 951 952 static unsigned int tmio_mmc_get_timeout_cycles(struct tmio_mmc_host *host) 953 { 954 u16 val = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT); 955 956 val = (val & CARD_OPT_TOP_MASK) >> CARD_OPT_TOP_SHIFT; 957 return 1 << (13 + val); 958 } 959 960 static void tmio_mmc_max_busy_timeout(struct tmio_mmc_host *host) 961 { 962 unsigned int clk_rate = host->mmc->actual_clock ?: host->mmc->f_max; 963 964 host->mmc->max_busy_timeout = host->get_timeout_cycles(host) / 965 (clk_rate / MSEC_PER_SEC); 966 } 967 968 /* Set MMC clock / power. 969 * Note: This controller uses a simple divider scheme therefore it cannot 970 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as 971 * MMC wont run that fast, it has to be clocked at 12MHz which is the next 972 * slowest setting. 973 */ 974 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 975 { 976 struct tmio_mmc_host *host = mmc_priv(mmc); 977 struct device *dev = &host->pdev->dev; 978 unsigned long flags; 979 980 mutex_lock(&host->ios_lock); 981 982 spin_lock_irqsave(&host->lock, flags); 983 if (host->mrq) { 984 if (IS_ERR(host->mrq)) { 985 dev_dbg(dev, 986 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n", 987 current->comm, task_pid_nr(current), 988 ios->clock, ios->power_mode); 989 host->mrq = ERR_PTR(-EINTR); 990 } else { 991 dev_dbg(dev, 992 "%s.%d: CMD%u active since %lu, now %lu!\n", 993 current->comm, task_pid_nr(current), 994 host->mrq->cmd->opcode, host->last_req_ts, 995 jiffies); 996 } 997 spin_unlock_irqrestore(&host->lock, flags); 998 999 mutex_unlock(&host->ios_lock); 1000 return; 1001 } 1002 1003 /* Disallow new mrqs and work handlers to run */ 1004 host->mrq = ERR_PTR(-EBUSY); 1005 1006 spin_unlock_irqrestore(&host->lock, flags); 1007 1008 switch (ios->power_mode) { 1009 case MMC_POWER_OFF: 1010 tmio_mmc_power_off(host); 1011 /* For R-Car Gen2+, we need to reset SDHI specific SCC */ 1012 if (host->pdata->flags & TMIO_MMC_MIN_RCAR2) 1013 tmio_mmc_reset(host, false); 1014 1015 host->set_clock(host, 0); 1016 break; 1017 case MMC_POWER_UP: 1018 tmio_mmc_power_on(host, ios->vdd); 1019 host->set_clock(host, ios->clock); 1020 tmio_mmc_set_bus_width(host, ios->bus_width); 1021 break; 1022 case MMC_POWER_ON: 1023 host->set_clock(host, ios->clock); 1024 tmio_mmc_set_bus_width(host, ios->bus_width); 1025 break; 1026 } 1027 1028 if (host->pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT) 1029 tmio_mmc_max_busy_timeout(host); 1030 1031 /* Let things settle. delay taken from winCE driver */ 1032 usleep_range(140, 200); 1033 if (PTR_ERR(host->mrq) == -EINTR) 1034 dev_dbg(&host->pdev->dev, 1035 "%s.%d: IOS interrupted: clk %u, mode %u", 1036 current->comm, task_pid_nr(current), 1037 ios->clock, ios->power_mode); 1038 1039 /* Ready for new mrqs */ 1040 host->mrq = NULL; 1041 host->clk_cache = ios->clock; 1042 1043 mutex_unlock(&host->ios_lock); 1044 } 1045 1046 static int tmio_mmc_get_ro(struct mmc_host *mmc) 1047 { 1048 struct tmio_mmc_host *host = mmc_priv(mmc); 1049 1050 return !(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 1051 TMIO_STAT_WRPROTECT); 1052 } 1053 1054 static int tmio_mmc_get_cd(struct mmc_host *mmc) 1055 { 1056 struct tmio_mmc_host *host = mmc_priv(mmc); 1057 1058 return !!(sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & 1059 TMIO_STAT_SIGSTATE); 1060 } 1061 1062 static int tmio_multi_io_quirk(struct mmc_card *card, 1063 unsigned int direction, int blk_size) 1064 { 1065 struct tmio_mmc_host *host = mmc_priv(card->host); 1066 1067 if (host->multi_io_quirk) 1068 return host->multi_io_quirk(card, direction, blk_size); 1069 1070 return blk_size; 1071 } 1072 1073 static struct mmc_host_ops tmio_mmc_ops = { 1074 .request = tmio_mmc_request, 1075 .set_ios = tmio_mmc_set_ios, 1076 .get_ro = tmio_mmc_get_ro, 1077 .get_cd = tmio_mmc_get_cd, 1078 .enable_sdio_irq = tmio_mmc_enable_sdio_irq, 1079 .multi_io_quirk = tmio_multi_io_quirk, 1080 }; 1081 1082 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host) 1083 { 1084 struct tmio_mmc_data *pdata = host->pdata; 1085 struct mmc_host *mmc = host->mmc; 1086 int err; 1087 1088 err = mmc_regulator_get_supply(mmc); 1089 if (err) 1090 return err; 1091 1092 /* use ocr_mask if no regulator */ 1093 if (!mmc->ocr_avail) 1094 mmc->ocr_avail = pdata->ocr_mask; 1095 1096 /* 1097 * try again. 1098 * There is possibility that regulator has not been probed 1099 */ 1100 if (!mmc->ocr_avail) 1101 return -EPROBE_DEFER; 1102 1103 return 0; 1104 } 1105 1106 static void tmio_mmc_of_parse(struct platform_device *pdev, 1107 struct mmc_host *mmc) 1108 { 1109 const struct device_node *np = pdev->dev.of_node; 1110 1111 if (!np) 1112 return; 1113 1114 /* 1115 * DEPRECATED: 1116 * For new platforms, please use "disable-wp" instead of 1117 * "toshiba,mmc-wrprotect-disable" 1118 */ 1119 if (of_property_read_bool(np, "toshiba,mmc-wrprotect-disable")) 1120 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT; 1121 } 1122 1123 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev, 1124 struct tmio_mmc_data *pdata) 1125 { 1126 struct tmio_mmc_host *host; 1127 struct mmc_host *mmc; 1128 void __iomem *ctl; 1129 int ret; 1130 1131 ctl = devm_platform_ioremap_resource(pdev, 0); 1132 if (IS_ERR(ctl)) 1133 return ERR_CAST(ctl); 1134 1135 mmc = devm_mmc_alloc_host(&pdev->dev, sizeof(*host)); 1136 if (!mmc) 1137 return ERR_PTR(-ENOMEM); 1138 1139 host = mmc_priv(mmc); 1140 host->ctl = ctl; 1141 host->mmc = mmc; 1142 host->pdev = pdev; 1143 host->pdata = pdata; 1144 host->ops = tmio_mmc_ops; 1145 mmc->ops = &host->ops; 1146 1147 ret = mmc_of_parse(host->mmc); 1148 if (ret) 1149 return ERR_PTR(ret); 1150 1151 tmio_mmc_of_parse(pdev, mmc); 1152 1153 platform_set_drvdata(pdev, host); 1154 1155 return host; 1156 } 1157 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc); 1158 1159 int tmio_mmc_host_probe(struct tmio_mmc_host *_host) 1160 { 1161 struct platform_device *pdev = _host->pdev; 1162 struct tmio_mmc_data *pdata = _host->pdata; 1163 struct mmc_host *mmc = _host->mmc; 1164 int ret; 1165 1166 /* 1167 * Check the sanity of mmc->f_min to prevent host->set_clock() from 1168 * looping forever... 1169 */ 1170 if (mmc->f_min == 0) 1171 return -EINVAL; 1172 1173 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT)) 1174 _host->write16_hook = NULL; 1175 1176 if (pdata->flags & TMIO_MMC_USE_BUSY_TIMEOUT && !_host->get_timeout_cycles) 1177 _host->get_timeout_cycles = tmio_mmc_get_timeout_cycles; 1178 1179 ret = tmio_mmc_init_ocr(_host); 1180 if (ret < 0) 1181 return ret; 1182 1183 /* 1184 * Look for a card detect GPIO, if it fails with anything 1185 * else than a probe deferral, just live without it. 1186 */ 1187 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); 1188 if (ret == -EPROBE_DEFER) 1189 return ret; 1190 1191 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities; 1192 mmc->caps2 |= pdata->capabilities2; 1193 mmc->max_segs = pdata->max_segs ? : 32; 1194 mmc->max_blk_size = TMIO_MAX_BLK_SIZE; 1195 mmc->max_blk_count = pdata->max_blk_count ? : 1196 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs; 1197 mmc->max_req_size = min_t(size_t, 1198 mmc->max_blk_size * mmc->max_blk_count, 1199 dma_max_mapping_size(&pdev->dev)); 1200 mmc->max_seg_size = mmc->max_req_size; 1201 1202 if (mmc_host_can_gpio_ro(mmc)) 1203 _host->ops.get_ro = mmc_gpio_get_ro; 1204 1205 if (mmc_host_can_gpio_cd(mmc)) 1206 _host->ops.get_cd = mmc_gpio_get_cd; 1207 1208 /* must be set before tmio_mmc_reset() */ 1209 _host->native_hotplug = !(mmc_host_can_gpio_cd(mmc) || 1210 mmc->caps & MMC_CAP_NEEDS_POLL || 1211 !mmc_card_is_removable(mmc)); 1212 1213 /* 1214 * While using internal tmio hardware logic for card detection, we need 1215 * to ensure it stays powered for it to work. 1216 */ 1217 if (_host->native_hotplug) 1218 pm_runtime_get_noresume(&pdev->dev); 1219 1220 _host->sdio_irq_enabled = false; 1221 if (pdata->flags & TMIO_MMC_SDIO_IRQ) 1222 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL; 1223 1224 if (!_host->sdcard_irq_mask_all) 1225 _host->sdcard_irq_mask_all = TMIO_MASK_ALL; 1226 1227 _host->set_clock(_host, 0); 1228 tmio_mmc_reset(_host, false); 1229 1230 spin_lock_init(&_host->lock); 1231 mutex_init(&_host->ios_lock); 1232 1233 /* Init delayed work for request timeouts */ 1234 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work); 1235 INIT_WORK(&_host->done, tmio_mmc_done_work); 1236 1237 /* See if we also get DMA */ 1238 tmio_mmc_request_dma(_host, pdata); 1239 1240 pm_runtime_get_noresume(&pdev->dev); 1241 pm_runtime_set_active(&pdev->dev); 1242 pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 1243 pm_runtime_use_autosuspend(&pdev->dev); 1244 pm_runtime_enable(&pdev->dev); 1245 1246 ret = mmc_add_host(mmc); 1247 if (ret) 1248 goto remove_host; 1249 1250 dev_pm_qos_expose_latency_limit(&pdev->dev, 100); 1251 pm_runtime_put(&pdev->dev); 1252 1253 return 0; 1254 1255 remove_host: 1256 pm_runtime_put_noidle(&pdev->dev); 1257 tmio_mmc_host_remove(_host); 1258 return ret; 1259 } 1260 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe); 1261 1262 void tmio_mmc_host_remove(struct tmio_mmc_host *host) 1263 { 1264 struct platform_device *pdev = host->pdev; 1265 struct mmc_host *mmc = host->mmc; 1266 1267 pm_runtime_get_sync(&pdev->dev); 1268 1269 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) 1270 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000); 1271 1272 dev_pm_qos_hide_latency_limit(&pdev->dev); 1273 1274 mmc_remove_host(mmc); 1275 cancel_work_sync(&host->done); 1276 cancel_delayed_work_sync(&host->delayed_reset_work); 1277 tmio_mmc_release_dma(host); 1278 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all); 1279 1280 if (host->native_hotplug) 1281 pm_runtime_put_noidle(&pdev->dev); 1282 1283 pm_runtime_disable(&pdev->dev); 1284 pm_runtime_dont_use_autosuspend(&pdev->dev); 1285 pm_runtime_put_noidle(&pdev->dev); 1286 } 1287 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove); 1288 1289 #ifdef CONFIG_PM 1290 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host) 1291 { 1292 if (!host->clk_enable) 1293 return -ENOTSUPP; 1294 1295 return host->clk_enable(host); 1296 } 1297 1298 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host) 1299 { 1300 if (host->clk_disable) 1301 host->clk_disable(host); 1302 } 1303 1304 int tmio_mmc_host_runtime_suspend(struct device *dev) 1305 { 1306 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1307 1308 tmio_mmc_disable_mmc_irqs(host, host->sdcard_irq_mask_all); 1309 1310 if (host->clk_cache) 1311 host->set_clock(host, 0); 1312 1313 tmio_mmc_clk_disable(host); 1314 1315 return 0; 1316 } 1317 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend); 1318 1319 int tmio_mmc_host_runtime_resume(struct device *dev) 1320 { 1321 struct tmio_mmc_host *host = dev_get_drvdata(dev); 1322 1323 tmio_mmc_clk_enable(host); 1324 tmio_mmc_reset(host, false); 1325 1326 if (host->clk_cache) 1327 host->set_clock(host, host->clk_cache); 1328 1329 tmio_mmc_enable_dma(host, true); 1330 1331 return 0; 1332 } 1333 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume); 1334 #endif 1335 1336 MODULE_DESCRIPTION("TMIO MMC core driver"); 1337 MODULE_LICENSE("GPL v2"); 1338