1 /* 2 * tifm_sd.c - TI FlashMedia driver 3 * 4 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com> 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 * 10 * Special thanks to Brad Campbell for extensive testing of this driver. 11 * 12 */ 13 14 15 #include <linux/tifm.h> 16 #include <linux/mmc/host.h> 17 #include <linux/highmem.h> 18 #include <linux/scatterlist.h> 19 #include <linux/module.h> 20 #include <asm/io.h> 21 22 #define DRIVER_NAME "tifm_sd" 23 #define DRIVER_VERSION "0.8" 24 25 static bool no_dma = 0; 26 static bool fixed_timeout = 0; 27 module_param(no_dma, bool, 0644); 28 module_param(fixed_timeout, bool, 0644); 29 30 /* Constants here are mostly from OMAP5912 datasheet */ 31 #define TIFM_MMCSD_RESET 0x0002 32 #define TIFM_MMCSD_CLKMASK 0x03ff 33 #define TIFM_MMCSD_POWER 0x0800 34 #define TIFM_MMCSD_4BBUS 0x8000 35 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */ 36 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */ 37 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */ 38 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */ 39 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */ 40 #define TIFM_MMCSD_READ 0x8000 41 42 #define TIFM_MMCSD_ERRMASK 0x01e0 /* set bits: CCRC, CTO, DCRC, DTO */ 43 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */ 44 #define TIFM_MMCSD_CD 0x0002 /* card detect */ 45 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */ 46 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */ 47 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */ 48 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */ 49 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */ 50 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */ 51 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */ 52 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */ 53 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */ 54 #define TIFM_MMCSD_OCRB 0x1000 /* OCR busy */ 55 #define TIFM_MMCSD_CIRQ 0x2000 /* card irq (cmd40/sdio) */ 56 #define TIFM_MMCSD_CERR 0x4000 /* card status error */ 57 58 #define TIFM_MMCSD_ODTO 0x0040 /* open drain / extended timeout */ 59 #define TIFM_MMCSD_CARD_RO 0x0200 /* card is read-only */ 60 61 #define TIFM_MMCSD_FIFO_SIZE 0x0020 62 63 #define TIFM_MMCSD_RSP_R0 0x0000 64 #define TIFM_MMCSD_RSP_R1 0x0100 65 #define TIFM_MMCSD_RSP_R2 0x0200 66 #define TIFM_MMCSD_RSP_R3 0x0300 67 #define TIFM_MMCSD_RSP_R4 0x0400 68 #define TIFM_MMCSD_RSP_R5 0x0500 69 #define TIFM_MMCSD_RSP_R6 0x0600 70 71 #define TIFM_MMCSD_RSP_BUSY 0x0800 72 73 #define TIFM_MMCSD_CMD_BC 0x0000 74 #define TIFM_MMCSD_CMD_BCR 0x1000 75 #define TIFM_MMCSD_CMD_AC 0x2000 76 #define TIFM_MMCSD_CMD_ADTC 0x3000 77 78 #define TIFM_MMCSD_MAX_BLOCK_SIZE 0x0800UL 79 80 enum { 81 CMD_READY = 0x0001, 82 FIFO_READY = 0x0002, 83 BRS_READY = 0x0004, 84 SCMD_ACTIVE = 0x0008, 85 SCMD_READY = 0x0010, 86 CARD_BUSY = 0x0020, 87 DATA_CARRY = 0x0040 88 }; 89 90 struct tifm_sd { 91 struct tifm_dev *dev; 92 93 unsigned short eject:1, 94 open_drain:1, 95 no_dma:1; 96 unsigned short cmd_flags; 97 98 unsigned int clk_freq; 99 unsigned int clk_div; 100 unsigned long timeout_jiffies; 101 102 struct tasklet_struct finish_tasklet; 103 struct timer_list timer; 104 struct mmc_request *req; 105 106 int sg_len; 107 int sg_pos; 108 unsigned int block_pos; 109 struct scatterlist bounce_buf; 110 unsigned char bounce_buf_data[TIFM_MMCSD_MAX_BLOCK_SIZE]; 111 }; 112 113 /* for some reason, host won't respond correctly to readw/writew */ 114 static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg, 115 unsigned int off, unsigned int cnt) 116 { 117 struct tifm_dev *sock = host->dev; 118 unsigned char *buf; 119 unsigned int pos = 0, val; 120 121 buf = kmap_atomic(pg) + off; 122 if (host->cmd_flags & DATA_CARRY) { 123 buf[pos++] = host->bounce_buf_data[0]; 124 host->cmd_flags &= ~DATA_CARRY; 125 } 126 127 while (pos < cnt) { 128 val = readl(sock->addr + SOCK_MMCSD_DATA); 129 buf[pos++] = val & 0xff; 130 if (pos == cnt) { 131 host->bounce_buf_data[0] = (val >> 8) & 0xff; 132 host->cmd_flags |= DATA_CARRY; 133 break; 134 } 135 buf[pos++] = (val >> 8) & 0xff; 136 } 137 kunmap_atomic(buf - off); 138 } 139 140 static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg, 141 unsigned int off, unsigned int cnt) 142 { 143 struct tifm_dev *sock = host->dev; 144 unsigned char *buf; 145 unsigned int pos = 0, val; 146 147 buf = kmap_atomic(pg) + off; 148 if (host->cmd_flags & DATA_CARRY) { 149 val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00); 150 writel(val, sock->addr + SOCK_MMCSD_DATA); 151 host->cmd_flags &= ~DATA_CARRY; 152 } 153 154 while (pos < cnt) { 155 val = buf[pos++]; 156 if (pos == cnt) { 157 host->bounce_buf_data[0] = val & 0xff; 158 host->cmd_flags |= DATA_CARRY; 159 break; 160 } 161 val |= (buf[pos++] << 8) & 0xff00; 162 writel(val, sock->addr + SOCK_MMCSD_DATA); 163 } 164 kunmap_atomic(buf - off); 165 } 166 167 static void tifm_sd_transfer_data(struct tifm_sd *host) 168 { 169 struct mmc_data *r_data = host->req->cmd->data; 170 struct scatterlist *sg = r_data->sg; 171 unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2; 172 unsigned int p_off, p_cnt; 173 struct page *pg; 174 175 if (host->sg_pos == host->sg_len) 176 return; 177 while (t_size) { 178 cnt = sg[host->sg_pos].length - host->block_pos; 179 if (!cnt) { 180 host->block_pos = 0; 181 host->sg_pos++; 182 if (host->sg_pos == host->sg_len) { 183 if ((r_data->flags & MMC_DATA_WRITE) 184 && (host->cmd_flags & DATA_CARRY)) 185 writel(host->bounce_buf_data[0], 186 host->dev->addr 187 + SOCK_MMCSD_DATA); 188 189 return; 190 } 191 cnt = sg[host->sg_pos].length; 192 } 193 off = sg[host->sg_pos].offset + host->block_pos; 194 195 pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT); 196 p_off = offset_in_page(off); 197 p_cnt = PAGE_SIZE - p_off; 198 p_cnt = min(p_cnt, cnt); 199 p_cnt = min(p_cnt, t_size); 200 201 if (r_data->flags & MMC_DATA_READ) 202 tifm_sd_read_fifo(host, pg, p_off, p_cnt); 203 else if (r_data->flags & MMC_DATA_WRITE) 204 tifm_sd_write_fifo(host, pg, p_off, p_cnt); 205 206 t_size -= p_cnt; 207 host->block_pos += p_cnt; 208 } 209 } 210 211 static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off, 212 struct page *src, unsigned int src_off, 213 unsigned int count) 214 { 215 unsigned char *src_buf = kmap_atomic(src) + src_off; 216 unsigned char *dst_buf = kmap_atomic(dst) + dst_off; 217 218 memcpy(dst_buf, src_buf, count); 219 220 kunmap_atomic(dst_buf - dst_off); 221 kunmap_atomic(src_buf - src_off); 222 } 223 224 static void tifm_sd_bounce_block(struct tifm_sd *host, struct mmc_data *r_data) 225 { 226 struct scatterlist *sg = r_data->sg; 227 unsigned int t_size = r_data->blksz; 228 unsigned int off, cnt; 229 unsigned int p_off, p_cnt; 230 struct page *pg; 231 232 dev_dbg(&host->dev->dev, "bouncing block\n"); 233 while (t_size) { 234 cnt = sg[host->sg_pos].length - host->block_pos; 235 if (!cnt) { 236 host->block_pos = 0; 237 host->sg_pos++; 238 if (host->sg_pos == host->sg_len) 239 return; 240 cnt = sg[host->sg_pos].length; 241 } 242 off = sg[host->sg_pos].offset + host->block_pos; 243 244 pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT); 245 p_off = offset_in_page(off); 246 p_cnt = PAGE_SIZE - p_off; 247 p_cnt = min(p_cnt, cnt); 248 p_cnt = min(p_cnt, t_size); 249 250 if (r_data->flags & MMC_DATA_WRITE) 251 tifm_sd_copy_page(sg_page(&host->bounce_buf), 252 r_data->blksz - t_size, 253 pg, p_off, p_cnt); 254 else if (r_data->flags & MMC_DATA_READ) 255 tifm_sd_copy_page(pg, p_off, sg_page(&host->bounce_buf), 256 r_data->blksz - t_size, p_cnt); 257 258 t_size -= p_cnt; 259 host->block_pos += p_cnt; 260 } 261 } 262 263 static int tifm_sd_set_dma_data(struct tifm_sd *host, struct mmc_data *r_data) 264 { 265 struct tifm_dev *sock = host->dev; 266 unsigned int t_size = TIFM_DMA_TSIZE * r_data->blksz; 267 unsigned int dma_len, dma_blk_cnt, dma_off; 268 struct scatterlist *sg = NULL; 269 unsigned long flags; 270 271 if (host->sg_pos == host->sg_len) 272 return 1; 273 274 if (host->cmd_flags & DATA_CARRY) { 275 host->cmd_flags &= ~DATA_CARRY; 276 local_irq_save(flags); 277 tifm_sd_bounce_block(host, r_data); 278 local_irq_restore(flags); 279 if (host->sg_pos == host->sg_len) 280 return 1; 281 } 282 283 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos; 284 if (!dma_len) { 285 host->block_pos = 0; 286 host->sg_pos++; 287 if (host->sg_pos == host->sg_len) 288 return 1; 289 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]); 290 } 291 292 if (dma_len < t_size) { 293 dma_blk_cnt = dma_len / r_data->blksz; 294 dma_off = host->block_pos; 295 host->block_pos += dma_blk_cnt * r_data->blksz; 296 } else { 297 dma_blk_cnt = TIFM_DMA_TSIZE; 298 dma_off = host->block_pos; 299 host->block_pos += t_size; 300 } 301 302 if (dma_blk_cnt) 303 sg = &r_data->sg[host->sg_pos]; 304 else if (dma_len) { 305 if (r_data->flags & MMC_DATA_WRITE) { 306 local_irq_save(flags); 307 tifm_sd_bounce_block(host, r_data); 308 local_irq_restore(flags); 309 } else 310 host->cmd_flags |= DATA_CARRY; 311 312 sg = &host->bounce_buf; 313 dma_off = 0; 314 dma_blk_cnt = 1; 315 } else 316 return 1; 317 318 dev_dbg(&sock->dev, "setting dma for %d blocks\n", dma_blk_cnt); 319 writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS); 320 if (r_data->flags & MMC_DATA_WRITE) 321 writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN, 322 sock->addr + SOCK_DMA_CONTROL); 323 else 324 writel((dma_blk_cnt << 8) | TIFM_DMA_EN, 325 sock->addr + SOCK_DMA_CONTROL); 326 327 return 0; 328 } 329 330 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd) 331 { 332 unsigned int rc = 0; 333 334 switch (mmc_resp_type(cmd)) { 335 case MMC_RSP_NONE: 336 rc |= TIFM_MMCSD_RSP_R0; 337 break; 338 case MMC_RSP_R1B: 339 rc |= TIFM_MMCSD_RSP_BUSY; // deliberate fall-through 340 case MMC_RSP_R1: 341 rc |= TIFM_MMCSD_RSP_R1; 342 break; 343 case MMC_RSP_R2: 344 rc |= TIFM_MMCSD_RSP_R2; 345 break; 346 case MMC_RSP_R3: 347 rc |= TIFM_MMCSD_RSP_R3; 348 break; 349 default: 350 BUG(); 351 } 352 353 switch (mmc_cmd_type(cmd)) { 354 case MMC_CMD_BC: 355 rc |= TIFM_MMCSD_CMD_BC; 356 break; 357 case MMC_CMD_BCR: 358 rc |= TIFM_MMCSD_CMD_BCR; 359 break; 360 case MMC_CMD_AC: 361 rc |= TIFM_MMCSD_CMD_AC; 362 break; 363 case MMC_CMD_ADTC: 364 rc |= TIFM_MMCSD_CMD_ADTC; 365 break; 366 default: 367 BUG(); 368 } 369 return rc; 370 } 371 372 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd) 373 { 374 struct tifm_dev *sock = host->dev; 375 unsigned int cmd_mask = tifm_sd_op_flags(cmd); 376 377 if (host->open_drain) 378 cmd_mask |= TIFM_MMCSD_ODTO; 379 380 if (cmd->data && (cmd->data->flags & MMC_DATA_READ)) 381 cmd_mask |= TIFM_MMCSD_READ; 382 383 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n", 384 cmd->opcode, cmd->arg, cmd_mask); 385 386 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH); 387 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW); 388 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND); 389 } 390 391 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock) 392 { 393 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16) 394 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18); 395 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16) 396 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10); 397 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16) 398 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08); 399 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16) 400 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00); 401 } 402 403 static void tifm_sd_check_status(struct tifm_sd *host) 404 { 405 struct tifm_dev *sock = host->dev; 406 struct mmc_command *cmd = host->req->cmd; 407 408 if (cmd->error) 409 goto finish_request; 410 411 if (!(host->cmd_flags & CMD_READY)) 412 return; 413 414 if (cmd->data) { 415 if (cmd->data->error) { 416 if ((host->cmd_flags & SCMD_ACTIVE) 417 && !(host->cmd_flags & SCMD_READY)) 418 return; 419 420 goto finish_request; 421 } 422 423 if (!(host->cmd_flags & BRS_READY)) 424 return; 425 426 if (!(host->no_dma || (host->cmd_flags & FIFO_READY))) 427 return; 428 429 if (cmd->data->flags & MMC_DATA_WRITE) { 430 if (host->req->stop) { 431 if (!(host->cmd_flags & SCMD_ACTIVE)) { 432 host->cmd_flags |= SCMD_ACTIVE; 433 writel(TIFM_MMCSD_EOFB 434 | readl(sock->addr 435 + SOCK_MMCSD_INT_ENABLE), 436 sock->addr 437 + SOCK_MMCSD_INT_ENABLE); 438 tifm_sd_exec(host, host->req->stop); 439 return; 440 } else { 441 if (!(host->cmd_flags & SCMD_READY) 442 || (host->cmd_flags & CARD_BUSY)) 443 return; 444 writel((~TIFM_MMCSD_EOFB) 445 & readl(sock->addr 446 + SOCK_MMCSD_INT_ENABLE), 447 sock->addr 448 + SOCK_MMCSD_INT_ENABLE); 449 } 450 } else { 451 if (host->cmd_flags & CARD_BUSY) 452 return; 453 writel((~TIFM_MMCSD_EOFB) 454 & readl(sock->addr 455 + SOCK_MMCSD_INT_ENABLE), 456 sock->addr + SOCK_MMCSD_INT_ENABLE); 457 } 458 } else { 459 if (host->req->stop) { 460 if (!(host->cmd_flags & SCMD_ACTIVE)) { 461 host->cmd_flags |= SCMD_ACTIVE; 462 tifm_sd_exec(host, host->req->stop); 463 return; 464 } else { 465 if (!(host->cmd_flags & SCMD_READY)) 466 return; 467 } 468 } 469 } 470 } 471 finish_request: 472 tasklet_schedule(&host->finish_tasklet); 473 } 474 475 /* Called from interrupt handler */ 476 static void tifm_sd_data_event(struct tifm_dev *sock) 477 { 478 struct tifm_sd *host; 479 unsigned int fifo_status = 0; 480 struct mmc_data *r_data = NULL; 481 482 spin_lock(&sock->lock); 483 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock)); 484 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS); 485 dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n", 486 fifo_status, host->cmd_flags); 487 488 if (host->req) { 489 r_data = host->req->cmd->data; 490 491 if (r_data && (fifo_status & TIFM_FIFO_READY)) { 492 if (tifm_sd_set_dma_data(host, r_data)) { 493 host->cmd_flags |= FIFO_READY; 494 tifm_sd_check_status(host); 495 } 496 } 497 } 498 499 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS); 500 spin_unlock(&sock->lock); 501 } 502 503 /* Called from interrupt handler */ 504 static void tifm_sd_card_event(struct tifm_dev *sock) 505 { 506 struct tifm_sd *host; 507 unsigned int host_status = 0; 508 int cmd_error = 0; 509 struct mmc_command *cmd = NULL; 510 unsigned long flags; 511 512 spin_lock(&sock->lock); 513 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock)); 514 host_status = readl(sock->addr + SOCK_MMCSD_STATUS); 515 dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n", 516 host_status, host->cmd_flags); 517 518 if (host->req) { 519 cmd = host->req->cmd; 520 521 if (host_status & TIFM_MMCSD_ERRMASK) { 522 writel(host_status & TIFM_MMCSD_ERRMASK, 523 sock->addr + SOCK_MMCSD_STATUS); 524 if (host_status & TIFM_MMCSD_CTO) 525 cmd_error = -ETIMEDOUT; 526 else if (host_status & TIFM_MMCSD_CCRC) 527 cmd_error = -EILSEQ; 528 529 if (cmd->data) { 530 if (host_status & TIFM_MMCSD_DTO) 531 cmd->data->error = -ETIMEDOUT; 532 else if (host_status & TIFM_MMCSD_DCRC) 533 cmd->data->error = -EILSEQ; 534 } 535 536 writel(TIFM_FIFO_INT_SETALL, 537 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 538 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL); 539 540 if (host->req->stop) { 541 if (host->cmd_flags & SCMD_ACTIVE) { 542 host->req->stop->error = cmd_error; 543 host->cmd_flags |= SCMD_READY; 544 } else { 545 cmd->error = cmd_error; 546 host->cmd_flags |= SCMD_ACTIVE; 547 tifm_sd_exec(host, host->req->stop); 548 goto done; 549 } 550 } else 551 cmd->error = cmd_error; 552 } else { 553 if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) { 554 if (!(host->cmd_flags & CMD_READY)) { 555 host->cmd_flags |= CMD_READY; 556 tifm_sd_fetch_resp(cmd, sock); 557 } else if (host->cmd_flags & SCMD_ACTIVE) { 558 host->cmd_flags |= SCMD_READY; 559 tifm_sd_fetch_resp(host->req->stop, 560 sock); 561 } 562 } 563 if (host_status & TIFM_MMCSD_BRS) 564 host->cmd_flags |= BRS_READY; 565 } 566 567 if (host->no_dma && cmd->data) { 568 if (host_status & TIFM_MMCSD_AE) 569 writel(host_status & TIFM_MMCSD_AE, 570 sock->addr + SOCK_MMCSD_STATUS); 571 572 if (host_status & (TIFM_MMCSD_AE | TIFM_MMCSD_AF 573 | TIFM_MMCSD_BRS)) { 574 local_irq_save(flags); 575 tifm_sd_transfer_data(host); 576 local_irq_restore(flags); 577 host_status &= ~TIFM_MMCSD_AE; 578 } 579 } 580 581 if (host_status & TIFM_MMCSD_EOFB) 582 host->cmd_flags &= ~CARD_BUSY; 583 else if (host_status & TIFM_MMCSD_CB) 584 host->cmd_flags |= CARD_BUSY; 585 586 tifm_sd_check_status(host); 587 } 588 done: 589 writel(host_status, sock->addr + SOCK_MMCSD_STATUS); 590 spin_unlock(&sock->lock); 591 } 592 593 static void tifm_sd_set_data_timeout(struct tifm_sd *host, 594 struct mmc_data *data) 595 { 596 struct tifm_dev *sock = host->dev; 597 unsigned int data_timeout = data->timeout_clks; 598 599 if (fixed_timeout) 600 return; 601 602 data_timeout += data->timeout_ns / 603 ((1000000000UL / host->clk_freq) * host->clk_div); 604 605 if (data_timeout < 0xffff) { 606 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO); 607 writel((~TIFM_MMCSD_DPE) 608 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), 609 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); 610 } else { 611 data_timeout = (data_timeout >> 10) + 1; 612 if (data_timeout > 0xffff) 613 data_timeout = 0; /* set to unlimited */ 614 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO); 615 writel(TIFM_MMCSD_DPE 616 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), 617 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); 618 } 619 } 620 621 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq) 622 { 623 struct tifm_sd *host = mmc_priv(mmc); 624 struct tifm_dev *sock = host->dev; 625 unsigned long flags; 626 struct mmc_data *r_data = mrq->cmd->data; 627 628 spin_lock_irqsave(&sock->lock, flags); 629 if (host->eject) { 630 mrq->cmd->error = -ENOMEDIUM; 631 goto err_out; 632 } 633 634 if (host->req) { 635 pr_err("%s : unfinished request detected\n", 636 dev_name(&sock->dev)); 637 mrq->cmd->error = -ETIMEDOUT; 638 goto err_out; 639 } 640 641 host->cmd_flags = 0; 642 host->block_pos = 0; 643 host->sg_pos = 0; 644 645 if (mrq->data && !is_power_of_2(mrq->data->blksz)) 646 host->no_dma = 1; 647 else 648 host->no_dma = no_dma ? 1 : 0; 649 650 if (r_data) { 651 tifm_sd_set_data_timeout(host, r_data); 652 653 if ((r_data->flags & MMC_DATA_WRITE) && !mrq->stop) 654 writel(TIFM_MMCSD_EOFB 655 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 656 sock->addr + SOCK_MMCSD_INT_ENABLE); 657 658 if (host->no_dma) { 659 writel(TIFM_MMCSD_BUFINT 660 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 661 sock->addr + SOCK_MMCSD_INT_ENABLE); 662 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) 663 | (TIFM_MMCSD_FIFO_SIZE - 1), 664 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 665 666 host->sg_len = r_data->sg_len; 667 } else { 668 sg_init_one(&host->bounce_buf, host->bounce_buf_data, 669 r_data->blksz); 670 671 if(1 != tifm_map_sg(sock, &host->bounce_buf, 1, 672 r_data->flags & MMC_DATA_WRITE 673 ? PCI_DMA_TODEVICE 674 : PCI_DMA_FROMDEVICE)) { 675 pr_err("%s : scatterlist map failed\n", 676 dev_name(&sock->dev)); 677 mrq->cmd->error = -ENOMEM; 678 goto err_out; 679 } 680 host->sg_len = tifm_map_sg(sock, r_data->sg, 681 r_data->sg_len, 682 r_data->flags 683 & MMC_DATA_WRITE 684 ? PCI_DMA_TODEVICE 685 : PCI_DMA_FROMDEVICE); 686 if (host->sg_len < 1) { 687 pr_err("%s : scatterlist map failed\n", 688 dev_name(&sock->dev)); 689 tifm_unmap_sg(sock, &host->bounce_buf, 1, 690 r_data->flags & MMC_DATA_WRITE 691 ? PCI_DMA_TODEVICE 692 : PCI_DMA_FROMDEVICE); 693 mrq->cmd->error = -ENOMEM; 694 goto err_out; 695 } 696 697 writel(TIFM_FIFO_INT_SETALL, 698 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 699 writel(ilog2(r_data->blksz) - 2, 700 sock->addr + SOCK_FIFO_PAGE_SIZE); 701 writel(TIFM_FIFO_ENABLE, 702 sock->addr + SOCK_FIFO_CONTROL); 703 writel(TIFM_FIFO_INTMASK, 704 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); 705 706 if (r_data->flags & MMC_DATA_WRITE) 707 writel(TIFM_MMCSD_TXDE, 708 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 709 else 710 writel(TIFM_MMCSD_RXDE, 711 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 712 713 tifm_sd_set_dma_data(host, r_data); 714 } 715 716 writel(r_data->blocks - 1, 717 sock->addr + SOCK_MMCSD_NUM_BLOCKS); 718 writel(r_data->blksz - 1, 719 sock->addr + SOCK_MMCSD_BLOCK_LEN); 720 } 721 722 host->req = mrq; 723 mod_timer(&host->timer, jiffies + host->timeout_jiffies); 724 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL), 725 sock->addr + SOCK_CONTROL); 726 tifm_sd_exec(host, mrq->cmd); 727 spin_unlock_irqrestore(&sock->lock, flags); 728 return; 729 730 err_out: 731 spin_unlock_irqrestore(&sock->lock, flags); 732 mmc_request_done(mmc, mrq); 733 } 734 735 static void tifm_sd_end_cmd(unsigned long data) 736 { 737 struct tifm_sd *host = (struct tifm_sd*)data; 738 struct tifm_dev *sock = host->dev; 739 struct mmc_host *mmc = tifm_get_drvdata(sock); 740 struct mmc_request *mrq; 741 struct mmc_data *r_data = NULL; 742 unsigned long flags; 743 744 spin_lock_irqsave(&sock->lock, flags); 745 746 del_timer(&host->timer); 747 mrq = host->req; 748 host->req = NULL; 749 750 if (!mrq) { 751 pr_err(" %s : no request to complete?\n", 752 dev_name(&sock->dev)); 753 spin_unlock_irqrestore(&sock->lock, flags); 754 return; 755 } 756 757 r_data = mrq->cmd->data; 758 if (r_data) { 759 if (host->no_dma) { 760 writel((~TIFM_MMCSD_BUFINT) 761 & readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 762 sock->addr + SOCK_MMCSD_INT_ENABLE); 763 } else { 764 tifm_unmap_sg(sock, &host->bounce_buf, 1, 765 (r_data->flags & MMC_DATA_WRITE) 766 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); 767 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len, 768 (r_data->flags & MMC_DATA_WRITE) 769 ? PCI_DMA_TODEVICE : PCI_DMA_FROMDEVICE); 770 } 771 772 r_data->bytes_xfered = r_data->blocks 773 - readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1; 774 r_data->bytes_xfered *= r_data->blksz; 775 r_data->bytes_xfered += r_data->blksz 776 - readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1; 777 } 778 779 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL), 780 sock->addr + SOCK_CONTROL); 781 782 spin_unlock_irqrestore(&sock->lock, flags); 783 mmc_request_done(mmc, mrq); 784 } 785 786 static void tifm_sd_abort(unsigned long data) 787 { 788 struct tifm_sd *host = (struct tifm_sd*)data; 789 790 pr_err("%s : card failed to respond for a long period of time " 791 "(%x, %x)\n", 792 dev_name(&host->dev->dev), host->req->cmd->opcode, host->cmd_flags); 793 794 tifm_eject(host->dev); 795 } 796 797 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios) 798 { 799 struct tifm_sd *host = mmc_priv(mmc); 800 struct tifm_dev *sock = host->dev; 801 unsigned int clk_div1, clk_div2; 802 unsigned long flags; 803 804 spin_lock_irqsave(&sock->lock, flags); 805 806 dev_dbg(&sock->dev, "ios: clock = %u, vdd = %x, bus_mode = %x, " 807 "chip_select = %x, power_mode = %x, bus_width = %x\n", 808 ios->clock, ios->vdd, ios->bus_mode, ios->chip_select, 809 ios->power_mode, ios->bus_width); 810 811 if (ios->bus_width == MMC_BUS_WIDTH_4) { 812 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG), 813 sock->addr + SOCK_MMCSD_CONFIG); 814 } else { 815 writel((~TIFM_MMCSD_4BBUS) 816 & readl(sock->addr + SOCK_MMCSD_CONFIG), 817 sock->addr + SOCK_MMCSD_CONFIG); 818 } 819 820 if (ios->clock) { 821 clk_div1 = 20000000 / ios->clock; 822 if (!clk_div1) 823 clk_div1 = 1; 824 825 clk_div2 = 24000000 / ios->clock; 826 if (!clk_div2) 827 clk_div2 = 1; 828 829 if ((20000000 / clk_div1) > ios->clock) 830 clk_div1++; 831 if ((24000000 / clk_div2) > ios->clock) 832 clk_div2++; 833 if ((20000000 / clk_div1) > (24000000 / clk_div2)) { 834 host->clk_freq = 20000000; 835 host->clk_div = clk_div1; 836 writel((~TIFM_CTRL_FAST_CLK) 837 & readl(sock->addr + SOCK_CONTROL), 838 sock->addr + SOCK_CONTROL); 839 } else { 840 host->clk_freq = 24000000; 841 host->clk_div = clk_div2; 842 writel(TIFM_CTRL_FAST_CLK 843 | readl(sock->addr + SOCK_CONTROL), 844 sock->addr + SOCK_CONTROL); 845 } 846 } else { 847 host->clk_div = 0; 848 } 849 host->clk_div &= TIFM_MMCSD_CLKMASK; 850 writel(host->clk_div 851 | ((~TIFM_MMCSD_CLKMASK) 852 & readl(sock->addr + SOCK_MMCSD_CONFIG)), 853 sock->addr + SOCK_MMCSD_CONFIG); 854 855 host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN); 856 857 /* chip_select : maybe later */ 858 //vdd 859 //power is set before probe / after remove 860 861 spin_unlock_irqrestore(&sock->lock, flags); 862 } 863 864 static int tifm_sd_ro(struct mmc_host *mmc) 865 { 866 int rc = 0; 867 struct tifm_sd *host = mmc_priv(mmc); 868 struct tifm_dev *sock = host->dev; 869 unsigned long flags; 870 871 spin_lock_irqsave(&sock->lock, flags); 872 if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE)) 873 rc = 1; 874 spin_unlock_irqrestore(&sock->lock, flags); 875 return rc; 876 } 877 878 static const struct mmc_host_ops tifm_sd_ops = { 879 .request = tifm_sd_request, 880 .set_ios = tifm_sd_ios, 881 .get_ro = tifm_sd_ro 882 }; 883 884 static int tifm_sd_initialize_host(struct tifm_sd *host) 885 { 886 int rc; 887 unsigned int host_status = 0; 888 struct tifm_dev *sock = host->dev; 889 890 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE); 891 mmiowb(); 892 host->clk_div = 61; 893 host->clk_freq = 20000000; 894 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL); 895 writel(host->clk_div | TIFM_MMCSD_POWER, 896 sock->addr + SOCK_MMCSD_CONFIG); 897 898 /* wait up to 0.51 sec for reset */ 899 for (rc = 32; rc <= 256; rc <<= 1) { 900 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) { 901 rc = 0; 902 break; 903 } 904 msleep(rc); 905 } 906 907 if (rc) { 908 pr_err("%s : controller failed to reset\n", 909 dev_name(&sock->dev)); 910 return -ENODEV; 911 } 912 913 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS); 914 writel(host->clk_div | TIFM_MMCSD_POWER, 915 sock->addr + SOCK_MMCSD_CONFIG); 916 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 917 918 // command timeout fixed to 64 clocks for now 919 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); 920 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND); 921 922 for (rc = 16; rc <= 64; rc <<= 1) { 923 host_status = readl(sock->addr + SOCK_MMCSD_STATUS); 924 writel(host_status, sock->addr + SOCK_MMCSD_STATUS); 925 if (!(host_status & TIFM_MMCSD_ERRMASK) 926 && (host_status & TIFM_MMCSD_EOC)) { 927 rc = 0; 928 break; 929 } 930 msleep(rc); 931 } 932 933 if (rc) { 934 pr_err("%s : card not ready - probe failed on initialization\n", 935 dev_name(&sock->dev)); 936 return -ENODEV; 937 } 938 939 writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC 940 | TIFM_MMCSD_ERRMASK, 941 sock->addr + SOCK_MMCSD_INT_ENABLE); 942 mmiowb(); 943 944 return 0; 945 } 946 947 static int tifm_sd_probe(struct tifm_dev *sock) 948 { 949 struct mmc_host *mmc; 950 struct tifm_sd *host; 951 int rc = -EIO; 952 953 if (!(TIFM_SOCK_STATE_OCCUPIED 954 & readl(sock->addr + SOCK_PRESENT_STATE))) { 955 pr_warn("%s : card gone, unexpectedly\n", 956 dev_name(&sock->dev)); 957 return rc; 958 } 959 960 mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev); 961 if (!mmc) 962 return -ENOMEM; 963 964 host = mmc_priv(mmc); 965 tifm_set_drvdata(sock, mmc); 966 host->dev = sock; 967 host->timeout_jiffies = msecs_to_jiffies(1000); 968 969 tasklet_init(&host->finish_tasklet, tifm_sd_end_cmd, 970 (unsigned long)host); 971 setup_timer(&host->timer, tifm_sd_abort, (unsigned long)host); 972 973 mmc->ops = &tifm_sd_ops; 974 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 975 mmc->caps = MMC_CAP_4_BIT_DATA; 976 mmc->f_min = 20000000 / 60; 977 mmc->f_max = 24000000; 978 979 mmc->max_blk_count = 2048; 980 mmc->max_segs = mmc->max_blk_count; 981 mmc->max_blk_size = min(TIFM_MMCSD_MAX_BLOCK_SIZE, PAGE_SIZE); 982 mmc->max_seg_size = mmc->max_blk_count * mmc->max_blk_size; 983 mmc->max_req_size = mmc->max_seg_size; 984 985 sock->card_event = tifm_sd_card_event; 986 sock->data_event = tifm_sd_data_event; 987 rc = tifm_sd_initialize_host(host); 988 989 if (!rc) 990 rc = mmc_add_host(mmc); 991 if (!rc) 992 return 0; 993 994 mmc_free_host(mmc); 995 return rc; 996 } 997 998 static void tifm_sd_remove(struct tifm_dev *sock) 999 { 1000 struct mmc_host *mmc = tifm_get_drvdata(sock); 1001 struct tifm_sd *host = mmc_priv(mmc); 1002 unsigned long flags; 1003 1004 spin_lock_irqsave(&sock->lock, flags); 1005 host->eject = 1; 1006 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE); 1007 mmiowb(); 1008 spin_unlock_irqrestore(&sock->lock, flags); 1009 1010 tasklet_kill(&host->finish_tasklet); 1011 1012 spin_lock_irqsave(&sock->lock, flags); 1013 if (host->req) { 1014 writel(TIFM_FIFO_INT_SETALL, 1015 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 1016 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); 1017 host->req->cmd->error = -ENOMEDIUM; 1018 if (host->req->stop) 1019 host->req->stop->error = -ENOMEDIUM; 1020 tasklet_schedule(&host->finish_tasklet); 1021 } 1022 spin_unlock_irqrestore(&sock->lock, flags); 1023 mmc_remove_host(mmc); 1024 dev_dbg(&sock->dev, "after remove\n"); 1025 1026 mmc_free_host(mmc); 1027 } 1028 1029 #ifdef CONFIG_PM 1030 1031 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state) 1032 { 1033 return 0; 1034 } 1035 1036 static int tifm_sd_resume(struct tifm_dev *sock) 1037 { 1038 struct mmc_host *mmc = tifm_get_drvdata(sock); 1039 struct tifm_sd *host = mmc_priv(mmc); 1040 int rc; 1041 1042 rc = tifm_sd_initialize_host(host); 1043 dev_dbg(&sock->dev, "resume initialize %d\n", rc); 1044 1045 if (rc) 1046 host->eject = 1; 1047 1048 return rc; 1049 } 1050 1051 #else 1052 1053 #define tifm_sd_suspend NULL 1054 #define tifm_sd_resume NULL 1055 1056 #endif /* CONFIG_PM */ 1057 1058 static struct tifm_device_id tifm_sd_id_tbl[] = { 1059 { TIFM_TYPE_SD }, { } 1060 }; 1061 1062 static struct tifm_driver tifm_sd_driver = { 1063 .driver = { 1064 .name = DRIVER_NAME, 1065 .owner = THIS_MODULE 1066 }, 1067 .id_table = tifm_sd_id_tbl, 1068 .probe = tifm_sd_probe, 1069 .remove = tifm_sd_remove, 1070 .suspend = tifm_sd_suspend, 1071 .resume = tifm_sd_resume 1072 }; 1073 1074 static int __init tifm_sd_init(void) 1075 { 1076 return tifm_register_driver(&tifm_sd_driver); 1077 } 1078 1079 static void __exit tifm_sd_exit(void) 1080 { 1081 tifm_unregister_driver(&tifm_sd_driver); 1082 } 1083 1084 MODULE_AUTHOR("Alex Dubov"); 1085 MODULE_DESCRIPTION("TI FlashMedia SD driver"); 1086 MODULE_LICENSE("GPL"); 1087 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl); 1088 MODULE_VERSION(DRIVER_VERSION); 1089 1090 module_init(tifm_sd_init); 1091 module_exit(tifm_sd_exit); 1092