1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * tifm_sd.c - TI FlashMedia driver 4 * 5 * Copyright (C) 2006 Alex Dubov <oakad@yahoo.com> 6 * 7 * Special thanks to Brad Campbell for extensive testing of this driver. 8 */ 9 10 11 #include <linux/tifm.h> 12 #include <linux/mmc/host.h> 13 #include <linux/highmem.h> 14 #include <linux/scatterlist.h> 15 #include <linux/module.h> 16 #include <linux/workqueue.h> 17 #include <asm/io.h> 18 19 #define DRIVER_NAME "tifm_sd" 20 #define DRIVER_VERSION "0.8" 21 22 static bool no_dma = 0; 23 static bool fixed_timeout = 0; 24 module_param(no_dma, bool, 0644); 25 module_param(fixed_timeout, bool, 0644); 26 27 /* Constants here are mostly from OMAP5912 datasheet */ 28 #define TIFM_MMCSD_RESET 0x0002 29 #define TIFM_MMCSD_CLKMASK 0x03ff 30 #define TIFM_MMCSD_POWER 0x0800 31 #define TIFM_MMCSD_4BBUS 0x8000 32 #define TIFM_MMCSD_RXDE 0x8000 /* rx dma enable */ 33 #define TIFM_MMCSD_TXDE 0x0080 /* tx dma enable */ 34 #define TIFM_MMCSD_BUFINT 0x0c00 /* set bits: AE, AF */ 35 #define TIFM_MMCSD_DPE 0x0020 /* data timeout counted in kilocycles */ 36 #define TIFM_MMCSD_INAB 0x0080 /* abort / initialize command */ 37 #define TIFM_MMCSD_READ 0x8000 38 39 #define TIFM_MMCSD_ERRMASK 0x01e0 /* set bits: CCRC, CTO, DCRC, DTO */ 40 #define TIFM_MMCSD_EOC 0x0001 /* end of command phase */ 41 #define TIFM_MMCSD_CD 0x0002 /* card detect */ 42 #define TIFM_MMCSD_CB 0x0004 /* card enter busy state */ 43 #define TIFM_MMCSD_BRS 0x0008 /* block received/sent */ 44 #define TIFM_MMCSD_EOFB 0x0010 /* card exit busy state */ 45 #define TIFM_MMCSD_DTO 0x0020 /* data time-out */ 46 #define TIFM_MMCSD_DCRC 0x0040 /* data crc error */ 47 #define TIFM_MMCSD_CTO 0x0080 /* command time-out */ 48 #define TIFM_MMCSD_CCRC 0x0100 /* command crc error */ 49 #define TIFM_MMCSD_AF 0x0400 /* fifo almost full */ 50 #define TIFM_MMCSD_AE 0x0800 /* fifo almost empty */ 51 #define TIFM_MMCSD_OCRB 0x1000 /* OCR busy */ 52 #define TIFM_MMCSD_CIRQ 0x2000 /* card irq (cmd40/sdio) */ 53 #define TIFM_MMCSD_CERR 0x4000 /* card status error */ 54 55 #define TIFM_MMCSD_ODTO 0x0040 /* open drain / extended timeout */ 56 #define TIFM_MMCSD_CARD_RO 0x0200 /* card is read-only */ 57 58 #define TIFM_MMCSD_FIFO_SIZE 0x0020 59 60 #define TIFM_MMCSD_RSP_R0 0x0000 61 #define TIFM_MMCSD_RSP_R1 0x0100 62 #define TIFM_MMCSD_RSP_R2 0x0200 63 #define TIFM_MMCSD_RSP_R3 0x0300 64 #define TIFM_MMCSD_RSP_R4 0x0400 65 #define TIFM_MMCSD_RSP_R5 0x0500 66 #define TIFM_MMCSD_RSP_R6 0x0600 67 68 #define TIFM_MMCSD_RSP_BUSY 0x0800 69 70 #define TIFM_MMCSD_CMD_BC 0x0000 71 #define TIFM_MMCSD_CMD_BCR 0x1000 72 #define TIFM_MMCSD_CMD_AC 0x2000 73 #define TIFM_MMCSD_CMD_ADTC 0x3000 74 75 #define TIFM_MMCSD_MAX_BLOCK_SIZE 0x0800UL 76 77 #define TIFM_MMCSD_REQ_TIMEOUT_MS 1000 78 79 enum { 80 CMD_READY = 0x0001, 81 FIFO_READY = 0x0002, 82 BRS_READY = 0x0004, 83 SCMD_ACTIVE = 0x0008, 84 SCMD_READY = 0x0010, 85 CARD_BUSY = 0x0020, 86 DATA_CARRY = 0x0040 87 }; 88 89 struct tifm_sd { 90 struct tifm_dev *dev; 91 92 unsigned short eject:1, 93 open_drain:1, 94 no_dma:1; 95 unsigned short cmd_flags; 96 97 unsigned int clk_freq; 98 unsigned int clk_div; 99 unsigned long timeout_jiffies; 100 101 struct work_struct finish_bh_work; 102 struct timer_list timer; 103 struct mmc_request *req; 104 105 int sg_len; 106 int sg_pos; 107 unsigned int block_pos; 108 struct scatterlist bounce_buf; 109 unsigned char bounce_buf_data[TIFM_MMCSD_MAX_BLOCK_SIZE]; 110 }; 111 112 /* for some reason, host won't respond correctly to readw/writew */ 113 static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg, 114 unsigned int off, unsigned int cnt) 115 { 116 struct tifm_dev *sock = host->dev; 117 unsigned char *buf; 118 unsigned int pos = 0, val; 119 120 buf = kmap_local_page(pg) + off; 121 if (host->cmd_flags & DATA_CARRY) { 122 buf[pos++] = host->bounce_buf_data[0]; 123 host->cmd_flags &= ~DATA_CARRY; 124 } 125 126 while (pos < cnt) { 127 val = readl(sock->addr + SOCK_MMCSD_DATA); 128 buf[pos++] = val & 0xff; 129 if (pos == cnt) { 130 host->bounce_buf_data[0] = (val >> 8) & 0xff; 131 host->cmd_flags |= DATA_CARRY; 132 break; 133 } 134 buf[pos++] = (val >> 8) & 0xff; 135 } 136 kunmap_local(buf - off); 137 } 138 139 static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg, 140 unsigned int off, unsigned int cnt) 141 { 142 struct tifm_dev *sock = host->dev; 143 unsigned char *buf; 144 unsigned int pos = 0, val; 145 146 buf = kmap_local_page(pg) + off; 147 if (host->cmd_flags & DATA_CARRY) { 148 val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00); 149 writel(val, sock->addr + SOCK_MMCSD_DATA); 150 host->cmd_flags &= ~DATA_CARRY; 151 } 152 153 while (pos < cnt) { 154 val = buf[pos++]; 155 if (pos == cnt) { 156 host->bounce_buf_data[0] = val & 0xff; 157 host->cmd_flags |= DATA_CARRY; 158 break; 159 } 160 val |= (buf[pos++] << 8) & 0xff00; 161 writel(val, sock->addr + SOCK_MMCSD_DATA); 162 } 163 kunmap_local(buf - off); 164 } 165 166 static void tifm_sd_transfer_data(struct tifm_sd *host) 167 { 168 struct mmc_data *r_data = host->req->cmd->data; 169 struct scatterlist *sg = r_data->sg; 170 unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2; 171 unsigned int p_off, p_cnt; 172 struct page *pg; 173 174 if (host->sg_pos == host->sg_len) 175 return; 176 while (t_size) { 177 cnt = sg[host->sg_pos].length - host->block_pos; 178 if (!cnt) { 179 host->block_pos = 0; 180 host->sg_pos++; 181 if (host->sg_pos == host->sg_len) { 182 if ((r_data->flags & MMC_DATA_WRITE) 183 && (host->cmd_flags & DATA_CARRY)) 184 writel(host->bounce_buf_data[0], 185 host->dev->addr 186 + SOCK_MMCSD_DATA); 187 188 return; 189 } 190 cnt = sg[host->sg_pos].length; 191 } 192 off = sg[host->sg_pos].offset + host->block_pos; 193 194 pg = sg_page(&sg[host->sg_pos]) + (off >> PAGE_SHIFT); 195 p_off = offset_in_page(off); 196 p_cnt = min3(PAGE_SIZE - p_off, cnt, t_size); 197 198 if (r_data->flags & MMC_DATA_READ) 199 tifm_sd_read_fifo(host, pg, p_off, p_cnt); 200 else if (r_data->flags & MMC_DATA_WRITE) 201 tifm_sd_write_fifo(host, pg, p_off, p_cnt); 202 203 t_size -= p_cnt; 204 host->block_pos += p_cnt; 205 } 206 } 207 208 static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off, 209 struct page *src, unsigned int src_off, 210 unsigned int count) 211 { 212 unsigned char *src_buf = kmap_local_page(src) + src_off; 213 unsigned char *dst_buf = kmap_local_page(dst) + dst_off; 214 215 memcpy(dst_buf, src_buf, count); 216 217 kunmap_local(dst_buf - dst_off); 218 kunmap_local(src_buf - src_off); 219 } 220 221 static void tifm_sd_bounce_block(struct tifm_sd *host, struct mmc_data *r_data) 222 { 223 struct scatterlist *sg = r_data->sg; 224 unsigned int t_size = r_data->blksz; 225 unsigned int off, cnt; 226 unsigned int p_off, p_cnt; 227 struct page *pg; 228 229 dev_dbg(&host->dev->dev, "bouncing block\n"); 230 while (t_size) { 231 cnt = sg[host->sg_pos].length - host->block_pos; 232 if (!cnt) { 233 host->block_pos = 0; 234 host->sg_pos++; 235 if (host->sg_pos == host->sg_len) 236 return; 237 cnt = sg[host->sg_pos].length; 238 } 239 off = sg[host->sg_pos].offset + host->block_pos; 240 241 pg = sg_page(&sg[host->sg_pos]) + (off >> PAGE_SHIFT); 242 p_off = offset_in_page(off); 243 p_cnt = PAGE_SIZE - p_off; 244 p_cnt = min(p_cnt, cnt); 245 p_cnt = min(p_cnt, t_size); 246 247 if (r_data->flags & MMC_DATA_WRITE) 248 tifm_sd_copy_page(sg_page(&host->bounce_buf), 249 r_data->blksz - t_size, 250 pg, p_off, p_cnt); 251 else if (r_data->flags & MMC_DATA_READ) 252 tifm_sd_copy_page(pg, p_off, sg_page(&host->bounce_buf), 253 r_data->blksz - t_size, p_cnt); 254 255 t_size -= p_cnt; 256 host->block_pos += p_cnt; 257 } 258 } 259 260 static int tifm_sd_set_dma_data(struct tifm_sd *host, struct mmc_data *r_data) 261 { 262 struct tifm_dev *sock = host->dev; 263 unsigned int t_size = TIFM_DMA_TSIZE * r_data->blksz; 264 unsigned int dma_len, dma_blk_cnt, dma_off; 265 struct scatterlist *sg = NULL; 266 267 if (host->sg_pos == host->sg_len) 268 return 1; 269 270 if (host->cmd_flags & DATA_CARRY) { 271 host->cmd_flags &= ~DATA_CARRY; 272 tifm_sd_bounce_block(host, r_data); 273 if (host->sg_pos == host->sg_len) 274 return 1; 275 } 276 277 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos; 278 if (!dma_len) { 279 host->block_pos = 0; 280 host->sg_pos++; 281 if (host->sg_pos == host->sg_len) 282 return 1; 283 dma_len = sg_dma_len(&r_data->sg[host->sg_pos]); 284 } 285 286 if (dma_len < t_size) { 287 dma_blk_cnt = dma_len / r_data->blksz; 288 dma_off = host->block_pos; 289 host->block_pos += dma_blk_cnt * r_data->blksz; 290 } else { 291 dma_blk_cnt = TIFM_DMA_TSIZE; 292 dma_off = host->block_pos; 293 host->block_pos += t_size; 294 } 295 296 if (dma_blk_cnt) 297 sg = &r_data->sg[host->sg_pos]; 298 else if (dma_len) { 299 if (r_data->flags & MMC_DATA_WRITE) 300 tifm_sd_bounce_block(host, r_data); 301 else 302 host->cmd_flags |= DATA_CARRY; 303 304 sg = &host->bounce_buf; 305 dma_off = 0; 306 dma_blk_cnt = 1; 307 } else 308 return 1; 309 310 dev_dbg(&sock->dev, "setting dma for %d blocks\n", dma_blk_cnt); 311 writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS); 312 if (r_data->flags & MMC_DATA_WRITE) 313 writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN, 314 sock->addr + SOCK_DMA_CONTROL); 315 else 316 writel((dma_blk_cnt << 8) | TIFM_DMA_EN, 317 sock->addr + SOCK_DMA_CONTROL); 318 319 return 0; 320 } 321 322 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd) 323 { 324 unsigned int rc = 0; 325 326 switch (mmc_resp_type(cmd)) { 327 case MMC_RSP_NONE: 328 rc |= TIFM_MMCSD_RSP_R0; 329 break; 330 case MMC_RSP_R1B: 331 rc |= TIFM_MMCSD_RSP_BUSY; 332 fallthrough; 333 case MMC_RSP_R1: 334 rc |= TIFM_MMCSD_RSP_R1; 335 break; 336 case MMC_RSP_R2: 337 rc |= TIFM_MMCSD_RSP_R2; 338 break; 339 case MMC_RSP_R3: 340 rc |= TIFM_MMCSD_RSP_R3; 341 break; 342 default: 343 BUG(); 344 } 345 346 switch (mmc_cmd_type(cmd)) { 347 case MMC_CMD_BC: 348 rc |= TIFM_MMCSD_CMD_BC; 349 break; 350 case MMC_CMD_BCR: 351 rc |= TIFM_MMCSD_CMD_BCR; 352 break; 353 case MMC_CMD_AC: 354 rc |= TIFM_MMCSD_CMD_AC; 355 break; 356 case MMC_CMD_ADTC: 357 rc |= TIFM_MMCSD_CMD_ADTC; 358 break; 359 default: 360 BUG(); 361 } 362 return rc; 363 } 364 365 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd) 366 { 367 struct tifm_dev *sock = host->dev; 368 unsigned int cmd_mask = tifm_sd_op_flags(cmd); 369 370 if (host->open_drain) 371 cmd_mask |= TIFM_MMCSD_ODTO; 372 373 if (cmd->data && (cmd->data->flags & MMC_DATA_READ)) 374 cmd_mask |= TIFM_MMCSD_READ; 375 376 dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n", 377 cmd->opcode, cmd->arg, cmd_mask); 378 379 writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH); 380 writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW); 381 writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND); 382 } 383 384 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock) 385 { 386 cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16) 387 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18); 388 cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16) 389 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10); 390 cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16) 391 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08); 392 cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16) 393 | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00); 394 } 395 396 static void tifm_sd_check_status(struct tifm_sd *host) 397 { 398 struct tifm_dev *sock = host->dev; 399 struct mmc_command *cmd = host->req->cmd; 400 401 if (cmd->error) 402 goto finish_request; 403 404 if (!(host->cmd_flags & CMD_READY)) 405 return; 406 407 if (cmd->data) { 408 if (cmd->data->error) { 409 if ((host->cmd_flags & SCMD_ACTIVE) 410 && !(host->cmd_flags & SCMD_READY)) 411 return; 412 413 goto finish_request; 414 } 415 416 if (!(host->cmd_flags & BRS_READY)) 417 return; 418 419 if (!(host->no_dma || (host->cmd_flags & FIFO_READY))) 420 return; 421 422 if (cmd->data->flags & MMC_DATA_WRITE) { 423 if (host->req->stop) { 424 if (!(host->cmd_flags & SCMD_ACTIVE)) { 425 host->cmd_flags |= SCMD_ACTIVE; 426 writel(TIFM_MMCSD_EOFB 427 | readl(sock->addr 428 + SOCK_MMCSD_INT_ENABLE), 429 sock->addr 430 + SOCK_MMCSD_INT_ENABLE); 431 tifm_sd_exec(host, host->req->stop); 432 return; 433 } else { 434 if (!(host->cmd_flags & SCMD_READY) 435 || (host->cmd_flags & CARD_BUSY)) 436 return; 437 writel((~TIFM_MMCSD_EOFB) 438 & readl(sock->addr 439 + SOCK_MMCSD_INT_ENABLE), 440 sock->addr 441 + SOCK_MMCSD_INT_ENABLE); 442 } 443 } else { 444 if (host->cmd_flags & CARD_BUSY) 445 return; 446 writel((~TIFM_MMCSD_EOFB) 447 & readl(sock->addr 448 + SOCK_MMCSD_INT_ENABLE), 449 sock->addr + SOCK_MMCSD_INT_ENABLE); 450 } 451 } else { 452 if (host->req->stop) { 453 if (!(host->cmd_flags & SCMD_ACTIVE)) { 454 host->cmd_flags |= SCMD_ACTIVE; 455 tifm_sd_exec(host, host->req->stop); 456 return; 457 } else { 458 if (!(host->cmd_flags & SCMD_READY)) 459 return; 460 } 461 } 462 } 463 } 464 finish_request: 465 queue_work(system_bh_wq, &host->finish_bh_work); 466 } 467 468 /* Called from interrupt handler */ 469 static void tifm_sd_data_event(struct tifm_dev *sock) 470 { 471 struct tifm_sd *host; 472 unsigned int fifo_status = 0; 473 struct mmc_data *r_data = NULL; 474 475 spin_lock(&sock->lock); 476 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock)); 477 fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS); 478 dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n", 479 fifo_status, host->cmd_flags); 480 481 if (host->req) { 482 r_data = host->req->cmd->data; 483 484 if (r_data && (fifo_status & TIFM_FIFO_READY)) { 485 if (tifm_sd_set_dma_data(host, r_data)) { 486 host->cmd_flags |= FIFO_READY; 487 tifm_sd_check_status(host); 488 } 489 } 490 } 491 492 writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS); 493 spin_unlock(&sock->lock); 494 } 495 496 /* Called from interrupt handler */ 497 static void tifm_sd_card_event(struct tifm_dev *sock) 498 { 499 struct tifm_sd *host; 500 unsigned int host_status = 0; 501 int cmd_error = 0; 502 struct mmc_command *cmd = NULL; 503 504 spin_lock(&sock->lock); 505 host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock)); 506 host_status = readl(sock->addr + SOCK_MMCSD_STATUS); 507 dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n", 508 host_status, host->cmd_flags); 509 510 if (host->req) { 511 cmd = host->req->cmd; 512 513 if (host_status & TIFM_MMCSD_ERRMASK) { 514 writel(host_status & TIFM_MMCSD_ERRMASK, 515 sock->addr + SOCK_MMCSD_STATUS); 516 if (host_status & TIFM_MMCSD_CTO) 517 cmd_error = -ETIMEDOUT; 518 else if (host_status & TIFM_MMCSD_CCRC) 519 cmd_error = -EILSEQ; 520 521 if (cmd->data) { 522 if (host_status & TIFM_MMCSD_DTO) 523 cmd->data->error = -ETIMEDOUT; 524 else if (host_status & TIFM_MMCSD_DCRC) 525 cmd->data->error = -EILSEQ; 526 } 527 528 writel(TIFM_FIFO_INT_SETALL, 529 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 530 writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL); 531 532 if (host->req->stop) { 533 if (host->cmd_flags & SCMD_ACTIVE) { 534 host->req->stop->error = cmd_error; 535 host->cmd_flags |= SCMD_READY; 536 } else { 537 cmd->error = cmd_error; 538 host->cmd_flags |= SCMD_ACTIVE; 539 tifm_sd_exec(host, host->req->stop); 540 goto done; 541 } 542 } else 543 cmd->error = cmd_error; 544 } else { 545 if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) { 546 if (!(host->cmd_flags & CMD_READY)) { 547 host->cmd_flags |= CMD_READY; 548 tifm_sd_fetch_resp(cmd, sock); 549 } else if (host->cmd_flags & SCMD_ACTIVE) { 550 host->cmd_flags |= SCMD_READY; 551 tifm_sd_fetch_resp(host->req->stop, 552 sock); 553 } 554 } 555 if (host_status & TIFM_MMCSD_BRS) 556 host->cmd_flags |= BRS_READY; 557 } 558 559 if (host->no_dma && cmd->data) { 560 if (host_status & TIFM_MMCSD_AE) 561 writel(host_status & TIFM_MMCSD_AE, 562 sock->addr + SOCK_MMCSD_STATUS); 563 564 if (host_status & (TIFM_MMCSD_AE | TIFM_MMCSD_AF 565 | TIFM_MMCSD_BRS)) { 566 tifm_sd_transfer_data(host); 567 host_status &= ~TIFM_MMCSD_AE; 568 } 569 } 570 571 if (host_status & TIFM_MMCSD_EOFB) 572 host->cmd_flags &= ~CARD_BUSY; 573 else if (host_status & TIFM_MMCSD_CB) 574 host->cmd_flags |= CARD_BUSY; 575 576 tifm_sd_check_status(host); 577 } 578 done: 579 writel(host_status, sock->addr + SOCK_MMCSD_STATUS); 580 spin_unlock(&sock->lock); 581 } 582 583 static void tifm_sd_set_data_timeout(struct tifm_sd *host, 584 struct mmc_data *data) 585 { 586 struct tifm_dev *sock = host->dev; 587 unsigned int data_timeout = data->timeout_clks; 588 589 if (fixed_timeout) 590 return; 591 592 data_timeout += data->timeout_ns / 593 ((1000000000UL / host->clk_freq) * host->clk_div); 594 595 if (data_timeout < 0xffff) { 596 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO); 597 writel((~TIFM_MMCSD_DPE) 598 & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), 599 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); 600 } else { 601 data_timeout = (data_timeout >> 10) + 1; 602 if (data_timeout > 0xffff) 603 data_timeout = 0; /* set to unlimited */ 604 writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO); 605 writel(TIFM_MMCSD_DPE 606 | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG), 607 sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG); 608 } 609 } 610 611 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq) 612 { 613 struct tifm_sd *host = mmc_priv(mmc); 614 struct tifm_dev *sock = host->dev; 615 unsigned long flags; 616 struct mmc_data *r_data = mrq->cmd->data; 617 618 spin_lock_irqsave(&sock->lock, flags); 619 if (host->eject) { 620 mrq->cmd->error = -ENOMEDIUM; 621 goto err_out; 622 } 623 624 if (host->req) { 625 pr_err("%s : unfinished request detected\n", 626 dev_name(&sock->dev)); 627 mrq->cmd->error = -ETIMEDOUT; 628 goto err_out; 629 } 630 631 host->cmd_flags = 0; 632 host->block_pos = 0; 633 host->sg_pos = 0; 634 635 if (mrq->data && !is_power_of_2(mrq->data->blksz)) 636 host->no_dma = 1; 637 else 638 host->no_dma = no_dma ? 1 : 0; 639 640 if (r_data) { 641 tifm_sd_set_data_timeout(host, r_data); 642 643 if ((r_data->flags & MMC_DATA_WRITE) && !mrq->stop) 644 writel(TIFM_MMCSD_EOFB 645 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 646 sock->addr + SOCK_MMCSD_INT_ENABLE); 647 648 if (host->no_dma) { 649 writel(TIFM_MMCSD_BUFINT 650 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 651 sock->addr + SOCK_MMCSD_INT_ENABLE); 652 writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8) 653 | (TIFM_MMCSD_FIFO_SIZE - 1), 654 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 655 656 host->sg_len = r_data->sg_len; 657 } else { 658 sg_init_one(&host->bounce_buf, host->bounce_buf_data, 659 r_data->blksz); 660 661 if(1 != tifm_map_sg(sock, &host->bounce_buf, 1, 662 r_data->flags & MMC_DATA_WRITE 663 ? DMA_TO_DEVICE 664 : DMA_FROM_DEVICE)) { 665 pr_err("%s : scatterlist map failed\n", 666 dev_name(&sock->dev)); 667 mrq->cmd->error = -ENOMEM; 668 goto err_out; 669 } 670 host->sg_len = tifm_map_sg(sock, r_data->sg, 671 r_data->sg_len, 672 r_data->flags 673 & MMC_DATA_WRITE 674 ? DMA_TO_DEVICE 675 : DMA_FROM_DEVICE); 676 if (host->sg_len < 1) { 677 pr_err("%s : scatterlist map failed\n", 678 dev_name(&sock->dev)); 679 tifm_unmap_sg(sock, &host->bounce_buf, 1, 680 r_data->flags & MMC_DATA_WRITE 681 ? DMA_TO_DEVICE 682 : DMA_FROM_DEVICE); 683 mrq->cmd->error = -ENOMEM; 684 goto err_out; 685 } 686 687 writel(TIFM_FIFO_INT_SETALL, 688 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 689 writel(ilog2(r_data->blksz) - 2, 690 sock->addr + SOCK_FIFO_PAGE_SIZE); 691 writel(TIFM_FIFO_ENABLE, 692 sock->addr + SOCK_FIFO_CONTROL); 693 writel(TIFM_FIFO_INTMASK, 694 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); 695 696 if (r_data->flags & MMC_DATA_WRITE) 697 writel(TIFM_MMCSD_TXDE, 698 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 699 else 700 writel(TIFM_MMCSD_RXDE, 701 sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 702 703 tifm_sd_set_dma_data(host, r_data); 704 } 705 706 writel(r_data->blocks - 1, 707 sock->addr + SOCK_MMCSD_NUM_BLOCKS); 708 writel(r_data->blksz - 1, 709 sock->addr + SOCK_MMCSD_BLOCK_LEN); 710 } 711 712 host->req = mrq; 713 mod_timer(&host->timer, jiffies + host->timeout_jiffies); 714 writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL), 715 sock->addr + SOCK_CONTROL); 716 tifm_sd_exec(host, mrq->cmd); 717 spin_unlock_irqrestore(&sock->lock, flags); 718 return; 719 720 err_out: 721 spin_unlock_irqrestore(&sock->lock, flags); 722 mmc_request_done(mmc, mrq); 723 } 724 725 static void tifm_sd_end_cmd(struct work_struct *t) 726 { 727 struct tifm_sd *host = from_work(host, t, finish_bh_work); 728 struct tifm_dev *sock = host->dev; 729 struct mmc_host *mmc = tifm_get_drvdata(sock); 730 struct mmc_request *mrq; 731 struct mmc_data *r_data = NULL; 732 unsigned long flags; 733 734 spin_lock_irqsave(&sock->lock, flags); 735 736 timer_delete(&host->timer); 737 mrq = host->req; 738 host->req = NULL; 739 740 if (!mrq) { 741 pr_err(" %s : no request to complete?\n", 742 dev_name(&sock->dev)); 743 spin_unlock_irqrestore(&sock->lock, flags); 744 return; 745 } 746 747 r_data = mrq->cmd->data; 748 if (r_data) { 749 if (host->no_dma) { 750 writel((~TIFM_MMCSD_BUFINT) 751 & readl(sock->addr + SOCK_MMCSD_INT_ENABLE), 752 sock->addr + SOCK_MMCSD_INT_ENABLE); 753 } else { 754 tifm_unmap_sg(sock, &host->bounce_buf, 1, 755 (r_data->flags & MMC_DATA_WRITE) 756 ? DMA_TO_DEVICE : DMA_FROM_DEVICE); 757 tifm_unmap_sg(sock, r_data->sg, r_data->sg_len, 758 (r_data->flags & MMC_DATA_WRITE) 759 ? DMA_TO_DEVICE : DMA_FROM_DEVICE); 760 } 761 762 r_data->bytes_xfered = r_data->blocks 763 - readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1; 764 r_data->bytes_xfered *= r_data->blksz; 765 r_data->bytes_xfered += r_data->blksz 766 - readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1; 767 } 768 769 writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL), 770 sock->addr + SOCK_CONTROL); 771 772 spin_unlock_irqrestore(&sock->lock, flags); 773 mmc_request_done(mmc, mrq); 774 } 775 776 static void tifm_sd_abort(struct timer_list *t) 777 { 778 struct tifm_sd *host = timer_container_of(host, t, timer); 779 780 pr_err("%s : card failed to respond for a long period of time " 781 "(%x, %x)\n", 782 dev_name(&host->dev->dev), host->req->cmd->opcode, host->cmd_flags); 783 784 tifm_eject(host->dev); 785 } 786 787 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios) 788 { 789 struct tifm_sd *host = mmc_priv(mmc); 790 struct tifm_dev *sock = host->dev; 791 unsigned int clk_div1, clk_div2; 792 unsigned long flags; 793 794 spin_lock_irqsave(&sock->lock, flags); 795 796 dev_dbg(&sock->dev, "ios: clock = %u, vdd = %x, bus_mode = %x, " 797 "chip_select = %x, power_mode = %x, bus_width = %x\n", 798 ios->clock, ios->vdd, ios->bus_mode, ios->chip_select, 799 ios->power_mode, ios->bus_width); 800 801 if (ios->bus_width == MMC_BUS_WIDTH_4) { 802 writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG), 803 sock->addr + SOCK_MMCSD_CONFIG); 804 } else { 805 writel((~TIFM_MMCSD_4BBUS) 806 & readl(sock->addr + SOCK_MMCSD_CONFIG), 807 sock->addr + SOCK_MMCSD_CONFIG); 808 } 809 810 if (ios->clock) { 811 clk_div1 = 20000000 / ios->clock; 812 if (!clk_div1) 813 clk_div1 = 1; 814 815 clk_div2 = 24000000 / ios->clock; 816 if (!clk_div2) 817 clk_div2 = 1; 818 819 if ((20000000 / clk_div1) > ios->clock) 820 clk_div1++; 821 if ((24000000 / clk_div2) > ios->clock) 822 clk_div2++; 823 if ((20000000 / clk_div1) > (24000000 / clk_div2)) { 824 host->clk_freq = 20000000; 825 host->clk_div = clk_div1; 826 writel((~TIFM_CTRL_FAST_CLK) 827 & readl(sock->addr + SOCK_CONTROL), 828 sock->addr + SOCK_CONTROL); 829 } else { 830 host->clk_freq = 24000000; 831 host->clk_div = clk_div2; 832 writel(TIFM_CTRL_FAST_CLK 833 | readl(sock->addr + SOCK_CONTROL), 834 sock->addr + SOCK_CONTROL); 835 } 836 } else { 837 host->clk_div = 0; 838 } 839 host->clk_div &= TIFM_MMCSD_CLKMASK; 840 writel(host->clk_div 841 | ((~TIFM_MMCSD_CLKMASK) 842 & readl(sock->addr + SOCK_MMCSD_CONFIG)), 843 sock->addr + SOCK_MMCSD_CONFIG); 844 845 host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN); 846 847 /* chip_select : maybe later */ 848 //vdd 849 //power is set before probe / after remove 850 851 spin_unlock_irqrestore(&sock->lock, flags); 852 } 853 854 static int tifm_sd_ro(struct mmc_host *mmc) 855 { 856 int rc = 0; 857 struct tifm_sd *host = mmc_priv(mmc); 858 struct tifm_dev *sock = host->dev; 859 unsigned long flags; 860 861 spin_lock_irqsave(&sock->lock, flags); 862 if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE)) 863 rc = 1; 864 spin_unlock_irqrestore(&sock->lock, flags); 865 return rc; 866 } 867 868 static const struct mmc_host_ops tifm_sd_ops = { 869 .request = tifm_sd_request, 870 .set_ios = tifm_sd_ios, 871 .get_ro = tifm_sd_ro 872 }; 873 874 static int tifm_sd_initialize_host(struct tifm_sd *host) 875 { 876 int rc; 877 unsigned int host_status = 0; 878 struct tifm_dev *sock = host->dev; 879 880 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE); 881 host->clk_div = 61; 882 host->clk_freq = 20000000; 883 writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL); 884 writel(host->clk_div | TIFM_MMCSD_POWER, 885 sock->addr + SOCK_MMCSD_CONFIG); 886 887 /* wait up to 0.51 sec for reset */ 888 for (rc = 32; rc <= 256; rc <<= 1) { 889 if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) { 890 rc = 0; 891 break; 892 } 893 msleep(rc); 894 } 895 896 if (rc) { 897 pr_err("%s : controller failed to reset\n", 898 dev_name(&sock->dev)); 899 return -ENODEV; 900 } 901 902 writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS); 903 writel(host->clk_div | TIFM_MMCSD_POWER, 904 sock->addr + SOCK_MMCSD_CONFIG); 905 writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG); 906 907 // command timeout fixed to 64 clocks for now 908 writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO); 909 writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND); 910 911 for (rc = 16; rc <= 64; rc <<= 1) { 912 host_status = readl(sock->addr + SOCK_MMCSD_STATUS); 913 writel(host_status, sock->addr + SOCK_MMCSD_STATUS); 914 if (!(host_status & TIFM_MMCSD_ERRMASK) 915 && (host_status & TIFM_MMCSD_EOC)) { 916 rc = 0; 917 break; 918 } 919 msleep(rc); 920 } 921 922 if (rc) { 923 pr_err("%s : card not ready - probe failed on initialization\n", 924 dev_name(&sock->dev)); 925 return -ENODEV; 926 } 927 928 writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC 929 | TIFM_MMCSD_ERRMASK, 930 sock->addr + SOCK_MMCSD_INT_ENABLE); 931 932 return 0; 933 } 934 935 static int tifm_sd_probe(struct tifm_dev *sock) 936 { 937 struct mmc_host *mmc; 938 struct tifm_sd *host; 939 int rc = -EIO; 940 941 if (!(TIFM_SOCK_STATE_OCCUPIED 942 & readl(sock->addr + SOCK_PRESENT_STATE))) { 943 pr_warn("%s : card gone, unexpectedly\n", 944 dev_name(&sock->dev)); 945 return rc; 946 } 947 948 mmc = devm_mmc_alloc_host(&sock->dev, sizeof(*host)); 949 if (!mmc) 950 return -ENOMEM; 951 952 host = mmc_priv(mmc); 953 tifm_set_drvdata(sock, mmc); 954 host->dev = sock; 955 host->timeout_jiffies = msecs_to_jiffies(TIFM_MMCSD_REQ_TIMEOUT_MS); 956 /* 957 * We use a fixed request timeout of 1s, hence inform the core about it. 958 * A future improvement should instead respect the cmd->busy_timeout. 959 */ 960 mmc->max_busy_timeout = TIFM_MMCSD_REQ_TIMEOUT_MS; 961 962 INIT_WORK(&host->finish_bh_work, tifm_sd_end_cmd); 963 timer_setup(&host->timer, tifm_sd_abort, 0); 964 965 mmc->ops = &tifm_sd_ops; 966 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 967 mmc->caps = MMC_CAP_4_BIT_DATA; 968 mmc->f_min = 20000000 / 60; 969 mmc->f_max = 24000000; 970 971 mmc->max_blk_count = 2048; 972 mmc->max_segs = mmc->max_blk_count; 973 mmc->max_blk_size = min(TIFM_MMCSD_MAX_BLOCK_SIZE, PAGE_SIZE); 974 mmc->max_seg_size = mmc->max_blk_count * mmc->max_blk_size; 975 mmc->max_req_size = mmc->max_seg_size; 976 977 sock->card_event = tifm_sd_card_event; 978 sock->data_event = tifm_sd_data_event; 979 rc = tifm_sd_initialize_host(host); 980 981 if (!rc) 982 rc = mmc_add_host(mmc); 983 984 return rc; 985 } 986 987 static void tifm_sd_remove(struct tifm_dev *sock) 988 { 989 struct mmc_host *mmc = tifm_get_drvdata(sock); 990 struct tifm_sd *host = mmc_priv(mmc); 991 unsigned long flags; 992 993 spin_lock_irqsave(&sock->lock, flags); 994 host->eject = 1; 995 writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE); 996 spin_unlock_irqrestore(&sock->lock, flags); 997 998 cancel_work_sync(&host->finish_bh_work); 999 1000 spin_lock_irqsave(&sock->lock, flags); 1001 if (host->req) { 1002 writel(TIFM_FIFO_INT_SETALL, 1003 sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR); 1004 writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET); 1005 host->req->cmd->error = -ENOMEDIUM; 1006 if (host->req->stop) 1007 host->req->stop->error = -ENOMEDIUM; 1008 queue_work(system_bh_wq, &host->finish_bh_work); 1009 } 1010 spin_unlock_irqrestore(&sock->lock, flags); 1011 mmc_remove_host(mmc); 1012 dev_dbg(&sock->dev, "after remove\n"); 1013 } 1014 1015 #ifdef CONFIG_PM 1016 1017 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state) 1018 { 1019 return 0; 1020 } 1021 1022 static int tifm_sd_resume(struct tifm_dev *sock) 1023 { 1024 struct mmc_host *mmc = tifm_get_drvdata(sock); 1025 struct tifm_sd *host = mmc_priv(mmc); 1026 int rc; 1027 1028 rc = tifm_sd_initialize_host(host); 1029 dev_dbg(&sock->dev, "resume initialize %d\n", rc); 1030 1031 if (rc) 1032 host->eject = 1; 1033 1034 return rc; 1035 } 1036 1037 #else 1038 1039 #define tifm_sd_suspend NULL 1040 #define tifm_sd_resume NULL 1041 1042 #endif /* CONFIG_PM */ 1043 1044 static struct tifm_device_id tifm_sd_id_tbl[] = { 1045 { TIFM_TYPE_SD }, { } 1046 }; 1047 1048 static struct tifm_driver tifm_sd_driver = { 1049 .driver = { 1050 .name = DRIVER_NAME, 1051 .owner = THIS_MODULE 1052 }, 1053 .id_table = tifm_sd_id_tbl, 1054 .probe = tifm_sd_probe, 1055 .remove = tifm_sd_remove, 1056 .suspend = tifm_sd_suspend, 1057 .resume = tifm_sd_resume 1058 }; 1059 1060 static int __init tifm_sd_init(void) 1061 { 1062 return tifm_register_driver(&tifm_sd_driver); 1063 } 1064 1065 static void __exit tifm_sd_exit(void) 1066 { 1067 tifm_unregister_driver(&tifm_sd_driver); 1068 } 1069 1070 MODULE_AUTHOR("Alex Dubov"); 1071 MODULE_DESCRIPTION("TI FlashMedia SD driver"); 1072 MODULE_LICENSE("GPL"); 1073 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl); 1074 MODULE_VERSION(DRIVER_VERSION); 1075 1076 module_init(tifm_sd_init); 1077 module_exit(tifm_sd_exit); 1078