19c92ab61SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 2bb5f8ea4Sludovic.desroches@atmel.com /* 3bb5f8ea4Sludovic.desroches@atmel.com * Atmel SDMMC controller driver. 4bb5f8ea4Sludovic.desroches@atmel.com * 5bb5f8ea4Sludovic.desroches@atmel.com * Copyright (C) 2015 Atmel, 6bb5f8ea4Sludovic.desroches@atmel.com * 2015 Ludovic Desroches <ludovic.desroches@atmel.com> 7bb5f8ea4Sludovic.desroches@atmel.com */ 8bb5f8ea4Sludovic.desroches@atmel.com 9a8e809ecSMasahiro Yamada #include <linux/bitfield.h> 10bb5f8ea4Sludovic.desroches@atmel.com #include <linux/clk.h> 114e289a7dSLudovic Desroches #include <linux/delay.h> 12bb5f8ea4Sludovic.desroches@atmel.com #include <linux/err.h> 13bb5f8ea4Sludovic.desroches@atmel.com #include <linux/io.h> 14af467fadSClaudiu Beznea #include <linux/iopoll.h> 154406433dSLudovic Desroches #include <linux/kernel.h> 16bb5f8ea4Sludovic.desroches@atmel.com #include <linux/mmc/host.h> 1764e5cd72Sludovic.desroches@atmel.com #include <linux/mmc/slot-gpio.h> 18bb5f8ea4Sludovic.desroches@atmel.com #include <linux/module.h> 19bb5f8ea4Sludovic.desroches@atmel.com #include <linux/of.h> 20bb5f8ea4Sludovic.desroches@atmel.com #include <linux/of_device.h> 21f5f17813Sludovic.desroches@atmel.com #include <linux/pm.h> 22f5f17813Sludovic.desroches@atmel.com #include <linux/pm_runtime.h> 23bb5f8ea4Sludovic.desroches@atmel.com 24bb5f8ea4Sludovic.desroches@atmel.com #include "sdhci-pltfm.h" 25bb5f8ea4Sludovic.desroches@atmel.com 26d0918764SLudovic Desroches #define SDMMC_MC1R 0x204 27d0918764SLudovic Desroches #define SDMMC_MC1R_DDR BIT(3) 287a1e3f14SLudovic Desroches #define SDMMC_MC1R_FCD BIT(7) 29bb5f8ea4Sludovic.desroches@atmel.com #define SDMMC_CACR 0x230 30bb5f8ea4Sludovic.desroches@atmel.com #define SDMMC_CACR_CAPWREN BIT(0) 31bb5f8ea4Sludovic.desroches@atmel.com #define SDMMC_CACR_KEY (0x46 << 8) 32727d836aSNicolas Ferre #define SDMMC_CALCR 0x240 33727d836aSNicolas Ferre #define SDMMC_CALCR_EN BIT(0) 34727d836aSNicolas Ferre #define SDMMC_CALCR_ALWYSON BIT(4) 35bb5f8ea4Sludovic.desroches@atmel.com 364406433dSLudovic Desroches #define SDHCI_AT91_PRESET_COMMON_CONF 0x400 /* drv type B, programmable clock mode */ 374406433dSLudovic Desroches 383976656dSLudovic Desroches struct sdhci_at91_soc_data { 393976656dSLudovic Desroches const struct sdhci_pltfm_data *pdata; 403976656dSLudovic Desroches bool baseclk_is_generated_internally; 413976656dSLudovic Desroches unsigned int divider_for_baseclk; 423976656dSLudovic Desroches }; 433976656dSLudovic Desroches 44bb5f8ea4Sludovic.desroches@atmel.com struct sdhci_at91_priv { 453976656dSLudovic Desroches const struct sdhci_at91_soc_data *soc_data; 46bb5f8ea4Sludovic.desroches@atmel.com struct clk *hclock; 47bb5f8ea4Sludovic.desroches@atmel.com struct clk *gck; 48bb5f8ea4Sludovic.desroches@atmel.com struct clk *mainck; 49e2b372ebSQuentin Schulz bool restore_needed; 50727d836aSNicolas Ferre bool cal_always_on; 51bb5f8ea4Sludovic.desroches@atmel.com }; 52bb5f8ea4Sludovic.desroches@atmel.com 537a1e3f14SLudovic Desroches static void sdhci_at91_set_force_card_detect(struct sdhci_host *host) 547a1e3f14SLudovic Desroches { 557a1e3f14SLudovic Desroches u8 mc1r; 567a1e3f14SLudovic Desroches 577a1e3f14SLudovic Desroches mc1r = readb(host->ioaddr + SDMMC_MC1R); 587a1e3f14SLudovic Desroches mc1r |= SDMMC_MC1R_FCD; 597a1e3f14SLudovic Desroches writeb(mc1r, host->ioaddr + SDMMC_MC1R); 607a1e3f14SLudovic Desroches } 617a1e3f14SLudovic Desroches 624e289a7dSLudovic Desroches static void sdhci_at91_set_clock(struct sdhci_host *host, unsigned int clock) 634e289a7dSLudovic Desroches { 644e289a7dSLudovic Desroches u16 clk; 654e289a7dSLudovic Desroches 664e289a7dSLudovic Desroches host->mmc->actual_clock = 0; 674e289a7dSLudovic Desroches 684e289a7dSLudovic Desroches /* 694e289a7dSLudovic Desroches * There is no requirement to disable the internal clock before 704e289a7dSLudovic Desroches * changing the SD clock configuration. Moreover, disabling the 714e289a7dSLudovic Desroches * internal clock, changing the configuration and re-enabling the 724e289a7dSLudovic Desroches * internal clock causes some bugs. It can prevent to get the internal 734e289a7dSLudovic Desroches * clock stable flag ready and an unexpected switch to the base clock 744e289a7dSLudovic Desroches * when using presets. 754e289a7dSLudovic Desroches */ 764e289a7dSLudovic Desroches clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); 774e289a7dSLudovic Desroches clk &= SDHCI_CLOCK_INT_EN; 784e289a7dSLudovic Desroches sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 794e289a7dSLudovic Desroches 804e289a7dSLudovic Desroches if (clock == 0) 814e289a7dSLudovic Desroches return; 824e289a7dSLudovic Desroches 834e289a7dSLudovic Desroches clk = sdhci_calc_clk(host, clock, &host->mmc->actual_clock); 844e289a7dSLudovic Desroches 854e289a7dSLudovic Desroches clk |= SDHCI_CLOCK_INT_EN; 864e289a7dSLudovic Desroches sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 874e289a7dSLudovic Desroches 884e289a7dSLudovic Desroches /* Wait max 20 ms */ 8930d4b990SClaudiu Beznea if (read_poll_timeout(sdhci_readw, clk, (clk & SDHCI_CLOCK_INT_STABLE), 9030d4b990SClaudiu Beznea 1000, 20000, false, host, SDHCI_CLOCK_CONTROL)) { 914e289a7dSLudovic Desroches pr_err("%s: Internal clock never stabilised.\n", 924e289a7dSLudovic Desroches mmc_hostname(host->mmc)); 934e289a7dSLudovic Desroches return; 944e289a7dSLudovic Desroches } 954e289a7dSLudovic Desroches 964e289a7dSLudovic Desroches clk |= SDHCI_CLOCK_CARD_EN; 974e289a7dSLudovic Desroches sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); 984e289a7dSLudovic Desroches } 994e289a7dSLudovic Desroches 100519c51afSColin Ian King static void sdhci_at91_set_uhs_signaling(struct sdhci_host *host, 101519c51afSColin Ian King unsigned int timing) 102d0918764SLudovic Desroches { 103*5987e6deSEugen Hristev u8 mc1r; 104*5987e6deSEugen Hristev 105*5987e6deSEugen Hristev if (timing == MMC_TIMING_MMC_DDR52) { 106*5987e6deSEugen Hristev mc1r = sdhci_readb(host, SDMMC_MC1R); 107*5987e6deSEugen Hristev mc1r |= SDMMC_MC1R_DDR; 108*5987e6deSEugen Hristev sdhci_writeb(host, mc1r, SDMMC_MC1R); 109*5987e6deSEugen Hristev } 110d0918764SLudovic Desroches sdhci_set_uhs_signaling(host, timing); 111d0918764SLudovic Desroches } 112d0918764SLudovic Desroches 1137a1e3f14SLudovic Desroches static void sdhci_at91_reset(struct sdhci_host *host, u8 mask) 1147a1e3f14SLudovic Desroches { 115727d836aSNicolas Ferre struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 116727d836aSNicolas Ferre struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); 117af467fadSClaudiu Beznea unsigned int tmp; 118727d836aSNicolas Ferre 1197a1e3f14SLudovic Desroches sdhci_reset(host, mask); 1207a1e3f14SLudovic Desroches 12153dd0a7cSMichał Mirosław if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) 12253dd0a7cSMichał Mirosław || mmc_gpio_get_cd(host->mmc) >= 0) 1237a1e3f14SLudovic Desroches sdhci_at91_set_force_card_detect(host); 124727d836aSNicolas Ferre 125dbdea70fSEugen Hristev if (priv->cal_always_on && (mask & SDHCI_RESET_ALL)) { 126dbdea70fSEugen Hristev u32 calcr = sdhci_readl(host, SDMMC_CALCR); 127dbdea70fSEugen Hristev 128dbdea70fSEugen Hristev sdhci_writel(host, calcr | SDMMC_CALCR_ALWYSON | SDMMC_CALCR_EN, 129727d836aSNicolas Ferre SDMMC_CALCR); 130af467fadSClaudiu Beznea 131af467fadSClaudiu Beznea if (read_poll_timeout(sdhci_readl, tmp, !(tmp & SDMMC_CALCR_EN), 132af467fadSClaudiu Beznea 10, 20000, false, host, SDMMC_CALCR)) 133af467fadSClaudiu Beznea dev_err(mmc_dev(host->mmc), "Failed to calibrate\n"); 1347a1e3f14SLudovic Desroches } 135dbdea70fSEugen Hristev } 1367a1e3f14SLudovic Desroches 137bb5f8ea4Sludovic.desroches@atmel.com static const struct sdhci_ops sdhci_at91_sama5d2_ops = { 1384e289a7dSLudovic Desroches .set_clock = sdhci_at91_set_clock, 139bb5f8ea4Sludovic.desroches@atmel.com .set_bus_width = sdhci_set_bus_width, 1407a1e3f14SLudovic Desroches .reset = sdhci_at91_reset, 141d0918764SLudovic Desroches .set_uhs_signaling = sdhci_at91_set_uhs_signaling, 14298160562SNicolas Saenz Julienne .set_power = sdhci_set_power_and_bus_voltage, 143bb5f8ea4Sludovic.desroches@atmel.com }; 144bb5f8ea4Sludovic.desroches@atmel.com 1453976656dSLudovic Desroches static const struct sdhci_pltfm_data sdhci_sama5d2_pdata = { 146bb5f8ea4Sludovic.desroches@atmel.com .ops = &sdhci_at91_sama5d2_ops, 147bb5f8ea4Sludovic.desroches@atmel.com }; 148bb5f8ea4Sludovic.desroches@atmel.com 1493976656dSLudovic Desroches static const struct sdhci_at91_soc_data soc_data_sama5d2 = { 1503976656dSLudovic Desroches .pdata = &sdhci_sama5d2_pdata, 1513976656dSLudovic Desroches .baseclk_is_generated_internally = false, 1523976656dSLudovic Desroches }; 1533976656dSLudovic Desroches 1543976656dSLudovic Desroches static const struct sdhci_at91_soc_data soc_data_sam9x60 = { 1553976656dSLudovic Desroches .pdata = &sdhci_sama5d2_pdata, 1563976656dSLudovic Desroches .baseclk_is_generated_internally = true, 1573976656dSLudovic Desroches .divider_for_baseclk = 2, 1583976656dSLudovic Desroches }; 1593976656dSLudovic Desroches 160bb5f8ea4Sludovic.desroches@atmel.com static const struct of_device_id sdhci_at91_dt_match[] = { 161bb5f8ea4Sludovic.desroches@atmel.com { .compatible = "atmel,sama5d2-sdhci", .data = &soc_data_sama5d2 }, 1623976656dSLudovic Desroches { .compatible = "microchip,sam9x60-sdhci", .data = &soc_data_sam9x60 }, 163bb5f8ea4Sludovic.desroches@atmel.com {} 164bb5f8ea4Sludovic.desroches@atmel.com }; 165d9943c68SJavier Martinez Canillas MODULE_DEVICE_TABLE(of, sdhci_at91_dt_match); 166bb5f8ea4Sludovic.desroches@atmel.com 167c8a019e7SQuentin Schulz static int sdhci_at91_set_clks_presets(struct device *dev) 168c8a019e7SQuentin Schulz { 169c8a019e7SQuentin Schulz struct sdhci_host *host = dev_get_drvdata(dev); 170c8a019e7SQuentin Schulz struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 171c8a019e7SQuentin Schulz struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); 172c8a019e7SQuentin Schulz unsigned int caps0, caps1; 173c8a019e7SQuentin Schulz unsigned int clk_base, clk_mul; 1743976656dSLudovic Desroches unsigned int gck_rate, clk_base_rate; 175c8a019e7SQuentin Schulz unsigned int preset_div; 176c8a019e7SQuentin Schulz 177c8a019e7SQuentin Schulz clk_prepare_enable(priv->hclock); 178c8a019e7SQuentin Schulz caps0 = readl(host->ioaddr + SDHCI_CAPABILITIES); 179c8a019e7SQuentin Schulz caps1 = readl(host->ioaddr + SDHCI_CAPABILITIES_1); 1803976656dSLudovic Desroches 1813976656dSLudovic Desroches gck_rate = clk_get_rate(priv->gck); 1823976656dSLudovic Desroches if (priv->soc_data->baseclk_is_generated_internally) 1833976656dSLudovic Desroches clk_base_rate = gck_rate / priv->soc_data->divider_for_baseclk; 1843976656dSLudovic Desroches else 1853976656dSLudovic Desroches clk_base_rate = clk_get_rate(priv->mainck); 1863976656dSLudovic Desroches 1873976656dSLudovic Desroches clk_base = clk_base_rate / 1000000; 1883976656dSLudovic Desroches clk_mul = gck_rate / clk_base_rate - 1; 1893976656dSLudovic Desroches 1903976656dSLudovic Desroches caps0 &= ~SDHCI_CLOCK_V3_BASE_MASK; 191a8e809ecSMasahiro Yamada caps0 |= FIELD_PREP(SDHCI_CLOCK_V3_BASE_MASK, clk_base); 1923976656dSLudovic Desroches caps1 &= ~SDHCI_CLOCK_MUL_MASK; 193a8e809ecSMasahiro Yamada caps1 |= FIELD_PREP(SDHCI_CLOCK_MUL_MASK, clk_mul); 194c8a019e7SQuentin Schulz /* Set capabilities in r/w mode. */ 1953976656dSLudovic Desroches writel(SDMMC_CACR_KEY | SDMMC_CACR_CAPWREN, host->ioaddr + SDMMC_CACR); 1963976656dSLudovic Desroches writel(caps0, host->ioaddr + SDHCI_CAPABILITIES); 197c8a019e7SQuentin Schulz writel(caps1, host->ioaddr + SDHCI_CAPABILITIES_1); 198c8a019e7SQuentin Schulz /* Set capabilities in ro mode. */ 199c8a019e7SQuentin Schulz writel(0, host->ioaddr + SDMMC_CACR); 2003976656dSLudovic Desroches 201fdd8eef4SCristian Birsan dev_dbg(dev, "update clk mul to %u as gck rate is %u Hz and clk base is %u Hz\n", 2023976656dSLudovic Desroches clk_mul, gck_rate, clk_base_rate); 203c8a019e7SQuentin Schulz 204c8a019e7SQuentin Schulz /* 205c8a019e7SQuentin Schulz * We have to set preset values because it depends on the clk_mul 206c8a019e7SQuentin Schulz * value. Moreover, SDR104 is supported in a degraded mode since the 207c8a019e7SQuentin Schulz * maximum sd clock value is 120 MHz instead of 208 MHz. For that 208c8a019e7SQuentin Schulz * reason, we need to use presets to support SDR104. 209c8a019e7SQuentin Schulz */ 2103976656dSLudovic Desroches preset_div = DIV_ROUND_UP(gck_rate, 24000000) - 1; 211c8a019e7SQuentin Schulz writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div, 212c8a019e7SQuentin Schulz host->ioaddr + SDHCI_PRESET_FOR_SDR12); 2133976656dSLudovic Desroches preset_div = DIV_ROUND_UP(gck_rate, 50000000) - 1; 214c8a019e7SQuentin Schulz writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div, 215c8a019e7SQuentin Schulz host->ioaddr + SDHCI_PRESET_FOR_SDR25); 2163976656dSLudovic Desroches preset_div = DIV_ROUND_UP(gck_rate, 100000000) - 1; 217c8a019e7SQuentin Schulz writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div, 218c8a019e7SQuentin Schulz host->ioaddr + SDHCI_PRESET_FOR_SDR50); 2193976656dSLudovic Desroches preset_div = DIV_ROUND_UP(gck_rate, 120000000) - 1; 220c8a019e7SQuentin Schulz writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div, 221c8a019e7SQuentin Schulz host->ioaddr + SDHCI_PRESET_FOR_SDR104); 2223976656dSLudovic Desroches preset_div = DIV_ROUND_UP(gck_rate, 50000000) - 1; 223c8a019e7SQuentin Schulz writew(SDHCI_AT91_PRESET_COMMON_CONF | preset_div, 224c8a019e7SQuentin Schulz host->ioaddr + SDHCI_PRESET_FOR_DDR50); 225c8a019e7SQuentin Schulz 226c8a019e7SQuentin Schulz clk_prepare_enable(priv->mainck); 227c8a019e7SQuentin Schulz clk_prepare_enable(priv->gck); 228c8a019e7SQuentin Schulz 229c8a019e7SQuentin Schulz return 0; 230c8a019e7SQuentin Schulz } 231c8a019e7SQuentin Schulz 232e2b372ebSQuentin Schulz #ifdef CONFIG_PM_SLEEP 233e2b372ebSQuentin Schulz static int sdhci_at91_suspend(struct device *dev) 234e2b372ebSQuentin Schulz { 235e2b372ebSQuentin Schulz struct sdhci_host *host = dev_get_drvdata(dev); 236e2b372ebSQuentin Schulz struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 237e2b372ebSQuentin Schulz struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); 238e2b372ebSQuentin Schulz int ret; 239e2b372ebSQuentin Schulz 240e2b372ebSQuentin Schulz ret = pm_runtime_force_suspend(dev); 241e2b372ebSQuentin Schulz 242e2b372ebSQuentin Schulz priv->restore_needed = true; 243e2b372ebSQuentin Schulz 244e2b372ebSQuentin Schulz return ret; 245e2b372ebSQuentin Schulz } 246e2b372ebSQuentin Schulz #endif /* CONFIG_PM_SLEEP */ 247e2b372ebSQuentin Schulz 248f5f17813Sludovic.desroches@atmel.com #ifdef CONFIG_PM 249f5f17813Sludovic.desroches@atmel.com static int sdhci_at91_runtime_suspend(struct device *dev) 250f5f17813Sludovic.desroches@atmel.com { 251f5f17813Sludovic.desroches@atmel.com struct sdhci_host *host = dev_get_drvdata(dev); 252f5f17813Sludovic.desroches@atmel.com struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 25310f1c135SJisheng Zhang struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); 254f5f17813Sludovic.desroches@atmel.com int ret; 255f5f17813Sludovic.desroches@atmel.com 256f5f17813Sludovic.desroches@atmel.com ret = sdhci_runtime_suspend_host(host); 257f5f17813Sludovic.desroches@atmel.com 258d38dcad4SAdrian Hunter if (host->tuning_mode != SDHCI_TUNING_MODE_3) 259d38dcad4SAdrian Hunter mmc_retune_needed(host->mmc); 260d38dcad4SAdrian Hunter 261f5f17813Sludovic.desroches@atmel.com clk_disable_unprepare(priv->gck); 262f5f17813Sludovic.desroches@atmel.com clk_disable_unprepare(priv->hclock); 263f5f17813Sludovic.desroches@atmel.com clk_disable_unprepare(priv->mainck); 264f5f17813Sludovic.desroches@atmel.com 265f5f17813Sludovic.desroches@atmel.com return ret; 266f5f17813Sludovic.desroches@atmel.com } 267f5f17813Sludovic.desroches@atmel.com 268f5f17813Sludovic.desroches@atmel.com static int sdhci_at91_runtime_resume(struct device *dev) 269f5f17813Sludovic.desroches@atmel.com { 270f5f17813Sludovic.desroches@atmel.com struct sdhci_host *host = dev_get_drvdata(dev); 271f5f17813Sludovic.desroches@atmel.com struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 27210f1c135SJisheng Zhang struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); 273f5f17813Sludovic.desroches@atmel.com int ret; 274f5f17813Sludovic.desroches@atmel.com 275e2b372ebSQuentin Schulz if (priv->restore_needed) { 276e2b372ebSQuentin Schulz ret = sdhci_at91_set_clks_presets(dev); 277e2b372ebSQuentin Schulz if (ret) 278e2b372ebSQuentin Schulz return ret; 279e2b372ebSQuentin Schulz 280e2b372ebSQuentin Schulz priv->restore_needed = false; 281e2b372ebSQuentin Schulz goto out; 282e2b372ebSQuentin Schulz } 283e2b372ebSQuentin Schulz 284f5f17813Sludovic.desroches@atmel.com ret = clk_prepare_enable(priv->mainck); 285f5f17813Sludovic.desroches@atmel.com if (ret) { 286f5f17813Sludovic.desroches@atmel.com dev_err(dev, "can't enable mainck\n"); 287f5f17813Sludovic.desroches@atmel.com return ret; 288f5f17813Sludovic.desroches@atmel.com } 289f5f17813Sludovic.desroches@atmel.com 290f5f17813Sludovic.desroches@atmel.com ret = clk_prepare_enable(priv->hclock); 291f5f17813Sludovic.desroches@atmel.com if (ret) { 292f5f17813Sludovic.desroches@atmel.com dev_err(dev, "can't enable hclock\n"); 293f5f17813Sludovic.desroches@atmel.com return ret; 294f5f17813Sludovic.desroches@atmel.com } 295f5f17813Sludovic.desroches@atmel.com 296f5f17813Sludovic.desroches@atmel.com ret = clk_prepare_enable(priv->gck); 297f5f17813Sludovic.desroches@atmel.com if (ret) { 298f5f17813Sludovic.desroches@atmel.com dev_err(dev, "can't enable gck\n"); 299f5f17813Sludovic.desroches@atmel.com return ret; 300f5f17813Sludovic.desroches@atmel.com } 301f5f17813Sludovic.desroches@atmel.com 302e2b372ebSQuentin Schulz out: 303c6303c5dSBaolin Wang return sdhci_runtime_resume_host(host, 0); 304f5f17813Sludovic.desroches@atmel.com } 305f5f17813Sludovic.desroches@atmel.com #endif /* CONFIG_PM */ 306f5f17813Sludovic.desroches@atmel.com 307f5f17813Sludovic.desroches@atmel.com static const struct dev_pm_ops sdhci_at91_dev_pm_ops = { 308e2b372ebSQuentin Schulz SET_SYSTEM_SLEEP_PM_OPS(sdhci_at91_suspend, pm_runtime_force_resume) 309f5f17813Sludovic.desroches@atmel.com SET_RUNTIME_PM_OPS(sdhci_at91_runtime_suspend, 310f5f17813Sludovic.desroches@atmel.com sdhci_at91_runtime_resume, 311f5f17813Sludovic.desroches@atmel.com NULL) 312f5f17813Sludovic.desroches@atmel.com }; 313f5f17813Sludovic.desroches@atmel.com 314bb5f8ea4Sludovic.desroches@atmel.com static int sdhci_at91_probe(struct platform_device *pdev) 315bb5f8ea4Sludovic.desroches@atmel.com { 3163976656dSLudovic Desroches const struct sdhci_at91_soc_data *soc_data; 317bb5f8ea4Sludovic.desroches@atmel.com struct sdhci_host *host; 318bb5f8ea4Sludovic.desroches@atmel.com struct sdhci_pltfm_host *pltfm_host; 319bb5f8ea4Sludovic.desroches@atmel.com struct sdhci_at91_priv *priv; 320bb5f8ea4Sludovic.desroches@atmel.com int ret; 321bb5f8ea4Sludovic.desroches@atmel.com 322685e013bSBean Huo soc_data = of_device_get_match_data(&pdev->dev); 323685e013bSBean Huo if (!soc_data) 324bb5f8ea4Sludovic.desroches@atmel.com return -EINVAL; 325bb5f8ea4Sludovic.desroches@atmel.com 3263976656dSLudovic Desroches host = sdhci_pltfm_init(pdev, soc_data->pdata, sizeof(*priv)); 32710f1c135SJisheng Zhang if (IS_ERR(host)) 32810f1c135SJisheng Zhang return PTR_ERR(host); 32910f1c135SJisheng Zhang 33010f1c135SJisheng Zhang pltfm_host = sdhci_priv(host); 33110f1c135SJisheng Zhang priv = sdhci_pltfm_priv(pltfm_host); 3323976656dSLudovic Desroches priv->soc_data = soc_data; 333bb5f8ea4Sludovic.desroches@atmel.com 334bb5f8ea4Sludovic.desroches@atmel.com priv->mainck = devm_clk_get(&pdev->dev, "baseclk"); 335bb5f8ea4Sludovic.desroches@atmel.com if (IS_ERR(priv->mainck)) { 3363976656dSLudovic Desroches if (soc_data->baseclk_is_generated_internally) { 3373976656dSLudovic Desroches priv->mainck = NULL; 3383976656dSLudovic Desroches } else { 339bb5f8ea4Sludovic.desroches@atmel.com dev_err(&pdev->dev, "failed to get baseclk\n"); 340a04184ceSMichał Mirosław ret = PTR_ERR(priv->mainck); 341a04184ceSMichał Mirosław goto sdhci_pltfm_free; 342bb5f8ea4Sludovic.desroches@atmel.com } 3433976656dSLudovic Desroches } 344bb5f8ea4Sludovic.desroches@atmel.com 345bb5f8ea4Sludovic.desroches@atmel.com priv->hclock = devm_clk_get(&pdev->dev, "hclock"); 346bb5f8ea4Sludovic.desroches@atmel.com if (IS_ERR(priv->hclock)) { 347bb5f8ea4Sludovic.desroches@atmel.com dev_err(&pdev->dev, "failed to get hclock\n"); 348a04184ceSMichał Mirosław ret = PTR_ERR(priv->hclock); 349a04184ceSMichał Mirosław goto sdhci_pltfm_free; 350bb5f8ea4Sludovic.desroches@atmel.com } 351bb5f8ea4Sludovic.desroches@atmel.com 352bb5f8ea4Sludovic.desroches@atmel.com priv->gck = devm_clk_get(&pdev->dev, "multclk"); 353bb5f8ea4Sludovic.desroches@atmel.com if (IS_ERR(priv->gck)) { 354bb5f8ea4Sludovic.desroches@atmel.com dev_err(&pdev->dev, "failed to get multclk\n"); 355a04184ceSMichał Mirosław ret = PTR_ERR(priv->gck); 356a04184ceSMichał Mirosław goto sdhci_pltfm_free; 357bb5f8ea4Sludovic.desroches@atmel.com } 358bb5f8ea4Sludovic.desroches@atmel.com 359c8a019e7SQuentin Schulz ret = sdhci_at91_set_clks_presets(&pdev->dev); 360c8a019e7SQuentin Schulz if (ret) 361c8a019e7SQuentin Schulz goto sdhci_pltfm_free; 362bb5f8ea4Sludovic.desroches@atmel.com 363e2b372ebSQuentin Schulz priv->restore_needed = false; 364e2b372ebSQuentin Schulz 365727d836aSNicolas Ferre /* 366727d836aSNicolas Ferre * if SDCAL pin is wrongly connected, we must enable 367727d836aSNicolas Ferre * the analog calibration cell permanently. 368727d836aSNicolas Ferre */ 369727d836aSNicolas Ferre priv->cal_always_on = 370727d836aSNicolas Ferre device_property_read_bool(&pdev->dev, 371727d836aSNicolas Ferre "microchip,sdcal-inverted"); 372727d836aSNicolas Ferre 373bb5f8ea4Sludovic.desroches@atmel.com ret = mmc_of_parse(host->mmc); 374bb5f8ea4Sludovic.desroches@atmel.com if (ret) 375bb5f8ea4Sludovic.desroches@atmel.com goto clocks_disable_unprepare; 376bb5f8ea4Sludovic.desroches@atmel.com 377bb5f8ea4Sludovic.desroches@atmel.com sdhci_get_of_property(pdev); 378bb5f8ea4Sludovic.desroches@atmel.com 379f5f17813Sludovic.desroches@atmel.com pm_runtime_get_noresume(&pdev->dev); 380f5f17813Sludovic.desroches@atmel.com pm_runtime_set_active(&pdev->dev); 381f5f17813Sludovic.desroches@atmel.com pm_runtime_enable(&pdev->dev); 382f5f17813Sludovic.desroches@atmel.com pm_runtime_set_autosuspend_delay(&pdev->dev, 50); 383f5f17813Sludovic.desroches@atmel.com pm_runtime_use_autosuspend(&pdev->dev); 384f5f17813Sludovic.desroches@atmel.com 3857871aa60SEugen Hristev /* HS200 is broken at this moment */ 386fed23c58SEugen Hristev host->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200; 3877871aa60SEugen Hristev 388bb5f8ea4Sludovic.desroches@atmel.com ret = sdhci_add_host(host); 389bb5f8ea4Sludovic.desroches@atmel.com if (ret) 390f5f17813Sludovic.desroches@atmel.com goto pm_runtime_disable; 391f5f17813Sludovic.desroches@atmel.com 39264e5cd72Sludovic.desroches@atmel.com /* 39364e5cd72Sludovic.desroches@atmel.com * When calling sdhci_runtime_suspend_host(), the sdhci layer makes 39464e5cd72Sludovic.desroches@atmel.com * the assumption that all the clocks of the controller are disabled. 39564e5cd72Sludovic.desroches@atmel.com * It means we can't get irq from it when it is runtime suspended. 39664e5cd72Sludovic.desroches@atmel.com * For that reason, it is not planned to wake-up on a card detect irq 39764e5cd72Sludovic.desroches@atmel.com * from the controller. 39864e5cd72Sludovic.desroches@atmel.com * If we want to use runtime PM and to be able to wake-up on card 39964e5cd72Sludovic.desroches@atmel.com * insertion, we have to use a GPIO for the card detection or we can 40064e5cd72Sludovic.desroches@atmel.com * use polling. Be aware that using polling will resume/suspend the 40164e5cd72Sludovic.desroches@atmel.com * controller between each attempt. 40264e5cd72Sludovic.desroches@atmel.com * Disable SDHCI_QUIRK_BROKEN_CARD_DETECTION to be sure nobody tries 40364e5cd72Sludovic.desroches@atmel.com * to enable polling via device tree with broken-cd property. 40464e5cd72Sludovic.desroches@atmel.com */ 405860951c5SJaehoon Chung if (mmc_card_is_removable(host->mmc) && 406287980e4SArnd Bergmann mmc_gpio_get_cd(host->mmc) < 0) { 40764e5cd72Sludovic.desroches@atmel.com host->mmc->caps |= MMC_CAP_NEEDS_POLL; 40864e5cd72Sludovic.desroches@atmel.com host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION; 40964e5cd72Sludovic.desroches@atmel.com } 41064e5cd72Sludovic.desroches@atmel.com 4117a1e3f14SLudovic Desroches /* 4127a1e3f14SLudovic Desroches * If the device attached to the MMC bus is not removable, it is safer 4137a1e3f14SLudovic Desroches * to set the Force Card Detect bit. People often don't connect the 4147a1e3f14SLudovic Desroches * card detect signal and use this pin for another purpose. If the card 4157a1e3f14SLudovic Desroches * detect pin is not muxed to SDHCI controller, a default value is 4167a1e3f14SLudovic Desroches * used. This value can be different from a SoC revision to another 4177a1e3f14SLudovic Desroches * one. Problems come when this default value is not card present. To 4187a1e3f14SLudovic Desroches * avoid this case, if the device is non removable then the card 4197a1e3f14SLudovic Desroches * detection procedure using the SDMCC_CD signal is bypassed. 4207a1e3f14SLudovic Desroches * This bit is reset when a software reset for all command is performed 4217a1e3f14SLudovic Desroches * so we need to implement our own reset function to set back this bit. 42253dd0a7cSMichał Mirosław * 42353dd0a7cSMichał Mirosław * WA: SAMA5D2 doesn't drive CMD if using CD GPIO line. 4247a1e3f14SLudovic Desroches */ 42553dd0a7cSMichał Mirosław if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) 42653dd0a7cSMichał Mirosław || mmc_gpio_get_cd(host->mmc) >= 0) 4277a1e3f14SLudovic Desroches sdhci_at91_set_force_card_detect(host); 4287a1e3f14SLudovic Desroches 429f5f17813Sludovic.desroches@atmel.com pm_runtime_put_autosuspend(&pdev->dev); 430bb5f8ea4Sludovic.desroches@atmel.com 431bb5f8ea4Sludovic.desroches@atmel.com return 0; 432bb5f8ea4Sludovic.desroches@atmel.com 433f5f17813Sludovic.desroches@atmel.com pm_runtime_disable: 434f5f17813Sludovic.desroches@atmel.com pm_runtime_disable(&pdev->dev); 435f5f17813Sludovic.desroches@atmel.com pm_runtime_set_suspended(&pdev->dev); 4362df9d58fSJisheng Zhang pm_runtime_put_noidle(&pdev->dev); 437bb5f8ea4Sludovic.desroches@atmel.com clocks_disable_unprepare: 438bb5f8ea4Sludovic.desroches@atmel.com clk_disable_unprepare(priv->gck); 439bb5f8ea4Sludovic.desroches@atmel.com clk_disable_unprepare(priv->mainck); 440bb5f8ea4Sludovic.desroches@atmel.com clk_disable_unprepare(priv->hclock); 441c8a019e7SQuentin Schulz sdhci_pltfm_free: 442bb5f8ea4Sludovic.desroches@atmel.com sdhci_pltfm_free(pdev); 443bb5f8ea4Sludovic.desroches@atmel.com return ret; 444bb5f8ea4Sludovic.desroches@atmel.com } 445bb5f8ea4Sludovic.desroches@atmel.com 446bb5f8ea4Sludovic.desroches@atmel.com static int sdhci_at91_remove(struct platform_device *pdev) 447bb5f8ea4Sludovic.desroches@atmel.com { 448bb5f8ea4Sludovic.desroches@atmel.com struct sdhci_host *host = platform_get_drvdata(pdev); 449bb5f8ea4Sludovic.desroches@atmel.com struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 45010f1c135SJisheng Zhang struct sdhci_at91_priv *priv = sdhci_pltfm_priv(pltfm_host); 45110f1c135SJisheng Zhang struct clk *gck = priv->gck; 45210f1c135SJisheng Zhang struct clk *hclock = priv->hclock; 45310f1c135SJisheng Zhang struct clk *mainck = priv->mainck; 454bb5f8ea4Sludovic.desroches@atmel.com 455f5f17813Sludovic.desroches@atmel.com pm_runtime_get_sync(&pdev->dev); 456f5f17813Sludovic.desroches@atmel.com pm_runtime_disable(&pdev->dev); 457f5f17813Sludovic.desroches@atmel.com pm_runtime_put_noidle(&pdev->dev); 458f5f17813Sludovic.desroches@atmel.com 459bb5f8ea4Sludovic.desroches@atmel.com sdhci_pltfm_unregister(pdev); 460bb5f8ea4Sludovic.desroches@atmel.com 46110f1c135SJisheng Zhang clk_disable_unprepare(gck); 46210f1c135SJisheng Zhang clk_disable_unprepare(hclock); 46310f1c135SJisheng Zhang clk_disable_unprepare(mainck); 464bb5f8ea4Sludovic.desroches@atmel.com 465bb5f8ea4Sludovic.desroches@atmel.com return 0; 466bb5f8ea4Sludovic.desroches@atmel.com } 467bb5f8ea4Sludovic.desroches@atmel.com 468bb5f8ea4Sludovic.desroches@atmel.com static struct platform_driver sdhci_at91_driver = { 469bb5f8ea4Sludovic.desroches@atmel.com .driver = { 470bb5f8ea4Sludovic.desroches@atmel.com .name = "sdhci-at91", 47121b2cec6SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 472bb5f8ea4Sludovic.desroches@atmel.com .of_match_table = sdhci_at91_dt_match, 473f5f17813Sludovic.desroches@atmel.com .pm = &sdhci_at91_dev_pm_ops, 474bb5f8ea4Sludovic.desroches@atmel.com }, 475bb5f8ea4Sludovic.desroches@atmel.com .probe = sdhci_at91_probe, 476bb5f8ea4Sludovic.desroches@atmel.com .remove = sdhci_at91_remove, 477bb5f8ea4Sludovic.desroches@atmel.com }; 478bb5f8ea4Sludovic.desroches@atmel.com 479bb5f8ea4Sludovic.desroches@atmel.com module_platform_driver(sdhci_at91_driver); 480bb5f8ea4Sludovic.desroches@atmel.com 481bb5f8ea4Sludovic.desroches@atmel.com MODULE_DESCRIPTION("SDHCI driver for at91"); 482bb5f8ea4Sludovic.desroches@atmel.com MODULE_AUTHOR("Ludovic Desroches <ludovic.desroches@atmel.com>"); 483bb5f8ea4Sludovic.desroches@atmel.com MODULE_LICENSE("GPL v2"); 484