1 /* 2 * Arasan Secure Digital Host Controller Interface. 3 * Copyright (C) 2011 - 2012 Michal Simek <monstr@monstr.eu> 4 * Copyright (c) 2012 Wind River Systems, Inc. 5 * Copyright (C) 2013 Pengutronix e.K. 6 * Copyright (C) 2013 Xilinx Inc. 7 * 8 * Based on sdhci-of-esdhc.c 9 * 10 * Copyright (c) 2007 Freescale Semiconductor, Inc. 11 * Copyright (c) 2009 MontaVista Software, Inc. 12 * 13 * Authors: Xiaobo Xie <X.Xie@freescale.com> 14 * Anton Vorontsov <avorontsov@ru.mvista.com> 15 * 16 * This program is free software; you can redistribute it and/or modify 17 * it under the terms of the GNU General Public License as published by 18 * the Free Software Foundation; either version 2 of the License, or (at 19 * your option) any later version. 20 */ 21 22 #include <linux/module.h> 23 #include "sdhci-pltfm.h" 24 25 #define SDHCI_ARASAN_CLK_CTRL_OFFSET 0x2c 26 27 #define CLK_CTRL_TIMEOUT_SHIFT 16 28 #define CLK_CTRL_TIMEOUT_MASK (0xf << CLK_CTRL_TIMEOUT_SHIFT) 29 #define CLK_CTRL_TIMEOUT_MIN_EXP 13 30 31 /** 32 * struct sdhci_arasan_data 33 * @clk_ahb: Pointer to the AHB clock 34 */ 35 struct sdhci_arasan_data { 36 struct clk *clk_ahb; 37 }; 38 39 static unsigned int sdhci_arasan_get_timeout_clock(struct sdhci_host *host) 40 { 41 u32 div; 42 unsigned long freq; 43 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 44 45 div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET); 46 div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT; 47 48 freq = clk_get_rate(pltfm_host->clk); 49 freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div); 50 51 return freq; 52 } 53 54 static struct sdhci_ops sdhci_arasan_ops = { 55 .set_clock = sdhci_set_clock, 56 .get_max_clock = sdhci_pltfm_clk_get_max_clock, 57 .get_timeout_clock = sdhci_arasan_get_timeout_clock, 58 .set_bus_width = sdhci_set_bus_width, 59 .reset = sdhci_reset, 60 .set_uhs_signaling = sdhci_set_uhs_signaling, 61 }; 62 63 static struct sdhci_pltfm_data sdhci_arasan_pdata = { 64 .ops = &sdhci_arasan_ops, 65 }; 66 67 #ifdef CONFIG_PM_SLEEP 68 /** 69 * sdhci_arasan_suspend - Suspend method for the driver 70 * @dev: Address of the device structure 71 * Returns 0 on success and error value on error 72 * 73 * Put the device in a low power state. 74 */ 75 static int sdhci_arasan_suspend(struct device *dev) 76 { 77 struct platform_device *pdev = to_platform_device(dev); 78 struct sdhci_host *host = platform_get_drvdata(pdev); 79 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 80 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv; 81 int ret; 82 83 ret = sdhci_suspend_host(host); 84 if (ret) 85 return ret; 86 87 clk_disable(pltfm_host->clk); 88 clk_disable(sdhci_arasan->clk_ahb); 89 90 return 0; 91 } 92 93 /** 94 * sdhci_arasan_resume - Resume method for the driver 95 * @dev: Address of the device structure 96 * Returns 0 on success and error value on error 97 * 98 * Resume operation after suspend 99 */ 100 static int sdhci_arasan_resume(struct device *dev) 101 { 102 struct platform_device *pdev = to_platform_device(dev); 103 struct sdhci_host *host = platform_get_drvdata(pdev); 104 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 105 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv; 106 int ret; 107 108 ret = clk_enable(sdhci_arasan->clk_ahb); 109 if (ret) { 110 dev_err(dev, "Cannot enable AHB clock.\n"); 111 return ret; 112 } 113 114 ret = clk_enable(pltfm_host->clk); 115 if (ret) { 116 dev_err(dev, "Cannot enable SD clock.\n"); 117 clk_disable(sdhci_arasan->clk_ahb); 118 return ret; 119 } 120 121 return sdhci_resume_host(host); 122 } 123 #endif /* ! CONFIG_PM_SLEEP */ 124 125 static SIMPLE_DEV_PM_OPS(sdhci_arasan_dev_pm_ops, sdhci_arasan_suspend, 126 sdhci_arasan_resume); 127 128 static int sdhci_arasan_probe(struct platform_device *pdev) 129 { 130 int ret; 131 struct clk *clk_xin; 132 struct sdhci_host *host; 133 struct sdhci_pltfm_host *pltfm_host; 134 struct sdhci_arasan_data *sdhci_arasan; 135 136 sdhci_arasan = devm_kzalloc(&pdev->dev, sizeof(*sdhci_arasan), 137 GFP_KERNEL); 138 if (!sdhci_arasan) 139 return -ENOMEM; 140 141 sdhci_arasan->clk_ahb = devm_clk_get(&pdev->dev, "clk_ahb"); 142 if (IS_ERR(sdhci_arasan->clk_ahb)) { 143 dev_err(&pdev->dev, "clk_ahb clock not found.\n"); 144 return PTR_ERR(sdhci_arasan->clk_ahb); 145 } 146 147 clk_xin = devm_clk_get(&pdev->dev, "clk_xin"); 148 if (IS_ERR(clk_xin)) { 149 dev_err(&pdev->dev, "clk_xin clock not found.\n"); 150 return PTR_ERR(clk_xin); 151 } 152 153 ret = clk_prepare_enable(sdhci_arasan->clk_ahb); 154 if (ret) { 155 dev_err(&pdev->dev, "Unable to enable AHB clock.\n"); 156 return ret; 157 } 158 159 ret = clk_prepare_enable(clk_xin); 160 if (ret) { 161 dev_err(&pdev->dev, "Unable to enable SD clock.\n"); 162 goto clk_dis_ahb; 163 } 164 165 host = sdhci_pltfm_init(pdev, &sdhci_arasan_pdata, 0); 166 if (IS_ERR(host)) { 167 ret = PTR_ERR(host); 168 dev_err(&pdev->dev, "platform init failed (%u)\n", ret); 169 goto clk_disable_all; 170 } 171 172 sdhci_get_of_property(pdev); 173 pltfm_host = sdhci_priv(host); 174 pltfm_host->priv = sdhci_arasan; 175 pltfm_host->clk = clk_xin; 176 177 ret = sdhci_add_host(host); 178 if (ret) { 179 dev_err(&pdev->dev, "platform register failed (%u)\n", ret); 180 goto err_pltfm_free; 181 } 182 183 return 0; 184 185 err_pltfm_free: 186 sdhci_pltfm_free(pdev); 187 clk_disable_all: 188 clk_disable_unprepare(clk_xin); 189 clk_dis_ahb: 190 clk_disable_unprepare(sdhci_arasan->clk_ahb); 191 192 return ret; 193 } 194 195 static int sdhci_arasan_remove(struct platform_device *pdev) 196 { 197 struct sdhci_host *host = platform_get_drvdata(pdev); 198 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); 199 struct sdhci_arasan_data *sdhci_arasan = pltfm_host->priv; 200 201 clk_disable_unprepare(pltfm_host->clk); 202 clk_disable_unprepare(sdhci_arasan->clk_ahb); 203 204 return sdhci_pltfm_unregister(pdev); 205 } 206 207 static const struct of_device_id sdhci_arasan_of_match[] = { 208 { .compatible = "arasan,sdhci-8.9a" }, 209 { } 210 }; 211 MODULE_DEVICE_TABLE(of, sdhci_arasan_of_match); 212 213 static struct platform_driver sdhci_arasan_driver = { 214 .driver = { 215 .name = "sdhci-arasan", 216 .owner = THIS_MODULE, 217 .of_match_table = sdhci_arasan_of_match, 218 .pm = &sdhci_arasan_dev_pm_ops, 219 }, 220 .probe = sdhci_arasan_probe, 221 .remove = sdhci_arasan_remove, 222 }; 223 224 module_platform_driver(sdhci_arasan_driver); 225 226 MODULE_DESCRIPTION("Driver for the Arasan SDHCI Controller"); 227 MODULE_AUTHOR("Soeren Brinkmann <soren.brinkmann@xilinx.com>"); 228 MODULE_LICENSE("GPL"); 229