1a61127c2SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only
2c4e05037SAdrian Hunter /*
3c4e05037SAdrian Hunter * Secure Digital Host Controller Interface ACPI driver.
4c4e05037SAdrian Hunter *
5c4e05037SAdrian Hunter * Copyright (c) 2012, Intel Corporation.
6c4e05037SAdrian Hunter */
7c4e05037SAdrian Hunter
8e10f4809SRaul E Rangel #include <linux/bitfield.h>
9c4e05037SAdrian Hunter #include <linux/init.h>
10c4e05037SAdrian Hunter #include <linux/export.h>
11c4e05037SAdrian Hunter #include <linux/module.h>
12c4e05037SAdrian Hunter #include <linux/device.h>
13*431946c0SHans de Goede #include <linux/pinctrl/pinconf-generic.h>
14c4e05037SAdrian Hunter #include <linux/platform_device.h>
15c4e05037SAdrian Hunter #include <linux/ioport.h>
16c4e05037SAdrian Hunter #include <linux/io.h>
17c4e05037SAdrian Hunter #include <linux/dma-mapping.h>
18c4e05037SAdrian Hunter #include <linux/compiler.h>
19c4e05037SAdrian Hunter #include <linux/stddef.h>
20c4e05037SAdrian Hunter #include <linux/bitops.h>
21c4e05037SAdrian Hunter #include <linux/types.h>
22c4e05037SAdrian Hunter #include <linux/err.h>
23c4e05037SAdrian Hunter #include <linux/interrupt.h>
24c4e05037SAdrian Hunter #include <linux/acpi.h>
25c4e05037SAdrian Hunter #include <linux/pm.h>
26c4e05037SAdrian Hunter #include <linux/pm_runtime.h>
27b04fa064SAdrian Hunter #include <linux/delay.h>
2884d49b3dSHans de Goede #include <linux/dmi.h>
29c4e05037SAdrian Hunter
30c4e05037SAdrian Hunter #include <linux/mmc/host.h>
31c4e05037SAdrian Hunter #include <linux/mmc/pm.h>
324fd4409cSAdrian Hunter #include <linux/mmc/slot-gpio.h>
33c4e05037SAdrian Hunter
346e1c7d61SAdrian Hunter #ifdef CONFIG_X86
359f687566SHans de Goede #include <linux/platform_data/x86/soc.h>
366e1c7d61SAdrian Hunter #include <asm/iosf_mbi.h>
376e1c7d61SAdrian Hunter #endif
386e1c7d61SAdrian Hunter
39c4e05037SAdrian Hunter #include "sdhci.h"
40c4e05037SAdrian Hunter
41c4e05037SAdrian Hunter enum {
42c4e05037SAdrian Hunter SDHCI_ACPI_SD_CD = BIT(0),
43c4e05037SAdrian Hunter SDHCI_ACPI_RUNTIME_PM = BIT(1),
444fd4409cSAdrian Hunter SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL = BIT(2),
45c4e05037SAdrian Hunter };
46c4e05037SAdrian Hunter
47c4e05037SAdrian Hunter struct sdhci_acpi_chip {
48c4e05037SAdrian Hunter const struct sdhci_ops *ops;
49c4e05037SAdrian Hunter unsigned int quirks;
50c4e05037SAdrian Hunter unsigned int quirks2;
51c4e05037SAdrian Hunter unsigned long caps;
52c4e05037SAdrian Hunter unsigned int caps2;
53c4e05037SAdrian Hunter mmc_pm_flag_t pm_caps;
54c4e05037SAdrian Hunter };
55c4e05037SAdrian Hunter
56c4e05037SAdrian Hunter struct sdhci_acpi_slot {
57c4e05037SAdrian Hunter const struct sdhci_acpi_chip *chip;
58c4e05037SAdrian Hunter unsigned int quirks;
59c4e05037SAdrian Hunter unsigned int quirks2;
60c4e05037SAdrian Hunter unsigned long caps;
61c4e05037SAdrian Hunter unsigned int caps2;
62c4e05037SAdrian Hunter mmc_pm_flag_t pm_caps;
63c4e05037SAdrian Hunter unsigned int flags;
64f07b7952SAdrian Hunter size_t priv_size;
654f3cde3aSAndy Shevchenko int (*probe_slot)(struct platform_device *, struct acpi_device *);
66578b36b6SGao, Yunpeng int (*remove_slot)(struct platform_device *);
67c7eabbeeSWang Dongsheng int (*free_slot)(struct platform_device *pdev);
680cc1a0f4SAdrian Hunter int (*setup_host)(struct platform_device *pdev);
69c4e05037SAdrian Hunter };
70c4e05037SAdrian Hunter
71c4e05037SAdrian Hunter struct sdhci_acpi_host {
72c4e05037SAdrian Hunter struct sdhci_host *host;
73c4e05037SAdrian Hunter const struct sdhci_acpi_slot *slot;
74c4e05037SAdrian Hunter struct platform_device *pdev;
75c4e05037SAdrian Hunter bool use_runtime_pm;
7684d49b3dSHans de Goede bool is_intel;
7784d49b3dSHans de Goede bool reset_signal_volt_on_suspend;
781a91a36aSGustavo A. R. Silva unsigned long private[] ____cacheline_aligned;
79c4e05037SAdrian Hunter };
80c4e05037SAdrian Hunter
8184d49b3dSHans de Goede enum {
8284d49b3dSHans de Goede DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP = BIT(0),
833397b251SHans de Goede DMI_QUIRK_SD_NO_WRITE_PROTECT = BIT(1),
84f3521d7cSHans de Goede DMI_QUIRK_SD_CD_ACTIVE_HIGH = BIT(2),
85*431946c0SHans de Goede DMI_QUIRK_SD_CD_ENABLE_PULL_UP = BIT(3),
8684d49b3dSHans de Goede };
8784d49b3dSHans de Goede
sdhci_acpi_priv(struct sdhci_acpi_host * c)88f07b7952SAdrian Hunter static inline void *sdhci_acpi_priv(struct sdhci_acpi_host *c)
89f07b7952SAdrian Hunter {
90f07b7952SAdrian Hunter return (void *)c->private;
91f07b7952SAdrian Hunter }
92f07b7952SAdrian Hunter
sdhci_acpi_flag(struct sdhci_acpi_host * c,unsigned int flag)93c4e05037SAdrian Hunter static inline bool sdhci_acpi_flag(struct sdhci_acpi_host *c, unsigned int flag)
94c4e05037SAdrian Hunter {
95c4e05037SAdrian Hunter return c->slot && (c->slot->flags & flag);
96c4e05037SAdrian Hunter }
97c4e05037SAdrian Hunter
980acccf41SAdrian Hunter #define INTEL_DSM_HS_CAPS_SDR25 BIT(0)
990acccf41SAdrian Hunter #define INTEL_DSM_HS_CAPS_DDR50 BIT(1)
1000acccf41SAdrian Hunter #define INTEL_DSM_HS_CAPS_SDR50 BIT(2)
1010acccf41SAdrian Hunter #define INTEL_DSM_HS_CAPS_SDR104 BIT(3)
1020acccf41SAdrian Hunter
1031c451c13SAdrian Hunter enum {
1041c451c13SAdrian Hunter INTEL_DSM_FNS = 0,
1051c451c13SAdrian Hunter INTEL_DSM_V18_SWITCH = 3,
1061c451c13SAdrian Hunter INTEL_DSM_V33_SWITCH = 4,
1070acccf41SAdrian Hunter INTEL_DSM_HS_CAPS = 8,
1081c451c13SAdrian Hunter };
1091c451c13SAdrian Hunter
1101c451c13SAdrian Hunter struct intel_host {
1111c451c13SAdrian Hunter u32 dsm_fns;
1120acccf41SAdrian Hunter u32 hs_caps;
1131c451c13SAdrian Hunter };
1141c451c13SAdrian Hunter
1151c451c13SAdrian Hunter static const guid_t intel_dsm_guid =
1161c451c13SAdrian Hunter GUID_INIT(0xF6C13EA5, 0x65CD, 0x461F,
1171c451c13SAdrian Hunter 0xAB, 0x7A, 0x29, 0xF7, 0xE8, 0xD5, 0xBD, 0x61);
1181c451c13SAdrian Hunter
__intel_dsm(struct intel_host * intel_host,struct device * dev,unsigned int fn,u32 * result)1191c451c13SAdrian Hunter static int __intel_dsm(struct intel_host *intel_host, struct device *dev,
1201c451c13SAdrian Hunter unsigned int fn, u32 *result)
1211c451c13SAdrian Hunter {
1221c451c13SAdrian Hunter union acpi_object *obj;
1231c451c13SAdrian Hunter int err = 0;
1241c451c13SAdrian Hunter
1251c451c13SAdrian Hunter obj = acpi_evaluate_dsm(ACPI_HANDLE(dev), &intel_dsm_guid, 0, fn, NULL);
1261c451c13SAdrian Hunter if (!obj)
1271c451c13SAdrian Hunter return -EOPNOTSUPP;
1281c451c13SAdrian Hunter
1291c451c13SAdrian Hunter if (obj->type == ACPI_TYPE_INTEGER) {
1301c451c13SAdrian Hunter *result = obj->integer.value;
1311c451c13SAdrian Hunter } else if (obj->type == ACPI_TYPE_BUFFER && obj->buffer.length > 0) {
1321c451c13SAdrian Hunter size_t len = min_t(size_t, obj->buffer.length, 4);
1331c451c13SAdrian Hunter
1341c451c13SAdrian Hunter *result = 0;
1351c451c13SAdrian Hunter memcpy(result, obj->buffer.pointer, len);
1361c451c13SAdrian Hunter } else {
1371c451c13SAdrian Hunter dev_err(dev, "%s DSM fn %u obj->type %d obj->buffer.length %d\n",
1381c451c13SAdrian Hunter __func__, fn, obj->type, obj->buffer.length);
1391c451c13SAdrian Hunter err = -EINVAL;
1401c451c13SAdrian Hunter }
1411c451c13SAdrian Hunter
1421c451c13SAdrian Hunter ACPI_FREE(obj);
1431c451c13SAdrian Hunter
1441c451c13SAdrian Hunter return err;
1451c451c13SAdrian Hunter }
1461c451c13SAdrian Hunter
intel_dsm(struct intel_host * intel_host,struct device * dev,unsigned int fn,u32 * result)1471c451c13SAdrian Hunter static int intel_dsm(struct intel_host *intel_host, struct device *dev,
1481c451c13SAdrian Hunter unsigned int fn, u32 *result)
1491c451c13SAdrian Hunter {
1501c451c13SAdrian Hunter if (fn > 31 || !(intel_host->dsm_fns & (1 << fn)))
1511c451c13SAdrian Hunter return -EOPNOTSUPP;
1521c451c13SAdrian Hunter
1531c451c13SAdrian Hunter return __intel_dsm(intel_host, dev, fn, result);
1541c451c13SAdrian Hunter }
1551c451c13SAdrian Hunter
intel_dsm_init(struct intel_host * intel_host,struct device * dev,struct mmc_host * mmc)1561c451c13SAdrian Hunter static void intel_dsm_init(struct intel_host *intel_host, struct device *dev,
1571c451c13SAdrian Hunter struct mmc_host *mmc)
1581c451c13SAdrian Hunter {
1591c451c13SAdrian Hunter int err;
1601c451c13SAdrian Hunter
1610acccf41SAdrian Hunter intel_host->hs_caps = ~0;
1620acccf41SAdrian Hunter
1631c451c13SAdrian Hunter err = __intel_dsm(intel_host, dev, INTEL_DSM_FNS, &intel_host->dsm_fns);
1641c451c13SAdrian Hunter if (err) {
1651c451c13SAdrian Hunter pr_debug("%s: DSM not supported, error %d\n",
1661c451c13SAdrian Hunter mmc_hostname(mmc), err);
1671c451c13SAdrian Hunter return;
1681c451c13SAdrian Hunter }
1691c451c13SAdrian Hunter
1701c451c13SAdrian Hunter pr_debug("%s: DSM function mask %#x\n",
1711c451c13SAdrian Hunter mmc_hostname(mmc), intel_host->dsm_fns);
1720acccf41SAdrian Hunter
1730acccf41SAdrian Hunter intel_dsm(intel_host, dev, INTEL_DSM_HS_CAPS, &intel_host->hs_caps);
1741c451c13SAdrian Hunter }
1751c451c13SAdrian Hunter
intel_start_signal_voltage_switch(struct mmc_host * mmc,struct mmc_ios * ios)1761c451c13SAdrian Hunter static int intel_start_signal_voltage_switch(struct mmc_host *mmc,
1771c451c13SAdrian Hunter struct mmc_ios *ios)
1781c451c13SAdrian Hunter {
1791c451c13SAdrian Hunter struct device *dev = mmc_dev(mmc);
1801c451c13SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev);
1811c451c13SAdrian Hunter struct intel_host *intel_host = sdhci_acpi_priv(c);
1821c451c13SAdrian Hunter unsigned int fn;
1831c451c13SAdrian Hunter u32 result = 0;
1841c451c13SAdrian Hunter int err;
1851c451c13SAdrian Hunter
1861c451c13SAdrian Hunter err = sdhci_start_signal_voltage_switch(mmc, ios);
1871c451c13SAdrian Hunter if (err)
1881c451c13SAdrian Hunter return err;
1891c451c13SAdrian Hunter
1901c451c13SAdrian Hunter switch (ios->signal_voltage) {
1911c451c13SAdrian Hunter case MMC_SIGNAL_VOLTAGE_330:
1921c451c13SAdrian Hunter fn = INTEL_DSM_V33_SWITCH;
1931c451c13SAdrian Hunter break;
1941c451c13SAdrian Hunter case MMC_SIGNAL_VOLTAGE_180:
1951c451c13SAdrian Hunter fn = INTEL_DSM_V18_SWITCH;
1961c451c13SAdrian Hunter break;
1971c451c13SAdrian Hunter default:
1981c451c13SAdrian Hunter return 0;
1991c451c13SAdrian Hunter }
2001c451c13SAdrian Hunter
2011c451c13SAdrian Hunter err = intel_dsm(intel_host, dev, fn, &result);
2021c451c13SAdrian Hunter pr_debug("%s: %s DSM fn %u error %d result %u\n",
2031c451c13SAdrian Hunter mmc_hostname(mmc), __func__, fn, err, result);
2041c451c13SAdrian Hunter
2051c451c13SAdrian Hunter return 0;
2061c451c13SAdrian Hunter }
2071c451c13SAdrian Hunter
sdhci_acpi_int_hw_reset(struct sdhci_host * host)208b04fa064SAdrian Hunter static void sdhci_acpi_int_hw_reset(struct sdhci_host *host)
209b04fa064SAdrian Hunter {
210b04fa064SAdrian Hunter u8 reg;
211b04fa064SAdrian Hunter
212b04fa064SAdrian Hunter reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
213b04fa064SAdrian Hunter reg |= 0x10;
214b04fa064SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
215b04fa064SAdrian Hunter /* For eMMC, minimum is 1us but give it 9us for good measure */
216b04fa064SAdrian Hunter udelay(9);
217b04fa064SAdrian Hunter reg &= ~0x10;
218b04fa064SAdrian Hunter sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
219b04fa064SAdrian Hunter /* For eMMC, minimum is 200us but give it 300us for good measure */
220b04fa064SAdrian Hunter usleep_range(300, 1000);
221b04fa064SAdrian Hunter }
222b04fa064SAdrian Hunter
223c4e05037SAdrian Hunter static const struct sdhci_ops sdhci_acpi_ops_dflt = {
2241771059cSRussell King .set_clock = sdhci_set_clock,
2252317f56cSRussell King .set_bus_width = sdhci_set_bus_width,
22603231f9bSRussell King .reset = sdhci_reset,
22796d7b78cSRussell King .set_uhs_signaling = sdhci_set_uhs_signaling,
228c4e05037SAdrian Hunter };
229c4e05037SAdrian Hunter
230b04fa064SAdrian Hunter static const struct sdhci_ops sdhci_acpi_ops_int = {
2311771059cSRussell King .set_clock = sdhci_set_clock,
2322317f56cSRussell King .set_bus_width = sdhci_set_bus_width,
23303231f9bSRussell King .reset = sdhci_reset,
23496d7b78cSRussell King .set_uhs_signaling = sdhci_set_uhs_signaling,
235b04fa064SAdrian Hunter .hw_reset = sdhci_acpi_int_hw_reset,
236b04fa064SAdrian Hunter };
237b04fa064SAdrian Hunter
238b04fa064SAdrian Hunter static const struct sdhci_acpi_chip sdhci_acpi_chip_int = {
239b04fa064SAdrian Hunter .ops = &sdhci_acpi_ops_int,
240b04fa064SAdrian Hunter };
241b04fa064SAdrian Hunter
2426e1c7d61SAdrian Hunter #ifdef CONFIG_X86
2436e1c7d61SAdrian Hunter
2446e1c7d61SAdrian Hunter #define BYT_IOSF_SCCEP 0x63
2456e1c7d61SAdrian Hunter #define BYT_IOSF_OCP_NETCTRL0 0x1078
2466e1c7d61SAdrian Hunter #define BYT_IOSF_OCP_TIMEOUT_BASE GENMASK(10, 8)
2476e1c7d61SAdrian Hunter
sdhci_acpi_byt_setting(struct device * dev)2486e1c7d61SAdrian Hunter static void sdhci_acpi_byt_setting(struct device *dev)
2496e1c7d61SAdrian Hunter {
2506e1c7d61SAdrian Hunter u32 val = 0;
2516e1c7d61SAdrian Hunter
2529f687566SHans de Goede if (!soc_intel_is_byt())
2536e1c7d61SAdrian Hunter return;
2546e1c7d61SAdrian Hunter
2556e1c7d61SAdrian Hunter if (iosf_mbi_read(BYT_IOSF_SCCEP, MBI_CR_READ, BYT_IOSF_OCP_NETCTRL0,
2566e1c7d61SAdrian Hunter &val)) {
2576e1c7d61SAdrian Hunter dev_err(dev, "%s read error\n", __func__);
2586e1c7d61SAdrian Hunter return;
2596e1c7d61SAdrian Hunter }
2606e1c7d61SAdrian Hunter
2616e1c7d61SAdrian Hunter if (!(val & BYT_IOSF_OCP_TIMEOUT_BASE))
2626e1c7d61SAdrian Hunter return;
2636e1c7d61SAdrian Hunter
2646e1c7d61SAdrian Hunter val &= ~BYT_IOSF_OCP_TIMEOUT_BASE;
2656e1c7d61SAdrian Hunter
2666e1c7d61SAdrian Hunter if (iosf_mbi_write(BYT_IOSF_SCCEP, MBI_CR_WRITE, BYT_IOSF_OCP_NETCTRL0,
2676e1c7d61SAdrian Hunter val)) {
2686e1c7d61SAdrian Hunter dev_err(dev, "%s write error\n", __func__);
2696e1c7d61SAdrian Hunter return;
2706e1c7d61SAdrian Hunter }
2716e1c7d61SAdrian Hunter
2726e1c7d61SAdrian Hunter dev_dbg(dev, "%s completed\n", __func__);
2736e1c7d61SAdrian Hunter }
2746e1c7d61SAdrian Hunter
sdhci_acpi_byt_defer(struct device * dev)2756e1c7d61SAdrian Hunter static bool sdhci_acpi_byt_defer(struct device *dev)
2766e1c7d61SAdrian Hunter {
2779f687566SHans de Goede if (!soc_intel_is_byt())
2786e1c7d61SAdrian Hunter return false;
2796e1c7d61SAdrian Hunter
2806e1c7d61SAdrian Hunter if (!iosf_mbi_available())
2816e1c7d61SAdrian Hunter return true;
2826e1c7d61SAdrian Hunter
2836e1c7d61SAdrian Hunter sdhci_acpi_byt_setting(dev);
2846e1c7d61SAdrian Hunter
2856e1c7d61SAdrian Hunter return false;
2866e1c7d61SAdrian Hunter }
2876e1c7d61SAdrian Hunter
2886e1c7d61SAdrian Hunter #else
2896e1c7d61SAdrian Hunter
sdhci_acpi_byt_setting(struct device * dev)2906e1c7d61SAdrian Hunter static inline void sdhci_acpi_byt_setting(struct device *dev)
2916e1c7d61SAdrian Hunter {
2926e1c7d61SAdrian Hunter }
2936e1c7d61SAdrian Hunter
sdhci_acpi_byt_defer(struct device * dev)2946e1c7d61SAdrian Hunter static inline bool sdhci_acpi_byt_defer(struct device *dev)
2956e1c7d61SAdrian Hunter {
2966e1c7d61SAdrian Hunter return false;
2976e1c7d61SAdrian Hunter }
2986e1c7d61SAdrian Hunter
2996e1c7d61SAdrian Hunter #endif
3006e1c7d61SAdrian Hunter
bxt_get_cd(struct mmc_host * mmc)3016a645dd8SAdrian Hunter static int bxt_get_cd(struct mmc_host *mmc)
3026a645dd8SAdrian Hunter {
3036a645dd8SAdrian Hunter int gpio_cd = mmc_gpio_get_cd(mmc);
3046a645dd8SAdrian Hunter
3056a645dd8SAdrian Hunter if (!gpio_cd)
3066a645dd8SAdrian Hunter return 0;
3076a645dd8SAdrian Hunter
3082caa11bcSAndy Shevchenko return sdhci_get_cd_nogpio(mmc);
3096a645dd8SAdrian Hunter }
3106a645dd8SAdrian Hunter
intel_probe_slot(struct platform_device * pdev,struct acpi_device * adev)3114f3cde3aSAndy Shevchenko static int intel_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
312578b36b6SGao, Yunpeng {
313578b36b6SGao, Yunpeng struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
3141c451c13SAdrian Hunter struct intel_host *intel_host = sdhci_acpi_priv(c);
315159cd328SAdrian Hunter struct sdhci_host *host = c->host;
316578b36b6SGao, Yunpeng
3174f3cde3aSAndy Shevchenko if (acpi_dev_hid_uid_match(adev, "80860F14", "1") &&
3188024379eSAdrian Hunter sdhci_readl(host, SDHCI_CAPABILITIES) == 0x446cc8b2 &&
3198024379eSAdrian Hunter sdhci_readl(host, SDHCI_CAPABILITIES_1) == 0x00000807)
3208024379eSAdrian Hunter host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
3218024379eSAdrian Hunter
3224f3cde3aSAndy Shevchenko if (acpi_dev_hid_uid_match(adev, "80865ACA", NULL))
3236a645dd8SAdrian Hunter host->mmc_host_ops.get_cd = bxt_get_cd;
3246a645dd8SAdrian Hunter
3251c451c13SAdrian Hunter intel_dsm_init(intel_host, &pdev->dev, host->mmc);
3261c451c13SAdrian Hunter
3271c451c13SAdrian Hunter host->mmc_host_ops.start_signal_voltage_switch =
3281c451c13SAdrian Hunter intel_start_signal_voltage_switch;
3291c451c13SAdrian Hunter
33084d49b3dSHans de Goede c->is_intel = true;
33184d49b3dSHans de Goede
332578b36b6SGao, Yunpeng return 0;
333578b36b6SGao, Yunpeng }
334578b36b6SGao, Yunpeng
intel_setup_host(struct platform_device * pdev)3350acccf41SAdrian Hunter static int intel_setup_host(struct platform_device *pdev)
3360acccf41SAdrian Hunter {
3370acccf41SAdrian Hunter struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
3380acccf41SAdrian Hunter struct intel_host *intel_host = sdhci_acpi_priv(c);
3390acccf41SAdrian Hunter
3400acccf41SAdrian Hunter if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR25))
3410acccf41SAdrian Hunter c->host->mmc->caps &= ~MMC_CAP_UHS_SDR25;
3420acccf41SAdrian Hunter
3430acccf41SAdrian Hunter if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR50))
3440acccf41SAdrian Hunter c->host->mmc->caps &= ~MMC_CAP_UHS_SDR50;
3450acccf41SAdrian Hunter
3460acccf41SAdrian Hunter if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_DDR50))
3470acccf41SAdrian Hunter c->host->mmc->caps &= ~MMC_CAP_UHS_DDR50;
3480acccf41SAdrian Hunter
3490acccf41SAdrian Hunter if (!(intel_host->hs_caps & INTEL_DSM_HS_CAPS_SDR104))
3500acccf41SAdrian Hunter c->host->mmc->caps &= ~MMC_CAP_UHS_SDR104;
3510acccf41SAdrian Hunter
3520acccf41SAdrian Hunter return 0;
3530acccf41SAdrian Hunter }
3540acccf41SAdrian Hunter
35507a58883SAdrian Hunter static const struct sdhci_acpi_slot sdhci_acpi_slot_int_emmc = {
356b04fa064SAdrian Hunter .chip = &sdhci_acpi_chip_int,
357f25c3372SMaurice Petallo .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
3589d65cb88SAdrian Hunter MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
359c80f275fSAdrian Hunter MMC_CAP_CMD_DURING_TFR | MMC_CAP_WAIT_WHILE_BUSY,
36007a58883SAdrian Hunter .flags = SDHCI_ACPI_RUNTIME_PM,
361197ce1a5SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
362197ce1a5SAdrian Hunter SDHCI_QUIRK_NO_LED,
363e839b134SAdrian Hunter .quirks2 = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
364e839b134SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC |
365e839b134SAdrian Hunter SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400,
366159cd328SAdrian Hunter .probe_slot = intel_probe_slot,
3670acccf41SAdrian Hunter .setup_host = intel_setup_host,
3681c451c13SAdrian Hunter .priv_size = sizeof(struct intel_host),
36907a58883SAdrian Hunter };
37007a58883SAdrian Hunter
371e5571397SAdrian Hunter static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sdio = {
372e1f5633aSAdrian Hunter .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION |
373197ce1a5SAdrian Hunter SDHCI_QUIRK_NO_LED |
374e1f5633aSAdrian Hunter SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
375e5571397SAdrian Hunter .quirks2 = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
3769d65cb88SAdrian Hunter .caps = MMC_CAP_NONREMOVABLE | MMC_CAP_POWER_OFF_CARD |
377265984b3SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY,
378e5571397SAdrian Hunter .flags = SDHCI_ACPI_RUNTIME_PM,
379e5571397SAdrian Hunter .pm_caps = MMC_PM_KEEP_POWER,
380159cd328SAdrian Hunter .probe_slot = intel_probe_slot,
3810acccf41SAdrian Hunter .setup_host = intel_setup_host,
3821c451c13SAdrian Hunter .priv_size = sizeof(struct intel_host),
383e5571397SAdrian Hunter };
384e5571397SAdrian Hunter
38507a58883SAdrian Hunter static const struct sdhci_acpi_slot sdhci_acpi_slot_int_sd = {
3864fd4409cSAdrian Hunter .flags = SDHCI_ACPI_SD_CD | SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL |
3874fd4409cSAdrian Hunter SDHCI_ACPI_RUNTIME_PM,
388197ce1a5SAdrian Hunter .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
389197ce1a5SAdrian Hunter SDHCI_QUIRK_NO_LED,
390934e31b9SAdrian Hunter .quirks2 = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
391934e31b9SAdrian Hunter SDHCI_QUIRK2_STOP_WITH_TC,
392d3e97407SAzhar Shaikh .caps = MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_AGGRESSIVE_PM,
393159cd328SAdrian Hunter .probe_slot = intel_probe_slot,
3940acccf41SAdrian Hunter .setup_host = intel_setup_host,
3951c451c13SAdrian Hunter .priv_size = sizeof(struct intel_host),
39607a58883SAdrian Hunter };
39707a58883SAdrian Hunter
39896ccb858SWang Dongsheng #define VENDOR_SPECIFIC_PWRCTL_CLEAR_REG 0x1a8
39996ccb858SWang Dongsheng #define VENDOR_SPECIFIC_PWRCTL_CTL_REG 0x1ac
sdhci_acpi_qcom_handler(int irq,void * ptr)40096ccb858SWang Dongsheng static irqreturn_t sdhci_acpi_qcom_handler(int irq, void *ptr)
40196ccb858SWang Dongsheng {
40296ccb858SWang Dongsheng struct sdhci_host *host = ptr;
40396ccb858SWang Dongsheng
40496ccb858SWang Dongsheng sdhci_writel(host, 0x3, VENDOR_SPECIFIC_PWRCTL_CLEAR_REG);
40596ccb858SWang Dongsheng sdhci_writel(host, 0x1, VENDOR_SPECIFIC_PWRCTL_CTL_REG);
40696ccb858SWang Dongsheng
40796ccb858SWang Dongsheng return IRQ_HANDLED;
40896ccb858SWang Dongsheng }
40996ccb858SWang Dongsheng
qcom_probe_slot(struct platform_device * pdev,struct acpi_device * adev)4104f3cde3aSAndy Shevchenko static int qcom_probe_slot(struct platform_device *pdev, struct acpi_device *adev)
41196ccb858SWang Dongsheng {
41296ccb858SWang Dongsheng struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
41396ccb858SWang Dongsheng struct sdhci_host *host = c->host;
41496ccb858SWang Dongsheng int *irq = sdhci_acpi_priv(c);
41596ccb858SWang Dongsheng
41696ccb858SWang Dongsheng *irq = -EINVAL;
41796ccb858SWang Dongsheng
4184f3cde3aSAndy Shevchenko if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
41996ccb858SWang Dongsheng return 0;
42096ccb858SWang Dongsheng
42196ccb858SWang Dongsheng *irq = platform_get_irq(pdev, 1);
42296ccb858SWang Dongsheng if (*irq < 0)
42396ccb858SWang Dongsheng return 0;
42496ccb858SWang Dongsheng
42596ccb858SWang Dongsheng return request_threaded_irq(*irq, NULL, sdhci_acpi_qcom_handler,
42696ccb858SWang Dongsheng IRQF_ONESHOT | IRQF_TRIGGER_HIGH,
42796ccb858SWang Dongsheng "sdhci_qcom", host);
42896ccb858SWang Dongsheng }
42996ccb858SWang Dongsheng
qcom_free_slot(struct platform_device * pdev)43096ccb858SWang Dongsheng static int qcom_free_slot(struct platform_device *pdev)
43196ccb858SWang Dongsheng {
43296ccb858SWang Dongsheng struct device *dev = &pdev->dev;
43396ccb858SWang Dongsheng struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
43496ccb858SWang Dongsheng struct sdhci_host *host = c->host;
43596ccb858SWang Dongsheng struct acpi_device *adev;
43696ccb858SWang Dongsheng int *irq = sdhci_acpi_priv(c);
43796ccb858SWang Dongsheng
43896ccb858SWang Dongsheng adev = ACPI_COMPANION(dev);
43996ccb858SWang Dongsheng if (!adev)
44096ccb858SWang Dongsheng return -ENODEV;
44196ccb858SWang Dongsheng
4424f3cde3aSAndy Shevchenko if (!acpi_dev_hid_uid_match(adev, "QCOM8051", NULL))
44396ccb858SWang Dongsheng return 0;
44496ccb858SWang Dongsheng
44596ccb858SWang Dongsheng if (*irq < 0)
44696ccb858SWang Dongsheng return 0;
44796ccb858SWang Dongsheng
44896ccb858SWang Dongsheng free_irq(*irq, host);
44996ccb858SWang Dongsheng return 0;
45096ccb858SWang Dongsheng }
45196ccb858SWang Dongsheng
45270cce2afSPhilip Elcan static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd_3v = {
45370cce2afSPhilip Elcan .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
45470cce2afSPhilip Elcan .quirks2 = SDHCI_QUIRK2_NO_1_8_V,
45570cce2afSPhilip Elcan .caps = MMC_CAP_NONREMOVABLE,
45696ccb858SWang Dongsheng .priv_size = sizeof(int),
45796ccb858SWang Dongsheng .probe_slot = qcom_probe_slot,
45896ccb858SWang Dongsheng .free_slot = qcom_free_slot,
45970cce2afSPhilip Elcan };
46070cce2afSPhilip Elcan
46170cce2afSPhilip Elcan static const struct sdhci_acpi_slot sdhci_acpi_slot_qcom_sd = {
46270cce2afSPhilip Elcan .quirks = SDHCI_QUIRK_BROKEN_CARD_DETECTION,
46370cce2afSPhilip Elcan .caps = MMC_CAP_NONREMOVABLE,
46470cce2afSPhilip Elcan };
46570cce2afSPhilip Elcan
46661d7437eSRaul E Rangel struct amd_sdhci_host {
46761d7437eSRaul E Rangel bool tuned_clock;
46861d7437eSRaul E Rangel bool dll_enabled;
46961d7437eSRaul E Rangel };
47061d7437eSRaul E Rangel
47134597a3fSShah Nehal-Bakulchandra /* AMD sdhci reset dll register. */
47234597a3fSShah Nehal-Bakulchandra #define SDHCI_AMD_RESET_DLL_REGISTER 0x908
47334597a3fSShah Nehal-Bakulchandra
amd_select_drive_strength(struct mmc_card * card,unsigned int max_dtr,int host_drv,int card_drv,int * host_driver_strength)47434597a3fSShah Nehal-Bakulchandra static int amd_select_drive_strength(struct mmc_card *card,
47534597a3fSShah Nehal-Bakulchandra unsigned int max_dtr, int host_drv,
476e10f4809SRaul E Rangel int card_drv, int *host_driver_strength)
47734597a3fSShah Nehal-Bakulchandra {
478e10f4809SRaul E Rangel struct sdhci_host *host = mmc_priv(card->host);
479e10f4809SRaul E Rangel u16 preset, preset_driver_strength;
480e10f4809SRaul E Rangel
481e10f4809SRaul E Rangel /*
482e10f4809SRaul E Rangel * This method is only called by mmc_select_hs200 so we only need to
483e10f4809SRaul E Rangel * read from the HS200 (SDR104) preset register.
484e10f4809SRaul E Rangel *
485e10f4809SRaul E Rangel * Firmware that has "invalid/default" presets return a driver strength
486e10f4809SRaul E Rangel * of A. This matches the previously hard coded value.
487e10f4809SRaul E Rangel */
488e10f4809SRaul E Rangel preset = sdhci_readw(host, SDHCI_PRESET_FOR_SDR104);
489e10f4809SRaul E Rangel preset_driver_strength = FIELD_GET(SDHCI_PRESET_DRV_MASK, preset);
490e10f4809SRaul E Rangel
491e10f4809SRaul E Rangel /*
492e10f4809SRaul E Rangel * We want the controller driver strength to match the card's driver
493e10f4809SRaul E Rangel * strength so they have similar rise/fall times.
494e10f4809SRaul E Rangel *
495e10f4809SRaul E Rangel * The controller driver strength set by this method is sticky for all
496e10f4809SRaul E Rangel * timings after this method is called. This unfortunately means that
497e10f4809SRaul E Rangel * while HS400 tuning is in progress we end up with mismatched driver
498e10f4809SRaul E Rangel * strengths between the controller and the card. HS400 tuning requires
499e10f4809SRaul E Rangel * switching from HS400->DDR52->HS->HS200->HS400. So the driver mismatch
500e10f4809SRaul E Rangel * happens while in DDR52 and HS modes. This has not been observed to
501e10f4809SRaul E Rangel * cause problems. Enabling presets would fix this issue.
502e10f4809SRaul E Rangel */
503e10f4809SRaul E Rangel *host_driver_strength = preset_driver_strength;
504e10f4809SRaul E Rangel
505e10f4809SRaul E Rangel /*
506e10f4809SRaul E Rangel * The resulting card driver strength is only set when switching the
507e10f4809SRaul E Rangel * card's timing to HS200 or HS400. The card will use the default driver
508e10f4809SRaul E Rangel * strength (B) for any other mode.
509e10f4809SRaul E Rangel */
510e10f4809SRaul E Rangel return preset_driver_strength;
51134597a3fSShah Nehal-Bakulchandra }
51234597a3fSShah Nehal-Bakulchandra
sdhci_acpi_amd_hs400_dll(struct sdhci_host * host,bool enable)5132cf9bfe9SRaul E Rangel static void sdhci_acpi_amd_hs400_dll(struct sdhci_host *host, bool enable)
51434597a3fSShah Nehal-Bakulchandra {
5152cf9bfe9SRaul E Rangel struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
5162cf9bfe9SRaul E Rangel struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
5172cf9bfe9SRaul E Rangel
51834597a3fSShah Nehal-Bakulchandra /* AMD Platform requires dll setting */
51934597a3fSShah Nehal-Bakulchandra sdhci_writel(host, 0x40003210, SDHCI_AMD_RESET_DLL_REGISTER);
52034597a3fSShah Nehal-Bakulchandra usleep_range(10, 20);
5212cf9bfe9SRaul E Rangel if (enable)
52234597a3fSShah Nehal-Bakulchandra sdhci_writel(host, 0x40033210, SDHCI_AMD_RESET_DLL_REGISTER);
5232cf9bfe9SRaul E Rangel
5242cf9bfe9SRaul E Rangel amd_host->dll_enabled = enable;
52534597a3fSShah Nehal-Bakulchandra }
52634597a3fSShah Nehal-Bakulchandra
52734597a3fSShah Nehal-Bakulchandra /*
52861d7437eSRaul E Rangel * The initialization sequence for HS400 is:
52961d7437eSRaul E Rangel * HS->HS200->Perform Tuning->HS->HS400
53061d7437eSRaul E Rangel *
53161d7437eSRaul E Rangel * The re-tuning sequence is:
53261d7437eSRaul E Rangel * HS400->DDR52->HS->HS200->Perform Tuning->HS->HS400
53361d7437eSRaul E Rangel *
53461d7437eSRaul E Rangel * The AMD eMMC Controller can only use the tuned clock while in HS200 and HS400
53561d7437eSRaul E Rangel * mode. If we switch to a different mode, we need to disable the tuned clock.
53661d7437eSRaul E Rangel * If we have previously performed tuning and switch back to HS200 or
53761d7437eSRaul E Rangel * HS400, we can re-enable the tuned clock.
53861d7437eSRaul E Rangel *
53934597a3fSShah Nehal-Bakulchandra */
amd_set_ios(struct mmc_host * mmc,struct mmc_ios * ios)54034597a3fSShah Nehal-Bakulchandra static void amd_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
54134597a3fSShah Nehal-Bakulchandra {
54234597a3fSShah Nehal-Bakulchandra struct sdhci_host *host = mmc_priv(mmc);
54361d7437eSRaul E Rangel struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
54461d7437eSRaul E Rangel struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
54534597a3fSShah Nehal-Bakulchandra unsigned int old_timing = host->timing;
54661d7437eSRaul E Rangel u16 val;
54734597a3fSShah Nehal-Bakulchandra
54834597a3fSShah Nehal-Bakulchandra sdhci_set_ios(mmc, ios);
54961d7437eSRaul E Rangel
55061d7437eSRaul E Rangel if (old_timing != host->timing && amd_host->tuned_clock) {
55161d7437eSRaul E Rangel if (host->timing == MMC_TIMING_MMC_HS400 ||
55261d7437eSRaul E Rangel host->timing == MMC_TIMING_MMC_HS200) {
55361d7437eSRaul E Rangel val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
55461d7437eSRaul E Rangel val |= SDHCI_CTRL_TUNED_CLK;
55561d7437eSRaul E Rangel sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
55661d7437eSRaul E Rangel } else {
55761d7437eSRaul E Rangel val = sdhci_readw(host, SDHCI_HOST_CONTROL2);
55861d7437eSRaul E Rangel val &= ~SDHCI_CTRL_TUNED_CLK;
55961d7437eSRaul E Rangel sdhci_writew(host, val, SDHCI_HOST_CONTROL2);
56034597a3fSShah Nehal-Bakulchandra }
56161d7437eSRaul E Rangel
56261d7437eSRaul E Rangel /* DLL is only required for HS400 */
56361d7437eSRaul E Rangel if (host->timing == MMC_TIMING_MMC_HS400 &&
5642cf9bfe9SRaul E Rangel !amd_host->dll_enabled)
5652cf9bfe9SRaul E Rangel sdhci_acpi_amd_hs400_dll(host, true);
56661d7437eSRaul E Rangel }
56761d7437eSRaul E Rangel }
56861d7437eSRaul E Rangel
amd_sdhci_execute_tuning(struct mmc_host * mmc,u32 opcode)56961d7437eSRaul E Rangel static int amd_sdhci_execute_tuning(struct mmc_host *mmc, u32 opcode)
57061d7437eSRaul E Rangel {
57161d7437eSRaul E Rangel int err;
57261d7437eSRaul E Rangel struct sdhci_host *host = mmc_priv(mmc);
57361d7437eSRaul E Rangel struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
57461d7437eSRaul E Rangel struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
57561d7437eSRaul E Rangel
57661d7437eSRaul E Rangel amd_host->tuned_clock = false;
57761d7437eSRaul E Rangel
57861d7437eSRaul E Rangel err = sdhci_execute_tuning(mmc, opcode);
57961d7437eSRaul E Rangel
58061d7437eSRaul E Rangel if (!err && !host->tuning_err)
58161d7437eSRaul E Rangel amd_host->tuned_clock = true;
58261d7437eSRaul E Rangel
58361d7437eSRaul E Rangel return err;
58434597a3fSShah Nehal-Bakulchandra }
58534597a3fSShah Nehal-Bakulchandra
amd_sdhci_reset(struct sdhci_host * host,u8 mask)5862cf9bfe9SRaul E Rangel static void amd_sdhci_reset(struct sdhci_host *host, u8 mask)
5872cf9bfe9SRaul E Rangel {
5882cf9bfe9SRaul E Rangel struct sdhci_acpi_host *acpi_host = sdhci_priv(host);
5892cf9bfe9SRaul E Rangel struct amd_sdhci_host *amd_host = sdhci_acpi_priv(acpi_host);
5902cf9bfe9SRaul E Rangel
5912cf9bfe9SRaul E Rangel if (mask & SDHCI_RESET_ALL) {
5922cf9bfe9SRaul E Rangel amd_host->tuned_clock = false;
5932cf9bfe9SRaul E Rangel sdhci_acpi_amd_hs400_dll(host, false);
5942cf9bfe9SRaul E Rangel }
5952cf9bfe9SRaul E Rangel
5962cf9bfe9SRaul E Rangel sdhci_reset(host, mask);
5972cf9bfe9SRaul E Rangel }
5982cf9bfe9SRaul E Rangel
59934597a3fSShah Nehal-Bakulchandra static const struct sdhci_ops sdhci_acpi_ops_amd = {
60034597a3fSShah Nehal-Bakulchandra .set_clock = sdhci_set_clock,
60134597a3fSShah Nehal-Bakulchandra .set_bus_width = sdhci_set_bus_width,
6022cf9bfe9SRaul E Rangel .reset = amd_sdhci_reset,
60334597a3fSShah Nehal-Bakulchandra .set_uhs_signaling = sdhci_set_uhs_signaling,
60434597a3fSShah Nehal-Bakulchandra };
60534597a3fSShah Nehal-Bakulchandra
60634597a3fSShah Nehal-Bakulchandra static const struct sdhci_acpi_chip sdhci_acpi_chip_amd = {
60734597a3fSShah Nehal-Bakulchandra .ops = &sdhci_acpi_ops_amd,
60834597a3fSShah Nehal-Bakulchandra };
60934597a3fSShah Nehal-Bakulchandra
sdhci_acpi_emmc_amd_probe_slot(struct platform_device * pdev,struct acpi_device * adev)61034597a3fSShah Nehal-Bakulchandra static int sdhci_acpi_emmc_amd_probe_slot(struct platform_device *pdev,
6114f3cde3aSAndy Shevchenko struct acpi_device *adev)
61234597a3fSShah Nehal-Bakulchandra {
61334597a3fSShah Nehal-Bakulchandra struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
61434597a3fSShah Nehal-Bakulchandra struct sdhci_host *host = c->host;
61534597a3fSShah Nehal-Bakulchandra
61634597a3fSShah Nehal-Bakulchandra sdhci_read_caps(host);
61734597a3fSShah Nehal-Bakulchandra if (host->caps1 & SDHCI_SUPPORT_DDR50)
61834597a3fSShah Nehal-Bakulchandra host->mmc->caps = MMC_CAP_1_8V_DDR;
61934597a3fSShah Nehal-Bakulchandra
62034597a3fSShah Nehal-Bakulchandra if ((host->caps1 & SDHCI_SUPPORT_SDR104) &&
62134597a3fSShah Nehal-Bakulchandra (host->mmc->caps & MMC_CAP_1_8V_DDR))
62234597a3fSShah Nehal-Bakulchandra host->mmc->caps2 = MMC_CAP2_HS400_1_8V;
62334597a3fSShah Nehal-Bakulchandra
624f23cc3baSRaul E Rangel /*
625f23cc3baSRaul E Rangel * There are two types of presets out in the wild:
626f23cc3baSRaul E Rangel * 1) Default/broken presets.
627f23cc3baSRaul E Rangel * These presets have two sets of problems:
628f23cc3baSRaul E Rangel * a) The clock divisor for SDR12, SDR25, and SDR50 is too small.
629f23cc3baSRaul E Rangel * This results in clock frequencies that are 2x higher than
630f23cc3baSRaul E Rangel * acceptable. i.e., SDR12 = 25 MHz, SDR25 = 50 MHz, SDR50 =
631f23cc3baSRaul E Rangel * 100 MHz.x
632f23cc3baSRaul E Rangel * b) The HS200 and HS400 driver strengths don't match.
633f23cc3baSRaul E Rangel * By default, the SDR104 preset register has a driver strength of
634f23cc3baSRaul E Rangel * A, but the (internal) HS400 preset register has a driver
635f23cc3baSRaul E Rangel * strength of B. As part of initializing HS400, HS200 tuning
636f23cc3baSRaul E Rangel * needs to be performed. Having different driver strengths
637f23cc3baSRaul E Rangel * between tuning and operation is wrong. It results in different
638f23cc3baSRaul E Rangel * rise/fall times that lead to incorrect sampling.
639f23cc3baSRaul E Rangel * 2) Firmware with properly initialized presets.
640f23cc3baSRaul E Rangel * These presets have proper clock divisors. i.e., SDR12 => 12MHz,
641f23cc3baSRaul E Rangel * SDR25 => 25 MHz, SDR50 => 50 MHz. Additionally the HS200 and
642f23cc3baSRaul E Rangel * HS400 preset driver strengths match.
643f23cc3baSRaul E Rangel *
644f23cc3baSRaul E Rangel * Enabling presets for HS400 doesn't work for the following reasons:
645f23cc3baSRaul E Rangel * 1) sdhci_set_ios has a hard coded list of timings that are used
646f23cc3baSRaul E Rangel * to determine if presets should be enabled.
647f23cc3baSRaul E Rangel * 2) sdhci_get_preset_value is using a non-standard register to
648f23cc3baSRaul E Rangel * read out HS400 presets. The AMD controller doesn't support this
649f23cc3baSRaul E Rangel * non-standard register. In fact, it doesn't expose the HS400
650f23cc3baSRaul E Rangel * preset register anywhere in the SDHCI memory map. This results
651f23cc3baSRaul E Rangel * in reading a garbage value and using the wrong presets.
652f23cc3baSRaul E Rangel *
653f23cc3baSRaul E Rangel * Since HS400 and HS200 presets must be identical, we could
6541ad0dcb9Swangjianli * instead use the SDR104 preset register.
655f23cc3baSRaul E Rangel *
656f23cc3baSRaul E Rangel * If the above issues are resolved we could remove this quirk for
657ff50df9aSAdrian Hunter * firmware that has valid presets (i.e., SDR12 <= 12 MHz).
658f23cc3baSRaul E Rangel */
659f23cc3baSRaul E Rangel host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN;
660f23cc3baSRaul E Rangel
66134597a3fSShah Nehal-Bakulchandra host->mmc_host_ops.select_drive_strength = amd_select_drive_strength;
66234597a3fSShah Nehal-Bakulchandra host->mmc_host_ops.set_ios = amd_set_ios;
66361d7437eSRaul E Rangel host->mmc_host_ops.execute_tuning = amd_sdhci_execute_tuning;
66434597a3fSShah Nehal-Bakulchandra return 0;
66534597a3fSShah Nehal-Bakulchandra }
66634597a3fSShah Nehal-Bakulchandra
66734597a3fSShah Nehal-Bakulchandra static const struct sdhci_acpi_slot sdhci_acpi_slot_amd_emmc = {
66834597a3fSShah Nehal-Bakulchandra .chip = &sdhci_acpi_chip_amd,
66934597a3fSShah Nehal-Bakulchandra .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
67045a3fe3bSRaul E Rangel .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
67145a3fe3bSRaul E Rangel SDHCI_QUIRK_32BIT_DMA_SIZE |
67234597a3fSShah Nehal-Bakulchandra SDHCI_QUIRK_32BIT_ADMA_SIZE,
67345a3fe3bSRaul E Rangel .quirks2 = SDHCI_QUIRK2_BROKEN_64_BIT_DMA,
67434597a3fSShah Nehal-Bakulchandra .probe_slot = sdhci_acpi_emmc_amd_probe_slot,
67561d7437eSRaul E Rangel .priv_size = sizeof(struct amd_sdhci_host),
67634597a3fSShah Nehal-Bakulchandra };
67734597a3fSShah Nehal-Bakulchandra
67807a58883SAdrian Hunter struct sdhci_acpi_uid_slot {
67907a58883SAdrian Hunter const char *hid;
68007a58883SAdrian Hunter const char *uid;
68107a58883SAdrian Hunter const struct sdhci_acpi_slot *slot;
68207a58883SAdrian Hunter };
68307a58883SAdrian Hunter
68407a58883SAdrian Hunter static const struct sdhci_acpi_uid_slot sdhci_acpi_uids[] = {
685e839b134SAdrian Hunter { "80865ACA", NULL, &sdhci_acpi_slot_int_sd },
686e839b134SAdrian Hunter { "80865ACC", NULL, &sdhci_acpi_slot_int_emmc },
687e839b134SAdrian Hunter { "80865AD0", NULL, &sdhci_acpi_slot_int_sdio },
68807a58883SAdrian Hunter { "80860F14" , "1" , &sdhci_acpi_slot_int_emmc },
689db52d4f8SDaniel Drake { "80860F14" , "2" , &sdhci_acpi_slot_int_sdio },
69007a58883SAdrian Hunter { "80860F14" , "3" , &sdhci_acpi_slot_int_sd },
691aad95dc4SAdrian Hunter { "80860F16" , NULL, &sdhci_acpi_slot_int_sd },
69207a58883SAdrian Hunter { "INT33BB" , "2" , &sdhci_acpi_slot_int_sdio },
6937147eaf3SAdrian Hunter { "INT33BB" , "3" , &sdhci_acpi_slot_int_sd },
69407a58883SAdrian Hunter { "INT33C6" , NULL, &sdhci_acpi_slot_int_sdio },
69507c001c1SMika Westerberg { "INT3436" , NULL, &sdhci_acpi_slot_int_sdio },
696d0ed8e6bSAdrian Hunter { "INT344D" , NULL, &sdhci_acpi_slot_int_sdio },
6970cd2f044SMichele Curti { "PNP0FFF" , "3" , &sdhci_acpi_slot_int_sd },
69807a58883SAdrian Hunter { "PNP0D40" },
69970cce2afSPhilip Elcan { "QCOM8051", NULL, &sdhci_acpi_slot_qcom_sd_3v },
70070cce2afSPhilip Elcan { "QCOM8052", NULL, &sdhci_acpi_slot_qcom_sd },
70134597a3fSShah Nehal-Bakulchandra { "AMDI0040", NULL, &sdhci_acpi_slot_amd_emmc },
702955047f3SJames Young { "AMDI0041", NULL, &sdhci_acpi_slot_amd_emmc },
70307a58883SAdrian Hunter { },
70407a58883SAdrian Hunter };
70507a58883SAdrian Hunter
706c4e05037SAdrian Hunter static const struct acpi_device_id sdhci_acpi_ids[] = {
707e839b134SAdrian Hunter { "80865ACA" },
708e839b134SAdrian Hunter { "80865ACC" },
709e839b134SAdrian Hunter { "80865AD0" },
71007a58883SAdrian Hunter { "80860F14" },
711aad95dc4SAdrian Hunter { "80860F16" },
71207a58883SAdrian Hunter { "INT33BB" },
71307a58883SAdrian Hunter { "INT33C6" },
71407c001c1SMika Westerberg { "INT3436" },
715d0ed8e6bSAdrian Hunter { "INT344D" },
716c4e05037SAdrian Hunter { "PNP0D40" },
71770cce2afSPhilip Elcan { "QCOM8051" },
71870cce2afSPhilip Elcan { "QCOM8052" },
71934597a3fSShah Nehal-Bakulchandra { "AMDI0040" },
720955047f3SJames Young { "AMDI0041" },
721c4e05037SAdrian Hunter { },
722c4e05037SAdrian Hunter };
723c4e05037SAdrian Hunter MODULE_DEVICE_TABLE(acpi, sdhci_acpi_ids);
724c4e05037SAdrian Hunter
725a92a73b1SHans de Goede /* Please keep this list sorted alphabetically */
72684d49b3dSHans de Goede static const struct dmi_system_id sdhci_acpi_quirks[] = {
72784d49b3dSHans de Goede {
72884d49b3dSHans de Goede /*
729a92a73b1SHans de Goede * The Acer Aspire Switch 10 (SW5-012) microSD slot always
730a92a73b1SHans de Goede * reports the card being write-protected even though microSD
731a92a73b1SHans de Goede * cards do not have a write-protect switch at all.
732a92a73b1SHans de Goede */
733a92a73b1SHans de Goede .matches = {
734a92a73b1SHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
735a92a73b1SHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "Aspire SW5-012"),
736a92a73b1SHans de Goede },
737a92a73b1SHans de Goede .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT,
738a92a73b1SHans de Goede },
739a92a73b1SHans de Goede {
740*431946c0SHans de Goede /* Asus T100TA, needs pull-up for cd but DSDT GpioInt has NoPull set */
741*431946c0SHans de Goede .matches = {
742*431946c0SHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK COMPUTER INC."),
743*431946c0SHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "T100TA"),
744*431946c0SHans de Goede },
745*431946c0SHans de Goede .driver_data = (void *)DMI_QUIRK_SD_CD_ENABLE_PULL_UP,
746*431946c0SHans de Goede },
747*431946c0SHans de Goede {
748a92a73b1SHans de Goede /*
74984d49b3dSHans de Goede * The Lenovo Miix 320-10ICR has a bug in the _PS0 method of
75084d49b3dSHans de Goede * the SHC1 ACPI device, this bug causes it to reprogram the
75184d49b3dSHans de Goede * wrong LDO (DLDO3) to 1.8V if 1.8V modes are used and the
75284d49b3dSHans de Goede * card is (runtime) suspended + resumed. DLDO3 is used for
75384d49b3dSHans de Goede * the LCD and setting it to 1.8V causes the LCD to go black.
75484d49b3dSHans de Goede */
75584d49b3dSHans de Goede .matches = {
75684d49b3dSHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
75784d49b3dSHans de Goede DMI_MATCH(DMI_PRODUCT_VERSION, "Lenovo MIIX 320-10ICR"),
75884d49b3dSHans de Goede },
75984d49b3dSHans de Goede .driver_data = (void *)DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP,
76084d49b3dSHans de Goede },
7613397b251SHans de Goede {
7623397b251SHans de Goede /*
763f3521d7cSHans de Goede * Lenovo Yoga Tablet 2 Pro 1380F/L (13" Android version) this
764f3521d7cSHans de Goede * has broken WP reporting and an inverted CD signal.
765f3521d7cSHans de Goede * Note this has more or less the same BIOS as the Lenovo Yoga
766f3521d7cSHans de Goede * Tablet 2 830F/L or 1050F/L (8" and 10" Android), but unlike
767f3521d7cSHans de Goede * the 830 / 1050 models which share the same mainboard this
768f3521d7cSHans de Goede * model has a different mainboard and the inverted CD and
769f3521d7cSHans de Goede * broken WP are unique to this board.
770f3521d7cSHans de Goede */
771f3521d7cSHans de Goede .matches = {
772f3521d7cSHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "Intel Corp."),
773f3521d7cSHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "VALLEYVIEW C0 PLATFORM"),
774f3521d7cSHans de Goede DMI_MATCH(DMI_BOARD_NAME, "BYT-T FFD8"),
775f3521d7cSHans de Goede /* Full match so as to NOT match the 830/1050 BIOS */
776f3521d7cSHans de Goede DMI_MATCH(DMI_BIOS_VERSION, "BLADE_21.X64.0005.R00.1504101516"),
777f3521d7cSHans de Goede },
778f3521d7cSHans de Goede .driver_data = (void *)(DMI_QUIRK_SD_NO_WRITE_PROTECT |
779f3521d7cSHans de Goede DMI_QUIRK_SD_CD_ACTIVE_HIGH),
780f3521d7cSHans de Goede },
781f3521d7cSHans de Goede {
782f3521d7cSHans de Goede /*
78394ee6782SHans de Goede * The Toshiba WT8-B's microSD slot always reports the card being
78494ee6782SHans de Goede * write-protected.
78594ee6782SHans de Goede */
78694ee6782SHans de Goede .matches = {
78794ee6782SHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
78894ee6782SHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "TOSHIBA ENCORE 2 WT8-B"),
78994ee6782SHans de Goede },
79094ee6782SHans de Goede .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT,
79194ee6782SHans de Goede },
792ef3eab75SHans de Goede {
793ef3eab75SHans de Goede /*
794ef3eab75SHans de Goede * The Toshiba WT10-A's microSD slot always reports the card being
795ef3eab75SHans de Goede * write-protected.
796ef3eab75SHans de Goede */
797ef3eab75SHans de Goede .matches = {
798ef3eab75SHans de Goede DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
799ef3eab75SHans de Goede DMI_MATCH(DMI_PRODUCT_NAME, "TOSHIBA WT10-A"),
800ef3eab75SHans de Goede },
801ef3eab75SHans de Goede .driver_data = (void *)DMI_QUIRK_SD_NO_WRITE_PROTECT,
802ef3eab75SHans de Goede },
80384d49b3dSHans de Goede {} /* Terminating entry */
80484d49b3dSHans de Goede };
80584d49b3dSHans de Goede
sdhci_acpi_get_slot(struct acpi_device * adev)8064f3cde3aSAndy Shevchenko static const struct sdhci_acpi_slot *sdhci_acpi_get_slot(struct acpi_device *adev)
807c4e05037SAdrian Hunter {
80807a58883SAdrian Hunter const struct sdhci_acpi_uid_slot *u;
809c4e05037SAdrian Hunter
81007a58883SAdrian Hunter for (u = sdhci_acpi_uids; u->hid; u++) {
8114f3cde3aSAndy Shevchenko if (acpi_dev_hid_uid_match(adev, u->hid, u->uid))
81207a58883SAdrian Hunter return u->slot;
81307a58883SAdrian Hunter }
814c4e05037SAdrian Hunter return NULL;
815c4e05037SAdrian Hunter }
816c4e05037SAdrian Hunter
sdhci_acpi_probe(struct platform_device * pdev)8174e608e4eSGreg Kroah-Hartman static int sdhci_acpi_probe(struct platform_device *pdev)
818c4e05037SAdrian Hunter {
819c4e05037SAdrian Hunter struct device *dev = &pdev->dev;
820f07b7952SAdrian Hunter const struct sdhci_acpi_slot *slot;
82184d49b3dSHans de Goede const struct dmi_system_id *id;
822a22f18bdSRafael J. Wysocki struct acpi_device *device;
823c4e05037SAdrian Hunter struct sdhci_acpi_host *c;
824c4e05037SAdrian Hunter struct sdhci_host *host;
825c4e05037SAdrian Hunter struct resource *iomem;
826c4e05037SAdrian Hunter resource_size_t len;
827f07b7952SAdrian Hunter size_t priv_size;
82884d49b3dSHans de Goede int quirks = 0;
82987875655SMika Westerberg int err;
830c4e05037SAdrian Hunter
831cd25c7beSAndy Shevchenko device = ACPI_COMPANION(dev);
832cd25c7beSAndy Shevchenko if (!device)
833c4e05037SAdrian Hunter return -ENODEV;
834c4e05037SAdrian Hunter
83584d49b3dSHans de Goede id = dmi_first_match(sdhci_acpi_quirks);
83684d49b3dSHans de Goede if (id)
83784d49b3dSHans de Goede quirks = (long)id->driver_data;
83884d49b3dSHans de Goede
8394f3cde3aSAndy Shevchenko slot = sdhci_acpi_get_slot(device);
840f07b7952SAdrian Hunter
841e5bbf307SAdrian Hunter /* Power on the SDHCI controller and its children */
842a22f18bdSRafael J. Wysocki acpi_device_fix_up_power_extended(device);
843e5bbf307SAdrian Hunter
8446e1c7d61SAdrian Hunter if (sdhci_acpi_byt_defer(dev))
8456e1c7d61SAdrian Hunter return -EPROBE_DEFER;
8466e1c7d61SAdrian Hunter
847c4e05037SAdrian Hunter iomem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
848c4e05037SAdrian Hunter if (!iomem)
849c4e05037SAdrian Hunter return -ENOMEM;
850c4e05037SAdrian Hunter
851c4e05037SAdrian Hunter len = resource_size(iomem);
852c4e05037SAdrian Hunter if (len < 0x100)
853c4e05037SAdrian Hunter dev_err(dev, "Invalid iomem size!\n");
854c4e05037SAdrian Hunter
855c4e05037SAdrian Hunter if (!devm_request_mem_region(dev, iomem->start, len, dev_name(dev)))
856c4e05037SAdrian Hunter return -ENOMEM;
857c4e05037SAdrian Hunter
858f07b7952SAdrian Hunter priv_size = slot ? slot->priv_size : 0;
859f07b7952SAdrian Hunter host = sdhci_alloc_host(dev, sizeof(struct sdhci_acpi_host) + priv_size);
860c4e05037SAdrian Hunter if (IS_ERR(host))
861c4e05037SAdrian Hunter return PTR_ERR(host);
862c4e05037SAdrian Hunter
863c4e05037SAdrian Hunter c = sdhci_priv(host);
864c4e05037SAdrian Hunter c->host = host;
865f07b7952SAdrian Hunter c->slot = slot;
866c4e05037SAdrian Hunter c->pdev = pdev;
867c4e05037SAdrian Hunter c->use_runtime_pm = sdhci_acpi_flag(c, SDHCI_ACPI_RUNTIME_PM);
868c4e05037SAdrian Hunter
869c4e05037SAdrian Hunter platform_set_drvdata(pdev, c);
870c4e05037SAdrian Hunter
871c4e05037SAdrian Hunter host->hw_name = "ACPI";
872c4e05037SAdrian Hunter host->ops = &sdhci_acpi_ops_dflt;
873c4e05037SAdrian Hunter host->irq = platform_get_irq(pdev, 0);
874d58ac803SAdrian Hunter if (host->irq < 0) {
875b465dea5SSergey Shtylyov err = host->irq;
8761b7ba57eSArvind Yadav goto err_free;
8771b7ba57eSArvind Yadav }
878c4e05037SAdrian Hunter
8794bdc0d67SChristoph Hellwig host->ioaddr = devm_ioremap(dev, iomem->start,
880c4e05037SAdrian Hunter resource_size(iomem));
881c4e05037SAdrian Hunter if (host->ioaddr == NULL) {
882c4e05037SAdrian Hunter err = -ENOMEM;
883c4e05037SAdrian Hunter goto err_free;
884c4e05037SAdrian Hunter }
885c4e05037SAdrian Hunter
886c4e05037SAdrian Hunter if (c->slot) {
887578b36b6SGao, Yunpeng if (c->slot->probe_slot) {
8884f3cde3aSAndy Shevchenko err = c->slot->probe_slot(pdev, device);
889578b36b6SGao, Yunpeng if (err)
890578b36b6SGao, Yunpeng goto err_free;
891578b36b6SGao, Yunpeng }
892c4e05037SAdrian Hunter if (c->slot->chip) {
893c4e05037SAdrian Hunter host->ops = c->slot->chip->ops;
894c4e05037SAdrian Hunter host->quirks |= c->slot->chip->quirks;
895c4e05037SAdrian Hunter host->quirks2 |= c->slot->chip->quirks2;
896c4e05037SAdrian Hunter host->mmc->caps |= c->slot->chip->caps;
897c4e05037SAdrian Hunter host->mmc->caps2 |= c->slot->chip->caps2;
898c4e05037SAdrian Hunter host->mmc->pm_caps |= c->slot->chip->pm_caps;
899c4e05037SAdrian Hunter }
900c4e05037SAdrian Hunter host->quirks |= c->slot->quirks;
901c4e05037SAdrian Hunter host->quirks2 |= c->slot->quirks2;
902c4e05037SAdrian Hunter host->mmc->caps |= c->slot->caps;
903c4e05037SAdrian Hunter host->mmc->caps2 |= c->slot->caps2;
904c4e05037SAdrian Hunter host->mmc->pm_caps |= c->slot->pm_caps;
905c4e05037SAdrian Hunter }
906c4e05037SAdrian Hunter
9070d3e3350SAdrian Hunter host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
9080d3e3350SAdrian Hunter
9094fd4409cSAdrian Hunter if (sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD)) {
9104fd4409cSAdrian Hunter bool v = sdhci_acpi_flag(c, SDHCI_ACPI_SD_CD_OVERRIDE_LEVEL);
9114fd4409cSAdrian Hunter
912f3521d7cSHans de Goede if (quirks & DMI_QUIRK_SD_CD_ACTIVE_HIGH)
913f3521d7cSHans de Goede host->mmc->caps2 |= MMC_CAP2_CD_ACTIVE_HIGH;
914f3521d7cSHans de Goede
915d0052ad9SMichał Mirosław err = mmc_gpiod_request_cd(host->mmc, NULL, 0, v, 0);
916e28d6f04SZhang Rui if (err) {
917e28d6f04SZhang Rui if (err == -EPROBE_DEFER)
918e28d6f04SZhang Rui goto err_free;
9194fd4409cSAdrian Hunter dev_warn(dev, "failed to setup card detect gpio\n");
9204fd4409cSAdrian Hunter c->use_runtime_pm = false;
921*431946c0SHans de Goede } else if (quirks & DMI_QUIRK_SD_CD_ENABLE_PULL_UP) {
922*431946c0SHans de Goede mmc_gpiod_set_cd_config(host->mmc,
923*431946c0SHans de Goede PIN_CONF_PACKED(PIN_CONFIG_BIAS_PULL_UP, 20000));
9244fd4409cSAdrian Hunter }
92584d49b3dSHans de Goede
92684d49b3dSHans de Goede if (quirks & DMI_QUIRK_RESET_SD_SIGNAL_VOLT_ON_SUSP)
92784d49b3dSHans de Goede c->reset_signal_volt_on_suspend = true;
9283397b251SHans de Goede
9293397b251SHans de Goede if (quirks & DMI_QUIRK_SD_NO_WRITE_PROTECT)
9303397b251SHans de Goede host->mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT;
9314fd4409cSAdrian Hunter }
9324fd4409cSAdrian Hunter
9330cc1a0f4SAdrian Hunter err = sdhci_setup_host(host);
934c4e05037SAdrian Hunter if (err)
935c4e05037SAdrian Hunter goto err_free;
936c4e05037SAdrian Hunter
9370cc1a0f4SAdrian Hunter if (c->slot && c->slot->setup_host) {
9380cc1a0f4SAdrian Hunter err = c->slot->setup_host(pdev);
9390cc1a0f4SAdrian Hunter if (err)
9400cc1a0f4SAdrian Hunter goto err_cleanup;
9410cc1a0f4SAdrian Hunter }
9420cc1a0f4SAdrian Hunter
9430cc1a0f4SAdrian Hunter err = __sdhci_add_host(host);
9440cc1a0f4SAdrian Hunter if (err)
9450cc1a0f4SAdrian Hunter goto err_cleanup;
9460cc1a0f4SAdrian Hunter
947c4e05037SAdrian Hunter if (c->use_runtime_pm) {
9481d1ff458SAdrian Hunter pm_runtime_set_active(dev);
949c4e05037SAdrian Hunter pm_suspend_ignore_children(dev, 1);
950c4e05037SAdrian Hunter pm_runtime_set_autosuspend_delay(dev, 50);
951c4e05037SAdrian Hunter pm_runtime_use_autosuspend(dev);
952c4e05037SAdrian Hunter pm_runtime_enable(dev);
953c4e05037SAdrian Hunter }
954c4e05037SAdrian Hunter
9554e6a2ef9SFu, Zhonghui device_enable_async_suspend(dev);
9564e6a2ef9SFu, Zhonghui
957c4e05037SAdrian Hunter return 0;
958c4e05037SAdrian Hunter
9590cc1a0f4SAdrian Hunter err_cleanup:
9600cc1a0f4SAdrian Hunter sdhci_cleanup_host(c->host);
961c4e05037SAdrian Hunter err_free:
962c7eabbeeSWang Dongsheng if (c->slot && c->slot->free_slot)
963c7eabbeeSWang Dongsheng c->slot->free_slot(pdev);
964c7eabbeeSWang Dongsheng
965c4e05037SAdrian Hunter sdhci_free_host(c->host);
966c4e05037SAdrian Hunter return err;
967c4e05037SAdrian Hunter }
968c4e05037SAdrian Hunter
sdhci_acpi_remove(struct platform_device * pdev)969a2b6de80SYangtao Li static void sdhci_acpi_remove(struct platform_device *pdev)
970c4e05037SAdrian Hunter {
971c4e05037SAdrian Hunter struct sdhci_acpi_host *c = platform_get_drvdata(pdev);
972c4e05037SAdrian Hunter struct device *dev = &pdev->dev;
973c4e05037SAdrian Hunter int dead;
974c4e05037SAdrian Hunter
975c4e05037SAdrian Hunter if (c->use_runtime_pm) {
976c4e05037SAdrian Hunter pm_runtime_get_sync(dev);
977c4e05037SAdrian Hunter pm_runtime_disable(dev);
978c4e05037SAdrian Hunter pm_runtime_put_noidle(dev);
979c4e05037SAdrian Hunter }
980c4e05037SAdrian Hunter
981578b36b6SGao, Yunpeng if (c->slot && c->slot->remove_slot)
982578b36b6SGao, Yunpeng c->slot->remove_slot(pdev);
983578b36b6SGao, Yunpeng
984c4e05037SAdrian Hunter dead = (sdhci_readl(c->host, SDHCI_INT_STATUS) == ~0);
985c4e05037SAdrian Hunter sdhci_remove_host(c->host, dead);
986c7eabbeeSWang Dongsheng
987c7eabbeeSWang Dongsheng if (c->slot && c->slot->free_slot)
988c7eabbeeSWang Dongsheng c->slot->free_slot(pdev);
989c7eabbeeSWang Dongsheng
990c4e05037SAdrian Hunter sdhci_free_host(c->host);
991c4e05037SAdrian Hunter }
992c4e05037SAdrian Hunter
sdhci_acpi_reset_signal_voltage_if_needed(struct device * dev)99384d49b3dSHans de Goede static void __maybe_unused sdhci_acpi_reset_signal_voltage_if_needed(
99484d49b3dSHans de Goede struct device *dev)
99584d49b3dSHans de Goede {
99684d49b3dSHans de Goede struct sdhci_acpi_host *c = dev_get_drvdata(dev);
99784d49b3dSHans de Goede struct sdhci_host *host = c->host;
99884d49b3dSHans de Goede
99984d49b3dSHans de Goede if (c->is_intel && c->reset_signal_volt_on_suspend &&
100084d49b3dSHans de Goede host->mmc->ios.signal_voltage != MMC_SIGNAL_VOLTAGE_330) {
100184d49b3dSHans de Goede struct intel_host *intel_host = sdhci_acpi_priv(c);
100284d49b3dSHans de Goede unsigned int fn = INTEL_DSM_V33_SWITCH;
100384d49b3dSHans de Goede u32 result = 0;
100484d49b3dSHans de Goede
100584d49b3dSHans de Goede intel_dsm(intel_host, dev, fn, &result);
100684d49b3dSHans de Goede }
100784d49b3dSHans de Goede }
100884d49b3dSHans de Goede
1009c4e05037SAdrian Hunter #ifdef CONFIG_PM_SLEEP
1010c4e05037SAdrian Hunter
sdhci_acpi_suspend(struct device * dev)1011c4e05037SAdrian Hunter static int sdhci_acpi_suspend(struct device *dev)
1012c4e05037SAdrian Hunter {
1013c4e05037SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev);
1014d38dcad4SAdrian Hunter struct sdhci_host *host = c->host;
101584d49b3dSHans de Goede int ret;
1016c4e05037SAdrian Hunter
1017d38dcad4SAdrian Hunter if (host->tuning_mode != SDHCI_TUNING_MODE_3)
1018d38dcad4SAdrian Hunter mmc_retune_needed(host->mmc);
1019d38dcad4SAdrian Hunter
102084d49b3dSHans de Goede ret = sdhci_suspend_host(host);
102184d49b3dSHans de Goede if (ret)
102284d49b3dSHans de Goede return ret;
102384d49b3dSHans de Goede
102484d49b3dSHans de Goede sdhci_acpi_reset_signal_voltage_if_needed(dev);
102584d49b3dSHans de Goede return 0;
1026c4e05037SAdrian Hunter }
1027c4e05037SAdrian Hunter
sdhci_acpi_resume(struct device * dev)1028c4e05037SAdrian Hunter static int sdhci_acpi_resume(struct device *dev)
1029c4e05037SAdrian Hunter {
1030c4e05037SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev);
1031c4e05037SAdrian Hunter
10326e1c7d61SAdrian Hunter sdhci_acpi_byt_setting(&c->pdev->dev);
10336e1c7d61SAdrian Hunter
1034c4e05037SAdrian Hunter return sdhci_resume_host(c->host);
1035c4e05037SAdrian Hunter }
1036c4e05037SAdrian Hunter
1037c4e05037SAdrian Hunter #endif
1038c4e05037SAdrian Hunter
1039162d6f98SRafael J. Wysocki #ifdef CONFIG_PM
1040c4e05037SAdrian Hunter
sdhci_acpi_runtime_suspend(struct device * dev)1041c4e05037SAdrian Hunter static int sdhci_acpi_runtime_suspend(struct device *dev)
1042c4e05037SAdrian Hunter {
1043c4e05037SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev);
1044d38dcad4SAdrian Hunter struct sdhci_host *host = c->host;
104584d49b3dSHans de Goede int ret;
1046c4e05037SAdrian Hunter
1047d38dcad4SAdrian Hunter if (host->tuning_mode != SDHCI_TUNING_MODE_3)
1048d38dcad4SAdrian Hunter mmc_retune_needed(host->mmc);
1049d38dcad4SAdrian Hunter
105084d49b3dSHans de Goede ret = sdhci_runtime_suspend_host(host);
105184d49b3dSHans de Goede if (ret)
105284d49b3dSHans de Goede return ret;
105384d49b3dSHans de Goede
105484d49b3dSHans de Goede sdhci_acpi_reset_signal_voltage_if_needed(dev);
105584d49b3dSHans de Goede return 0;
1056c4e05037SAdrian Hunter }
1057c4e05037SAdrian Hunter
sdhci_acpi_runtime_resume(struct device * dev)1058c4e05037SAdrian Hunter static int sdhci_acpi_runtime_resume(struct device *dev)
1059c4e05037SAdrian Hunter {
1060c4e05037SAdrian Hunter struct sdhci_acpi_host *c = dev_get_drvdata(dev);
1061c4e05037SAdrian Hunter
10626e1c7d61SAdrian Hunter sdhci_acpi_byt_setting(&c->pdev->dev);
10636e1c7d61SAdrian Hunter
1064c6303c5dSBaolin Wang return sdhci_runtime_resume_host(c->host, 0);
1065c4e05037SAdrian Hunter }
1066c4e05037SAdrian Hunter
1067c4e05037SAdrian Hunter #endif
1068c4e05037SAdrian Hunter
1069c4e05037SAdrian Hunter static const struct dev_pm_ops sdhci_acpi_pm_ops = {
1070dafed447SUlf Hansson SET_SYSTEM_SLEEP_PM_OPS(sdhci_acpi_suspend, sdhci_acpi_resume)
10711d75f74bSPeter Griffin SET_RUNTIME_PM_OPS(sdhci_acpi_runtime_suspend,
10729b449e99SUlf Hansson sdhci_acpi_runtime_resume, NULL)
1073c4e05037SAdrian Hunter };
1074c4e05037SAdrian Hunter
1075c4e05037SAdrian Hunter static struct platform_driver sdhci_acpi_driver = {
1076c4e05037SAdrian Hunter .driver = {
1077c4e05037SAdrian Hunter .name = "sdhci-acpi",
107821b2cec6SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1079c4e05037SAdrian Hunter .acpi_match_table = sdhci_acpi_ids,
1080c4e05037SAdrian Hunter .pm = &sdhci_acpi_pm_ops,
1081c4e05037SAdrian Hunter },
1082c4e05037SAdrian Hunter .probe = sdhci_acpi_probe,
1083a2b6de80SYangtao Li .remove_new = sdhci_acpi_remove,
1084c4e05037SAdrian Hunter };
1085c4e05037SAdrian Hunter
1086c4e05037SAdrian Hunter module_platform_driver(sdhci_acpi_driver);
1087c4e05037SAdrian Hunter
1088c4e05037SAdrian Hunter MODULE_DESCRIPTION("Secure Digital Host Controller Interface ACPI driver");
1089c4e05037SAdrian Hunter MODULE_AUTHOR("Adrian Hunter");
1090c4e05037SAdrian Hunter MODULE_LICENSE("GPL v2");
1091