1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * DMA support use of SYS DMAC with SDHI SD/SDIO controller 4 * 5 * Copyright (C) 2016-19 Renesas Electronics Corporation 6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang 7 * Copyright (C) 2017 Horms Solutions, Simon Horman 8 * Copyright (C) 2010-2011 Guennadi Liakhovetski 9 */ 10 11 #include <linux/device.h> 12 #include <linux/dma-mapping.h> 13 #include <linux/dmaengine.h> 14 #include <linux/mmc/host.h> 15 #include <linux/mod_devicetable.h> 16 #include <linux/module.h> 17 #include <linux/of.h> 18 #include <linux/pagemap.h> 19 #include <linux/platform_data/tmio.h> 20 #include <linux/platform_device.h> 21 #include <linux/pm_runtime.h> 22 #include <linux/scatterlist.h> 23 #include <linux/sys_soc.h> 24 25 #include "renesas_sdhi.h" 26 #include "tmio_mmc.h" 27 28 #define TMIO_MMC_MIN_DMA_LEN 8 29 30 static const struct renesas_sdhi_of_data of_default_cfg = { 31 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT, 32 }; 33 34 static const struct renesas_sdhi_of_data of_rz_compatible = { 35 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT | 36 TMIO_MMC_HAVE_CBSY, 37 .tmio_ocr_mask = MMC_VDD_32_33, 38 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 39 MMC_CAP_WAIT_WHILE_BUSY, 40 }; 41 42 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = { 43 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL, 44 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 45 MMC_CAP_WAIT_WHILE_BUSY, 46 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT, 47 }; 48 49 /* Definitions for sampling clocks */ 50 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = { 51 { 52 .clk_rate = 156000000, 53 .tap = 0x00000703, 54 }, 55 { 56 .clk_rate = 0, 57 .tap = 0x00000300, 58 }, 59 }; 60 61 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = { 62 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_CLK_ACTUAL | 63 TMIO_MMC_HAVE_CBSY | TMIO_MMC_MIN_RCAR2 | 64 TMIO_MMC_32BIT_DATA_PORT, 65 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ | 66 MMC_CAP_CMD23 | MMC_CAP_WAIT_WHILE_BUSY, 67 .capabilities2 = MMC_CAP2_NO_WRITE_PROTECT, 68 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES, 69 .dma_rx_offset = 0x2000, 70 .scc_offset = 0x0300, 71 .taps = rcar_gen2_scc_taps, 72 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps), 73 .max_blk_count = UINT_MAX / TMIO_MAX_BLK_SIZE, 74 }; 75 76 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = { 77 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, }, 78 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, }, 79 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, }, 80 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, }, 81 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, }, 82 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, }, 83 { .compatible = "renesas,sdhi-r8a7743", .data = &of_rcar_gen2_compatible, }, 84 { .compatible = "renesas,sdhi-r8a7745", .data = &of_rcar_gen2_compatible, }, 85 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, }, 86 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, }, 87 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, }, 88 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, }, 89 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, }, 90 { .compatible = "renesas,rcar-gen1-sdhi", .data = &of_rcar_gen1_compatible, }, 91 { .compatible = "renesas,rcar-gen2-sdhi", .data = &of_rcar_gen2_compatible, }, 92 { .compatible = "renesas,sdhi-shmobile" }, 93 {}, 94 }; 95 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match); 96 97 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host, 98 bool enable) 99 { 100 struct renesas_sdhi *priv = host_to_priv(host); 101 102 if (!host->chan_tx || !host->chan_rx) 103 return; 104 105 if (priv->dma_priv.enable) 106 priv->dma_priv.enable(host, enable); 107 } 108 109 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host) 110 { 111 renesas_sdhi_sys_dmac_enable_dma(host, false); 112 113 if (host->chan_rx) 114 dmaengine_terminate_sync(host->chan_rx); 115 if (host->chan_tx) 116 dmaengine_terminate_sync(host->chan_tx); 117 118 renesas_sdhi_sys_dmac_enable_dma(host, true); 119 } 120 121 static void renesas_sdhi_sys_dmac_dataend_dma(struct tmio_mmc_host *host) 122 { 123 struct renesas_sdhi *priv = host_to_priv(host); 124 125 complete(&priv->dma_priv.dma_dataend); 126 } 127 128 static void renesas_sdhi_sys_dmac_dma_callback(void *arg) 129 { 130 struct tmio_mmc_host *host = arg; 131 struct renesas_sdhi *priv = host_to_priv(host); 132 133 spin_lock_irq(&host->lock); 134 135 if (!host->data) 136 goto out; 137 138 if (host->data->flags & MMC_DATA_READ) 139 dma_unmap_sg(host->chan_rx->device->dev, 140 host->sg_ptr, host->sg_len, 141 DMA_FROM_DEVICE); 142 else 143 dma_unmap_sg(host->chan_tx->device->dev, 144 host->sg_ptr, host->sg_len, 145 DMA_TO_DEVICE); 146 147 spin_unlock_irq(&host->lock); 148 149 wait_for_completion(&priv->dma_priv.dma_dataend); 150 151 spin_lock_irq(&host->lock); 152 tmio_mmc_do_data_irq(host); 153 out: 154 spin_unlock_irq(&host->lock); 155 } 156 157 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host) 158 { 159 struct renesas_sdhi *priv = host_to_priv(host); 160 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 161 struct dma_async_tx_descriptor *desc = NULL; 162 struct dma_chan *chan = host->chan_rx; 163 dma_cookie_t cookie; 164 int ret, i; 165 bool aligned = true, multiple = true; 166 unsigned int align = 1; /* 2-byte alignment */ 167 168 for_each_sg(sg, sg_tmp, host->sg_len, i) { 169 if (sg_tmp->offset & align) 170 aligned = false; 171 if (sg_tmp->length & align) { 172 multiple = false; 173 break; 174 } 175 } 176 177 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 178 (align & PAGE_MASK))) || !multiple) { 179 ret = -EINVAL; 180 goto pio; 181 } 182 183 if (sg->length < TMIO_MMC_MIN_DMA_LEN) 184 return; 185 186 /* The only sg element can be unaligned, use our bounce buffer then */ 187 if (!aligned) { 188 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 189 host->sg_ptr = &host->bounce_sg; 190 sg = host->sg_ptr; 191 } 192 193 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE); 194 if (ret > 0) 195 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_DEV_TO_MEM, 196 DMA_CTRL_ACK); 197 198 if (desc) { 199 reinit_completion(&priv->dma_priv.dma_dataend); 200 desc->callback = renesas_sdhi_sys_dmac_dma_callback; 201 desc->callback_param = host; 202 203 cookie = dmaengine_submit(desc); 204 if (cookie < 0) { 205 desc = NULL; 206 ret = cookie; 207 } 208 host->dma_on = true; 209 } 210 pio: 211 if (!desc) { 212 /* DMA failed, fall back to PIO */ 213 renesas_sdhi_sys_dmac_enable_dma(host, false); 214 if (ret >= 0) 215 ret = -EIO; 216 host->chan_rx = NULL; 217 dma_release_channel(chan); 218 /* Free the Tx channel too */ 219 chan = host->chan_tx; 220 if (chan) { 221 host->chan_tx = NULL; 222 dma_release_channel(chan); 223 } 224 dev_warn(&host->pdev->dev, 225 "DMA failed: %d, falling back to PIO\n", ret); 226 } 227 } 228 229 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host) 230 { 231 struct renesas_sdhi *priv = host_to_priv(host); 232 struct scatterlist *sg = host->sg_ptr, *sg_tmp; 233 struct dma_async_tx_descriptor *desc = NULL; 234 struct dma_chan *chan = host->chan_tx; 235 dma_cookie_t cookie; 236 int ret, i; 237 bool aligned = true, multiple = true; 238 unsigned int align = 1; /* 2-byte alignment */ 239 240 for_each_sg(sg, sg_tmp, host->sg_len, i) { 241 if (sg_tmp->offset & align) 242 aligned = false; 243 if (sg_tmp->length & align) { 244 multiple = false; 245 break; 246 } 247 } 248 249 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE || 250 (align & PAGE_MASK))) || !multiple) { 251 ret = -EINVAL; 252 goto pio; 253 } 254 255 if (sg->length < TMIO_MMC_MIN_DMA_LEN) 256 return; 257 258 /* The only sg element can be unaligned, use our bounce buffer then */ 259 if (!aligned) { 260 void *sg_vaddr = kmap_local_page(sg_page(sg)); 261 262 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length); 263 memcpy(host->bounce_buf, sg_vaddr + sg->offset, host->bounce_sg.length); 264 kunmap_local(sg_vaddr); 265 host->sg_ptr = &host->bounce_sg; 266 sg = host->sg_ptr; 267 } 268 269 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE); 270 if (ret > 0) 271 desc = dmaengine_prep_slave_sg(chan, sg, ret, DMA_MEM_TO_DEV, 272 DMA_CTRL_ACK); 273 274 if (desc) { 275 reinit_completion(&priv->dma_priv.dma_dataend); 276 desc->callback = renesas_sdhi_sys_dmac_dma_callback; 277 desc->callback_param = host; 278 279 cookie = dmaengine_submit(desc); 280 if (cookie < 0) { 281 desc = NULL; 282 ret = cookie; 283 } 284 host->dma_on = true; 285 } 286 pio: 287 if (!desc) { 288 /* DMA failed, fall back to PIO */ 289 renesas_sdhi_sys_dmac_enable_dma(host, false); 290 if (ret >= 0) 291 ret = -EIO; 292 host->chan_tx = NULL; 293 dma_release_channel(chan); 294 /* Free the Rx channel too */ 295 chan = host->chan_rx; 296 if (chan) { 297 host->chan_rx = NULL; 298 dma_release_channel(chan); 299 } 300 dev_warn(&host->pdev->dev, 301 "DMA failed: %d, falling back to PIO\n", ret); 302 } 303 } 304 305 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host, 306 struct mmc_data *data) 307 { 308 if (data->flags & MMC_DATA_READ) { 309 if (host->chan_rx) 310 renesas_sdhi_sys_dmac_start_dma_rx(host); 311 } else { 312 if (host->chan_tx) 313 renesas_sdhi_sys_dmac_start_dma_tx(host); 314 } 315 } 316 317 static void renesas_sdhi_sys_dmac_issue_work_fn(struct work_struct *work) 318 { 319 struct tmio_mmc_host *host = from_work(host, work, dma_issue); 320 struct dma_chan *chan = NULL; 321 322 spin_lock_irq(&host->lock); 323 324 if (host->data) { 325 if (host->data->flags & MMC_DATA_READ) 326 chan = host->chan_rx; 327 else 328 chan = host->chan_tx; 329 } 330 331 spin_unlock_irq(&host->lock); 332 333 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND); 334 335 if (chan) 336 dma_async_issue_pending(chan); 337 } 338 339 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host, 340 struct tmio_mmc_data *pdata) 341 { 342 struct renesas_sdhi *priv = host_to_priv(host); 343 344 /* We can only either use DMA for both Tx and Rx or not use it at all */ 345 if (!host->pdev->dev.of_node && 346 (!pdata->chan_priv_tx || !pdata->chan_priv_rx)) 347 return; 348 349 if (!host->chan_tx && !host->chan_rx) { 350 struct resource *res = platform_get_resource(host->pdev, 351 IORESOURCE_MEM, 0); 352 struct dma_slave_config cfg = {}; 353 dma_cap_mask_t mask; 354 int ret; 355 356 if (!res) 357 return; 358 359 dma_cap_zero(mask); 360 dma_cap_set(DMA_SLAVE, mask); 361 362 host->chan_tx = dma_request_slave_channel_compat(mask, 363 priv->dma_priv.filter, pdata->chan_priv_tx, 364 &host->pdev->dev, "tx"); 365 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__, 366 host->chan_tx); 367 368 if (!host->chan_tx) 369 return; 370 371 cfg.direction = DMA_MEM_TO_DEV; 372 cfg.dst_addr = res->start + 373 (CTL_SD_DATA_PORT << host->bus_shift); 374 cfg.dst_addr_width = priv->dma_priv.dma_buswidth; 375 if (!cfg.dst_addr_width) 376 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 377 cfg.src_addr = 0; 378 ret = dmaengine_slave_config(host->chan_tx, &cfg); 379 if (ret < 0) 380 goto ecfgtx; 381 382 host->chan_rx = dma_request_slave_channel_compat(mask, 383 priv->dma_priv.filter, pdata->chan_priv_rx, 384 &host->pdev->dev, "rx"); 385 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__, 386 host->chan_rx); 387 388 if (!host->chan_rx) 389 goto ereqrx; 390 391 cfg.direction = DMA_DEV_TO_MEM; 392 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset; 393 cfg.src_addr_width = priv->dma_priv.dma_buswidth; 394 if (!cfg.src_addr_width) 395 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES; 396 cfg.dst_addr = 0; 397 ret = dmaengine_slave_config(host->chan_rx, &cfg); 398 if (ret < 0) 399 goto ecfgrx; 400 401 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA); 402 if (!host->bounce_buf) 403 goto ebouncebuf; 404 405 init_completion(&priv->dma_priv.dma_dataend); 406 INIT_WORK(&host->dma_issue, 407 renesas_sdhi_sys_dmac_issue_work_fn); 408 } 409 410 renesas_sdhi_sys_dmac_enable_dma(host, true); 411 412 return; 413 414 ebouncebuf: 415 ecfgrx: 416 dma_release_channel(host->chan_rx); 417 host->chan_rx = NULL; 418 ereqrx: 419 ecfgtx: 420 dma_release_channel(host->chan_tx); 421 host->chan_tx = NULL; 422 } 423 424 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host) 425 { 426 if (host->chan_tx) { 427 struct dma_chan *chan = host->chan_tx; 428 429 host->chan_tx = NULL; 430 dma_release_channel(chan); 431 } 432 if (host->chan_rx) { 433 struct dma_chan *chan = host->chan_rx; 434 435 host->chan_rx = NULL; 436 dma_release_channel(chan); 437 } 438 if (host->bounce_buf) { 439 free_pages((unsigned long)host->bounce_buf, 0); 440 host->bounce_buf = NULL; 441 } 442 } 443 444 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = { 445 .start = renesas_sdhi_sys_dmac_start_dma, 446 .enable = renesas_sdhi_sys_dmac_enable_dma, 447 .request = renesas_sdhi_sys_dmac_request_dma, 448 .release = renesas_sdhi_sys_dmac_release_dma, 449 .abort = renesas_sdhi_sys_dmac_abort_dma, 450 .dataend = renesas_sdhi_sys_dmac_dataend_dma, 451 }; 452 453 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev) 454 { 455 return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops, 456 of_device_get_match_data(&pdev->dev), NULL); 457 } 458 459 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = { 460 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 461 pm_runtime_force_resume) 462 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend, 463 tmio_mmc_host_runtime_resume, 464 NULL) 465 }; 466 467 static struct platform_driver renesas_sys_dmac_sdhi_driver = { 468 .driver = { 469 .name = "sh_mobile_sdhi", 470 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 471 .pm = &renesas_sdhi_sys_dmac_dev_pm_ops, 472 .of_match_table = renesas_sdhi_sys_dmac_of_match, 473 }, 474 .probe = renesas_sdhi_sys_dmac_probe, 475 .remove = renesas_sdhi_remove, 476 }; 477 478 module_platform_driver(renesas_sys_dmac_sdhi_driver); 479 480 MODULE_DESCRIPTION("Renesas SDHI driver"); 481 MODULE_AUTHOR("Magnus Damm"); 482 MODULE_LICENSE("GPL v2"); 483 MODULE_ALIAS("platform:sh_mobile_sdhi"); 484