1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * linux/drivers/mmc/host/pxa.c - PXA MMCI driver 4 * 5 * Copyright (C) 2003 Russell King, All Rights Reserved. 6 * 7 * This hardware is really sick: 8 * - No way to clear interrupts. 9 * - Have to turn off the clock whenever we touch the device. 10 * - Doesn't tell you how many data blocks were transferred. 11 * Yuck! 12 * 13 * 1 and 3 byte data transfers not supported 14 * max block length up to 1023 15 */ 16 #include <linux/module.h> 17 #include <linux/init.h> 18 #include <linux/ioport.h> 19 #include <linux/platform_device.h> 20 #include <linux/delay.h> 21 #include <linux/interrupt.h> 22 #include <linux/dmaengine.h> 23 #include <linux/dma-mapping.h> 24 #include <linux/clk.h> 25 #include <linux/err.h> 26 #include <linux/mmc/host.h> 27 #include <linux/mmc/slot-gpio.h> 28 #include <linux/io.h> 29 #include <linux/regulator/consumer.h> 30 #include <linux/gpio/consumer.h> 31 #include <linux/gfp.h> 32 #include <linux/of.h> 33 #include <linux/soc/pxa/cpu.h> 34 35 #include <linux/sizes.h> 36 37 #include <linux/platform_data/mmc-pxamci.h> 38 39 #include "pxamci.h" 40 41 #define DRIVER_NAME "pxa2xx-mci" 42 43 #define NR_SG 1 44 #define CLKRT_OFF (~0) 45 46 #define mmc_has_26MHz() (cpu_is_pxa300() || cpu_is_pxa310()) 47 48 struct pxamci_host { 49 struct mmc_host *mmc; 50 spinlock_t lock; 51 struct resource *res; 52 void __iomem *base; 53 struct clk *clk; 54 unsigned long clkrate; 55 unsigned int clkrt; 56 unsigned int cmdat; 57 unsigned int imask; 58 unsigned int power_mode; 59 unsigned long detect_delay_ms; 60 bool use_ro_gpio; 61 struct gpio_desc *power; 62 struct pxamci_platform_data *pdata; 63 64 struct mmc_request *mrq; 65 struct mmc_command *cmd; 66 struct mmc_data *data; 67 68 struct dma_chan *dma_chan_rx; 69 struct dma_chan *dma_chan_tx; 70 dma_cookie_t dma_cookie; 71 unsigned int dma_len; 72 unsigned int dma_dir; 73 }; 74 75 static int pxamci_init_ocr(struct pxamci_host *host) 76 { 77 struct mmc_host *mmc = host->mmc; 78 int ret; 79 80 ret = mmc_regulator_get_supply(mmc); 81 if (ret < 0) 82 return ret; 83 84 if (IS_ERR(mmc->supply.vmmc)) { 85 /* fall-back to platform data */ 86 mmc->ocr_avail = host->pdata ? 87 host->pdata->ocr_mask : 88 MMC_VDD_32_33 | MMC_VDD_33_34; 89 } 90 91 return 0; 92 } 93 94 static inline int pxamci_set_power(struct pxamci_host *host, 95 unsigned char power_mode, 96 unsigned int vdd) 97 { 98 struct mmc_host *mmc = host->mmc; 99 struct regulator *supply = mmc->supply.vmmc; 100 101 if (!IS_ERR(supply)) 102 return mmc_regulator_set_ocr(mmc, supply, vdd); 103 104 if (host->power) { 105 bool on = !!((1 << vdd) & host->pdata->ocr_mask); 106 gpiod_set_value(host->power, on); 107 } 108 109 if (host->pdata && host->pdata->setpower) 110 return host->pdata->setpower(mmc_dev(host->mmc), vdd); 111 112 return 0; 113 } 114 115 static void pxamci_stop_clock(struct pxamci_host *host) 116 { 117 if (readl(host->base + MMC_STAT) & STAT_CLK_EN) { 118 unsigned long timeout = 10000; 119 unsigned int v; 120 121 writel(STOP_CLOCK, host->base + MMC_STRPCL); 122 123 do { 124 v = readl(host->base + MMC_STAT); 125 if (!(v & STAT_CLK_EN)) 126 break; 127 udelay(1); 128 } while (timeout--); 129 130 if (v & STAT_CLK_EN) 131 dev_err(mmc_dev(host->mmc), "unable to stop clock\n"); 132 } 133 } 134 135 static void pxamci_enable_irq(struct pxamci_host *host, unsigned int mask) 136 { 137 unsigned long flags; 138 139 spin_lock_irqsave(&host->lock, flags); 140 host->imask &= ~mask; 141 writel(host->imask, host->base + MMC_I_MASK); 142 spin_unlock_irqrestore(&host->lock, flags); 143 } 144 145 static void pxamci_disable_irq(struct pxamci_host *host, unsigned int mask) 146 { 147 unsigned long flags; 148 149 spin_lock_irqsave(&host->lock, flags); 150 host->imask |= mask; 151 writel(host->imask, host->base + MMC_I_MASK); 152 spin_unlock_irqrestore(&host->lock, flags); 153 } 154 155 static void pxamci_dma_irq(void *param); 156 157 static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data) 158 { 159 struct dma_async_tx_descriptor *tx; 160 enum dma_transfer_direction direction; 161 struct dma_slave_config config; 162 struct dma_chan *chan; 163 unsigned int nob = data->blocks; 164 unsigned long long clks; 165 unsigned int timeout; 166 int ret; 167 168 host->data = data; 169 170 writel(nob, host->base + MMC_NOB); 171 writel(data->blksz, host->base + MMC_BLKLEN); 172 173 clks = (unsigned long long)data->timeout_ns * host->clkrate; 174 do_div(clks, 1000000000UL); 175 timeout = (unsigned int)clks + (data->timeout_clks << host->clkrt); 176 writel((timeout + 255) / 256, host->base + MMC_RDTO); 177 178 memset(&config, 0, sizeof(config)); 179 config.src_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 180 config.dst_addr_width = DMA_SLAVE_BUSWIDTH_1_BYTE; 181 config.src_addr = host->res->start + MMC_RXFIFO; 182 config.dst_addr = host->res->start + MMC_TXFIFO; 183 config.src_maxburst = 32; 184 config.dst_maxburst = 32; 185 186 if (data->flags & MMC_DATA_READ) { 187 host->dma_dir = DMA_FROM_DEVICE; 188 direction = DMA_DEV_TO_MEM; 189 chan = host->dma_chan_rx; 190 } else { 191 host->dma_dir = DMA_TO_DEVICE; 192 direction = DMA_MEM_TO_DEV; 193 chan = host->dma_chan_tx; 194 } 195 196 config.direction = direction; 197 198 ret = dmaengine_slave_config(chan, &config); 199 if (ret < 0) { 200 dev_err(mmc_dev(host->mmc), "dma slave config failed\n"); 201 return; 202 } 203 204 host->dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len, 205 host->dma_dir); 206 207 tx = dmaengine_prep_slave_sg(chan, data->sg, host->dma_len, direction, 208 DMA_PREP_INTERRUPT); 209 if (!tx) { 210 dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n"); 211 return; 212 } 213 214 if (!(data->flags & MMC_DATA_READ)) { 215 tx->callback = pxamci_dma_irq; 216 tx->callback_param = host; 217 } 218 219 host->dma_cookie = dmaengine_submit(tx); 220 221 /* 222 * workaround for erratum #91: 223 * only start DMA now if we are doing a read, 224 * otherwise we wait until CMD/RESP has finished 225 * before starting DMA. 226 */ 227 if (!cpu_is_pxa27x() || data->flags & MMC_DATA_READ) 228 dma_async_issue_pending(chan); 229 } 230 231 static void pxamci_start_cmd(struct pxamci_host *host, struct mmc_command *cmd, unsigned int cmdat) 232 { 233 WARN_ON(host->cmd != NULL); 234 host->cmd = cmd; 235 236 if (cmd->flags & MMC_RSP_BUSY) 237 cmdat |= CMDAT_BUSY; 238 239 #define RSP_TYPE(x) ((x) & ~(MMC_RSP_BUSY|MMC_RSP_OPCODE)) 240 switch (RSP_TYPE(mmc_resp_type(cmd))) { 241 case RSP_TYPE(MMC_RSP_R1): /* r1, r1b, r6, r7 */ 242 cmdat |= CMDAT_RESP_SHORT; 243 break; 244 case RSP_TYPE(MMC_RSP_R3): 245 cmdat |= CMDAT_RESP_R3; 246 break; 247 case RSP_TYPE(MMC_RSP_R2): 248 cmdat |= CMDAT_RESP_R2; 249 break; 250 default: 251 break; 252 } 253 254 writel(cmd->opcode, host->base + MMC_CMD); 255 writel(cmd->arg >> 16, host->base + MMC_ARGH); 256 writel(cmd->arg & 0xffff, host->base + MMC_ARGL); 257 writel(cmdat, host->base + MMC_CMDAT); 258 writel(host->clkrt, host->base + MMC_CLKRT); 259 260 writel(START_CLOCK, host->base + MMC_STRPCL); 261 262 pxamci_enable_irq(host, END_CMD_RES); 263 } 264 265 static void pxamci_finish_request(struct pxamci_host *host, struct mmc_request *mrq) 266 { 267 host->mrq = NULL; 268 host->cmd = NULL; 269 host->data = NULL; 270 mmc_request_done(host->mmc, mrq); 271 } 272 273 static int pxamci_cmd_done(struct pxamci_host *host, unsigned int stat) 274 { 275 struct mmc_command *cmd = host->cmd; 276 int i; 277 u32 v; 278 279 if (!cmd) 280 return 0; 281 282 host->cmd = NULL; 283 284 /* 285 * Did I mention this is Sick. We always need to 286 * discard the upper 8 bits of the first 16-bit word. 287 */ 288 v = readl(host->base + MMC_RES) & 0xffff; 289 for (i = 0; i < 4; i++) { 290 u32 w1 = readl(host->base + MMC_RES) & 0xffff; 291 u32 w2 = readl(host->base + MMC_RES) & 0xffff; 292 cmd->resp[i] = v << 24 | w1 << 8 | w2 >> 8; 293 v = w2; 294 } 295 296 if (stat & STAT_TIME_OUT_RESPONSE) { 297 cmd->error = -ETIMEDOUT; 298 } else if (stat & STAT_RES_CRC_ERR && cmd->flags & MMC_RSP_CRC) { 299 /* 300 * workaround for erratum #42: 301 * Intel PXA27x Family Processor Specification Update Rev 001 302 * A bogus CRC error can appear if the msb of a 136 bit 303 * response is a one. 304 */ 305 if (cpu_is_pxa27x() && 306 (cmd->flags & MMC_RSP_136 && cmd->resp[0] & 0x80000000)) 307 pr_debug("ignoring CRC from command %d - *risky*\n", cmd->opcode); 308 else 309 cmd->error = -EILSEQ; 310 } 311 312 pxamci_disable_irq(host, END_CMD_RES); 313 if (host->data && !cmd->error) { 314 pxamci_enable_irq(host, DATA_TRAN_DONE); 315 /* 316 * workaround for erratum #91, if doing write 317 * enable DMA late 318 */ 319 if (cpu_is_pxa27x() && host->data->flags & MMC_DATA_WRITE) 320 dma_async_issue_pending(host->dma_chan_tx); 321 } else { 322 pxamci_finish_request(host, host->mrq); 323 } 324 325 return 1; 326 } 327 328 static int pxamci_data_done(struct pxamci_host *host, unsigned int stat) 329 { 330 struct mmc_data *data = host->data; 331 struct dma_chan *chan; 332 333 if (!data) 334 return 0; 335 336 if (data->flags & MMC_DATA_READ) 337 chan = host->dma_chan_rx; 338 else 339 chan = host->dma_chan_tx; 340 dma_unmap_sg(chan->device->dev, 341 data->sg, data->sg_len, host->dma_dir); 342 343 if (stat & STAT_READ_TIME_OUT) 344 data->error = -ETIMEDOUT; 345 else if (stat & (STAT_CRC_READ_ERROR|STAT_CRC_WRITE_ERROR)) 346 data->error = -EILSEQ; 347 348 /* 349 * There appears to be a hardware design bug here. There seems to 350 * be no way to find out how much data was transferred to the card. 351 * This means that if there was an error on any block, we mark all 352 * data blocks as being in error. 353 */ 354 if (!data->error) 355 data->bytes_xfered = data->blocks * data->blksz; 356 else 357 data->bytes_xfered = 0; 358 359 pxamci_disable_irq(host, DATA_TRAN_DONE); 360 361 host->data = NULL; 362 if (host->mrq->stop) { 363 pxamci_stop_clock(host); 364 pxamci_start_cmd(host, host->mrq->stop, host->cmdat); 365 } else { 366 pxamci_finish_request(host, host->mrq); 367 } 368 369 return 1; 370 } 371 372 static irqreturn_t pxamci_irq(int irq, void *devid) 373 { 374 struct pxamci_host *host = devid; 375 unsigned int ireg; 376 int handled = 0; 377 378 ireg = readl(host->base + MMC_I_REG) & ~readl(host->base + MMC_I_MASK); 379 380 if (ireg) { 381 unsigned stat = readl(host->base + MMC_STAT); 382 383 pr_debug("PXAMCI: irq %08x stat %08x\n", ireg, stat); 384 385 if (ireg & END_CMD_RES) 386 handled |= pxamci_cmd_done(host, stat); 387 if (ireg & DATA_TRAN_DONE) 388 handled |= pxamci_data_done(host, stat); 389 if (ireg & SDIO_INT) { 390 mmc_signal_sdio_irq(host->mmc); 391 handled = 1; 392 } 393 } 394 395 return IRQ_RETVAL(handled); 396 } 397 398 static void pxamci_request(struct mmc_host *mmc, struct mmc_request *mrq) 399 { 400 struct pxamci_host *host = mmc_priv(mmc); 401 unsigned int cmdat; 402 403 WARN_ON(host->mrq != NULL); 404 405 host->mrq = mrq; 406 407 pxamci_stop_clock(host); 408 409 cmdat = host->cmdat; 410 host->cmdat &= ~CMDAT_INIT; 411 412 if (mrq->data) { 413 pxamci_setup_data(host, mrq->data); 414 415 cmdat &= ~CMDAT_BUSY; 416 cmdat |= CMDAT_DATAEN | CMDAT_DMAEN; 417 if (mrq->data->flags & MMC_DATA_WRITE) 418 cmdat |= CMDAT_WRITE; 419 } 420 421 pxamci_start_cmd(host, mrq->cmd, cmdat); 422 } 423 424 static int pxamci_get_ro(struct mmc_host *mmc) 425 { 426 struct pxamci_host *host = mmc_priv(mmc); 427 428 if (host->use_ro_gpio) 429 return mmc_gpio_get_ro(mmc); 430 if (host->pdata && host->pdata->get_ro) 431 return !!host->pdata->get_ro(mmc_dev(mmc)); 432 /* 433 * Board doesn't support read only detection; let the mmc core 434 * decide what to do. 435 */ 436 return -ENOSYS; 437 } 438 439 static void pxamci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 440 { 441 struct pxamci_host *host = mmc_priv(mmc); 442 443 if (ios->clock) { 444 unsigned long rate = host->clkrate; 445 unsigned int clk = rate / ios->clock; 446 447 if (host->clkrt == CLKRT_OFF) 448 clk_prepare_enable(host->clk); 449 450 if (ios->clock == 26000000) { 451 /* to support 26MHz */ 452 host->clkrt = 7; 453 } else { 454 /* to handle (19.5MHz, 26MHz) */ 455 if (!clk) 456 clk = 1; 457 458 /* 459 * clk might result in a lower divisor than we 460 * desire. check for that condition and adjust 461 * as appropriate. 462 */ 463 if (rate / clk > ios->clock) 464 clk <<= 1; 465 host->clkrt = fls(clk) - 1; 466 } 467 468 /* 469 * we write clkrt on the next command 470 */ 471 } else { 472 pxamci_stop_clock(host); 473 if (host->clkrt != CLKRT_OFF) { 474 host->clkrt = CLKRT_OFF; 475 clk_disable_unprepare(host->clk); 476 } 477 } 478 479 if (host->power_mode != ios->power_mode) { 480 int ret; 481 482 host->power_mode = ios->power_mode; 483 484 ret = pxamci_set_power(host, ios->power_mode, ios->vdd); 485 if (ret) { 486 dev_err(mmc_dev(mmc), "unable to set power\n"); 487 /* 488 * The .set_ios() function in the mmc_host_ops 489 * struct return void, and failing to set the 490 * power should be rare so we print an error and 491 * return here. 492 */ 493 return; 494 } 495 496 if (ios->power_mode == MMC_POWER_ON) 497 host->cmdat |= CMDAT_INIT; 498 } 499 500 if (ios->bus_width == MMC_BUS_WIDTH_4) 501 host->cmdat |= CMDAT_SD_4DAT; 502 else 503 host->cmdat &= ~CMDAT_SD_4DAT; 504 505 dev_dbg(mmc_dev(mmc), "PXAMCI: clkrt = %x cmdat = %x\n", 506 host->clkrt, host->cmdat); 507 } 508 509 static void pxamci_enable_sdio_irq(struct mmc_host *host, int enable) 510 { 511 struct pxamci_host *pxa_host = mmc_priv(host); 512 513 if (enable) 514 pxamci_enable_irq(pxa_host, SDIO_INT); 515 else 516 pxamci_disable_irq(pxa_host, SDIO_INT); 517 } 518 519 static const struct mmc_host_ops pxamci_ops = { 520 .request = pxamci_request, 521 .get_cd = mmc_gpio_get_cd, 522 .get_ro = pxamci_get_ro, 523 .set_ios = pxamci_set_ios, 524 .enable_sdio_irq = pxamci_enable_sdio_irq, 525 }; 526 527 static void pxamci_dma_irq(void *param) 528 { 529 struct pxamci_host *host = param; 530 struct dma_tx_state state; 531 enum dma_status status; 532 struct dma_chan *chan; 533 unsigned long flags; 534 535 spin_lock_irqsave(&host->lock, flags); 536 537 if (!host->data) 538 goto out_unlock; 539 540 if (host->data->flags & MMC_DATA_READ) 541 chan = host->dma_chan_rx; 542 else 543 chan = host->dma_chan_tx; 544 545 status = dmaengine_tx_status(chan, host->dma_cookie, &state); 546 547 if (likely(status == DMA_COMPLETE)) { 548 writel(BUF_PART_FULL, host->base + MMC_PRTBUF); 549 } else { 550 pr_err("%s: DMA error on %s channel\n", mmc_hostname(host->mmc), 551 host->data->flags & MMC_DATA_READ ? "rx" : "tx"); 552 host->data->error = -EIO; 553 pxamci_data_done(host, 0); 554 } 555 556 out_unlock: 557 spin_unlock_irqrestore(&host->lock, flags); 558 } 559 560 static irqreturn_t pxamci_detect_irq(int irq, void *devid) 561 { 562 struct pxamci_host *host = mmc_priv(devid); 563 564 mmc_detect_change(devid, msecs_to_jiffies(host->detect_delay_ms)); 565 return IRQ_HANDLED; 566 } 567 568 #ifdef CONFIG_OF 569 static const struct of_device_id pxa_mmc_dt_ids[] = { 570 { .compatible = "marvell,pxa-mmc" }, 571 { } 572 }; 573 574 MODULE_DEVICE_TABLE(of, pxa_mmc_dt_ids); 575 576 static int pxamci_of_init(struct platform_device *pdev, 577 struct mmc_host *mmc) 578 { 579 struct device_node *np = pdev->dev.of_node; 580 struct pxamci_host *host = mmc_priv(mmc); 581 u32 tmp; 582 int ret; 583 584 if (!np) 585 return 0; 586 587 /* pxa-mmc specific */ 588 if (of_property_read_u32(np, "pxa-mmc,detect-delay-ms", &tmp) == 0) 589 host->detect_delay_ms = tmp; 590 591 ret = mmc_of_parse(mmc); 592 if (ret < 0) 593 return ret; 594 595 return 0; 596 } 597 #else 598 static int pxamci_of_init(struct platform_device *pdev, 599 struct mmc_host *mmc) 600 { 601 return 0; 602 } 603 #endif 604 605 static int pxamci_probe(struct platform_device *pdev) 606 { 607 struct mmc_host *mmc; 608 struct pxamci_host *host = NULL; 609 struct device *dev = &pdev->dev; 610 struct resource *r; 611 int ret, irq; 612 613 irq = platform_get_irq(pdev, 0); 614 if (irq < 0) 615 return irq; 616 617 mmc = devm_mmc_alloc_host(dev, sizeof(*host)); 618 if (!mmc) 619 return -ENOMEM; 620 621 mmc->ops = &pxamci_ops; 622 623 /* 624 * We can do SG-DMA, but we don't because we never know how much 625 * data we successfully wrote to the card. 626 */ 627 mmc->max_segs = NR_SG; 628 629 /* 630 * Our hardware DMA can handle a maximum of one page per SG entry. 631 */ 632 mmc->max_seg_size = PAGE_SIZE; 633 634 /* 635 * Block length register is only 10 bits before PXA27x. 636 */ 637 mmc->max_blk_size = cpu_is_pxa25x() ? 1023 : 2048; 638 639 /* 640 * Block count register is 16 bits. 641 */ 642 mmc->max_blk_count = 65535; 643 644 ret = pxamci_of_init(pdev, mmc); 645 if (ret) 646 return ret; 647 648 host = mmc_priv(mmc); 649 host->mmc = mmc; 650 host->pdata = pdev->dev.platform_data; 651 host->clkrt = CLKRT_OFF; 652 653 host->clk = devm_clk_get(dev, NULL); 654 if (IS_ERR(host->clk)) 655 return dev_err_probe(dev, PTR_ERR(host->clk), 656 "Failed to acquire clock\n"); 657 658 host->clkrate = clk_get_rate(host->clk); 659 660 /* 661 * Calculate minimum clock rate, rounding up. 662 */ 663 mmc->f_min = (host->clkrate + 63) / 64; 664 mmc->f_max = (mmc_has_26MHz()) ? 26000000 : host->clkrate; 665 666 ret = pxamci_init_ocr(host); 667 if (ret < 0) 668 return ret; 669 670 mmc->caps = 0; 671 host->cmdat = 0; 672 if (!cpu_is_pxa25x()) { 673 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; 674 host->cmdat |= CMDAT_SDIO_INT_EN; 675 if (mmc_has_26MHz()) 676 mmc->caps |= MMC_CAP_MMC_HIGHSPEED | 677 MMC_CAP_SD_HIGHSPEED; 678 } 679 680 spin_lock_init(&host->lock); 681 host->imask = MMC_I_MASK_ALL; 682 683 host->base = devm_platform_get_and_ioremap_resource(pdev, 0, &r); 684 if (IS_ERR(host->base)) 685 return PTR_ERR(host->base); 686 host->res = r; 687 688 /* 689 * Ensure that the host controller is shut down, and setup 690 * with our defaults. 691 */ 692 pxamci_stop_clock(host); 693 writel(0, host->base + MMC_SPI); 694 writel(64, host->base + MMC_RESTO); 695 writel(host->imask, host->base + MMC_I_MASK); 696 697 ret = devm_request_irq(dev, irq, pxamci_irq, 0, 698 DRIVER_NAME, host); 699 if (ret) 700 return ret; 701 702 platform_set_drvdata(pdev, mmc); 703 704 host->dma_chan_rx = devm_dma_request_chan(dev, "rx"); 705 if (IS_ERR(host->dma_chan_rx)) 706 return dev_err_probe(dev, PTR_ERR(host->dma_chan_rx), 707 "unable to request rx dma channel\n"); 708 709 710 host->dma_chan_tx = devm_dma_request_chan(dev, "tx"); 711 if (IS_ERR(host->dma_chan_tx)) 712 return dev_err_probe(dev, PTR_ERR(host->dma_chan_tx), 713 "unable to request tx dma channel\n"); 714 715 if (host->pdata) { 716 host->detect_delay_ms = host->pdata->detect_delay_ms; 717 718 host->power = devm_gpiod_get_optional(dev, "power", GPIOD_OUT_LOW); 719 if (IS_ERR(host->power)) 720 return dev_err_probe(dev, PTR_ERR(host->power), 721 "Failed requesting gpio_power\n"); 722 723 /* FIXME: should we pass detection delay to debounce? */ 724 ret = mmc_gpiod_request_cd(mmc, "cd", 0, false, 0); 725 if (ret && ret != -ENOENT) 726 return dev_err_probe(dev, ret, "Failed requesting gpio_cd\n"); 727 728 if (!host->pdata->gpio_card_ro_invert) 729 mmc->caps2 |= MMC_CAP2_RO_ACTIVE_HIGH; 730 731 ret = mmc_gpiod_request_ro(mmc, "wp", 0, 0); 732 if (ret && ret != -ENOENT) 733 return dev_err_probe(dev, ret, "Failed requesting gpio_ro\n"); 734 735 if (!ret) 736 host->use_ro_gpio = true; 737 738 if (host->pdata->init) 739 host->pdata->init(dev, pxamci_detect_irq, mmc); 740 741 if (host->power && host->pdata->setpower) 742 dev_warn(dev, "gpio_power and setpower() both defined\n"); 743 if (host->use_ro_gpio && host->pdata->get_ro) 744 dev_warn(dev, "gpio_ro and get_ro() both defined\n"); 745 } 746 747 ret = mmc_add_host(mmc); 748 if (ret) { 749 if (host->pdata && host->pdata->exit) 750 host->pdata->exit(dev, mmc); 751 } 752 753 return ret; 754 } 755 756 static void pxamci_remove(struct platform_device *pdev) 757 { 758 struct mmc_host *mmc = platform_get_drvdata(pdev); 759 760 if (mmc) { 761 struct pxamci_host *host = mmc_priv(mmc); 762 763 mmc_remove_host(mmc); 764 765 if (host->pdata && host->pdata->exit) 766 host->pdata->exit(&pdev->dev, mmc); 767 768 pxamci_stop_clock(host); 769 writel(TXFIFO_WR_REQ|RXFIFO_RD_REQ|CLK_IS_OFF|STOP_CMD| 770 END_CMD_RES|PRG_DONE|DATA_TRAN_DONE, 771 host->base + MMC_I_MASK); 772 773 dmaengine_terminate_all(host->dma_chan_rx); 774 dmaengine_terminate_all(host->dma_chan_tx); 775 } 776 } 777 778 static struct platform_driver pxamci_driver = { 779 .probe = pxamci_probe, 780 .remove = pxamci_remove, 781 .driver = { 782 .name = DRIVER_NAME, 783 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 784 .of_match_table = of_match_ptr(pxa_mmc_dt_ids), 785 }, 786 }; 787 788 module_platform_driver(pxamci_driver); 789 790 MODULE_DESCRIPTION("PXA Multimedia Card Interface Driver"); 791 MODULE_LICENSE("GPL"); 792 MODULE_ALIAS("platform:pxa2xx-mci"); 793