11c6a0718SPierre Ossman /* 270f10482SPierre Ossman * linux/drivers/mmc/host/omap.c 31c6a0718SPierre Ossman * 41c6a0718SPierre Ossman * Copyright (C) 2004 Nokia Corporation 51c6a0718SPierre Ossman * Written by Tuukka Tikkanen and Juha Yrj�l�<juha.yrjola@nokia.com> 61c6a0718SPierre Ossman * Misc hacks here and there by Tony Lindgren <tony@atomide.com> 71c6a0718SPierre Ossman * Other hacks (DMA, SD, etc) by David Brownell 81c6a0718SPierre Ossman * 91c6a0718SPierre Ossman * This program is free software; you can redistribute it and/or modify 101c6a0718SPierre Ossman * it under the terms of the GNU General Public License version 2 as 111c6a0718SPierre Ossman * published by the Free Software Foundation. 121c6a0718SPierre Ossman */ 131c6a0718SPierre Ossman 141c6a0718SPierre Ossman #include <linux/module.h> 151c6a0718SPierre Ossman #include <linux/moduleparam.h> 161c6a0718SPierre Ossman #include <linux/init.h> 171c6a0718SPierre Ossman #include <linux/ioport.h> 181c6a0718SPierre Ossman #include <linux/platform_device.h> 191c6a0718SPierre Ossman #include <linux/interrupt.h> 201c6a0718SPierre Ossman #include <linux/dma-mapping.h> 211c6a0718SPierre Ossman #include <linux/delay.h> 221c6a0718SPierre Ossman #include <linux/spinlock.h> 231c6a0718SPierre Ossman #include <linux/timer.h> 241c6a0718SPierre Ossman #include <linux/mmc/host.h> 251c6a0718SPierre Ossman #include <linux/mmc/card.h> 261c6a0718SPierre Ossman #include <linux/clk.h> 2745711f1aSJens Axboe #include <linux/scatterlist.h> 286d16bfb5SDavid Brownell #include <linux/i2c/tps65010.h> 291c6a0718SPierre Ossman 301c6a0718SPierre Ossman #include <asm/io.h> 311c6a0718SPierre Ossman #include <asm/irq.h> 321c6a0718SPierre Ossman #include <asm/mach-types.h> 331c6a0718SPierre Ossman 341c6a0718SPierre Ossman #include <asm/arch/board.h> 35abfbe5f7SJuha Yrjola #include <asm/arch/mmc.h> 361c6a0718SPierre Ossman #include <asm/arch/gpio.h> 371c6a0718SPierre Ossman #include <asm/arch/dma.h> 381c6a0718SPierre Ossman #include <asm/arch/mux.h> 391c6a0718SPierre Ossman #include <asm/arch/fpga.h> 401c6a0718SPierre Ossman 411c6a0718SPierre Ossman #define OMAP_MMC_REG_CMD 0x00 421c6a0718SPierre Ossman #define OMAP_MMC_REG_ARGL 0x04 431c6a0718SPierre Ossman #define OMAP_MMC_REG_ARGH 0x08 441c6a0718SPierre Ossman #define OMAP_MMC_REG_CON 0x0c 451c6a0718SPierre Ossman #define OMAP_MMC_REG_STAT 0x10 461c6a0718SPierre Ossman #define OMAP_MMC_REG_IE 0x14 471c6a0718SPierre Ossman #define OMAP_MMC_REG_CTO 0x18 481c6a0718SPierre Ossman #define OMAP_MMC_REG_DTO 0x1c 491c6a0718SPierre Ossman #define OMAP_MMC_REG_DATA 0x20 501c6a0718SPierre Ossman #define OMAP_MMC_REG_BLEN 0x24 511c6a0718SPierre Ossman #define OMAP_MMC_REG_NBLK 0x28 521c6a0718SPierre Ossman #define OMAP_MMC_REG_BUF 0x2c 531c6a0718SPierre Ossman #define OMAP_MMC_REG_SDIO 0x34 541c6a0718SPierre Ossman #define OMAP_MMC_REG_REV 0x3c 551c6a0718SPierre Ossman #define OMAP_MMC_REG_RSP0 0x40 561c6a0718SPierre Ossman #define OMAP_MMC_REG_RSP1 0x44 571c6a0718SPierre Ossman #define OMAP_MMC_REG_RSP2 0x48 581c6a0718SPierre Ossman #define OMAP_MMC_REG_RSP3 0x4c 591c6a0718SPierre Ossman #define OMAP_MMC_REG_RSP4 0x50 601c6a0718SPierre Ossman #define OMAP_MMC_REG_RSP5 0x54 611c6a0718SPierre Ossman #define OMAP_MMC_REG_RSP6 0x58 621c6a0718SPierre Ossman #define OMAP_MMC_REG_RSP7 0x5c 631c6a0718SPierre Ossman #define OMAP_MMC_REG_IOSR 0x60 641c6a0718SPierre Ossman #define OMAP_MMC_REG_SYSC 0x64 651c6a0718SPierre Ossman #define OMAP_MMC_REG_SYSS 0x68 661c6a0718SPierre Ossman 671c6a0718SPierre Ossman #define OMAP_MMC_STAT_CARD_ERR (1 << 14) 681c6a0718SPierre Ossman #define OMAP_MMC_STAT_CARD_IRQ (1 << 13) 691c6a0718SPierre Ossman #define OMAP_MMC_STAT_OCR_BUSY (1 << 12) 701c6a0718SPierre Ossman #define OMAP_MMC_STAT_A_EMPTY (1 << 11) 711c6a0718SPierre Ossman #define OMAP_MMC_STAT_A_FULL (1 << 10) 721c6a0718SPierre Ossman #define OMAP_MMC_STAT_CMD_CRC (1 << 8) 731c6a0718SPierre Ossman #define OMAP_MMC_STAT_CMD_TOUT (1 << 7) 741c6a0718SPierre Ossman #define OMAP_MMC_STAT_DATA_CRC (1 << 6) 751c6a0718SPierre Ossman #define OMAP_MMC_STAT_DATA_TOUT (1 << 5) 761c6a0718SPierre Ossman #define OMAP_MMC_STAT_END_BUSY (1 << 4) 771c6a0718SPierre Ossman #define OMAP_MMC_STAT_END_OF_DATA (1 << 3) 781c6a0718SPierre Ossman #define OMAP_MMC_STAT_CARD_BUSY (1 << 2) 791c6a0718SPierre Ossman #define OMAP_MMC_STAT_END_OF_CMD (1 << 0) 801c6a0718SPierre Ossman 811c6a0718SPierre Ossman #define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG_##reg) 821c6a0718SPierre Ossman #define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG_##reg) 831c6a0718SPierre Ossman 841c6a0718SPierre Ossman /* 851c6a0718SPierre Ossman * Command types 861c6a0718SPierre Ossman */ 871c6a0718SPierre Ossman #define OMAP_MMC_CMDTYPE_BC 0 881c6a0718SPierre Ossman #define OMAP_MMC_CMDTYPE_BCR 1 891c6a0718SPierre Ossman #define OMAP_MMC_CMDTYPE_AC 2 901c6a0718SPierre Ossman #define OMAP_MMC_CMDTYPE_ADTC 3 911c6a0718SPierre Ossman 921c6a0718SPierre Ossman 931c6a0718SPierre Ossman #define DRIVER_NAME "mmci-omap" 941c6a0718SPierre Ossman 951c6a0718SPierre Ossman /* Specifies how often in millisecs to poll for card status changes 961c6a0718SPierre Ossman * when the cover switch is open */ 977584d276SJarkko Lavinen #define OMAP_MMC_COVER_POLL_DELAY 500 981c6a0718SPierre Ossman 99abfbe5f7SJuha Yrjola struct mmc_omap_host; 100abfbe5f7SJuha Yrjola 101abfbe5f7SJuha Yrjola struct mmc_omap_slot { 102abfbe5f7SJuha Yrjola int id; 103abfbe5f7SJuha Yrjola unsigned int vdd; 104abfbe5f7SJuha Yrjola u16 saved_con; 105abfbe5f7SJuha Yrjola u16 bus_mode; 106abfbe5f7SJuha Yrjola unsigned int fclk_freq; 107abfbe5f7SJuha Yrjola unsigned powered:1; 108abfbe5f7SJuha Yrjola 1097584d276SJarkko Lavinen struct tasklet_struct cover_tasklet; 1107584d276SJarkko Lavinen struct timer_list cover_timer; 1115a0f3f1fSJuha Yrjola unsigned cover_open; 1125a0f3f1fSJuha Yrjola 113abfbe5f7SJuha Yrjola struct mmc_request *mrq; 114abfbe5f7SJuha Yrjola struct mmc_omap_host *host; 115abfbe5f7SJuha Yrjola struct mmc_host *mmc; 116abfbe5f7SJuha Yrjola struct omap_mmc_slot_data *pdata; 117abfbe5f7SJuha Yrjola }; 118abfbe5f7SJuha Yrjola 1191c6a0718SPierre Ossman struct mmc_omap_host { 1201c6a0718SPierre Ossman int initialized; 1211c6a0718SPierre Ossman int suspended; 1221c6a0718SPierre Ossman struct mmc_request * mrq; 1231c6a0718SPierre Ossman struct mmc_command * cmd; 1241c6a0718SPierre Ossman struct mmc_data * data; 1251c6a0718SPierre Ossman struct mmc_host * mmc; 1261c6a0718SPierre Ossman struct device * dev; 1271c6a0718SPierre Ossman unsigned char id; /* 16xx chips have 2 MMC blocks */ 1281c6a0718SPierre Ossman struct clk * iclk; 1291c6a0718SPierre Ossman struct clk * fclk; 1301c6a0718SPierre Ossman struct resource *mem_res; 1311c6a0718SPierre Ossman void __iomem *virt_base; 1321c6a0718SPierre Ossman unsigned int phys_base; 1331c6a0718SPierre Ossman int irq; 1341c6a0718SPierre Ossman unsigned char bus_mode; 1351c6a0718SPierre Ossman unsigned char hw_bus_mode; 1361c6a0718SPierre Ossman 1370fb4723dSJarkko Lavinen struct work_struct cmd_abort_work; 1380fb4723dSJarkko Lavinen unsigned abort:1; 1390fb4723dSJarkko Lavinen struct timer_list cmd_abort_timer; 140eb1860bcSJarkko Lavinen 1410f602ec7SJarkko Lavinen struct work_struct slot_release_work; 1420f602ec7SJarkko Lavinen struct mmc_omap_slot *next_slot; 1430f602ec7SJarkko Lavinen struct work_struct send_stop_work; 1440f602ec7SJarkko Lavinen struct mmc_data *stop_data; 1450f602ec7SJarkko Lavinen 1461c6a0718SPierre Ossman unsigned int sg_len; 1471c6a0718SPierre Ossman int sg_idx; 1481c6a0718SPierre Ossman u16 * buffer; 1491c6a0718SPierre Ossman u32 buffer_bytes_left; 1501c6a0718SPierre Ossman u32 total_bytes_left; 1511c6a0718SPierre Ossman 1521c6a0718SPierre Ossman unsigned use_dma:1; 1531c6a0718SPierre Ossman unsigned brs_received:1, dma_done:1; 1541c6a0718SPierre Ossman unsigned dma_is_read:1; 1551c6a0718SPierre Ossman unsigned dma_in_use:1; 1561c6a0718SPierre Ossman int dma_ch; 1571c6a0718SPierre Ossman spinlock_t dma_lock; 1581c6a0718SPierre Ossman struct timer_list dma_timer; 1591c6a0718SPierre Ossman unsigned dma_len; 1601c6a0718SPierre Ossman 1611c6a0718SPierre Ossman short power_pin; 1621c6a0718SPierre Ossman 163abfbe5f7SJuha Yrjola struct mmc_omap_slot *slots[OMAP_MMC_MAX_SLOTS]; 164abfbe5f7SJuha Yrjola struct mmc_omap_slot *current_slot; 165abfbe5f7SJuha Yrjola spinlock_t slot_lock; 166abfbe5f7SJuha Yrjola wait_queue_head_t slot_wq; 167abfbe5f7SJuha Yrjola int nr_slots; 168abfbe5f7SJuha Yrjola 1690807a9b5SJarkko Lavinen struct timer_list clk_timer; 1700807a9b5SJarkko Lavinen spinlock_t clk_lock; /* for changing enabled state */ 1710807a9b5SJarkko Lavinen unsigned int fclk_enabled:1; 1720807a9b5SJarkko Lavinen 173abfbe5f7SJuha Yrjola struct omap_mmc_platform_data *pdata; 1741c6a0718SPierre Ossman }; 1751c6a0718SPierre Ossman 1760807a9b5SJarkko Lavinen void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot) 1770807a9b5SJarkko Lavinen { 1780807a9b5SJarkko Lavinen unsigned long tick_ns; 1790807a9b5SJarkko Lavinen 1800807a9b5SJarkko Lavinen if (slot != NULL && slot->host->fclk_enabled && slot->fclk_freq > 0) { 1810807a9b5SJarkko Lavinen tick_ns = (1000000000 + slot->fclk_freq - 1) / slot->fclk_freq; 1820807a9b5SJarkko Lavinen ndelay(8 * tick_ns); 1830807a9b5SJarkko Lavinen } 1840807a9b5SJarkko Lavinen } 1850807a9b5SJarkko Lavinen 1860807a9b5SJarkko Lavinen void mmc_omap_fclk_enable(struct mmc_omap_host *host, unsigned int enable) 1870807a9b5SJarkko Lavinen { 1880807a9b5SJarkko Lavinen unsigned long flags; 1890807a9b5SJarkko Lavinen 1900807a9b5SJarkko Lavinen spin_lock_irqsave(&host->clk_lock, flags); 1910807a9b5SJarkko Lavinen if (host->fclk_enabled != enable) { 1920807a9b5SJarkko Lavinen host->fclk_enabled = enable; 1930807a9b5SJarkko Lavinen if (enable) 1940807a9b5SJarkko Lavinen clk_enable(host->fclk); 1950807a9b5SJarkko Lavinen else 1960807a9b5SJarkko Lavinen clk_disable(host->fclk); 1970807a9b5SJarkko Lavinen } 1980807a9b5SJarkko Lavinen spin_unlock_irqrestore(&host->clk_lock, flags); 1990807a9b5SJarkko Lavinen } 2000807a9b5SJarkko Lavinen 201abfbe5f7SJuha Yrjola static void mmc_omap_select_slot(struct mmc_omap_slot *slot, int claimed) 202abfbe5f7SJuha Yrjola { 203abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 204abfbe5f7SJuha Yrjola unsigned long flags; 205abfbe5f7SJuha Yrjola 206abfbe5f7SJuha Yrjola if (claimed) 207abfbe5f7SJuha Yrjola goto no_claim; 208abfbe5f7SJuha Yrjola spin_lock_irqsave(&host->slot_lock, flags); 209abfbe5f7SJuha Yrjola while (host->mmc != NULL) { 210abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 211abfbe5f7SJuha Yrjola wait_event(host->slot_wq, host->mmc == NULL); 212abfbe5f7SJuha Yrjola spin_lock_irqsave(&host->slot_lock, flags); 213abfbe5f7SJuha Yrjola } 214abfbe5f7SJuha Yrjola host->mmc = slot->mmc; 215abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 216abfbe5f7SJuha Yrjola no_claim: 2170807a9b5SJarkko Lavinen del_timer(&host->clk_timer); 2180807a9b5SJarkko Lavinen if (host->current_slot != slot || !claimed) 2190807a9b5SJarkko Lavinen mmc_omap_fclk_offdelay(host->current_slot); 2200807a9b5SJarkko Lavinen 221abfbe5f7SJuha Yrjola if (host->current_slot != slot) { 2220807a9b5SJarkko Lavinen OMAP_MMC_WRITE(host, CON, slot->saved_con & 0xFC00); 223abfbe5f7SJuha Yrjola if (host->pdata->switch_slot != NULL) 224abfbe5f7SJuha Yrjola host->pdata->switch_slot(mmc_dev(slot->mmc), slot->id); 225abfbe5f7SJuha Yrjola host->current_slot = slot; 226abfbe5f7SJuha Yrjola } 227abfbe5f7SJuha Yrjola 2280807a9b5SJarkko Lavinen if (claimed) { 2290807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 1); 2300807a9b5SJarkko Lavinen 231abfbe5f7SJuha Yrjola /* Doing the dummy read here seems to work around some bug 232abfbe5f7SJuha Yrjola * at least in OMAP24xx silicon where the command would not 233abfbe5f7SJuha Yrjola * start after writing the CMD register. Sigh. */ 234abfbe5f7SJuha Yrjola OMAP_MMC_READ(host, CON); 235abfbe5f7SJuha Yrjola 236abfbe5f7SJuha Yrjola OMAP_MMC_WRITE(host, CON, slot->saved_con); 2370807a9b5SJarkko Lavinen } else 2380807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 0); 239abfbe5f7SJuha Yrjola } 240abfbe5f7SJuha Yrjola 241abfbe5f7SJuha Yrjola static void mmc_omap_start_request(struct mmc_omap_host *host, 242abfbe5f7SJuha Yrjola struct mmc_request *req); 243abfbe5f7SJuha Yrjola 2440f602ec7SJarkko Lavinen static void mmc_omap_slot_release_work(struct work_struct *work) 2450f602ec7SJarkko Lavinen { 2460f602ec7SJarkko Lavinen struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 2470f602ec7SJarkko Lavinen slot_release_work); 2480f602ec7SJarkko Lavinen struct mmc_omap_slot *next_slot = host->next_slot; 2490f602ec7SJarkko Lavinen struct mmc_request *rq; 2500f602ec7SJarkko Lavinen 2510f602ec7SJarkko Lavinen host->next_slot = NULL; 2520f602ec7SJarkko Lavinen mmc_omap_select_slot(next_slot, 1); 2530f602ec7SJarkko Lavinen 2540f602ec7SJarkko Lavinen rq = next_slot->mrq; 2550f602ec7SJarkko Lavinen next_slot->mrq = NULL; 2560f602ec7SJarkko Lavinen mmc_omap_start_request(host, rq); 2570f602ec7SJarkko Lavinen } 2580f602ec7SJarkko Lavinen 2590807a9b5SJarkko Lavinen static void mmc_omap_release_slot(struct mmc_omap_slot *slot, int clk_enabled) 260abfbe5f7SJuha Yrjola { 261abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 262abfbe5f7SJuha Yrjola unsigned long flags; 263abfbe5f7SJuha Yrjola int i; 264abfbe5f7SJuha Yrjola 265abfbe5f7SJuha Yrjola BUG_ON(slot == NULL || host->mmc == NULL); 2660807a9b5SJarkko Lavinen 2670807a9b5SJarkko Lavinen if (clk_enabled) 2680807a9b5SJarkko Lavinen /* Keeps clock running for at least 8 cycles on valid freq */ 2690807a9b5SJarkko Lavinen mod_timer(&host->clk_timer, jiffies + HZ/10); 2700807a9b5SJarkko Lavinen else { 2710807a9b5SJarkko Lavinen del_timer(&host->clk_timer); 2720807a9b5SJarkko Lavinen mmc_omap_fclk_offdelay(slot); 2730807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 0); 2740807a9b5SJarkko Lavinen } 275abfbe5f7SJuha Yrjola 276abfbe5f7SJuha Yrjola spin_lock_irqsave(&host->slot_lock, flags); 277abfbe5f7SJuha Yrjola /* Check for any pending requests */ 278abfbe5f7SJuha Yrjola for (i = 0; i < host->nr_slots; i++) { 279abfbe5f7SJuha Yrjola struct mmc_omap_slot *new_slot; 280abfbe5f7SJuha Yrjola 281abfbe5f7SJuha Yrjola if (host->slots[i] == NULL || host->slots[i]->mrq == NULL) 282abfbe5f7SJuha Yrjola continue; 283abfbe5f7SJuha Yrjola 2840f602ec7SJarkko Lavinen BUG_ON(host->next_slot != NULL); 285abfbe5f7SJuha Yrjola new_slot = host->slots[i]; 286abfbe5f7SJuha Yrjola /* The current slot should not have a request in queue */ 287abfbe5f7SJuha Yrjola BUG_ON(new_slot == host->current_slot); 288abfbe5f7SJuha Yrjola 2890f602ec7SJarkko Lavinen host->next_slot = new_slot; 290abfbe5f7SJuha Yrjola host->mmc = new_slot->mmc; 291abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 2920f602ec7SJarkko Lavinen schedule_work(&host->slot_release_work); 293abfbe5f7SJuha Yrjola return; 294abfbe5f7SJuha Yrjola } 295abfbe5f7SJuha Yrjola 296abfbe5f7SJuha Yrjola host->mmc = NULL; 297abfbe5f7SJuha Yrjola wake_up(&host->slot_wq); 298abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 299abfbe5f7SJuha Yrjola } 300abfbe5f7SJuha Yrjola 3015a0f3f1fSJuha Yrjola static inline 3025a0f3f1fSJuha Yrjola int mmc_omap_cover_is_open(struct mmc_omap_slot *slot) 3035a0f3f1fSJuha Yrjola { 3048348f002SKyungmin Park if (slot->pdata->get_cover_state) 3058348f002SKyungmin Park return slot->pdata->get_cover_state(mmc_dev(slot->mmc), 3068348f002SKyungmin Park slot->id); 3078348f002SKyungmin Park return 0; 3085a0f3f1fSJuha Yrjola } 3095a0f3f1fSJuha Yrjola 3105a0f3f1fSJuha Yrjola static ssize_t 3115a0f3f1fSJuha Yrjola mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, 3125a0f3f1fSJuha Yrjola char *buf) 3135a0f3f1fSJuha Yrjola { 3145a0f3f1fSJuha Yrjola struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 3155a0f3f1fSJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 3165a0f3f1fSJuha Yrjola 3175a0f3f1fSJuha Yrjola return sprintf(buf, "%s\n", mmc_omap_cover_is_open(slot) ? "open" : 3185a0f3f1fSJuha Yrjola "closed"); 3195a0f3f1fSJuha Yrjola } 3205a0f3f1fSJuha Yrjola 3215a0f3f1fSJuha Yrjola static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); 3225a0f3f1fSJuha Yrjola 323abfbe5f7SJuha Yrjola static ssize_t 324abfbe5f7SJuha Yrjola mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, 325abfbe5f7SJuha Yrjola char *buf) 326abfbe5f7SJuha Yrjola { 327abfbe5f7SJuha Yrjola struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 328abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 329abfbe5f7SJuha Yrjola 330abfbe5f7SJuha Yrjola return sprintf(buf, "%s\n", slot->pdata->name); 331abfbe5f7SJuha Yrjola } 332abfbe5f7SJuha Yrjola 333abfbe5f7SJuha Yrjola static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); 334abfbe5f7SJuha Yrjola 3351c6a0718SPierre Ossman static void 3361c6a0718SPierre Ossman mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd) 3371c6a0718SPierre Ossman { 3381c6a0718SPierre Ossman u32 cmdreg; 3391c6a0718SPierre Ossman u32 resptype; 3401c6a0718SPierre Ossman u32 cmdtype; 3411c6a0718SPierre Ossman 3421c6a0718SPierre Ossman host->cmd = cmd; 3431c6a0718SPierre Ossman 3441c6a0718SPierre Ossman resptype = 0; 3451c6a0718SPierre Ossman cmdtype = 0; 3461c6a0718SPierre Ossman 3471c6a0718SPierre Ossman /* Our hardware needs to know exact type */ 3481c6a0718SPierre Ossman switch (mmc_resp_type(cmd)) { 3491c6a0718SPierre Ossman case MMC_RSP_NONE: 3501c6a0718SPierre Ossman break; 3511c6a0718SPierre Ossman case MMC_RSP_R1: 3521c6a0718SPierre Ossman case MMC_RSP_R1B: 3531c6a0718SPierre Ossman /* resp 1, 1b, 6, 7 */ 3541c6a0718SPierre Ossman resptype = 1; 3551c6a0718SPierre Ossman break; 3561c6a0718SPierre Ossman case MMC_RSP_R2: 3571c6a0718SPierre Ossman resptype = 2; 3581c6a0718SPierre Ossman break; 3591c6a0718SPierre Ossman case MMC_RSP_R3: 3601c6a0718SPierre Ossman resptype = 3; 3611c6a0718SPierre Ossman break; 3621c6a0718SPierre Ossman default: 3631c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), "Invalid response type: %04x\n", mmc_resp_type(cmd)); 3641c6a0718SPierre Ossman break; 3651c6a0718SPierre Ossman } 3661c6a0718SPierre Ossman 3671c6a0718SPierre Ossman if (mmc_cmd_type(cmd) == MMC_CMD_ADTC) { 3681c6a0718SPierre Ossman cmdtype = OMAP_MMC_CMDTYPE_ADTC; 3691c6a0718SPierre Ossman } else if (mmc_cmd_type(cmd) == MMC_CMD_BC) { 3701c6a0718SPierre Ossman cmdtype = OMAP_MMC_CMDTYPE_BC; 3711c6a0718SPierre Ossman } else if (mmc_cmd_type(cmd) == MMC_CMD_BCR) { 3721c6a0718SPierre Ossman cmdtype = OMAP_MMC_CMDTYPE_BCR; 3731c6a0718SPierre Ossman } else { 3741c6a0718SPierre Ossman cmdtype = OMAP_MMC_CMDTYPE_AC; 3751c6a0718SPierre Ossman } 3761c6a0718SPierre Ossman 3771c6a0718SPierre Ossman cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12); 3781c6a0718SPierre Ossman 379abfbe5f7SJuha Yrjola if (host->current_slot->bus_mode == MMC_BUSMODE_OPENDRAIN) 3801c6a0718SPierre Ossman cmdreg |= 1 << 6; 3811c6a0718SPierre Ossman 3821c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_BUSY) 3831c6a0718SPierre Ossman cmdreg |= 1 << 11; 3841c6a0718SPierre Ossman 3851c6a0718SPierre Ossman if (host->data && !(host->data->flags & MMC_DATA_WRITE)) 3861c6a0718SPierre Ossman cmdreg |= 1 << 15; 3871c6a0718SPierre Ossman 3880fb4723dSJarkko Lavinen mod_timer(&host->cmd_abort_timer, jiffies + HZ/2); 389eb1860bcSJarkko Lavinen 3901c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CTO, 200); 3911c6a0718SPierre Ossman OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff); 3921c6a0718SPierre Ossman OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16); 3931c6a0718SPierre Ossman OMAP_MMC_WRITE(host, IE, 3941c6a0718SPierre Ossman OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL | 3951c6a0718SPierre Ossman OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT | 3961c6a0718SPierre Ossman OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT | 3971c6a0718SPierre Ossman OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR | 3981c6a0718SPierre Ossman OMAP_MMC_STAT_END_OF_DATA); 3991c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CMD, cmdreg); 4001c6a0718SPierre Ossman } 4011c6a0718SPierre Ossman 4021c6a0718SPierre Ossman static void 403a914ded2SJuha Yrjola mmc_omap_release_dma(struct mmc_omap_host *host, struct mmc_data *data, 404a914ded2SJuha Yrjola int abort) 4051c6a0718SPierre Ossman { 4061c6a0718SPierre Ossman enum dma_data_direction dma_data_dir; 4071c6a0718SPierre Ossman 4081c6a0718SPierre Ossman BUG_ON(host->dma_ch < 0); 40917b0429dSPierre Ossman if (data->error) 4101c6a0718SPierre Ossman omap_stop_dma(host->dma_ch); 4111c6a0718SPierre Ossman /* Release DMA channel lazily */ 4121c6a0718SPierre Ossman mod_timer(&host->dma_timer, jiffies + HZ); 4131c6a0718SPierre Ossman if (data->flags & MMC_DATA_WRITE) 4141c6a0718SPierre Ossman dma_data_dir = DMA_TO_DEVICE; 4151c6a0718SPierre Ossman else 4161c6a0718SPierre Ossman dma_data_dir = DMA_FROM_DEVICE; 4171c6a0718SPierre Ossman dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->sg_len, 4181c6a0718SPierre Ossman dma_data_dir); 4191c6a0718SPierre Ossman } 420a914ded2SJuha Yrjola 4210f602ec7SJarkko Lavinen static void mmc_omap_send_stop_work(struct work_struct *work) 4220f602ec7SJarkko Lavinen { 4230f602ec7SJarkko Lavinen struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 4240f602ec7SJarkko Lavinen send_stop_work); 4250f602ec7SJarkko Lavinen struct mmc_omap_slot *slot = host->current_slot; 4260f602ec7SJarkko Lavinen struct mmc_data *data = host->stop_data; 4270f602ec7SJarkko Lavinen unsigned long tick_ns; 4280f602ec7SJarkko Lavinen 4290f602ec7SJarkko Lavinen tick_ns = (1000000000 + slot->fclk_freq - 1)/slot->fclk_freq; 4300f602ec7SJarkko Lavinen ndelay(8*tick_ns); 4310f602ec7SJarkko Lavinen 4320f602ec7SJarkko Lavinen mmc_omap_start_command(host, data->stop); 4330f602ec7SJarkko Lavinen } 4340f602ec7SJarkko Lavinen 435a914ded2SJuha Yrjola static void 436a914ded2SJuha Yrjola mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) 437a914ded2SJuha Yrjola { 438a914ded2SJuha Yrjola if (host->dma_in_use) 439a914ded2SJuha Yrjola mmc_omap_release_dma(host, data, data->error); 440a914ded2SJuha Yrjola 4411c6a0718SPierre Ossman host->data = NULL; 4421c6a0718SPierre Ossman host->sg_len = 0; 4431c6a0718SPierre Ossman 4441c6a0718SPierre Ossman /* NOTE: MMC layer will sometimes poll-wait CMD13 next, issuing 4451c6a0718SPierre Ossman * dozens of requests until the card finishes writing data. 4461c6a0718SPierre Ossman * It'd be cheaper to just wait till an EOFB interrupt arrives... 4471c6a0718SPierre Ossman */ 4481c6a0718SPierre Ossman 4491c6a0718SPierre Ossman if (!data->stop) { 450a914ded2SJuha Yrjola struct mmc_host *mmc; 451a914ded2SJuha Yrjola 4521c6a0718SPierre Ossman host->mrq = NULL; 453a914ded2SJuha Yrjola mmc = host->mmc; 4540807a9b5SJarkko Lavinen mmc_omap_release_slot(host->current_slot, 1); 455a914ded2SJuha Yrjola mmc_request_done(mmc, data->mrq); 4561c6a0718SPierre Ossman return; 4571c6a0718SPierre Ossman } 4581c6a0718SPierre Ossman 4590f602ec7SJarkko Lavinen host->stop_data = data; 4600f602ec7SJarkko Lavinen schedule_work(&host->send_stop_work); 4611c6a0718SPierre Ossman } 4621c6a0718SPierre Ossman 4631c6a0718SPierre Ossman static void 4640fb4723dSJarkko Lavinen mmc_omap_send_abort(struct mmc_omap_host *host, int maxloops) 465eb1860bcSJarkko Lavinen { 466eb1860bcSJarkko Lavinen struct mmc_omap_slot *slot = host->current_slot; 467eb1860bcSJarkko Lavinen unsigned int restarts, passes, timeout; 468eb1860bcSJarkko Lavinen u16 stat = 0; 469eb1860bcSJarkko Lavinen 470eb1860bcSJarkko Lavinen /* Sending abort takes 80 clocks. Have some extra and round up */ 471eb1860bcSJarkko Lavinen timeout = (120*1000000 + slot->fclk_freq - 1)/slot->fclk_freq; 472eb1860bcSJarkko Lavinen restarts = 0; 4730fb4723dSJarkko Lavinen while (restarts < maxloops) { 474eb1860bcSJarkko Lavinen OMAP_MMC_WRITE(host, STAT, 0xFFFF); 475eb1860bcSJarkko Lavinen OMAP_MMC_WRITE(host, CMD, (3 << 12) | (1 << 7)); 476eb1860bcSJarkko Lavinen 477eb1860bcSJarkko Lavinen passes = 0; 478eb1860bcSJarkko Lavinen while (passes < timeout) { 479eb1860bcSJarkko Lavinen stat = OMAP_MMC_READ(host, STAT); 480eb1860bcSJarkko Lavinen if (stat & OMAP_MMC_STAT_END_OF_CMD) 481eb1860bcSJarkko Lavinen goto out; 482eb1860bcSJarkko Lavinen udelay(1); 483eb1860bcSJarkko Lavinen passes++; 484eb1860bcSJarkko Lavinen } 485eb1860bcSJarkko Lavinen 486eb1860bcSJarkko Lavinen restarts++; 487eb1860bcSJarkko Lavinen } 488eb1860bcSJarkko Lavinen out: 489eb1860bcSJarkko Lavinen OMAP_MMC_WRITE(host, STAT, stat); 490eb1860bcSJarkko Lavinen } 491eb1860bcSJarkko Lavinen 492eb1860bcSJarkko Lavinen static void 493a914ded2SJuha Yrjola mmc_omap_abort_xfer(struct mmc_omap_host *host, struct mmc_data *data) 494a914ded2SJuha Yrjola { 495a914ded2SJuha Yrjola if (host->dma_in_use) 496a914ded2SJuha Yrjola mmc_omap_release_dma(host, data, 1); 497a914ded2SJuha Yrjola 498a914ded2SJuha Yrjola host->data = NULL; 499a914ded2SJuha Yrjola host->sg_len = 0; 500a914ded2SJuha Yrjola 5010fb4723dSJarkko Lavinen mmc_omap_send_abort(host, 10000); 502a914ded2SJuha Yrjola } 503a914ded2SJuha Yrjola 504a914ded2SJuha Yrjola static void 5051c6a0718SPierre Ossman mmc_omap_end_of_data(struct mmc_omap_host *host, struct mmc_data *data) 5061c6a0718SPierre Ossman { 5071c6a0718SPierre Ossman unsigned long flags; 5081c6a0718SPierre Ossman int done; 5091c6a0718SPierre Ossman 5101c6a0718SPierre Ossman if (!host->dma_in_use) { 5111c6a0718SPierre Ossman mmc_omap_xfer_done(host, data); 5121c6a0718SPierre Ossman return; 5131c6a0718SPierre Ossman } 5141c6a0718SPierre Ossman done = 0; 5151c6a0718SPierre Ossman spin_lock_irqsave(&host->dma_lock, flags); 5161c6a0718SPierre Ossman if (host->dma_done) 5171c6a0718SPierre Ossman done = 1; 5181c6a0718SPierre Ossman else 5191c6a0718SPierre Ossman host->brs_received = 1; 5201c6a0718SPierre Ossman spin_unlock_irqrestore(&host->dma_lock, flags); 5211c6a0718SPierre Ossman if (done) 5221c6a0718SPierre Ossman mmc_omap_xfer_done(host, data); 5231c6a0718SPierre Ossman } 5241c6a0718SPierre Ossman 5251c6a0718SPierre Ossman static void 5261c6a0718SPierre Ossman mmc_omap_dma_timer(unsigned long data) 5271c6a0718SPierre Ossman { 5281c6a0718SPierre Ossman struct mmc_omap_host *host = (struct mmc_omap_host *) data; 5291c6a0718SPierre Ossman 5301c6a0718SPierre Ossman BUG_ON(host->dma_ch < 0); 5311c6a0718SPierre Ossman omap_free_dma(host->dma_ch); 5321c6a0718SPierre Ossman host->dma_ch = -1; 5331c6a0718SPierre Ossman } 5341c6a0718SPierre Ossman 5351c6a0718SPierre Ossman static void 5361c6a0718SPierre Ossman mmc_omap_dma_done(struct mmc_omap_host *host, struct mmc_data *data) 5371c6a0718SPierre Ossman { 5381c6a0718SPierre Ossman unsigned long flags; 5391c6a0718SPierre Ossman int done; 5401c6a0718SPierre Ossman 5411c6a0718SPierre Ossman done = 0; 5421c6a0718SPierre Ossman spin_lock_irqsave(&host->dma_lock, flags); 5431c6a0718SPierre Ossman if (host->brs_received) 5441c6a0718SPierre Ossman done = 1; 5451c6a0718SPierre Ossman else 5461c6a0718SPierre Ossman host->dma_done = 1; 5471c6a0718SPierre Ossman spin_unlock_irqrestore(&host->dma_lock, flags); 5481c6a0718SPierre Ossman if (done) 5491c6a0718SPierre Ossman mmc_omap_xfer_done(host, data); 5501c6a0718SPierre Ossman } 5511c6a0718SPierre Ossman 5521c6a0718SPierre Ossman static void 5531c6a0718SPierre Ossman mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd) 5541c6a0718SPierre Ossman { 5551c6a0718SPierre Ossman host->cmd = NULL; 5561c6a0718SPierre Ossman 5570fb4723dSJarkko Lavinen del_timer(&host->cmd_abort_timer); 558eb1860bcSJarkko Lavinen 5591c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_PRESENT) { 5601c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_136) { 5611c6a0718SPierre Ossman /* response type 2 */ 5621c6a0718SPierre Ossman cmd->resp[3] = 5631c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP0) | 5641c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP1) << 16); 5651c6a0718SPierre Ossman cmd->resp[2] = 5661c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP2) | 5671c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP3) << 16); 5681c6a0718SPierre Ossman cmd->resp[1] = 5691c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP4) | 5701c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP5) << 16); 5711c6a0718SPierre Ossman cmd->resp[0] = 5721c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP6) | 5731c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP7) << 16); 5741c6a0718SPierre Ossman } else { 5751c6a0718SPierre Ossman /* response types 1, 1b, 3, 4, 5, 6 */ 5761c6a0718SPierre Ossman cmd->resp[0] = 5771c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP6) | 5781c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP7) << 16); 5791c6a0718SPierre Ossman } 5801c6a0718SPierre Ossman } 5811c6a0718SPierre Ossman 58217b0429dSPierre Ossman if (host->data == NULL || cmd->error) { 583a914ded2SJuha Yrjola struct mmc_host *mmc; 584a914ded2SJuha Yrjola 585a914ded2SJuha Yrjola if (host->data != NULL) 586a914ded2SJuha Yrjola mmc_omap_abort_xfer(host, host->data); 5871c6a0718SPierre Ossman host->mrq = NULL; 588a914ded2SJuha Yrjola mmc = host->mmc; 5890807a9b5SJarkko Lavinen mmc_omap_release_slot(host->current_slot, 1); 590a914ded2SJuha Yrjola mmc_request_done(mmc, cmd->mrq); 5911c6a0718SPierre Ossman } 5921c6a0718SPierre Ossman } 5931c6a0718SPierre Ossman 594eb1860bcSJarkko Lavinen /* 595eb1860bcSJarkko Lavinen * Abort stuck command. Can occur when card is removed while it is being 596eb1860bcSJarkko Lavinen * read. 597eb1860bcSJarkko Lavinen */ 598eb1860bcSJarkko Lavinen static void mmc_omap_abort_command(struct work_struct *work) 599eb1860bcSJarkko Lavinen { 600eb1860bcSJarkko Lavinen struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 6010fb4723dSJarkko Lavinen cmd_abort_work); 6020fb4723dSJarkko Lavinen BUG_ON(!host->cmd); 603eb1860bcSJarkko Lavinen 604eb1860bcSJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "Aborting stuck command CMD%d\n", 605eb1860bcSJarkko Lavinen host->cmd->opcode); 606eb1860bcSJarkko Lavinen 6070fb4723dSJarkko Lavinen if (host->cmd->error == 0) 608eb1860bcSJarkko Lavinen host->cmd->error = -ETIMEDOUT; 6090fb4723dSJarkko Lavinen 6100fb4723dSJarkko Lavinen if (host->data == NULL) { 6110fb4723dSJarkko Lavinen struct mmc_command *cmd; 6120fb4723dSJarkko Lavinen struct mmc_host *mmc; 6130fb4723dSJarkko Lavinen 6140fb4723dSJarkko Lavinen cmd = host->cmd; 6150fb4723dSJarkko Lavinen host->cmd = NULL; 6160fb4723dSJarkko Lavinen mmc_omap_send_abort(host, 10000); 6170fb4723dSJarkko Lavinen 6180fb4723dSJarkko Lavinen host->mrq = NULL; 6190fb4723dSJarkko Lavinen mmc = host->mmc; 6200807a9b5SJarkko Lavinen mmc_omap_release_slot(host->current_slot, 1); 6210fb4723dSJarkko Lavinen mmc_request_done(mmc, cmd->mrq); 6220fb4723dSJarkko Lavinen } else 623eb1860bcSJarkko Lavinen mmc_omap_cmd_done(host, host->cmd); 6240fb4723dSJarkko Lavinen 6250fb4723dSJarkko Lavinen host->abort = 0; 6260fb4723dSJarkko Lavinen enable_irq(host->irq); 627eb1860bcSJarkko Lavinen } 628eb1860bcSJarkko Lavinen 629eb1860bcSJarkko Lavinen static void 630eb1860bcSJarkko Lavinen mmc_omap_cmd_timer(unsigned long data) 631eb1860bcSJarkko Lavinen { 632eb1860bcSJarkko Lavinen struct mmc_omap_host *host = (struct mmc_omap_host *) data; 6330fb4723dSJarkko Lavinen unsigned long flags; 634eb1860bcSJarkko Lavinen 6350fb4723dSJarkko Lavinen spin_lock_irqsave(&host->slot_lock, flags); 6360fb4723dSJarkko Lavinen if (host->cmd != NULL && !host->abort) { 6370fb4723dSJarkko Lavinen OMAP_MMC_WRITE(host, IE, 0); 6380fb4723dSJarkko Lavinen disable_irq(host->irq); 6390fb4723dSJarkko Lavinen host->abort = 1; 6400fb4723dSJarkko Lavinen schedule_work(&host->cmd_abort_work); 6410fb4723dSJarkko Lavinen } 6420fb4723dSJarkko Lavinen spin_unlock_irqrestore(&host->slot_lock, flags); 643eb1860bcSJarkko Lavinen } 644eb1860bcSJarkko Lavinen 6451c6a0718SPierre Ossman /* PIO only */ 6461c6a0718SPierre Ossman static void 6471c6a0718SPierre Ossman mmc_omap_sg_to_buf(struct mmc_omap_host *host) 6481c6a0718SPierre Ossman { 6491c6a0718SPierre Ossman struct scatterlist *sg; 6501c6a0718SPierre Ossman 6511c6a0718SPierre Ossman sg = host->data->sg + host->sg_idx; 6521c6a0718SPierre Ossman host->buffer_bytes_left = sg->length; 65345711f1aSJens Axboe host->buffer = sg_virt(sg); 6541c6a0718SPierre Ossman if (host->buffer_bytes_left > host->total_bytes_left) 6551c6a0718SPierre Ossman host->buffer_bytes_left = host->total_bytes_left; 6561c6a0718SPierre Ossman } 6571c6a0718SPierre Ossman 6580807a9b5SJarkko Lavinen static void 6590807a9b5SJarkko Lavinen mmc_omap_clk_timer(unsigned long data) 6600807a9b5SJarkko Lavinen { 6610807a9b5SJarkko Lavinen struct mmc_omap_host *host = (struct mmc_omap_host *) data; 6620807a9b5SJarkko Lavinen 6630807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 0); 6640807a9b5SJarkko Lavinen } 6650807a9b5SJarkko Lavinen 6661c6a0718SPierre Ossman /* PIO only */ 6671c6a0718SPierre Ossman static void 6681c6a0718SPierre Ossman mmc_omap_xfer_data(struct mmc_omap_host *host, int write) 6691c6a0718SPierre Ossman { 6701c6a0718SPierre Ossman int n; 6711c6a0718SPierre Ossman 6721c6a0718SPierre Ossman if (host->buffer_bytes_left == 0) { 6731c6a0718SPierre Ossman host->sg_idx++; 6741c6a0718SPierre Ossman BUG_ON(host->sg_idx == host->sg_len); 6751c6a0718SPierre Ossman mmc_omap_sg_to_buf(host); 6761c6a0718SPierre Ossman } 6771c6a0718SPierre Ossman n = 64; 6781c6a0718SPierre Ossman if (n > host->buffer_bytes_left) 6791c6a0718SPierre Ossman n = host->buffer_bytes_left; 6801c6a0718SPierre Ossman host->buffer_bytes_left -= n; 6811c6a0718SPierre Ossman host->total_bytes_left -= n; 6821c6a0718SPierre Ossman host->data->bytes_xfered += n; 6831c6a0718SPierre Ossman 6841c6a0718SPierre Ossman if (write) { 6851c6a0718SPierre Ossman __raw_writesw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n); 6861c6a0718SPierre Ossman } else { 6871c6a0718SPierre Ossman __raw_readsw(host->virt_base + OMAP_MMC_REG_DATA, host->buffer, n); 6881c6a0718SPierre Ossman } 6891c6a0718SPierre Ossman } 6901c6a0718SPierre Ossman 6911c6a0718SPierre Ossman static inline void mmc_omap_report_irq(u16 status) 6921c6a0718SPierre Ossman { 6931c6a0718SPierre Ossman static const char *mmc_omap_status_bits[] = { 6941c6a0718SPierre Ossman "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO", 6951c6a0718SPierre Ossman "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR" 6961c6a0718SPierre Ossman }; 6971c6a0718SPierre Ossman int i, c = 0; 6981c6a0718SPierre Ossman 6991c6a0718SPierre Ossman for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++) 7001c6a0718SPierre Ossman if (status & (1 << i)) { 7011c6a0718SPierre Ossman if (c) 7021c6a0718SPierre Ossman printk(" "); 7031c6a0718SPierre Ossman printk("%s", mmc_omap_status_bits[i]); 7041c6a0718SPierre Ossman c++; 7051c6a0718SPierre Ossman } 7061c6a0718SPierre Ossman } 7071c6a0718SPierre Ossman 7081c6a0718SPierre Ossman static irqreturn_t mmc_omap_irq(int irq, void *dev_id) 7091c6a0718SPierre Ossman { 7101c6a0718SPierre Ossman struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id; 7111c6a0718SPierre Ossman u16 status; 7121c6a0718SPierre Ossman int end_command; 7131c6a0718SPierre Ossman int end_transfer; 7142a50b888SJuha Yrjola int transfer_error, cmd_error; 7151c6a0718SPierre Ossman 7161c6a0718SPierre Ossman if (host->cmd == NULL && host->data == NULL) { 7171c6a0718SPierre Ossman status = OMAP_MMC_READ(host, STAT); 7182a50b888SJuha Yrjola dev_info(mmc_dev(host->slots[0]->mmc), 7192a50b888SJuha Yrjola "Spurious IRQ 0x%04x\n", status); 7201c6a0718SPierre Ossman if (status != 0) { 7211c6a0718SPierre Ossman OMAP_MMC_WRITE(host, STAT, status); 7221c6a0718SPierre Ossman OMAP_MMC_WRITE(host, IE, 0); 7231c6a0718SPierre Ossman } 7241c6a0718SPierre Ossman return IRQ_HANDLED; 7251c6a0718SPierre Ossman } 7261c6a0718SPierre Ossman 7271c6a0718SPierre Ossman end_command = 0; 7281c6a0718SPierre Ossman end_transfer = 0; 7291c6a0718SPierre Ossman transfer_error = 0; 7302a50b888SJuha Yrjola cmd_error = 0; 7311c6a0718SPierre Ossman 7321c6a0718SPierre Ossman while ((status = OMAP_MMC_READ(host, STAT)) != 0) { 7332a50b888SJuha Yrjola int cmd; 7342a50b888SJuha Yrjola 7351c6a0718SPierre Ossman OMAP_MMC_WRITE(host, STAT, status); 7362a50b888SJuha Yrjola if (host->cmd != NULL) 7372a50b888SJuha Yrjola cmd = host->cmd->opcode; 7382a50b888SJuha Yrjola else 7392a50b888SJuha Yrjola cmd = -1; 7401c6a0718SPierre Ossman #ifdef CONFIG_MMC_DEBUG 7411c6a0718SPierre Ossman dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ", 7422a50b888SJuha Yrjola status, cmd); 7431c6a0718SPierre Ossman mmc_omap_report_irq(status); 7441c6a0718SPierre Ossman printk("\n"); 7451c6a0718SPierre Ossman #endif 7461c6a0718SPierre Ossman if (host->total_bytes_left) { 7471c6a0718SPierre Ossman if ((status & OMAP_MMC_STAT_A_FULL) || 7481c6a0718SPierre Ossman (status & OMAP_MMC_STAT_END_OF_DATA)) 7491c6a0718SPierre Ossman mmc_omap_xfer_data(host, 0); 7501c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_A_EMPTY) 7511c6a0718SPierre Ossman mmc_omap_xfer_data(host, 1); 7521c6a0718SPierre Ossman } 7531c6a0718SPierre Ossman 7542a50b888SJuha Yrjola if (status & OMAP_MMC_STAT_END_OF_DATA) 7551c6a0718SPierre Ossman end_transfer = 1; 7561c6a0718SPierre Ossman 7571c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_DATA_TOUT) { 7582a50b888SJuha Yrjola dev_dbg(mmc_dev(host->mmc), "data timeout (CMD%d)\n", 7592a50b888SJuha Yrjola cmd); 7601c6a0718SPierre Ossman if (host->data) { 76117b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 7621c6a0718SPierre Ossman transfer_error = 1; 7631c6a0718SPierre Ossman } 7641c6a0718SPierre Ossman } 7651c6a0718SPierre Ossman 7661c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_DATA_CRC) { 7671c6a0718SPierre Ossman if (host->data) { 76817b0429dSPierre Ossman host->data->error = -EILSEQ; 7691c6a0718SPierre Ossman dev_dbg(mmc_dev(host->mmc), 7701c6a0718SPierre Ossman "data CRC error, bytes left %d\n", 7711c6a0718SPierre Ossman host->total_bytes_left); 7721c6a0718SPierre Ossman transfer_error = 1; 7731c6a0718SPierre Ossman } else { 7741c6a0718SPierre Ossman dev_dbg(mmc_dev(host->mmc), "data CRC error\n"); 7751c6a0718SPierre Ossman } 7761c6a0718SPierre Ossman } 7771c6a0718SPierre Ossman 7781c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_CMD_TOUT) { 7791c6a0718SPierre Ossman /* Timeouts are routine with some commands */ 7801c6a0718SPierre Ossman if (host->cmd) { 781abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = 782abfbe5f7SJuha Yrjola host->current_slot; 7832a50b888SJuha Yrjola if (slot == NULL || 7842a50b888SJuha Yrjola !mmc_omap_cover_is_open(slot)) 7851c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), 7862a50b888SJuha Yrjola "command timeout (CMD%d)\n", 7872a50b888SJuha Yrjola cmd); 78817b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 7891c6a0718SPierre Ossman end_command = 1; 7902a50b888SJuha Yrjola cmd_error = 1; 7911c6a0718SPierre Ossman } 7921c6a0718SPierre Ossman } 7931c6a0718SPierre Ossman 7941c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_CMD_CRC) { 7951c6a0718SPierre Ossman if (host->cmd) { 7961c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), 7971c6a0718SPierre Ossman "command CRC error (CMD%d, arg 0x%08x)\n", 7982a50b888SJuha Yrjola cmd, host->cmd->arg); 79917b0429dSPierre Ossman host->cmd->error = -EILSEQ; 8001c6a0718SPierre Ossman end_command = 1; 8012a50b888SJuha Yrjola cmd_error = 1; 8021c6a0718SPierre Ossman } else 8031c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), 8041c6a0718SPierre Ossman "command CRC error without cmd?\n"); 8051c6a0718SPierre Ossman } 8061c6a0718SPierre Ossman 8071c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_CARD_ERR) { 8080107a4b3SRagner Magalhaes dev_dbg(mmc_dev(host->mmc), 8090107a4b3SRagner Magalhaes "ignoring card status error (CMD%d)\n", 8102a50b888SJuha Yrjola cmd); 8111c6a0718SPierre Ossman end_command = 1; 8121c6a0718SPierre Ossman } 8131c6a0718SPierre Ossman 8141c6a0718SPierre Ossman /* 8151c6a0718SPierre Ossman * NOTE: On 1610 the END_OF_CMD may come too early when 8161c6a0718SPierre Ossman * starting a write 8171c6a0718SPierre Ossman */ 8181c6a0718SPierre Ossman if ((status & OMAP_MMC_STAT_END_OF_CMD) && 8191c6a0718SPierre Ossman (!(status & OMAP_MMC_STAT_A_EMPTY))) { 8201c6a0718SPierre Ossman end_command = 1; 8211c6a0718SPierre Ossman } 8221c6a0718SPierre Ossman } 8231c6a0718SPierre Ossman 8240fb4723dSJarkko Lavinen if (cmd_error && host->data) { 8250fb4723dSJarkko Lavinen del_timer(&host->cmd_abort_timer); 8260fb4723dSJarkko Lavinen host->abort = 1; 8270fb4723dSJarkko Lavinen OMAP_MMC_WRITE(host, IE, 0); 8280fb4723dSJarkko Lavinen disable_irq(host->irq); 8290fb4723dSJarkko Lavinen schedule_work(&host->cmd_abort_work); 8300fb4723dSJarkko Lavinen return IRQ_HANDLED; 8310fb4723dSJarkko Lavinen } 8320fb4723dSJarkko Lavinen 8332a50b888SJuha Yrjola if (end_command) 8341c6a0718SPierre Ossman mmc_omap_cmd_done(host, host->cmd); 8352a50b888SJuha Yrjola if (host->data != NULL) { 8361c6a0718SPierre Ossman if (transfer_error) 8371c6a0718SPierre Ossman mmc_omap_xfer_done(host, host->data); 8381c6a0718SPierre Ossman else if (end_transfer) 8391c6a0718SPierre Ossman mmc_omap_end_of_data(host, host->data); 8402a50b888SJuha Yrjola } 8411c6a0718SPierre Ossman 8421c6a0718SPierre Ossman return IRQ_HANDLED; 8431c6a0718SPierre Ossman } 8441c6a0718SPierre Ossman 8457584d276SJarkko Lavinen void omap_mmc_notify_cover_event(struct device *dev, int num, int is_closed) 8465a0f3f1fSJuha Yrjola { 8477584d276SJarkko Lavinen int cover_open; 8485a0f3f1fSJuha Yrjola struct mmc_omap_host *host = dev_get_drvdata(dev); 8497584d276SJarkko Lavinen struct mmc_omap_slot *slot = host->slots[num]; 8505a0f3f1fSJuha Yrjola 8517584d276SJarkko Lavinen BUG_ON(num >= host->nr_slots); 8525a0f3f1fSJuha Yrjola 8535a0f3f1fSJuha Yrjola /* Other subsystems can call in here before we're initialised. */ 8547584d276SJarkko Lavinen if (host->nr_slots == 0 || !host->slots[num]) 8555a0f3f1fSJuha Yrjola return; 8565a0f3f1fSJuha Yrjola 8575a0f3f1fSJuha Yrjola cover_open = mmc_omap_cover_is_open(slot); 8585a0f3f1fSJuha Yrjola if (cover_open != slot->cover_open) { 8595a0f3f1fSJuha Yrjola slot->cover_open = cover_open; 8607584d276SJarkko Lavinen sysfs_notify(&slot->mmc->class_dev.kobj, NULL, "cover_switch"); 8615a0f3f1fSJuha Yrjola } 8627584d276SJarkko Lavinen 8637584d276SJarkko Lavinen tasklet_hi_schedule(&slot->cover_tasklet); 8647584d276SJarkko Lavinen } 8657584d276SJarkko Lavinen 8667584d276SJarkko Lavinen static void mmc_omap_cover_timer(unsigned long arg) 8677584d276SJarkko Lavinen { 8687584d276SJarkko Lavinen struct mmc_omap_slot *slot = (struct mmc_omap_slot *) arg; 8697584d276SJarkko Lavinen tasklet_schedule(&slot->cover_tasklet); 8707584d276SJarkko Lavinen } 8717584d276SJarkko Lavinen 8727584d276SJarkko Lavinen static void mmc_omap_cover_handler(unsigned long param) 8737584d276SJarkko Lavinen { 8747584d276SJarkko Lavinen struct mmc_omap_slot *slot = (struct mmc_omap_slot *)param; 8757584d276SJarkko Lavinen int cover_open = mmc_omap_cover_is_open(slot); 8767584d276SJarkko Lavinen 8777584d276SJarkko Lavinen mmc_detect_change(slot->mmc, 0); 8787584d276SJarkko Lavinen if (!cover_open) 8797584d276SJarkko Lavinen return; 8807584d276SJarkko Lavinen 8817584d276SJarkko Lavinen /* 8827584d276SJarkko Lavinen * If no card is inserted, we postpone polling until 8837584d276SJarkko Lavinen * the cover has been closed. 8847584d276SJarkko Lavinen */ 8857584d276SJarkko Lavinen if (slot->mmc->card == NULL || !mmc_card_present(slot->mmc->card)) 8867584d276SJarkko Lavinen return; 8877584d276SJarkko Lavinen 8887584d276SJarkko Lavinen mod_timer(&slot->cover_timer, 8897584d276SJarkko Lavinen jiffies + msecs_to_jiffies(OMAP_MMC_COVER_POLL_DELAY)); 8905a0f3f1fSJuha Yrjola } 8915a0f3f1fSJuha Yrjola 8921c6a0718SPierre Ossman /* Prepare to transfer the next segment of a scatterlist */ 8931c6a0718SPierre Ossman static void 8941c6a0718SPierre Ossman mmc_omap_prepare_dma(struct mmc_omap_host *host, struct mmc_data *data) 8951c6a0718SPierre Ossman { 8961c6a0718SPierre Ossman int dma_ch = host->dma_ch; 8971c6a0718SPierre Ossman unsigned long data_addr; 8981c6a0718SPierre Ossman u16 buf, frame; 8991c6a0718SPierre Ossman u32 count; 9001c6a0718SPierre Ossman struct scatterlist *sg = &data->sg[host->sg_idx]; 9011c6a0718SPierre Ossman int src_port = 0; 9021c6a0718SPierre Ossman int dst_port = 0; 9031c6a0718SPierre Ossman int sync_dev = 0; 9041c6a0718SPierre Ossman 9051c6a0718SPierre Ossman data_addr = host->phys_base + OMAP_MMC_REG_DATA; 9061c6a0718SPierre Ossman frame = data->blksz; 9071c6a0718SPierre Ossman count = sg_dma_len(sg); 9081c6a0718SPierre Ossman 9091c6a0718SPierre Ossman if ((data->blocks == 1) && (count > data->blksz)) 9101c6a0718SPierre Ossman count = frame; 9111c6a0718SPierre Ossman 9121c6a0718SPierre Ossman host->dma_len = count; 9131c6a0718SPierre Ossman 9141c6a0718SPierre Ossman /* FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx and 24xx. 9151c6a0718SPierre Ossman * Use 16 or 32 word frames when the blocksize is at least that large. 9161c6a0718SPierre Ossman * Blocksize is usually 512 bytes; but not for some SD reads. 9171c6a0718SPierre Ossman */ 9181c6a0718SPierre Ossman if (cpu_is_omap15xx() && frame > 32) 9191c6a0718SPierre Ossman frame = 32; 9201c6a0718SPierre Ossman else if (frame > 64) 9211c6a0718SPierre Ossman frame = 64; 9221c6a0718SPierre Ossman count /= frame; 9231c6a0718SPierre Ossman frame >>= 1; 9241c6a0718SPierre Ossman 9251c6a0718SPierre Ossman if (!(data->flags & MMC_DATA_WRITE)) { 9261c6a0718SPierre Ossman buf = 0x800f | ((frame - 1) << 8); 9271c6a0718SPierre Ossman 9281c6a0718SPierre Ossman if (cpu_class_is_omap1()) { 9291c6a0718SPierre Ossman src_port = OMAP_DMA_PORT_TIPB; 9301c6a0718SPierre Ossman dst_port = OMAP_DMA_PORT_EMIFF; 9311c6a0718SPierre Ossman } 9321c6a0718SPierre Ossman if (cpu_is_omap24xx()) 9331c6a0718SPierre Ossman sync_dev = OMAP24XX_DMA_MMC1_RX; 9341c6a0718SPierre Ossman 9351c6a0718SPierre Ossman omap_set_dma_src_params(dma_ch, src_port, 9361c6a0718SPierre Ossman OMAP_DMA_AMODE_CONSTANT, 9371c6a0718SPierre Ossman data_addr, 0, 0); 9381c6a0718SPierre Ossman omap_set_dma_dest_params(dma_ch, dst_port, 9391c6a0718SPierre Ossman OMAP_DMA_AMODE_POST_INC, 9401c6a0718SPierre Ossman sg_dma_address(sg), 0, 0); 9411c6a0718SPierre Ossman omap_set_dma_dest_data_pack(dma_ch, 1); 9421c6a0718SPierre Ossman omap_set_dma_dest_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4); 9431c6a0718SPierre Ossman } else { 9441c6a0718SPierre Ossman buf = 0x0f80 | ((frame - 1) << 0); 9451c6a0718SPierre Ossman 9461c6a0718SPierre Ossman if (cpu_class_is_omap1()) { 9471c6a0718SPierre Ossman src_port = OMAP_DMA_PORT_EMIFF; 9481c6a0718SPierre Ossman dst_port = OMAP_DMA_PORT_TIPB; 9491c6a0718SPierre Ossman } 9501c6a0718SPierre Ossman if (cpu_is_omap24xx()) 9511c6a0718SPierre Ossman sync_dev = OMAP24XX_DMA_MMC1_TX; 9521c6a0718SPierre Ossman 9531c6a0718SPierre Ossman omap_set_dma_dest_params(dma_ch, dst_port, 9541c6a0718SPierre Ossman OMAP_DMA_AMODE_CONSTANT, 9551c6a0718SPierre Ossman data_addr, 0, 0); 9561c6a0718SPierre Ossman omap_set_dma_src_params(dma_ch, src_port, 9571c6a0718SPierre Ossman OMAP_DMA_AMODE_POST_INC, 9581c6a0718SPierre Ossman sg_dma_address(sg), 0, 0); 9591c6a0718SPierre Ossman omap_set_dma_src_data_pack(dma_ch, 1); 9601c6a0718SPierre Ossman omap_set_dma_src_burst_mode(dma_ch, OMAP_DMA_DATA_BURST_4); 9611c6a0718SPierre Ossman } 9621c6a0718SPierre Ossman 9631c6a0718SPierre Ossman /* Max limit for DMA frame count is 0xffff */ 9641c6a0718SPierre Ossman BUG_ON(count > 0xffff); 9651c6a0718SPierre Ossman 9661c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BUF, buf); 9671c6a0718SPierre Ossman omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S16, 9681c6a0718SPierre Ossman frame, count, OMAP_DMA_SYNC_FRAME, 9691c6a0718SPierre Ossman sync_dev, 0); 9701c6a0718SPierre Ossman } 9711c6a0718SPierre Ossman 9721c6a0718SPierre Ossman /* A scatterlist segment completed */ 9731c6a0718SPierre Ossman static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data) 9741c6a0718SPierre Ossman { 9751c6a0718SPierre Ossman struct mmc_omap_host *host = (struct mmc_omap_host *) data; 9761c6a0718SPierre Ossman struct mmc_data *mmcdat = host->data; 9771c6a0718SPierre Ossman 9781c6a0718SPierre Ossman if (unlikely(host->dma_ch < 0)) { 9791c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), 9801c6a0718SPierre Ossman "DMA callback while DMA not enabled\n"); 9811c6a0718SPierre Ossman return; 9821c6a0718SPierre Ossman } 9831c6a0718SPierre Ossman /* FIXME: We really should do something to _handle_ the errors */ 9841c6a0718SPierre Ossman if (ch_status & OMAP1_DMA_TOUT_IRQ) { 9851c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc),"DMA timeout\n"); 9861c6a0718SPierre Ossman return; 9871c6a0718SPierre Ossman } 9881c6a0718SPierre Ossman if (ch_status & OMAP_DMA_DROP_IRQ) { 9891c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), "DMA sync error\n"); 9901c6a0718SPierre Ossman return; 9911c6a0718SPierre Ossman } 9921c6a0718SPierre Ossman if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { 9931c6a0718SPierre Ossman return; 9941c6a0718SPierre Ossman } 9951c6a0718SPierre Ossman mmcdat->bytes_xfered += host->dma_len; 9961c6a0718SPierre Ossman host->sg_idx++; 9971c6a0718SPierre Ossman if (host->sg_idx < host->sg_len) { 9981c6a0718SPierre Ossman mmc_omap_prepare_dma(host, host->data); 9991c6a0718SPierre Ossman omap_start_dma(host->dma_ch); 10001c6a0718SPierre Ossman } else 10011c6a0718SPierre Ossman mmc_omap_dma_done(host, host->data); 10021c6a0718SPierre Ossman } 10031c6a0718SPierre Ossman 10041c6a0718SPierre Ossman static int mmc_omap_get_dma_channel(struct mmc_omap_host *host, struct mmc_data *data) 10051c6a0718SPierre Ossman { 1006*df48dd02STony Lindgren const char *dma_dev_name; 10071c6a0718SPierre Ossman int sync_dev, dma_ch, is_read, r; 10081c6a0718SPierre Ossman 10091c6a0718SPierre Ossman is_read = !(data->flags & MMC_DATA_WRITE); 10101c6a0718SPierre Ossman del_timer_sync(&host->dma_timer); 10111c6a0718SPierre Ossman if (host->dma_ch >= 0) { 10121c6a0718SPierre Ossman if (is_read == host->dma_is_read) 10131c6a0718SPierre Ossman return 0; 10141c6a0718SPierre Ossman omap_free_dma(host->dma_ch); 10151c6a0718SPierre Ossman host->dma_ch = -1; 10161c6a0718SPierre Ossman } 10171c6a0718SPierre Ossman 10181c6a0718SPierre Ossman if (is_read) { 10191c6a0718SPierre Ossman if (host->id == 1) { 10201c6a0718SPierre Ossman sync_dev = OMAP_DMA_MMC_RX; 1021*df48dd02STony Lindgren dma_dev_name = "MMC1 read"; 10221c6a0718SPierre Ossman } else { 10231c6a0718SPierre Ossman sync_dev = OMAP_DMA_MMC2_RX; 1024*df48dd02STony Lindgren dma_dev_name = "MMC2 read"; 10251c6a0718SPierre Ossman } 10261c6a0718SPierre Ossman } else { 10271c6a0718SPierre Ossman if (host->id == 1) { 10281c6a0718SPierre Ossman sync_dev = OMAP_DMA_MMC_TX; 1029*df48dd02STony Lindgren dma_dev_name = "MMC1 write"; 10301c6a0718SPierre Ossman } else { 10311c6a0718SPierre Ossman sync_dev = OMAP_DMA_MMC2_TX; 1032*df48dd02STony Lindgren dma_dev_name = "MMC2 write"; 10331c6a0718SPierre Ossman } 10341c6a0718SPierre Ossman } 1035*df48dd02STony Lindgren r = omap_request_dma(sync_dev, dma_dev_name, mmc_omap_dma_cb, 10361c6a0718SPierre Ossman host, &dma_ch); 10371c6a0718SPierre Ossman if (r != 0) { 10381c6a0718SPierre Ossman dev_dbg(mmc_dev(host->mmc), "omap_request_dma() failed with %d\n", r); 10391c6a0718SPierre Ossman return r; 10401c6a0718SPierre Ossman } 10411c6a0718SPierre Ossman host->dma_ch = dma_ch; 10421c6a0718SPierre Ossman host->dma_is_read = is_read; 10431c6a0718SPierre Ossman 10441c6a0718SPierre Ossman return 0; 10451c6a0718SPierre Ossman } 10461c6a0718SPierre Ossman 10471c6a0718SPierre Ossman static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req) 10481c6a0718SPierre Ossman { 10491c6a0718SPierre Ossman u16 reg; 10501c6a0718SPierre Ossman 10511c6a0718SPierre Ossman reg = OMAP_MMC_READ(host, SDIO); 10521c6a0718SPierre Ossman reg &= ~(1 << 5); 10531c6a0718SPierre Ossman OMAP_MMC_WRITE(host, SDIO, reg); 10541c6a0718SPierre Ossman /* Set maximum timeout */ 10551c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CTO, 0xff); 10561c6a0718SPierre Ossman } 10571c6a0718SPierre Ossman 10581c6a0718SPierre Ossman static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req) 10591c6a0718SPierre Ossman { 1060b8f9f0e9SJuha Yrjola unsigned int timeout, cycle_ns; 10611c6a0718SPierre Ossman u16 reg; 10621c6a0718SPierre Ossman 1063b8f9f0e9SJuha Yrjola cycle_ns = 1000000000 / host->current_slot->fclk_freq; 1064b8f9f0e9SJuha Yrjola timeout = req->data->timeout_ns / cycle_ns; 1065b8f9f0e9SJuha Yrjola timeout += req->data->timeout_clks; 10661c6a0718SPierre Ossman 10671c6a0718SPierre Ossman /* Check if we need to use timeout multiplier register */ 10681c6a0718SPierre Ossman reg = OMAP_MMC_READ(host, SDIO); 10691c6a0718SPierre Ossman if (timeout > 0xffff) { 10701c6a0718SPierre Ossman reg |= (1 << 5); 10711c6a0718SPierre Ossman timeout /= 1024; 10721c6a0718SPierre Ossman } else 10731c6a0718SPierre Ossman reg &= ~(1 << 5); 10741c6a0718SPierre Ossman OMAP_MMC_WRITE(host, SDIO, reg); 10751c6a0718SPierre Ossman OMAP_MMC_WRITE(host, DTO, timeout); 10761c6a0718SPierre Ossman } 10771c6a0718SPierre Ossman 10781c6a0718SPierre Ossman static void 10791c6a0718SPierre Ossman mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) 10801c6a0718SPierre Ossman { 10811c6a0718SPierre Ossman struct mmc_data *data = req->data; 10821c6a0718SPierre Ossman int i, use_dma, block_size; 10831c6a0718SPierre Ossman unsigned sg_len; 10841c6a0718SPierre Ossman 10851c6a0718SPierre Ossman host->data = data; 10861c6a0718SPierre Ossman if (data == NULL) { 10871c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BLEN, 0); 10881c6a0718SPierre Ossman OMAP_MMC_WRITE(host, NBLK, 0); 10891c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BUF, 0); 10901c6a0718SPierre Ossman host->dma_in_use = 0; 10911c6a0718SPierre Ossman set_cmd_timeout(host, req); 10921c6a0718SPierre Ossman return; 10931c6a0718SPierre Ossman } 10941c6a0718SPierre Ossman 10951c6a0718SPierre Ossman block_size = data->blksz; 10961c6a0718SPierre Ossman 10971c6a0718SPierre Ossman OMAP_MMC_WRITE(host, NBLK, data->blocks - 1); 10981c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BLEN, block_size - 1); 10991c6a0718SPierre Ossman set_data_timeout(host, req); 11001c6a0718SPierre Ossman 11011c6a0718SPierre Ossman /* cope with calling layer confusion; it issues "single 11021c6a0718SPierre Ossman * block" writes using multi-block scatterlists. 11031c6a0718SPierre Ossman */ 11041c6a0718SPierre Ossman sg_len = (data->blocks == 1) ? 1 : data->sg_len; 11051c6a0718SPierre Ossman 11061c6a0718SPierre Ossman /* Only do DMA for entire blocks */ 11071c6a0718SPierre Ossman use_dma = host->use_dma; 11081c6a0718SPierre Ossman if (use_dma) { 11091c6a0718SPierre Ossman for (i = 0; i < sg_len; i++) { 11101c6a0718SPierre Ossman if ((data->sg[i].length % block_size) != 0) { 11111c6a0718SPierre Ossman use_dma = 0; 11121c6a0718SPierre Ossman break; 11131c6a0718SPierre Ossman } 11141c6a0718SPierre Ossman } 11151c6a0718SPierre Ossman } 11161c6a0718SPierre Ossman 11171c6a0718SPierre Ossman host->sg_idx = 0; 11181c6a0718SPierre Ossman if (use_dma) { 11191c6a0718SPierre Ossman if (mmc_omap_get_dma_channel(host, data) == 0) { 11201c6a0718SPierre Ossman enum dma_data_direction dma_data_dir; 11211c6a0718SPierre Ossman 11221c6a0718SPierre Ossman if (data->flags & MMC_DATA_WRITE) 11231c6a0718SPierre Ossman dma_data_dir = DMA_TO_DEVICE; 11241c6a0718SPierre Ossman else 11251c6a0718SPierre Ossman dma_data_dir = DMA_FROM_DEVICE; 11261c6a0718SPierre Ossman 11271c6a0718SPierre Ossman host->sg_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 11281c6a0718SPierre Ossman sg_len, dma_data_dir); 11291c6a0718SPierre Ossman host->total_bytes_left = 0; 11301c6a0718SPierre Ossman mmc_omap_prepare_dma(host, req->data); 11311c6a0718SPierre Ossman host->brs_received = 0; 11321c6a0718SPierre Ossman host->dma_done = 0; 11331c6a0718SPierre Ossman host->dma_in_use = 1; 11341c6a0718SPierre Ossman } else 11351c6a0718SPierre Ossman use_dma = 0; 11361c6a0718SPierre Ossman } 11371c6a0718SPierre Ossman 11381c6a0718SPierre Ossman /* Revert to PIO? */ 11391c6a0718SPierre Ossman if (!use_dma) { 11401c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BUF, 0x1f1f); 11411c6a0718SPierre Ossman host->total_bytes_left = data->blocks * block_size; 11421c6a0718SPierre Ossman host->sg_len = sg_len; 11431c6a0718SPierre Ossman mmc_omap_sg_to_buf(host); 11441c6a0718SPierre Ossman host->dma_in_use = 0; 11451c6a0718SPierre Ossman } 11461c6a0718SPierre Ossman } 11471c6a0718SPierre Ossman 1148abfbe5f7SJuha Yrjola static void mmc_omap_start_request(struct mmc_omap_host *host, 1149abfbe5f7SJuha Yrjola struct mmc_request *req) 11501c6a0718SPierre Ossman { 1151abfbe5f7SJuha Yrjola BUG_ON(host->mrq != NULL); 11521c6a0718SPierre Ossman 11531c6a0718SPierre Ossman host->mrq = req; 11541c6a0718SPierre Ossman 11551c6a0718SPierre Ossman /* only touch fifo AFTER the controller readies it */ 11561c6a0718SPierre Ossman mmc_omap_prepare_data(host, req); 11571c6a0718SPierre Ossman mmc_omap_start_command(host, req->cmd); 11581c6a0718SPierre Ossman if (host->dma_in_use) 11591c6a0718SPierre Ossman omap_start_dma(host->dma_ch); 1160abfbe5f7SJuha Yrjola BUG_ON(irqs_disabled()); 1161abfbe5f7SJuha Yrjola } 1162abfbe5f7SJuha Yrjola 1163abfbe5f7SJuha Yrjola static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req) 1164abfbe5f7SJuha Yrjola { 1165abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 1166abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 1167abfbe5f7SJuha Yrjola unsigned long flags; 1168abfbe5f7SJuha Yrjola 1169abfbe5f7SJuha Yrjola spin_lock_irqsave(&host->slot_lock, flags); 1170abfbe5f7SJuha Yrjola if (host->mmc != NULL) { 1171abfbe5f7SJuha Yrjola BUG_ON(slot->mrq != NULL); 1172abfbe5f7SJuha Yrjola slot->mrq = req; 1173abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 1174abfbe5f7SJuha Yrjola return; 1175abfbe5f7SJuha Yrjola } else 1176abfbe5f7SJuha Yrjola host->mmc = mmc; 1177abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 1178abfbe5f7SJuha Yrjola mmc_omap_select_slot(slot, 1); 1179abfbe5f7SJuha Yrjola mmc_omap_start_request(host, req); 11801c6a0718SPierre Ossman } 11811c6a0718SPierre Ossman 118265b5b6e5SJuha Yrjola static void mmc_omap_set_power(struct mmc_omap_slot *slot, int power_on, 118365b5b6e5SJuha Yrjola int vdd) 11841c6a0718SPierre Ossman { 118565b5b6e5SJuha Yrjola struct mmc_omap_host *host; 11861c6a0718SPierre Ossman 118765b5b6e5SJuha Yrjola host = slot->host; 118865b5b6e5SJuha Yrjola 118965b5b6e5SJuha Yrjola if (slot->pdata->set_power != NULL) 119065b5b6e5SJuha Yrjola slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on, 119165b5b6e5SJuha Yrjola vdd); 119265b5b6e5SJuha Yrjola 119365b5b6e5SJuha Yrjola if (cpu_is_omap24xx()) { 119465b5b6e5SJuha Yrjola u16 w; 119565b5b6e5SJuha Yrjola 119665b5b6e5SJuha Yrjola if (power_on) { 119765b5b6e5SJuha Yrjola w = OMAP_MMC_READ(host, CON); 119865b5b6e5SJuha Yrjola OMAP_MMC_WRITE(host, CON, w | (1 << 11)); 11991c6a0718SPierre Ossman } else { 120065b5b6e5SJuha Yrjola w = OMAP_MMC_READ(host, CON); 120165b5b6e5SJuha Yrjola OMAP_MMC_WRITE(host, CON, w & ~(1 << 11)); 120265b5b6e5SJuha Yrjola } 12031c6a0718SPierre Ossman } 12041c6a0718SPierre Ossman } 12051c6a0718SPierre Ossman 1206d3af5abeSTony Lindgren static int mmc_omap_calc_divisor(struct mmc_host *mmc, struct mmc_ios *ios) 12071c6a0718SPierre Ossman { 1208abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 1209abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 1210d3af5abeSTony Lindgren int func_clk_rate = clk_get_rate(host->fclk); 12111c6a0718SPierre Ossman int dsor; 12121c6a0718SPierre Ossman 12131c6a0718SPierre Ossman if (ios->clock == 0) 1214d3af5abeSTony Lindgren return 0; 12151c6a0718SPierre Ossman 1216d3af5abeSTony Lindgren dsor = func_clk_rate / ios->clock; 12171c6a0718SPierre Ossman if (dsor < 1) 12181c6a0718SPierre Ossman dsor = 1; 12191c6a0718SPierre Ossman 1220d3af5abeSTony Lindgren if (func_clk_rate / dsor > ios->clock) 12211c6a0718SPierre Ossman dsor++; 12221c6a0718SPierre Ossman 12231c6a0718SPierre Ossman if (dsor > 250) 12241c6a0718SPierre Ossman dsor = 250; 12251c6a0718SPierre Ossman 1226abfbe5f7SJuha Yrjola slot->fclk_freq = func_clk_rate / dsor; 1227abfbe5f7SJuha Yrjola 12281c6a0718SPierre Ossman if (ios->bus_width == MMC_BUS_WIDTH_4) 12291c6a0718SPierre Ossman dsor |= 1 << 15; 1230d3af5abeSTony Lindgren 1231d3af5abeSTony Lindgren return dsor; 12321c6a0718SPierre Ossman } 12331c6a0718SPierre Ossman 1234d3af5abeSTony Lindgren static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1235d3af5abeSTony Lindgren { 1236abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 1237abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 1238abfbe5f7SJuha Yrjola int i, dsor; 12390807a9b5SJarkko Lavinen int clk_enabled; 124065b5b6e5SJuha Yrjola 124165b5b6e5SJuha Yrjola mmc_omap_select_slot(slot, 0); 124265b5b6e5SJuha Yrjola 12430807a9b5SJarkko Lavinen dsor = mmc_omap_calc_divisor(mmc, ios); 12440807a9b5SJarkko Lavinen 124565b5b6e5SJuha Yrjola if (ios->vdd != slot->vdd) 124665b5b6e5SJuha Yrjola slot->vdd = ios->vdd; 1247d3af5abeSTony Lindgren 12480807a9b5SJarkko Lavinen clk_enabled = 0; 12491c6a0718SPierre Ossman switch (ios->power_mode) { 12501c6a0718SPierre Ossman case MMC_POWER_OFF: 125165b5b6e5SJuha Yrjola mmc_omap_set_power(slot, 0, ios->vdd); 12521c6a0718SPierre Ossman break; 12531c6a0718SPierre Ossman case MMC_POWER_UP: 125446a6730eSTony Lindgren /* Cannot touch dsor yet, just power up MMC */ 125565b5b6e5SJuha Yrjola mmc_omap_set_power(slot, 1, ios->vdd); 125665b5b6e5SJuha Yrjola goto exit; 125746a6730eSTony Lindgren case MMC_POWER_ON: 12580807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 1); 12590807a9b5SJarkko Lavinen clk_enabled = 1; 12601c6a0718SPierre Ossman dsor |= 1 << 11; 12611c6a0718SPierre Ossman break; 12621c6a0718SPierre Ossman } 12631c6a0718SPierre Ossman 126465b5b6e5SJuha Yrjola if (slot->bus_mode != ios->bus_mode) { 126565b5b6e5SJuha Yrjola if (slot->pdata->set_bus_mode != NULL) 126665b5b6e5SJuha Yrjola slot->pdata->set_bus_mode(mmc_dev(mmc), slot->id, 126765b5b6e5SJuha Yrjola ios->bus_mode); 126865b5b6e5SJuha Yrjola slot->bus_mode = ios->bus_mode; 126965b5b6e5SJuha Yrjola } 12701c6a0718SPierre Ossman 12711c6a0718SPierre Ossman /* On insanely high arm_per frequencies something sometimes 12721c6a0718SPierre Ossman * goes somehow out of sync, and the POW bit is not being set, 12731c6a0718SPierre Ossman * which results in the while loop below getting stuck. 12741c6a0718SPierre Ossman * Writing to the CON register twice seems to do the trick. */ 12751c6a0718SPierre Ossman for (i = 0; i < 2; i++) 12761c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CON, dsor); 127765b5b6e5SJuha Yrjola slot->saved_con = dsor; 127846a6730eSTony Lindgren if (ios->power_mode == MMC_POWER_ON) { 12799d7c6eeeSJarkko Lavinen /* worst case at 400kHz, 80 cycles makes 200 microsecs */ 12809d7c6eeeSJarkko Lavinen int usecs = 250; 12819d7c6eeeSJarkko Lavinen 12821c6a0718SPierre Ossman /* Send clock cycles, poll completion */ 12831c6a0718SPierre Ossman OMAP_MMC_WRITE(host, IE, 0); 12841c6a0718SPierre Ossman OMAP_MMC_WRITE(host, STAT, 0xffff); 12851c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CMD, 1 << 7); 12869d7c6eeeSJarkko Lavinen while (usecs > 0 && (OMAP_MMC_READ(host, STAT) & 1) == 0) { 12879d7c6eeeSJarkko Lavinen udelay(1); 12889d7c6eeeSJarkko Lavinen usecs--; 12899d7c6eeeSJarkko Lavinen } 12901c6a0718SPierre Ossman OMAP_MMC_WRITE(host, STAT, 1); 12911c6a0718SPierre Ossman } 129265b5b6e5SJuha Yrjola 129365b5b6e5SJuha Yrjola exit: 12940807a9b5SJarkko Lavinen mmc_omap_release_slot(slot, clk_enabled); 12951c6a0718SPierre Ossman } 12961c6a0718SPierre Ossman 12971c6a0718SPierre Ossman static const struct mmc_host_ops mmc_omap_ops = { 12981c6a0718SPierre Ossman .request = mmc_omap_request, 12991c6a0718SPierre Ossman .set_ios = mmc_omap_set_ios, 13001c6a0718SPierre Ossman }; 13011c6a0718SPierre Ossman 1302abfbe5f7SJuha Yrjola static int __init mmc_omap_new_slot(struct mmc_omap_host *host, int id) 1303abfbe5f7SJuha Yrjola { 1304abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = NULL; 1305abfbe5f7SJuha Yrjola struct mmc_host *mmc; 1306abfbe5f7SJuha Yrjola int r; 1307abfbe5f7SJuha Yrjola 1308abfbe5f7SJuha Yrjola mmc = mmc_alloc_host(sizeof(struct mmc_omap_slot), host->dev); 1309abfbe5f7SJuha Yrjola if (mmc == NULL) 1310abfbe5f7SJuha Yrjola return -ENOMEM; 1311abfbe5f7SJuha Yrjola 1312abfbe5f7SJuha Yrjola slot = mmc_priv(mmc); 1313abfbe5f7SJuha Yrjola slot->host = host; 1314abfbe5f7SJuha Yrjola slot->mmc = mmc; 1315abfbe5f7SJuha Yrjola slot->id = id; 1316abfbe5f7SJuha Yrjola slot->pdata = &host->pdata->slots[id]; 1317abfbe5f7SJuha Yrjola 1318abfbe5f7SJuha Yrjola host->slots[id] = slot; 1319abfbe5f7SJuha Yrjola 1320abfbe5f7SJuha Yrjola mmc->caps = MMC_CAP_MULTIWRITE; 1321abfbe5f7SJuha Yrjola if (host->pdata->conf.wire4) 1322abfbe5f7SJuha Yrjola mmc->caps |= MMC_CAP_4_BIT_DATA; 1323abfbe5f7SJuha Yrjola 1324abfbe5f7SJuha Yrjola mmc->ops = &mmc_omap_ops; 1325abfbe5f7SJuha Yrjola mmc->f_min = 400000; 1326abfbe5f7SJuha Yrjola 1327abfbe5f7SJuha Yrjola if (cpu_class_is_omap2()) 1328abfbe5f7SJuha Yrjola mmc->f_max = 48000000; 1329abfbe5f7SJuha Yrjola else 1330abfbe5f7SJuha Yrjola mmc->f_max = 24000000; 1331abfbe5f7SJuha Yrjola if (host->pdata->max_freq) 1332abfbe5f7SJuha Yrjola mmc->f_max = min(host->pdata->max_freq, mmc->f_max); 1333abfbe5f7SJuha Yrjola mmc->ocr_avail = slot->pdata->ocr_mask; 1334abfbe5f7SJuha Yrjola 1335abfbe5f7SJuha Yrjola /* Use scatterlist DMA to reduce per-transfer costs. 1336abfbe5f7SJuha Yrjola * NOTE max_seg_size assumption that small blocks aren't 1337abfbe5f7SJuha Yrjola * normally used (except e.g. for reading SD registers). 1338abfbe5f7SJuha Yrjola */ 1339abfbe5f7SJuha Yrjola mmc->max_phys_segs = 32; 1340abfbe5f7SJuha Yrjola mmc->max_hw_segs = 32; 1341abfbe5f7SJuha Yrjola mmc->max_blk_size = 2048; /* BLEN is 11 bits (+1) */ 1342abfbe5f7SJuha Yrjola mmc->max_blk_count = 2048; /* NBLK is 11 bits (+1) */ 1343abfbe5f7SJuha Yrjola mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1344abfbe5f7SJuha Yrjola mmc->max_seg_size = mmc->max_req_size; 1345abfbe5f7SJuha Yrjola 1346abfbe5f7SJuha Yrjola r = mmc_add_host(mmc); 1347abfbe5f7SJuha Yrjola if (r < 0) 1348abfbe5f7SJuha Yrjola goto err_remove_host; 1349abfbe5f7SJuha Yrjola 1350abfbe5f7SJuha Yrjola if (slot->pdata->name != NULL) { 1351abfbe5f7SJuha Yrjola r = device_create_file(&mmc->class_dev, 1352abfbe5f7SJuha Yrjola &dev_attr_slot_name); 1353abfbe5f7SJuha Yrjola if (r < 0) 1354abfbe5f7SJuha Yrjola goto err_remove_host; 1355abfbe5f7SJuha Yrjola } 1356abfbe5f7SJuha Yrjola 13575a0f3f1fSJuha Yrjola if (slot->pdata->get_cover_state != NULL) { 13585a0f3f1fSJuha Yrjola r = device_create_file(&mmc->class_dev, 13595a0f3f1fSJuha Yrjola &dev_attr_cover_switch); 13605a0f3f1fSJuha Yrjola if (r < 0) 13615a0f3f1fSJuha Yrjola goto err_remove_slot_name; 13625a0f3f1fSJuha Yrjola 13637584d276SJarkko Lavinen setup_timer(&slot->cover_timer, mmc_omap_cover_timer, 136401e77e13SCarlos Eduardo Aguiar (unsigned long)slot); 13657584d276SJarkko Lavinen tasklet_init(&slot->cover_tasklet, mmc_omap_cover_handler, 13667584d276SJarkko Lavinen (unsigned long)slot); 13677584d276SJarkko Lavinen tasklet_schedule(&slot->cover_tasklet); 13685a0f3f1fSJuha Yrjola } 13695a0f3f1fSJuha Yrjola 1370abfbe5f7SJuha Yrjola return 0; 1371abfbe5f7SJuha Yrjola 13725a0f3f1fSJuha Yrjola err_remove_slot_name: 13735a0f3f1fSJuha Yrjola if (slot->pdata->name != NULL) 13745a0f3f1fSJuha Yrjola device_remove_file(&mmc->class_dev, &dev_attr_slot_name); 1375abfbe5f7SJuha Yrjola err_remove_host: 1376abfbe5f7SJuha Yrjola mmc_remove_host(mmc); 1377abfbe5f7SJuha Yrjola mmc_free_host(mmc); 1378abfbe5f7SJuha Yrjola return r; 1379abfbe5f7SJuha Yrjola } 1380abfbe5f7SJuha Yrjola 1381abfbe5f7SJuha Yrjola static void mmc_omap_remove_slot(struct mmc_omap_slot *slot) 1382abfbe5f7SJuha Yrjola { 1383abfbe5f7SJuha Yrjola struct mmc_host *mmc = slot->mmc; 1384abfbe5f7SJuha Yrjola 1385abfbe5f7SJuha Yrjola if (slot->pdata->name != NULL) 1386abfbe5f7SJuha Yrjola device_remove_file(&mmc->class_dev, &dev_attr_slot_name); 13875a0f3f1fSJuha Yrjola if (slot->pdata->get_cover_state != NULL) 13885a0f3f1fSJuha Yrjola device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); 13895a0f3f1fSJuha Yrjola 13907584d276SJarkko Lavinen tasklet_kill(&slot->cover_tasklet); 13917584d276SJarkko Lavinen del_timer_sync(&slot->cover_timer); 13925a0f3f1fSJuha Yrjola flush_scheduled_work(); 1393abfbe5f7SJuha Yrjola 1394abfbe5f7SJuha Yrjola mmc_remove_host(mmc); 1395abfbe5f7SJuha Yrjola mmc_free_host(mmc); 1396abfbe5f7SJuha Yrjola } 1397abfbe5f7SJuha Yrjola 13981c6a0718SPierre Ossman static int __init mmc_omap_probe(struct platform_device *pdev) 13991c6a0718SPierre Ossman { 1400abfbe5f7SJuha Yrjola struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 14011c6a0718SPierre Ossman struct mmc_omap_host *host = NULL; 14021c6a0718SPierre Ossman struct resource *res; 1403abfbe5f7SJuha Yrjola int i, ret = 0; 14041c6a0718SPierre Ossman int irq; 14051c6a0718SPierre Ossman 1406abfbe5f7SJuha Yrjola if (pdata == NULL) { 14071c6a0718SPierre Ossman dev_err(&pdev->dev, "platform data missing\n"); 14081c6a0718SPierre Ossman return -ENXIO; 14091c6a0718SPierre Ossman } 1410abfbe5f7SJuha Yrjola if (pdata->nr_slots == 0) { 1411abfbe5f7SJuha Yrjola dev_err(&pdev->dev, "no slots\n"); 1412abfbe5f7SJuha Yrjola return -ENXIO; 1413abfbe5f7SJuha Yrjola } 14141c6a0718SPierre Ossman 14151c6a0718SPierre Ossman res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 14161c6a0718SPierre Ossman irq = platform_get_irq(pdev, 0); 14171c6a0718SPierre Ossman if (res == NULL || irq < 0) 14181c6a0718SPierre Ossman return -ENXIO; 14191c6a0718SPierre Ossman 14201c6a0718SPierre Ossman res = request_mem_region(res->start, res->end - res->start + 1, 14211c6a0718SPierre Ossman pdev->name); 14221c6a0718SPierre Ossman if (res == NULL) 14231c6a0718SPierre Ossman return -EBUSY; 14241c6a0718SPierre Ossman 1425abfbe5f7SJuha Yrjola host = kzalloc(sizeof(struct mmc_omap_host), GFP_KERNEL); 1426abfbe5f7SJuha Yrjola if (host == NULL) { 14271c6a0718SPierre Ossman ret = -ENOMEM; 14281c6a0718SPierre Ossman goto err_free_mem_region; 14291c6a0718SPierre Ossman } 14301c6a0718SPierre Ossman 14310f602ec7SJarkko Lavinen INIT_WORK(&host->slot_release_work, mmc_omap_slot_release_work); 14320f602ec7SJarkko Lavinen INIT_WORK(&host->send_stop_work, mmc_omap_send_stop_work); 14330f602ec7SJarkko Lavinen 14340fb4723dSJarkko Lavinen INIT_WORK(&host->cmd_abort_work, mmc_omap_abort_command); 14350fb4723dSJarkko Lavinen setup_timer(&host->cmd_abort_timer, mmc_omap_cmd_timer, 14360fb4723dSJarkko Lavinen (unsigned long) host); 1437eb1860bcSJarkko Lavinen 14380807a9b5SJarkko Lavinen spin_lock_init(&host->clk_lock); 14390807a9b5SJarkko Lavinen setup_timer(&host->clk_timer, mmc_omap_clk_timer, (unsigned long) host); 14400807a9b5SJarkko Lavinen 14411c6a0718SPierre Ossman spin_lock_init(&host->dma_lock); 144201e77e13SCarlos Eduardo Aguiar setup_timer(&host->dma_timer, mmc_omap_dma_timer, (unsigned long) host); 1443abfbe5f7SJuha Yrjola spin_lock_init(&host->slot_lock); 1444abfbe5f7SJuha Yrjola init_waitqueue_head(&host->slot_wq); 1445abfbe5f7SJuha Yrjola 1446abfbe5f7SJuha Yrjola host->pdata = pdata; 1447abfbe5f7SJuha Yrjola host->dev = &pdev->dev; 1448abfbe5f7SJuha Yrjola platform_set_drvdata(pdev, host); 1449abfbe5f7SJuha Yrjola 14501c6a0718SPierre Ossman host->id = pdev->id; 14511c6a0718SPierre Ossman host->mem_res = res; 14521c6a0718SPierre Ossman host->irq = irq; 14531c6a0718SPierre Ossman 1454abfbe5f7SJuha Yrjola host->use_dma = 1; 1455abfbe5f7SJuha Yrjola host->dma_ch = -1; 1456abfbe5f7SJuha Yrjola 1457abfbe5f7SJuha Yrjola host->irq = irq; 1458abfbe5f7SJuha Yrjola host->phys_base = host->mem_res->start; 1459abfbe5f7SJuha Yrjola host->virt_base = (void __iomem *) IO_ADDRESS(host->phys_base); 1460abfbe5f7SJuha Yrjola 14611c6a0718SPierre Ossman if (cpu_is_omap24xx()) { 14621c6a0718SPierre Ossman host->iclk = clk_get(&pdev->dev, "mmc_ick"); 14631c6a0718SPierre Ossman if (IS_ERR(host->iclk)) 14641c6a0718SPierre Ossman goto err_free_mmc_host; 14651c6a0718SPierre Ossman clk_enable(host->iclk); 14661c6a0718SPierre Ossman } 14671c6a0718SPierre Ossman 14681c6a0718SPierre Ossman if (!cpu_is_omap24xx()) 14691c6a0718SPierre Ossman host->fclk = clk_get(&pdev->dev, "mmc_ck"); 14701c6a0718SPierre Ossman else 14711c6a0718SPierre Ossman host->fclk = clk_get(&pdev->dev, "mmc_fck"); 14721c6a0718SPierre Ossman 14731c6a0718SPierre Ossman if (IS_ERR(host->fclk)) { 14741c6a0718SPierre Ossman ret = PTR_ERR(host->fclk); 14751c6a0718SPierre Ossman goto err_free_iclk; 14761c6a0718SPierre Ossman } 14771c6a0718SPierre Ossman 14781c6a0718SPierre Ossman ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host); 14791c6a0718SPierre Ossman if (ret) 1480abfbe5f7SJuha Yrjola goto err_free_fclk; 14811c6a0718SPierre Ossman 1482abfbe5f7SJuha Yrjola if (pdata->init != NULL) { 1483abfbe5f7SJuha Yrjola ret = pdata->init(&pdev->dev); 1484abfbe5f7SJuha Yrjola if (ret < 0) 1485abfbe5f7SJuha Yrjola goto err_free_irq; 1486abfbe5f7SJuha Yrjola } 14871c6a0718SPierre Ossman 1488abfbe5f7SJuha Yrjola host->nr_slots = pdata->nr_slots; 1489abfbe5f7SJuha Yrjola for (i = 0; i < pdata->nr_slots; i++) { 1490abfbe5f7SJuha Yrjola ret = mmc_omap_new_slot(host, i); 1491abfbe5f7SJuha Yrjola if (ret < 0) { 1492abfbe5f7SJuha Yrjola while (--i >= 0) 1493abfbe5f7SJuha Yrjola mmc_omap_remove_slot(host->slots[i]); 1494abfbe5f7SJuha Yrjola 1495abfbe5f7SJuha Yrjola goto err_plat_cleanup; 1496abfbe5f7SJuha Yrjola } 1497abfbe5f7SJuha Yrjola } 14981c6a0718SPierre Ossman 14991c6a0718SPierre Ossman return 0; 15001c6a0718SPierre Ossman 1501abfbe5f7SJuha Yrjola err_plat_cleanup: 1502abfbe5f7SJuha Yrjola if (pdata->cleanup) 1503abfbe5f7SJuha Yrjola pdata->cleanup(&pdev->dev); 1504abfbe5f7SJuha Yrjola err_free_irq: 1505abfbe5f7SJuha Yrjola free_irq(host->irq, host); 15061c6a0718SPierre Ossman err_free_fclk: 15071c6a0718SPierre Ossman clk_put(host->fclk); 15081c6a0718SPierre Ossman err_free_iclk: 15091c6a0718SPierre Ossman if (host->iclk != NULL) { 15101c6a0718SPierre Ossman clk_disable(host->iclk); 15111c6a0718SPierre Ossman clk_put(host->iclk); 15121c6a0718SPierre Ossman } 15131c6a0718SPierre Ossman err_free_mmc_host: 1514abfbe5f7SJuha Yrjola kfree(host); 15151c6a0718SPierre Ossman err_free_mem_region: 15161c6a0718SPierre Ossman release_mem_region(res->start, res->end - res->start + 1); 15171c6a0718SPierre Ossman return ret; 15181c6a0718SPierre Ossman } 15191c6a0718SPierre Ossman 15201c6a0718SPierre Ossman static int mmc_omap_remove(struct platform_device *pdev) 15211c6a0718SPierre Ossman { 15221c6a0718SPierre Ossman struct mmc_omap_host *host = platform_get_drvdata(pdev); 1523abfbe5f7SJuha Yrjola int i; 15241c6a0718SPierre Ossman 15251c6a0718SPierre Ossman platform_set_drvdata(pdev, NULL); 15261c6a0718SPierre Ossman 15271c6a0718SPierre Ossman BUG_ON(host == NULL); 15281c6a0718SPierre Ossman 1529abfbe5f7SJuha Yrjola for (i = 0; i < host->nr_slots; i++) 1530abfbe5f7SJuha Yrjola mmc_omap_remove_slot(host->slots[i]); 15311c6a0718SPierre Ossman 1532abfbe5f7SJuha Yrjola if (host->pdata->cleanup) 1533abfbe5f7SJuha Yrjola host->pdata->cleanup(&pdev->dev); 1534abfbe5f7SJuha Yrjola 15351c6a0718SPierre Ossman if (host->iclk && !IS_ERR(host->iclk)) 15361c6a0718SPierre Ossman clk_put(host->iclk); 15371c6a0718SPierre Ossman if (host->fclk && !IS_ERR(host->fclk)) 15381c6a0718SPierre Ossman clk_put(host->fclk); 15391c6a0718SPierre Ossman 15401c6a0718SPierre Ossman release_mem_region(pdev->resource[0].start, 15411c6a0718SPierre Ossman pdev->resource[0].end - pdev->resource[0].start + 1); 15421c6a0718SPierre Ossman 1543abfbe5f7SJuha Yrjola kfree(host); 15441c6a0718SPierre Ossman 15451c6a0718SPierre Ossman return 0; 15461c6a0718SPierre Ossman } 15471c6a0718SPierre Ossman 15481c6a0718SPierre Ossman #ifdef CONFIG_PM 15491c6a0718SPierre Ossman static int mmc_omap_suspend(struct platform_device *pdev, pm_message_t mesg) 15501c6a0718SPierre Ossman { 1551abfbe5f7SJuha Yrjola int i, ret = 0; 15521c6a0718SPierre Ossman struct mmc_omap_host *host = platform_get_drvdata(pdev); 15531c6a0718SPierre Ossman 1554abfbe5f7SJuha Yrjola if (host == NULL || host->suspended) 15551c6a0718SPierre Ossman return 0; 15561c6a0718SPierre Ossman 1557abfbe5f7SJuha Yrjola for (i = 0; i < host->nr_slots; i++) { 1558abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot; 1559abfbe5f7SJuha Yrjola 1560abfbe5f7SJuha Yrjola slot = host->slots[i]; 1561abfbe5f7SJuha Yrjola ret = mmc_suspend_host(slot->mmc, mesg); 1562abfbe5f7SJuha Yrjola if (ret < 0) { 1563abfbe5f7SJuha Yrjola while (--i >= 0) { 1564abfbe5f7SJuha Yrjola slot = host->slots[i]; 1565abfbe5f7SJuha Yrjola mmc_resume_host(slot->mmc); 15661c6a0718SPierre Ossman } 15671c6a0718SPierre Ossman return ret; 15681c6a0718SPierre Ossman } 1569abfbe5f7SJuha Yrjola } 1570abfbe5f7SJuha Yrjola host->suspended = 1; 1571abfbe5f7SJuha Yrjola return 0; 1572abfbe5f7SJuha Yrjola } 15731c6a0718SPierre Ossman 15741c6a0718SPierre Ossman static int mmc_omap_resume(struct platform_device *pdev) 15751c6a0718SPierre Ossman { 1576abfbe5f7SJuha Yrjola int i, ret = 0; 15771c6a0718SPierre Ossman struct mmc_omap_host *host = platform_get_drvdata(pdev); 15781c6a0718SPierre Ossman 1579abfbe5f7SJuha Yrjola if (host == NULL || !host->suspended) 15801c6a0718SPierre Ossman return 0; 15811c6a0718SPierre Ossman 1582abfbe5f7SJuha Yrjola for (i = 0; i < host->nr_slots; i++) { 1583abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot; 1584abfbe5f7SJuha Yrjola slot = host->slots[i]; 1585abfbe5f7SJuha Yrjola ret = mmc_resume_host(slot->mmc); 1586abfbe5f7SJuha Yrjola if (ret < 0) 1587abfbe5f7SJuha Yrjola return ret; 1588abfbe5f7SJuha Yrjola 15891c6a0718SPierre Ossman host->suspended = 0; 15901c6a0718SPierre Ossman } 1591abfbe5f7SJuha Yrjola return 0; 15921c6a0718SPierre Ossman } 15931c6a0718SPierre Ossman #else 15941c6a0718SPierre Ossman #define mmc_omap_suspend NULL 15951c6a0718SPierre Ossman #define mmc_omap_resume NULL 15961c6a0718SPierre Ossman #endif 15971c6a0718SPierre Ossman 15981c6a0718SPierre Ossman static struct platform_driver mmc_omap_driver = { 15991c6a0718SPierre Ossman .probe = mmc_omap_probe, 16001c6a0718SPierre Ossman .remove = mmc_omap_remove, 16011c6a0718SPierre Ossman .suspend = mmc_omap_suspend, 16021c6a0718SPierre Ossman .resume = mmc_omap_resume, 16031c6a0718SPierre Ossman .driver = { 16041c6a0718SPierre Ossman .name = DRIVER_NAME, 1605bc65c724SKay Sievers .owner = THIS_MODULE, 16061c6a0718SPierre Ossman }, 16071c6a0718SPierre Ossman }; 16081c6a0718SPierre Ossman 16091c6a0718SPierre Ossman static int __init mmc_omap_init(void) 16101c6a0718SPierre Ossman { 16111c6a0718SPierre Ossman return platform_driver_register(&mmc_omap_driver); 16121c6a0718SPierre Ossman } 16131c6a0718SPierre Ossman 16141c6a0718SPierre Ossman static void __exit mmc_omap_exit(void) 16151c6a0718SPierre Ossman { 16161c6a0718SPierre Ossman platform_driver_unregister(&mmc_omap_driver); 16171c6a0718SPierre Ossman } 16181c6a0718SPierre Ossman 16191c6a0718SPierre Ossman module_init(mmc_omap_init); 16201c6a0718SPierre Ossman module_exit(mmc_omap_exit); 16211c6a0718SPierre Ossman 16221c6a0718SPierre Ossman MODULE_DESCRIPTION("OMAP Multimedia Card driver"); 16231c6a0718SPierre Ossman MODULE_LICENSE("GPL"); 1624bc65c724SKay Sievers MODULE_ALIAS("platform:" DRIVER_NAME); 16251c6a0718SPierre Ossman MODULE_AUTHOR("Juha Yrj�l�"); 1626