1d2912cb1SThomas Gleixner // SPDX-License-Identifier: GPL-2.0-only 21c6a0718SPierre Ossman /* 370f10482SPierre Ossman * linux/drivers/mmc/host/omap.c 41c6a0718SPierre Ossman * 51c6a0718SPierre Ossman * Copyright (C) 2004 Nokia Corporation 6d36b6910SAl Viro * Written by Tuukka Tikkanen and Juha Yrjölä<juha.yrjola@nokia.com> 71c6a0718SPierre Ossman * Misc hacks here and there by Tony Lindgren <tony@atomide.com> 81c6a0718SPierre Ossman * Other hacks (DMA, SD, etc) by David Brownell 91c6a0718SPierre Ossman */ 101c6a0718SPierre Ossman 111c6a0718SPierre Ossman #include <linux/module.h> 121c6a0718SPierre Ossman #include <linux/moduleparam.h> 131c6a0718SPierre Ossman #include <linux/init.h> 141c6a0718SPierre Ossman #include <linux/ioport.h> 151c6a0718SPierre Ossman #include <linux/platform_device.h> 161c6a0718SPierre Ossman #include <linux/interrupt.h> 173451c067SRussell King #include <linux/dmaengine.h> 181c6a0718SPierre Ossman #include <linux/dma-mapping.h> 191c6a0718SPierre Ossman #include <linux/delay.h> 201c6a0718SPierre Ossman #include <linux/spinlock.h> 211c6a0718SPierre Ossman #include <linux/timer.h> 229cb238c0STony Lindgren #include <linux/of.h> 231c6a0718SPierre Ossman #include <linux/mmc/host.h> 241c6a0718SPierre Ossman #include <linux/mmc/card.h> 25b13d1f0fSJarkko Nikula #include <linux/mmc/mmc.h> 261c6a0718SPierre Ossman #include <linux/clk.h> 2745711f1aSJens Axboe #include <linux/scatterlist.h> 285a0e3ad6STejun Heo #include <linux/slab.h> 2968f39e74STony Lindgren #include <linux/platform_data/mmc-omap.h> 301c6a0718SPierre Ossman 311c6a0718SPierre Ossman 321c6a0718SPierre Ossman #define OMAP_MMC_REG_CMD 0x00 330e950fa6SMarek Belisko #define OMAP_MMC_REG_ARGL 0x01 340e950fa6SMarek Belisko #define OMAP_MMC_REG_ARGH 0x02 350e950fa6SMarek Belisko #define OMAP_MMC_REG_CON 0x03 360e950fa6SMarek Belisko #define OMAP_MMC_REG_STAT 0x04 370e950fa6SMarek Belisko #define OMAP_MMC_REG_IE 0x05 380e950fa6SMarek Belisko #define OMAP_MMC_REG_CTO 0x06 390e950fa6SMarek Belisko #define OMAP_MMC_REG_DTO 0x07 400e950fa6SMarek Belisko #define OMAP_MMC_REG_DATA 0x08 410e950fa6SMarek Belisko #define OMAP_MMC_REG_BLEN 0x09 420e950fa6SMarek Belisko #define OMAP_MMC_REG_NBLK 0x0a 430e950fa6SMarek Belisko #define OMAP_MMC_REG_BUF 0x0b 440e950fa6SMarek Belisko #define OMAP_MMC_REG_SDIO 0x0d 450e950fa6SMarek Belisko #define OMAP_MMC_REG_REV 0x0f 460e950fa6SMarek Belisko #define OMAP_MMC_REG_RSP0 0x10 470e950fa6SMarek Belisko #define OMAP_MMC_REG_RSP1 0x11 480e950fa6SMarek Belisko #define OMAP_MMC_REG_RSP2 0x12 490e950fa6SMarek Belisko #define OMAP_MMC_REG_RSP3 0x13 500e950fa6SMarek Belisko #define OMAP_MMC_REG_RSP4 0x14 510e950fa6SMarek Belisko #define OMAP_MMC_REG_RSP5 0x15 520e950fa6SMarek Belisko #define OMAP_MMC_REG_RSP6 0x16 530e950fa6SMarek Belisko #define OMAP_MMC_REG_RSP7 0x17 540e950fa6SMarek Belisko #define OMAP_MMC_REG_IOSR 0x18 550e950fa6SMarek Belisko #define OMAP_MMC_REG_SYSC 0x19 560e950fa6SMarek Belisko #define OMAP_MMC_REG_SYSS 0x1a 571c6a0718SPierre Ossman 581c6a0718SPierre Ossman #define OMAP_MMC_STAT_CARD_ERR (1 << 14) 591c6a0718SPierre Ossman #define OMAP_MMC_STAT_CARD_IRQ (1 << 13) 601c6a0718SPierre Ossman #define OMAP_MMC_STAT_OCR_BUSY (1 << 12) 611c6a0718SPierre Ossman #define OMAP_MMC_STAT_A_EMPTY (1 << 11) 621c6a0718SPierre Ossman #define OMAP_MMC_STAT_A_FULL (1 << 10) 631c6a0718SPierre Ossman #define OMAP_MMC_STAT_CMD_CRC (1 << 8) 641c6a0718SPierre Ossman #define OMAP_MMC_STAT_CMD_TOUT (1 << 7) 651c6a0718SPierre Ossman #define OMAP_MMC_STAT_DATA_CRC (1 << 6) 661c6a0718SPierre Ossman #define OMAP_MMC_STAT_DATA_TOUT (1 << 5) 671c6a0718SPierre Ossman #define OMAP_MMC_STAT_END_BUSY (1 << 4) 681c6a0718SPierre Ossman #define OMAP_MMC_STAT_END_OF_DATA (1 << 3) 691c6a0718SPierre Ossman #define OMAP_MMC_STAT_CARD_BUSY (1 << 2) 701c6a0718SPierre Ossman #define OMAP_MMC_STAT_END_OF_CMD (1 << 0) 711c6a0718SPierre Ossman 7253db20d1STony Lindgren #define mmc_omap7xx() (host->features & MMC_OMAP7XX) 7353db20d1STony Lindgren #define mmc_omap15xx() (host->features & MMC_OMAP15XX) 7453db20d1STony Lindgren #define mmc_omap16xx() (host->features & MMC_OMAP16XX) 7553db20d1STony Lindgren #define MMC_OMAP1_MASK (MMC_OMAP7XX | MMC_OMAP15XX | MMC_OMAP16XX) 7653db20d1STony Lindgren #define mmc_omap1() (host->features & MMC_OMAP1_MASK) 7753db20d1STony Lindgren #define mmc_omap2() (!mmc_omap1()) 7853db20d1STony Lindgren 790e950fa6SMarek Belisko #define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg << (host)->reg_shift) 800e950fa6SMarek Belisko #define OMAP_MMC_READ(host, reg) __raw_readw((host)->virt_base + OMAP_MMC_REG(host, reg)) 810e950fa6SMarek Belisko #define OMAP_MMC_WRITE(host, reg, val) __raw_writew((val), (host)->virt_base + OMAP_MMC_REG(host, reg)) 821c6a0718SPierre Ossman 831c6a0718SPierre Ossman /* 841c6a0718SPierre Ossman * Command types 851c6a0718SPierre Ossman */ 861c6a0718SPierre Ossman #define OMAP_MMC_CMDTYPE_BC 0 871c6a0718SPierre Ossman #define OMAP_MMC_CMDTYPE_BCR 1 881c6a0718SPierre Ossman #define OMAP_MMC_CMDTYPE_AC 2 891c6a0718SPierre Ossman #define OMAP_MMC_CMDTYPE_ADTC 3 901c6a0718SPierre Ossman 911c6a0718SPierre Ossman #define DRIVER_NAME "mmci-omap" 921c6a0718SPierre Ossman 931c6a0718SPierre Ossman /* Specifies how often in millisecs to poll for card status changes 941c6a0718SPierre Ossman * when the cover switch is open */ 957584d276SJarkko Lavinen #define OMAP_MMC_COVER_POLL_DELAY 500 961c6a0718SPierre Ossman 97abfbe5f7SJuha Yrjola struct mmc_omap_host; 98abfbe5f7SJuha Yrjola 99abfbe5f7SJuha Yrjola struct mmc_omap_slot { 100abfbe5f7SJuha Yrjola int id; 101abfbe5f7SJuha Yrjola unsigned int vdd; 102abfbe5f7SJuha Yrjola u16 saved_con; 103abfbe5f7SJuha Yrjola u16 bus_mode; 104e8cde625SAaro Koskinen u16 power_mode; 105abfbe5f7SJuha Yrjola unsigned int fclk_freq; 106abfbe5f7SJuha Yrjola 1077584d276SJarkko Lavinen struct tasklet_struct cover_tasklet; 1087584d276SJarkko Lavinen struct timer_list cover_timer; 1095a0f3f1fSJuha Yrjola unsigned cover_open; 1105a0f3f1fSJuha Yrjola 111abfbe5f7SJuha Yrjola struct mmc_request *mrq; 112abfbe5f7SJuha Yrjola struct mmc_omap_host *host; 113abfbe5f7SJuha Yrjola struct mmc_host *mmc; 114abfbe5f7SJuha Yrjola struct omap_mmc_slot_data *pdata; 115abfbe5f7SJuha Yrjola }; 116abfbe5f7SJuha Yrjola 1171c6a0718SPierre Ossman struct mmc_omap_host { 1181c6a0718SPierre Ossman int initialized; 1191c6a0718SPierre Ossman struct mmc_request * mrq; 1201c6a0718SPierre Ossman struct mmc_command * cmd; 1211c6a0718SPierre Ossman struct mmc_data * data; 1221c6a0718SPierre Ossman struct mmc_host * mmc; 1231c6a0718SPierre Ossman struct device * dev; 1241c6a0718SPierre Ossman unsigned char id; /* 16xx chips have 2 MMC blocks */ 1251c6a0718SPierre Ossman struct clk * iclk; 1261c6a0718SPierre Ossman struct clk * fclk; 1273451c067SRussell King struct dma_chan *dma_rx; 1283451c067SRussell King u32 dma_rx_burst; 1293451c067SRussell King struct dma_chan *dma_tx; 1303451c067SRussell King u32 dma_tx_burst; 1311c6a0718SPierre Ossman void __iomem *virt_base; 1321c6a0718SPierre Ossman unsigned int phys_base; 1331c6a0718SPierre Ossman int irq; 1341c6a0718SPierre Ossman unsigned char bus_mode; 1350e950fa6SMarek Belisko unsigned int reg_shift; 1361c6a0718SPierre Ossman 1370fb4723dSJarkko Lavinen struct work_struct cmd_abort_work; 1380fb4723dSJarkko Lavinen unsigned abort:1; 1390fb4723dSJarkko Lavinen struct timer_list cmd_abort_timer; 140eb1860bcSJarkko Lavinen 1410f602ec7SJarkko Lavinen struct work_struct slot_release_work; 1420f602ec7SJarkko Lavinen struct mmc_omap_slot *next_slot; 1430f602ec7SJarkko Lavinen struct work_struct send_stop_work; 1440f602ec7SJarkko Lavinen struct mmc_data *stop_data; 1450f602ec7SJarkko Lavinen 1461c6a0718SPierre Ossman unsigned int sg_len; 1471c6a0718SPierre Ossman int sg_idx; 1481c6a0718SPierre Ossman u16 * buffer; 1491c6a0718SPierre Ossman u32 buffer_bytes_left; 1501c6a0718SPierre Ossman u32 total_bytes_left; 1511c6a0718SPierre Ossman 15253db20d1STony Lindgren unsigned features; 1531c6a0718SPierre Ossman unsigned brs_received:1, dma_done:1; 1541c6a0718SPierre Ossman unsigned dma_in_use:1; 1553451c067SRussell King spinlock_t dma_lock; 1561c6a0718SPierre Ossman 157abfbe5f7SJuha Yrjola struct mmc_omap_slot *slots[OMAP_MMC_MAX_SLOTS]; 158abfbe5f7SJuha Yrjola struct mmc_omap_slot *current_slot; 159abfbe5f7SJuha Yrjola spinlock_t slot_lock; 160abfbe5f7SJuha Yrjola wait_queue_head_t slot_wq; 161abfbe5f7SJuha Yrjola int nr_slots; 162abfbe5f7SJuha Yrjola 1630807a9b5SJarkko Lavinen struct timer_list clk_timer; 1640807a9b5SJarkko Lavinen spinlock_t clk_lock; /* for changing enabled state */ 1650807a9b5SJarkko Lavinen unsigned int fclk_enabled:1; 166b01a4f1cSVenkatraman S struct workqueue_struct *mmc_omap_wq; 1670807a9b5SJarkko Lavinen 168abfbe5f7SJuha Yrjola struct omap_mmc_platform_data *pdata; 1691c6a0718SPierre Ossman }; 1701c6a0718SPierre Ossman 1710d9ee5b2STejun Heo 1727c8ad982SRussell King static void mmc_omap_fclk_offdelay(struct mmc_omap_slot *slot) 1730807a9b5SJarkko Lavinen { 1740807a9b5SJarkko Lavinen unsigned long tick_ns; 1750807a9b5SJarkko Lavinen 1760807a9b5SJarkko Lavinen if (slot != NULL && slot->host->fclk_enabled && slot->fclk_freq > 0) { 17703a16853SAxel Lin tick_ns = DIV_ROUND_UP(NSEC_PER_SEC, slot->fclk_freq); 1780807a9b5SJarkko Lavinen ndelay(8 * tick_ns); 1790807a9b5SJarkko Lavinen } 1800807a9b5SJarkko Lavinen } 1810807a9b5SJarkko Lavinen 1827c8ad982SRussell King static void mmc_omap_fclk_enable(struct mmc_omap_host *host, unsigned int enable) 1830807a9b5SJarkko Lavinen { 1840807a9b5SJarkko Lavinen unsigned long flags; 1850807a9b5SJarkko Lavinen 1860807a9b5SJarkko Lavinen spin_lock_irqsave(&host->clk_lock, flags); 1870807a9b5SJarkko Lavinen if (host->fclk_enabled != enable) { 1880807a9b5SJarkko Lavinen host->fclk_enabled = enable; 1890807a9b5SJarkko Lavinen if (enable) 1900807a9b5SJarkko Lavinen clk_enable(host->fclk); 1910807a9b5SJarkko Lavinen else 1920807a9b5SJarkko Lavinen clk_disable(host->fclk); 1930807a9b5SJarkko Lavinen } 1940807a9b5SJarkko Lavinen spin_unlock_irqrestore(&host->clk_lock, flags); 1950807a9b5SJarkko Lavinen } 1960807a9b5SJarkko Lavinen 197abfbe5f7SJuha Yrjola static void mmc_omap_select_slot(struct mmc_omap_slot *slot, int claimed) 198abfbe5f7SJuha Yrjola { 199abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 200abfbe5f7SJuha Yrjola unsigned long flags; 201abfbe5f7SJuha Yrjola 202abfbe5f7SJuha Yrjola if (claimed) 203abfbe5f7SJuha Yrjola goto no_claim; 204abfbe5f7SJuha Yrjola spin_lock_irqsave(&host->slot_lock, flags); 205abfbe5f7SJuha Yrjola while (host->mmc != NULL) { 206abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 207abfbe5f7SJuha Yrjola wait_event(host->slot_wq, host->mmc == NULL); 208abfbe5f7SJuha Yrjola spin_lock_irqsave(&host->slot_lock, flags); 209abfbe5f7SJuha Yrjola } 210abfbe5f7SJuha Yrjola host->mmc = slot->mmc; 211abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 212abfbe5f7SJuha Yrjola no_claim: 2130807a9b5SJarkko Lavinen del_timer(&host->clk_timer); 2140807a9b5SJarkko Lavinen if (host->current_slot != slot || !claimed) 2150807a9b5SJarkko Lavinen mmc_omap_fclk_offdelay(host->current_slot); 2160807a9b5SJarkko Lavinen 217abfbe5f7SJuha Yrjola if (host->current_slot != slot) { 2180807a9b5SJarkko Lavinen OMAP_MMC_WRITE(host, CON, slot->saved_con & 0xFC00); 219abfbe5f7SJuha Yrjola if (host->pdata->switch_slot != NULL) 220abfbe5f7SJuha Yrjola host->pdata->switch_slot(mmc_dev(slot->mmc), slot->id); 221abfbe5f7SJuha Yrjola host->current_slot = slot; 222abfbe5f7SJuha Yrjola } 223abfbe5f7SJuha Yrjola 2240807a9b5SJarkko Lavinen if (claimed) { 2250807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 1); 2260807a9b5SJarkko Lavinen 227abfbe5f7SJuha Yrjola /* Doing the dummy read here seems to work around some bug 228abfbe5f7SJuha Yrjola * at least in OMAP24xx silicon where the command would not 229abfbe5f7SJuha Yrjola * start after writing the CMD register. Sigh. */ 230abfbe5f7SJuha Yrjola OMAP_MMC_READ(host, CON); 231abfbe5f7SJuha Yrjola 232abfbe5f7SJuha Yrjola OMAP_MMC_WRITE(host, CON, slot->saved_con); 2330807a9b5SJarkko Lavinen } else 2340807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 0); 235abfbe5f7SJuha Yrjola } 236abfbe5f7SJuha Yrjola 237abfbe5f7SJuha Yrjola static void mmc_omap_start_request(struct mmc_omap_host *host, 238abfbe5f7SJuha Yrjola struct mmc_request *req); 239abfbe5f7SJuha Yrjola 2400f602ec7SJarkko Lavinen static void mmc_omap_slot_release_work(struct work_struct *work) 2410f602ec7SJarkko Lavinen { 2420f602ec7SJarkko Lavinen struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 2430f602ec7SJarkko Lavinen slot_release_work); 2440f602ec7SJarkko Lavinen struct mmc_omap_slot *next_slot = host->next_slot; 2450f602ec7SJarkko Lavinen struct mmc_request *rq; 2460f602ec7SJarkko Lavinen 2470f602ec7SJarkko Lavinen host->next_slot = NULL; 2480f602ec7SJarkko Lavinen mmc_omap_select_slot(next_slot, 1); 2490f602ec7SJarkko Lavinen 2500f602ec7SJarkko Lavinen rq = next_slot->mrq; 2510f602ec7SJarkko Lavinen next_slot->mrq = NULL; 2520f602ec7SJarkko Lavinen mmc_omap_start_request(host, rq); 2530f602ec7SJarkko Lavinen } 2540f602ec7SJarkko Lavinen 2550807a9b5SJarkko Lavinen static void mmc_omap_release_slot(struct mmc_omap_slot *slot, int clk_enabled) 256abfbe5f7SJuha Yrjola { 257abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 258abfbe5f7SJuha Yrjola unsigned long flags; 259abfbe5f7SJuha Yrjola int i; 260abfbe5f7SJuha Yrjola 261abfbe5f7SJuha Yrjola BUG_ON(slot == NULL || host->mmc == NULL); 2620807a9b5SJarkko Lavinen 2630807a9b5SJarkko Lavinen if (clk_enabled) 2640807a9b5SJarkko Lavinen /* Keeps clock running for at least 8 cycles on valid freq */ 2650807a9b5SJarkko Lavinen mod_timer(&host->clk_timer, jiffies + HZ/10); 2660807a9b5SJarkko Lavinen else { 2670807a9b5SJarkko Lavinen del_timer(&host->clk_timer); 2680807a9b5SJarkko Lavinen mmc_omap_fclk_offdelay(slot); 2690807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 0); 2700807a9b5SJarkko Lavinen } 271abfbe5f7SJuha Yrjola 272abfbe5f7SJuha Yrjola spin_lock_irqsave(&host->slot_lock, flags); 273abfbe5f7SJuha Yrjola /* Check for any pending requests */ 274abfbe5f7SJuha Yrjola for (i = 0; i < host->nr_slots; i++) { 275abfbe5f7SJuha Yrjola struct mmc_omap_slot *new_slot; 276abfbe5f7SJuha Yrjola 277abfbe5f7SJuha Yrjola if (host->slots[i] == NULL || host->slots[i]->mrq == NULL) 278abfbe5f7SJuha Yrjola continue; 279abfbe5f7SJuha Yrjola 2800f602ec7SJarkko Lavinen BUG_ON(host->next_slot != NULL); 281abfbe5f7SJuha Yrjola new_slot = host->slots[i]; 282abfbe5f7SJuha Yrjola /* The current slot should not have a request in queue */ 283abfbe5f7SJuha Yrjola BUG_ON(new_slot == host->current_slot); 284abfbe5f7SJuha Yrjola 2850f602ec7SJarkko Lavinen host->next_slot = new_slot; 286abfbe5f7SJuha Yrjola host->mmc = new_slot->mmc; 287abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 288b01a4f1cSVenkatraman S queue_work(host->mmc_omap_wq, &host->slot_release_work); 289abfbe5f7SJuha Yrjola return; 290abfbe5f7SJuha Yrjola } 291abfbe5f7SJuha Yrjola 292abfbe5f7SJuha Yrjola host->mmc = NULL; 293abfbe5f7SJuha Yrjola wake_up(&host->slot_wq); 294abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 295abfbe5f7SJuha Yrjola } 296abfbe5f7SJuha Yrjola 2975a0f3f1fSJuha Yrjola static inline 2985a0f3f1fSJuha Yrjola int mmc_omap_cover_is_open(struct mmc_omap_slot *slot) 2995a0f3f1fSJuha Yrjola { 3008348f002SKyungmin Park if (slot->pdata->get_cover_state) 3018348f002SKyungmin Park return slot->pdata->get_cover_state(mmc_dev(slot->mmc), 3028348f002SKyungmin Park slot->id); 3038348f002SKyungmin Park return 0; 3045a0f3f1fSJuha Yrjola } 3055a0f3f1fSJuha Yrjola 3065a0f3f1fSJuha Yrjola static ssize_t 3075a0f3f1fSJuha Yrjola mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, 3085a0f3f1fSJuha Yrjola char *buf) 3095a0f3f1fSJuha Yrjola { 3105a0f3f1fSJuha Yrjola struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 3115a0f3f1fSJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 3125a0f3f1fSJuha Yrjola 3135a0f3f1fSJuha Yrjola return sprintf(buf, "%s\n", mmc_omap_cover_is_open(slot) ? "open" : 3145a0f3f1fSJuha Yrjola "closed"); 3155a0f3f1fSJuha Yrjola } 3165a0f3f1fSJuha Yrjola 3175a0f3f1fSJuha Yrjola static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); 3185a0f3f1fSJuha Yrjola 319abfbe5f7SJuha Yrjola static ssize_t 320abfbe5f7SJuha Yrjola mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, 321abfbe5f7SJuha Yrjola char *buf) 322abfbe5f7SJuha Yrjola { 323abfbe5f7SJuha Yrjola struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 324abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 325abfbe5f7SJuha Yrjola 326abfbe5f7SJuha Yrjola return sprintf(buf, "%s\n", slot->pdata->name); 327abfbe5f7SJuha Yrjola } 328abfbe5f7SJuha Yrjola 329abfbe5f7SJuha Yrjola static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); 330abfbe5f7SJuha Yrjola 3311c6a0718SPierre Ossman static void 3321c6a0718SPierre Ossman mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd) 3331c6a0718SPierre Ossman { 3341c6a0718SPierre Ossman u32 cmdreg; 3351c6a0718SPierre Ossman u32 resptype; 3361c6a0718SPierre Ossman u32 cmdtype; 337b13d1f0fSJarkko Nikula u16 irq_mask; 3381c6a0718SPierre Ossman 3391c6a0718SPierre Ossman host->cmd = cmd; 3401c6a0718SPierre Ossman 3411c6a0718SPierre Ossman resptype = 0; 3421c6a0718SPierre Ossman cmdtype = 0; 3431c6a0718SPierre Ossman 3441c6a0718SPierre Ossman /* Our hardware needs to know exact type */ 3451c6a0718SPierre Ossman switch (mmc_resp_type(cmd)) { 3461c6a0718SPierre Ossman case MMC_RSP_NONE: 3471c6a0718SPierre Ossman break; 3481c6a0718SPierre Ossman case MMC_RSP_R1: 3491c6a0718SPierre Ossman case MMC_RSP_R1B: 3501c6a0718SPierre Ossman /* resp 1, 1b, 6, 7 */ 3511c6a0718SPierre Ossman resptype = 1; 3521c6a0718SPierre Ossman break; 3531c6a0718SPierre Ossman case MMC_RSP_R2: 3541c6a0718SPierre Ossman resptype = 2; 3551c6a0718SPierre Ossman break; 3561c6a0718SPierre Ossman case MMC_RSP_R3: 3571c6a0718SPierre Ossman resptype = 3; 3581c6a0718SPierre Ossman break; 3591c6a0718SPierre Ossman default: 3601c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), "Invalid response type: %04x\n", mmc_resp_type(cmd)); 3611c6a0718SPierre Ossman break; 3621c6a0718SPierre Ossman } 3631c6a0718SPierre Ossman 3641c6a0718SPierre Ossman if (mmc_cmd_type(cmd) == MMC_CMD_ADTC) { 3651c6a0718SPierre Ossman cmdtype = OMAP_MMC_CMDTYPE_ADTC; 3661c6a0718SPierre Ossman } else if (mmc_cmd_type(cmd) == MMC_CMD_BC) { 3671c6a0718SPierre Ossman cmdtype = OMAP_MMC_CMDTYPE_BC; 3681c6a0718SPierre Ossman } else if (mmc_cmd_type(cmd) == MMC_CMD_BCR) { 3691c6a0718SPierre Ossman cmdtype = OMAP_MMC_CMDTYPE_BCR; 3701c6a0718SPierre Ossman } else { 3711c6a0718SPierre Ossman cmdtype = OMAP_MMC_CMDTYPE_AC; 3721c6a0718SPierre Ossman } 3731c6a0718SPierre Ossman 3741c6a0718SPierre Ossman cmdreg = cmd->opcode | (resptype << 8) | (cmdtype << 12); 3751c6a0718SPierre Ossman 376abfbe5f7SJuha Yrjola if (host->current_slot->bus_mode == MMC_BUSMODE_OPENDRAIN) 3771c6a0718SPierre Ossman cmdreg |= 1 << 6; 3781c6a0718SPierre Ossman 3791c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_BUSY) 3801c6a0718SPierre Ossman cmdreg |= 1 << 11; 3811c6a0718SPierre Ossman 3821c6a0718SPierre Ossman if (host->data && !(host->data->flags & MMC_DATA_WRITE)) 3831c6a0718SPierre Ossman cmdreg |= 1 << 15; 3841c6a0718SPierre Ossman 3850fb4723dSJarkko Lavinen mod_timer(&host->cmd_abort_timer, jiffies + HZ/2); 386eb1860bcSJarkko Lavinen 3871c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CTO, 200); 3881c6a0718SPierre Ossman OMAP_MMC_WRITE(host, ARGL, cmd->arg & 0xffff); 3891c6a0718SPierre Ossman OMAP_MMC_WRITE(host, ARGH, cmd->arg >> 16); 390b13d1f0fSJarkko Nikula irq_mask = OMAP_MMC_STAT_A_EMPTY | OMAP_MMC_STAT_A_FULL | 3911c6a0718SPierre Ossman OMAP_MMC_STAT_CMD_CRC | OMAP_MMC_STAT_CMD_TOUT | 3921c6a0718SPierre Ossman OMAP_MMC_STAT_DATA_CRC | OMAP_MMC_STAT_DATA_TOUT | 3931c6a0718SPierre Ossman OMAP_MMC_STAT_END_OF_CMD | OMAP_MMC_STAT_CARD_ERR | 394b13d1f0fSJarkko Nikula OMAP_MMC_STAT_END_OF_DATA; 395b13d1f0fSJarkko Nikula if (cmd->opcode == MMC_ERASE) 396b13d1f0fSJarkko Nikula irq_mask &= ~OMAP_MMC_STAT_DATA_TOUT; 397b13d1f0fSJarkko Nikula OMAP_MMC_WRITE(host, IE, irq_mask); 3981c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CMD, cmdreg); 3991c6a0718SPierre Ossman } 4001c6a0718SPierre Ossman 4011c6a0718SPierre Ossman static void 402a914ded2SJuha Yrjola mmc_omap_release_dma(struct mmc_omap_host *host, struct mmc_data *data, 403a914ded2SJuha Yrjola int abort) 4041c6a0718SPierre Ossman { 4051c6a0718SPierre Ossman enum dma_data_direction dma_data_dir; 4063451c067SRussell King struct device *dev = mmc_dev(host->mmc); 4073451c067SRussell King struct dma_chan *c; 4081c6a0718SPierre Ossman 4093451c067SRussell King if (data->flags & MMC_DATA_WRITE) { 4101c6a0718SPierre Ossman dma_data_dir = DMA_TO_DEVICE; 4113451c067SRussell King c = host->dma_tx; 4123451c067SRussell King } else { 4131c6a0718SPierre Ossman dma_data_dir = DMA_FROM_DEVICE; 4143451c067SRussell King c = host->dma_rx; 4153451c067SRussell King } 4163451c067SRussell King if (c) { 4173451c067SRussell King if (data->error) { 4183451c067SRussell King dmaengine_terminate_all(c); 4193451c067SRussell King /* Claim nothing transferred on error... */ 4203451c067SRussell King data->bytes_xfered = 0; 4213451c067SRussell King } 4223451c067SRussell King dev = c->device->dev; 4233451c067SRussell King } 4243451c067SRussell King dma_unmap_sg(dev, data->sg, host->sg_len, dma_data_dir); 4251c6a0718SPierre Ossman } 426a914ded2SJuha Yrjola 4270f602ec7SJarkko Lavinen static void mmc_omap_send_stop_work(struct work_struct *work) 4280f602ec7SJarkko Lavinen { 4290f602ec7SJarkko Lavinen struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 4300f602ec7SJarkko Lavinen send_stop_work); 4310f602ec7SJarkko Lavinen struct mmc_omap_slot *slot = host->current_slot; 4320f602ec7SJarkko Lavinen struct mmc_data *data = host->stop_data; 4330f602ec7SJarkko Lavinen unsigned long tick_ns; 4340f602ec7SJarkko Lavinen 43503a16853SAxel Lin tick_ns = DIV_ROUND_UP(NSEC_PER_SEC, slot->fclk_freq); 4360f602ec7SJarkko Lavinen ndelay(8*tick_ns); 4370f602ec7SJarkko Lavinen 4380f602ec7SJarkko Lavinen mmc_omap_start_command(host, data->stop); 4390f602ec7SJarkko Lavinen } 4400f602ec7SJarkko Lavinen 441a914ded2SJuha Yrjola static void 442a914ded2SJuha Yrjola mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) 443a914ded2SJuha Yrjola { 444a914ded2SJuha Yrjola if (host->dma_in_use) 445a914ded2SJuha Yrjola mmc_omap_release_dma(host, data, data->error); 446a914ded2SJuha Yrjola 4471c6a0718SPierre Ossman host->data = NULL; 4481c6a0718SPierre Ossman host->sg_len = 0; 4491c6a0718SPierre Ossman 4501c6a0718SPierre Ossman /* NOTE: MMC layer will sometimes poll-wait CMD13 next, issuing 4511c6a0718SPierre Ossman * dozens of requests until the card finishes writing data. 4521c6a0718SPierre Ossman * It'd be cheaper to just wait till an EOFB interrupt arrives... 4531c6a0718SPierre Ossman */ 4541c6a0718SPierre Ossman 4551c6a0718SPierre Ossman if (!data->stop) { 456a914ded2SJuha Yrjola struct mmc_host *mmc; 457a914ded2SJuha Yrjola 4581c6a0718SPierre Ossman host->mrq = NULL; 459a914ded2SJuha Yrjola mmc = host->mmc; 4600807a9b5SJarkko Lavinen mmc_omap_release_slot(host->current_slot, 1); 461a914ded2SJuha Yrjola mmc_request_done(mmc, data->mrq); 4621c6a0718SPierre Ossman return; 4631c6a0718SPierre Ossman } 4641c6a0718SPierre Ossman 4650f602ec7SJarkko Lavinen host->stop_data = data; 466b01a4f1cSVenkatraman S queue_work(host->mmc_omap_wq, &host->send_stop_work); 4671c6a0718SPierre Ossman } 4681c6a0718SPierre Ossman 4691c6a0718SPierre Ossman static void 4700fb4723dSJarkko Lavinen mmc_omap_send_abort(struct mmc_omap_host *host, int maxloops) 471eb1860bcSJarkko Lavinen { 472eb1860bcSJarkko Lavinen struct mmc_omap_slot *slot = host->current_slot; 473eb1860bcSJarkko Lavinen unsigned int restarts, passes, timeout; 474eb1860bcSJarkko Lavinen u16 stat = 0; 475eb1860bcSJarkko Lavinen 476eb1860bcSJarkko Lavinen /* Sending abort takes 80 clocks. Have some extra and round up */ 47703a16853SAxel Lin timeout = DIV_ROUND_UP(120 * USEC_PER_SEC, slot->fclk_freq); 478eb1860bcSJarkko Lavinen restarts = 0; 4790fb4723dSJarkko Lavinen while (restarts < maxloops) { 480eb1860bcSJarkko Lavinen OMAP_MMC_WRITE(host, STAT, 0xFFFF); 481eb1860bcSJarkko Lavinen OMAP_MMC_WRITE(host, CMD, (3 << 12) | (1 << 7)); 482eb1860bcSJarkko Lavinen 483eb1860bcSJarkko Lavinen passes = 0; 484eb1860bcSJarkko Lavinen while (passes < timeout) { 485eb1860bcSJarkko Lavinen stat = OMAP_MMC_READ(host, STAT); 486eb1860bcSJarkko Lavinen if (stat & OMAP_MMC_STAT_END_OF_CMD) 487eb1860bcSJarkko Lavinen goto out; 488eb1860bcSJarkko Lavinen udelay(1); 489eb1860bcSJarkko Lavinen passes++; 490eb1860bcSJarkko Lavinen } 491eb1860bcSJarkko Lavinen 492eb1860bcSJarkko Lavinen restarts++; 493eb1860bcSJarkko Lavinen } 494eb1860bcSJarkko Lavinen out: 495eb1860bcSJarkko Lavinen OMAP_MMC_WRITE(host, STAT, stat); 496eb1860bcSJarkko Lavinen } 497eb1860bcSJarkko Lavinen 498eb1860bcSJarkko Lavinen static void 499a914ded2SJuha Yrjola mmc_omap_abort_xfer(struct mmc_omap_host *host, struct mmc_data *data) 500a914ded2SJuha Yrjola { 501a914ded2SJuha Yrjola if (host->dma_in_use) 502a914ded2SJuha Yrjola mmc_omap_release_dma(host, data, 1); 503a914ded2SJuha Yrjola 504a914ded2SJuha Yrjola host->data = NULL; 505a914ded2SJuha Yrjola host->sg_len = 0; 506a914ded2SJuha Yrjola 5070fb4723dSJarkko Lavinen mmc_omap_send_abort(host, 10000); 508a914ded2SJuha Yrjola } 509a914ded2SJuha Yrjola 510a914ded2SJuha Yrjola static void 5111c6a0718SPierre Ossman mmc_omap_end_of_data(struct mmc_omap_host *host, struct mmc_data *data) 5121c6a0718SPierre Ossman { 5131c6a0718SPierre Ossman unsigned long flags; 5141c6a0718SPierre Ossman int done; 5151c6a0718SPierre Ossman 5161c6a0718SPierre Ossman if (!host->dma_in_use) { 5171c6a0718SPierre Ossman mmc_omap_xfer_done(host, data); 5181c6a0718SPierre Ossman return; 5191c6a0718SPierre Ossman } 5201c6a0718SPierre Ossman done = 0; 5211c6a0718SPierre Ossman spin_lock_irqsave(&host->dma_lock, flags); 5221c6a0718SPierre Ossman if (host->dma_done) 5231c6a0718SPierre Ossman done = 1; 5241c6a0718SPierre Ossman else 5251c6a0718SPierre Ossman host->brs_received = 1; 5261c6a0718SPierre Ossman spin_unlock_irqrestore(&host->dma_lock, flags); 5271c6a0718SPierre Ossman if (done) 5281c6a0718SPierre Ossman mmc_omap_xfer_done(host, data); 5291c6a0718SPierre Ossman } 5301c6a0718SPierre Ossman 5311c6a0718SPierre Ossman static void 5321c6a0718SPierre Ossman mmc_omap_dma_done(struct mmc_omap_host *host, struct mmc_data *data) 5331c6a0718SPierre Ossman { 5341c6a0718SPierre Ossman unsigned long flags; 5351c6a0718SPierre Ossman int done; 5361c6a0718SPierre Ossman 5371c6a0718SPierre Ossman done = 0; 5381c6a0718SPierre Ossman spin_lock_irqsave(&host->dma_lock, flags); 5391c6a0718SPierre Ossman if (host->brs_received) 5401c6a0718SPierre Ossman done = 1; 5411c6a0718SPierre Ossman else 5421c6a0718SPierre Ossman host->dma_done = 1; 5431c6a0718SPierre Ossman spin_unlock_irqrestore(&host->dma_lock, flags); 5441c6a0718SPierre Ossman if (done) 5451c6a0718SPierre Ossman mmc_omap_xfer_done(host, data); 5461c6a0718SPierre Ossman } 5471c6a0718SPierre Ossman 5481c6a0718SPierre Ossman static void 5491c6a0718SPierre Ossman mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd) 5501c6a0718SPierre Ossman { 5511c6a0718SPierre Ossman host->cmd = NULL; 5521c6a0718SPierre Ossman 5530fb4723dSJarkko Lavinen del_timer(&host->cmd_abort_timer); 554eb1860bcSJarkko Lavinen 5551c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_PRESENT) { 5561c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_136) { 5571c6a0718SPierre Ossman /* response type 2 */ 5581c6a0718SPierre Ossman cmd->resp[3] = 5591c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP0) | 5601c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP1) << 16); 5611c6a0718SPierre Ossman cmd->resp[2] = 5621c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP2) | 5631c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP3) << 16); 5641c6a0718SPierre Ossman cmd->resp[1] = 5651c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP4) | 5661c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP5) << 16); 5671c6a0718SPierre Ossman cmd->resp[0] = 5681c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP6) | 5691c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP7) << 16); 5701c6a0718SPierre Ossman } else { 5711c6a0718SPierre Ossman /* response types 1, 1b, 3, 4, 5, 6 */ 5721c6a0718SPierre Ossman cmd->resp[0] = 5731c6a0718SPierre Ossman OMAP_MMC_READ(host, RSP6) | 5741c6a0718SPierre Ossman (OMAP_MMC_READ(host, RSP7) << 16); 5751c6a0718SPierre Ossman } 5761c6a0718SPierre Ossman } 5771c6a0718SPierre Ossman 57817b0429dSPierre Ossman if (host->data == NULL || cmd->error) { 579a914ded2SJuha Yrjola struct mmc_host *mmc; 580a914ded2SJuha Yrjola 581a914ded2SJuha Yrjola if (host->data != NULL) 582a914ded2SJuha Yrjola mmc_omap_abort_xfer(host, host->data); 5831c6a0718SPierre Ossman host->mrq = NULL; 584a914ded2SJuha Yrjola mmc = host->mmc; 5850807a9b5SJarkko Lavinen mmc_omap_release_slot(host->current_slot, 1); 586a914ded2SJuha Yrjola mmc_request_done(mmc, cmd->mrq); 5871c6a0718SPierre Ossman } 5881c6a0718SPierre Ossman } 5891c6a0718SPierre Ossman 590eb1860bcSJarkko Lavinen /* 591eb1860bcSJarkko Lavinen * Abort stuck command. Can occur when card is removed while it is being 592eb1860bcSJarkko Lavinen * read. 593eb1860bcSJarkko Lavinen */ 594eb1860bcSJarkko Lavinen static void mmc_omap_abort_command(struct work_struct *work) 595eb1860bcSJarkko Lavinen { 596eb1860bcSJarkko Lavinen struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 5970fb4723dSJarkko Lavinen cmd_abort_work); 5980fb4723dSJarkko Lavinen BUG_ON(!host->cmd); 599eb1860bcSJarkko Lavinen 600eb1860bcSJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "Aborting stuck command CMD%d\n", 601eb1860bcSJarkko Lavinen host->cmd->opcode); 602eb1860bcSJarkko Lavinen 6030fb4723dSJarkko Lavinen if (host->cmd->error == 0) 604eb1860bcSJarkko Lavinen host->cmd->error = -ETIMEDOUT; 6050fb4723dSJarkko Lavinen 6060fb4723dSJarkko Lavinen if (host->data == NULL) { 6070fb4723dSJarkko Lavinen struct mmc_command *cmd; 6080fb4723dSJarkko Lavinen struct mmc_host *mmc; 6090fb4723dSJarkko Lavinen 6100fb4723dSJarkko Lavinen cmd = host->cmd; 6110fb4723dSJarkko Lavinen host->cmd = NULL; 6120fb4723dSJarkko Lavinen mmc_omap_send_abort(host, 10000); 6130fb4723dSJarkko Lavinen 6140fb4723dSJarkko Lavinen host->mrq = NULL; 6150fb4723dSJarkko Lavinen mmc = host->mmc; 6160807a9b5SJarkko Lavinen mmc_omap_release_slot(host->current_slot, 1); 6170fb4723dSJarkko Lavinen mmc_request_done(mmc, cmd->mrq); 6180fb4723dSJarkko Lavinen } else 619eb1860bcSJarkko Lavinen mmc_omap_cmd_done(host, host->cmd); 6200fb4723dSJarkko Lavinen 6210fb4723dSJarkko Lavinen host->abort = 0; 6220fb4723dSJarkko Lavinen enable_irq(host->irq); 623eb1860bcSJarkko Lavinen } 624eb1860bcSJarkko Lavinen 625eb1860bcSJarkko Lavinen static void 6262ee4f620SKees Cook mmc_omap_cmd_timer(struct timer_list *t) 627eb1860bcSJarkko Lavinen { 6282ee4f620SKees Cook struct mmc_omap_host *host = from_timer(host, t, cmd_abort_timer); 6290fb4723dSJarkko Lavinen unsigned long flags; 630eb1860bcSJarkko Lavinen 6310fb4723dSJarkko Lavinen spin_lock_irqsave(&host->slot_lock, flags); 6320fb4723dSJarkko Lavinen if (host->cmd != NULL && !host->abort) { 6330fb4723dSJarkko Lavinen OMAP_MMC_WRITE(host, IE, 0); 6340fb4723dSJarkko Lavinen disable_irq(host->irq); 6350fb4723dSJarkko Lavinen host->abort = 1; 636b01a4f1cSVenkatraman S queue_work(host->mmc_omap_wq, &host->cmd_abort_work); 6370fb4723dSJarkko Lavinen } 6380fb4723dSJarkko Lavinen spin_unlock_irqrestore(&host->slot_lock, flags); 639eb1860bcSJarkko Lavinen } 640eb1860bcSJarkko Lavinen 6411c6a0718SPierre Ossman /* PIO only */ 6421c6a0718SPierre Ossman static void 6431c6a0718SPierre Ossman mmc_omap_sg_to_buf(struct mmc_omap_host *host) 6441c6a0718SPierre Ossman { 6451c6a0718SPierre Ossman struct scatterlist *sg; 6461c6a0718SPierre Ossman 6471c6a0718SPierre Ossman sg = host->data->sg + host->sg_idx; 6481c6a0718SPierre Ossman host->buffer_bytes_left = sg->length; 64945711f1aSJens Axboe host->buffer = sg_virt(sg); 6501c6a0718SPierre Ossman if (host->buffer_bytes_left > host->total_bytes_left) 6511c6a0718SPierre Ossman host->buffer_bytes_left = host->total_bytes_left; 6521c6a0718SPierre Ossman } 6531c6a0718SPierre Ossman 6540807a9b5SJarkko Lavinen static void 6552ee4f620SKees Cook mmc_omap_clk_timer(struct timer_list *t) 6560807a9b5SJarkko Lavinen { 6572ee4f620SKees Cook struct mmc_omap_host *host = from_timer(host, t, clk_timer); 6580807a9b5SJarkko Lavinen 6590807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 0); 6600807a9b5SJarkko Lavinen } 6610807a9b5SJarkko Lavinen 6621c6a0718SPierre Ossman /* PIO only */ 6631c6a0718SPierre Ossman static void 6641c6a0718SPierre Ossman mmc_omap_xfer_data(struct mmc_omap_host *host, int write) 6651c6a0718SPierre Ossman { 66675b53aeeSPaul Walmsley int n, nwords; 6671c6a0718SPierre Ossman 6681c6a0718SPierre Ossman if (host->buffer_bytes_left == 0) { 6691c6a0718SPierre Ossman host->sg_idx++; 6701c6a0718SPierre Ossman BUG_ON(host->sg_idx == host->sg_len); 6711c6a0718SPierre Ossman mmc_omap_sg_to_buf(host); 6721c6a0718SPierre Ossman } 6731c6a0718SPierre Ossman n = 64; 6741c6a0718SPierre Ossman if (n > host->buffer_bytes_left) 6751c6a0718SPierre Ossman n = host->buffer_bytes_left; 67675b53aeeSPaul Walmsley 67703a16853SAxel Lin /* Round up to handle odd number of bytes to transfer */ 67803a16853SAxel Lin nwords = DIV_ROUND_UP(n, 2); 67975b53aeeSPaul Walmsley 6801c6a0718SPierre Ossman host->buffer_bytes_left -= n; 6811c6a0718SPierre Ossman host->total_bytes_left -= n; 6821c6a0718SPierre Ossman host->data->bytes_xfered += n; 6831c6a0718SPierre Ossman 6841c6a0718SPierre Ossman if (write) { 68575b53aeeSPaul Walmsley __raw_writesw(host->virt_base + OMAP_MMC_REG(host, DATA), 68675b53aeeSPaul Walmsley host->buffer, nwords); 6871c6a0718SPierre Ossman } else { 68875b53aeeSPaul Walmsley __raw_readsw(host->virt_base + OMAP_MMC_REG(host, DATA), 68975b53aeeSPaul Walmsley host->buffer, nwords); 6901c6a0718SPierre Ossman } 69175b53aeeSPaul Walmsley 69275b53aeeSPaul Walmsley host->buffer += nwords; 6931c6a0718SPierre Ossman } 6941c6a0718SPierre Ossman 69575d569d3SVenkatraman S #ifdef CONFIG_MMC_DEBUG 69675d569d3SVenkatraman S static void mmc_omap_report_irq(struct mmc_omap_host *host, u16 status) 6971c6a0718SPierre Ossman { 6981c6a0718SPierre Ossman static const char *mmc_omap_status_bits[] = { 6991c6a0718SPierre Ossman "EOC", "CD", "CB", "BRS", "EOFB", "DTO", "DCRC", "CTO", 7001c6a0718SPierre Ossman "CCRC", "CRW", "AF", "AE", "OCRB", "CIRQ", "CERR" 7011c6a0718SPierre Ossman }; 70275d569d3SVenkatraman S int i; 70375d569d3SVenkatraman S char res[64], *buf = res; 70475d569d3SVenkatraman S 70575d569d3SVenkatraman S buf += sprintf(buf, "MMC IRQ 0x%x:", status); 7061c6a0718SPierre Ossman 7071c6a0718SPierre Ossman for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++) 70875d569d3SVenkatraman S if (status & (1 << i)) 70975d569d3SVenkatraman S buf += sprintf(buf, " %s", mmc_omap_status_bits[i]); 71075d569d3SVenkatraman S dev_vdbg(mmc_dev(host->mmc), "%s\n", res); 7111c6a0718SPierre Ossman } 71275d569d3SVenkatraman S #else 71375d569d3SVenkatraman S static void mmc_omap_report_irq(struct mmc_omap_host *host, u16 status) 71475d569d3SVenkatraman S { 7151c6a0718SPierre Ossman } 71675d569d3SVenkatraman S #endif 71775d569d3SVenkatraman S 7181c6a0718SPierre Ossman 7191c6a0718SPierre Ossman static irqreturn_t mmc_omap_irq(int irq, void *dev_id) 7201c6a0718SPierre Ossman { 7211c6a0718SPierre Ossman struct mmc_omap_host * host = (struct mmc_omap_host *)dev_id; 7221c6a0718SPierre Ossman u16 status; 7231c6a0718SPierre Ossman int end_command; 7241c6a0718SPierre Ossman int end_transfer; 7252a50b888SJuha Yrjola int transfer_error, cmd_error; 7261c6a0718SPierre Ossman 7271c6a0718SPierre Ossman if (host->cmd == NULL && host->data == NULL) { 7281c6a0718SPierre Ossman status = OMAP_MMC_READ(host, STAT); 7292a50b888SJuha Yrjola dev_info(mmc_dev(host->slots[0]->mmc), 7302a50b888SJuha Yrjola "Spurious IRQ 0x%04x\n", status); 7311c6a0718SPierre Ossman if (status != 0) { 7321c6a0718SPierre Ossman OMAP_MMC_WRITE(host, STAT, status); 7331c6a0718SPierre Ossman OMAP_MMC_WRITE(host, IE, 0); 7341c6a0718SPierre Ossman } 7351c6a0718SPierre Ossman return IRQ_HANDLED; 7361c6a0718SPierre Ossman } 7371c6a0718SPierre Ossman 7381c6a0718SPierre Ossman end_command = 0; 7391c6a0718SPierre Ossman end_transfer = 0; 7401c6a0718SPierre Ossman transfer_error = 0; 7412a50b888SJuha Yrjola cmd_error = 0; 7421c6a0718SPierre Ossman 7431c6a0718SPierre Ossman while ((status = OMAP_MMC_READ(host, STAT)) != 0) { 7442a50b888SJuha Yrjola int cmd; 7452a50b888SJuha Yrjola 7461c6a0718SPierre Ossman OMAP_MMC_WRITE(host, STAT, status); 7472a50b888SJuha Yrjola if (host->cmd != NULL) 7482a50b888SJuha Yrjola cmd = host->cmd->opcode; 7492a50b888SJuha Yrjola else 7502a50b888SJuha Yrjola cmd = -1; 7511c6a0718SPierre Ossman dev_dbg(mmc_dev(host->mmc), "MMC IRQ %04x (CMD %d): ", 7522a50b888SJuha Yrjola status, cmd); 75375d569d3SVenkatraman S mmc_omap_report_irq(host, status); 75475d569d3SVenkatraman S 7551c6a0718SPierre Ossman if (host->total_bytes_left) { 7561c6a0718SPierre Ossman if ((status & OMAP_MMC_STAT_A_FULL) || 7571c6a0718SPierre Ossman (status & OMAP_MMC_STAT_END_OF_DATA)) 7581c6a0718SPierre Ossman mmc_omap_xfer_data(host, 0); 7591c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_A_EMPTY) 7601c6a0718SPierre Ossman mmc_omap_xfer_data(host, 1); 7611c6a0718SPierre Ossman } 7621c6a0718SPierre Ossman 7632a50b888SJuha Yrjola if (status & OMAP_MMC_STAT_END_OF_DATA) 7641c6a0718SPierre Ossman end_transfer = 1; 7651c6a0718SPierre Ossman 7661c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_DATA_TOUT) { 7672a50b888SJuha Yrjola dev_dbg(mmc_dev(host->mmc), "data timeout (CMD%d)\n", 7682a50b888SJuha Yrjola cmd); 7691c6a0718SPierre Ossman if (host->data) { 77017b0429dSPierre Ossman host->data->error = -ETIMEDOUT; 7711c6a0718SPierre Ossman transfer_error = 1; 7721c6a0718SPierre Ossman } 7731c6a0718SPierre Ossman } 7741c6a0718SPierre Ossman 7751c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_DATA_CRC) { 7761c6a0718SPierre Ossman if (host->data) { 77717b0429dSPierre Ossman host->data->error = -EILSEQ; 7781c6a0718SPierre Ossman dev_dbg(mmc_dev(host->mmc), 7791c6a0718SPierre Ossman "data CRC error, bytes left %d\n", 7801c6a0718SPierre Ossman host->total_bytes_left); 7811c6a0718SPierre Ossman transfer_error = 1; 7821c6a0718SPierre Ossman } else { 7831c6a0718SPierre Ossman dev_dbg(mmc_dev(host->mmc), "data CRC error\n"); 7841c6a0718SPierre Ossman } 7851c6a0718SPierre Ossman } 7861c6a0718SPierre Ossman 7871c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_CMD_TOUT) { 7881c6a0718SPierre Ossman /* Timeouts are routine with some commands */ 7891c6a0718SPierre Ossman if (host->cmd) { 790abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = 791abfbe5f7SJuha Yrjola host->current_slot; 7922a50b888SJuha Yrjola if (slot == NULL || 7932a50b888SJuha Yrjola !mmc_omap_cover_is_open(slot)) 7941c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), 7952a50b888SJuha Yrjola "command timeout (CMD%d)\n", 7962a50b888SJuha Yrjola cmd); 79717b0429dSPierre Ossman host->cmd->error = -ETIMEDOUT; 7981c6a0718SPierre Ossman end_command = 1; 7992a50b888SJuha Yrjola cmd_error = 1; 8001c6a0718SPierre Ossman } 8011c6a0718SPierre Ossman } 8021c6a0718SPierre Ossman 8031c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_CMD_CRC) { 8041c6a0718SPierre Ossman if (host->cmd) { 8051c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), 8061c6a0718SPierre Ossman "command CRC error (CMD%d, arg 0x%08x)\n", 8072a50b888SJuha Yrjola cmd, host->cmd->arg); 80817b0429dSPierre Ossman host->cmd->error = -EILSEQ; 8091c6a0718SPierre Ossman end_command = 1; 8102a50b888SJuha Yrjola cmd_error = 1; 8111c6a0718SPierre Ossman } else 8121c6a0718SPierre Ossman dev_err(mmc_dev(host->mmc), 8131c6a0718SPierre Ossman "command CRC error without cmd?\n"); 8141c6a0718SPierre Ossman } 8151c6a0718SPierre Ossman 8161c6a0718SPierre Ossman if (status & OMAP_MMC_STAT_CARD_ERR) { 8170107a4b3SRagner Magalhaes dev_dbg(mmc_dev(host->mmc), 8180107a4b3SRagner Magalhaes "ignoring card status error (CMD%d)\n", 8192a50b888SJuha Yrjola cmd); 8201c6a0718SPierre Ossman end_command = 1; 8211c6a0718SPierre Ossman } 8221c6a0718SPierre Ossman 8231c6a0718SPierre Ossman /* 8241c6a0718SPierre Ossman * NOTE: On 1610 the END_OF_CMD may come too early when 8251c6a0718SPierre Ossman * starting a write 8261c6a0718SPierre Ossman */ 8271c6a0718SPierre Ossman if ((status & OMAP_MMC_STAT_END_OF_CMD) && 8281c6a0718SPierre Ossman (!(status & OMAP_MMC_STAT_A_EMPTY))) { 8291c6a0718SPierre Ossman end_command = 1; 8301c6a0718SPierre Ossman } 8311c6a0718SPierre Ossman } 8321c6a0718SPierre Ossman 8330fb4723dSJarkko Lavinen if (cmd_error && host->data) { 8340fb4723dSJarkko Lavinen del_timer(&host->cmd_abort_timer); 8350fb4723dSJarkko Lavinen host->abort = 1; 8360fb4723dSJarkko Lavinen OMAP_MMC_WRITE(host, IE, 0); 837e749c6f2SBen Nizette disable_irq_nosync(host->irq); 838b01a4f1cSVenkatraman S queue_work(host->mmc_omap_wq, &host->cmd_abort_work); 8390fb4723dSJarkko Lavinen return IRQ_HANDLED; 8400fb4723dSJarkko Lavinen } 8410fb4723dSJarkko Lavinen 842f6947514SMichael Buesch if (end_command && host->cmd) 8431c6a0718SPierre Ossman mmc_omap_cmd_done(host, host->cmd); 8442a50b888SJuha Yrjola if (host->data != NULL) { 8451c6a0718SPierre Ossman if (transfer_error) 8461c6a0718SPierre Ossman mmc_omap_xfer_done(host, host->data); 8471c6a0718SPierre Ossman else if (end_transfer) 8481c6a0718SPierre Ossman mmc_omap_end_of_data(host, host->data); 8492a50b888SJuha Yrjola } 8501c6a0718SPierre Ossman 8511c6a0718SPierre Ossman return IRQ_HANDLED; 8521c6a0718SPierre Ossman } 8531c6a0718SPierre Ossman 8547584d276SJarkko Lavinen void omap_mmc_notify_cover_event(struct device *dev, int num, int is_closed) 8555a0f3f1fSJuha Yrjola { 8567584d276SJarkko Lavinen int cover_open; 8575a0f3f1fSJuha Yrjola struct mmc_omap_host *host = dev_get_drvdata(dev); 8587584d276SJarkko Lavinen struct mmc_omap_slot *slot = host->slots[num]; 8595a0f3f1fSJuha Yrjola 8607584d276SJarkko Lavinen BUG_ON(num >= host->nr_slots); 8615a0f3f1fSJuha Yrjola 8625a0f3f1fSJuha Yrjola /* Other subsystems can call in here before we're initialised. */ 8637584d276SJarkko Lavinen if (host->nr_slots == 0 || !host->slots[num]) 8645a0f3f1fSJuha Yrjola return; 8655a0f3f1fSJuha Yrjola 8665a0f3f1fSJuha Yrjola cover_open = mmc_omap_cover_is_open(slot); 8675a0f3f1fSJuha Yrjola if (cover_open != slot->cover_open) { 8685a0f3f1fSJuha Yrjola slot->cover_open = cover_open; 8697584d276SJarkko Lavinen sysfs_notify(&slot->mmc->class_dev.kobj, NULL, "cover_switch"); 8705a0f3f1fSJuha Yrjola } 8717584d276SJarkko Lavinen 8727584d276SJarkko Lavinen tasklet_hi_schedule(&slot->cover_tasklet); 8737584d276SJarkko Lavinen } 8747584d276SJarkko Lavinen 8752ee4f620SKees Cook static void mmc_omap_cover_timer(struct timer_list *t) 8767584d276SJarkko Lavinen { 8772ee4f620SKees Cook struct mmc_omap_slot *slot = from_timer(slot, t, cover_timer); 8787584d276SJarkko Lavinen tasklet_schedule(&slot->cover_tasklet); 8797584d276SJarkko Lavinen } 8807584d276SJarkko Lavinen 8810f5a7cb6SEmil Renner Berthing static void mmc_omap_cover_handler(struct tasklet_struct *t) 8827584d276SJarkko Lavinen { 8830f5a7cb6SEmil Renner Berthing struct mmc_omap_slot *slot = from_tasklet(slot, t, cover_tasklet); 8847584d276SJarkko Lavinen int cover_open = mmc_omap_cover_is_open(slot); 8857584d276SJarkko Lavinen 8867584d276SJarkko Lavinen mmc_detect_change(slot->mmc, 0); 8877584d276SJarkko Lavinen if (!cover_open) 8887584d276SJarkko Lavinen return; 8897584d276SJarkko Lavinen 8907584d276SJarkko Lavinen /* 8917584d276SJarkko Lavinen * If no card is inserted, we postpone polling until 8927584d276SJarkko Lavinen * the cover has been closed. 8937584d276SJarkko Lavinen */ 894136b0a47SUlf Hansson if (slot->mmc->card == NULL) 8957584d276SJarkko Lavinen return; 8967584d276SJarkko Lavinen 8977584d276SJarkko Lavinen mod_timer(&slot->cover_timer, 8987584d276SJarkko Lavinen jiffies + msecs_to_jiffies(OMAP_MMC_COVER_POLL_DELAY)); 8995a0f3f1fSJuha Yrjola } 9005a0f3f1fSJuha Yrjola 9013451c067SRussell King static void mmc_omap_dma_callback(void *priv) 9023451c067SRussell King { 9033451c067SRussell King struct mmc_omap_host *host = priv; 9043451c067SRussell King struct mmc_data *data = host->data; 9053451c067SRussell King 9063451c067SRussell King /* If we got to the end of DMA, assume everything went well */ 9073451c067SRussell King data->bytes_xfered += data->blocks * data->blksz; 9083451c067SRussell King 9093451c067SRussell King mmc_omap_dma_done(host, data); 9103451c067SRussell King } 9113451c067SRussell King 9121c6a0718SPierre Ossman static inline void set_cmd_timeout(struct mmc_omap_host *host, struct mmc_request *req) 9131c6a0718SPierre Ossman { 9141c6a0718SPierre Ossman u16 reg; 9151c6a0718SPierre Ossman 9161c6a0718SPierre Ossman reg = OMAP_MMC_READ(host, SDIO); 9171c6a0718SPierre Ossman reg &= ~(1 << 5); 9181c6a0718SPierre Ossman OMAP_MMC_WRITE(host, SDIO, reg); 9191c6a0718SPierre Ossman /* Set maximum timeout */ 920a6327b5eSAaro Koskinen OMAP_MMC_WRITE(host, CTO, 0xfd); 9211c6a0718SPierre Ossman } 9221c6a0718SPierre Ossman 9231c6a0718SPierre Ossman static inline void set_data_timeout(struct mmc_omap_host *host, struct mmc_request *req) 9241c6a0718SPierre Ossman { 925b8f9f0e9SJuha Yrjola unsigned int timeout, cycle_ns; 9261c6a0718SPierre Ossman u16 reg; 9271c6a0718SPierre Ossman 928b8f9f0e9SJuha Yrjola cycle_ns = 1000000000 / host->current_slot->fclk_freq; 929b8f9f0e9SJuha Yrjola timeout = req->data->timeout_ns / cycle_ns; 930b8f9f0e9SJuha Yrjola timeout += req->data->timeout_clks; 9311c6a0718SPierre Ossman 9321c6a0718SPierre Ossman /* Check if we need to use timeout multiplier register */ 9331c6a0718SPierre Ossman reg = OMAP_MMC_READ(host, SDIO); 9341c6a0718SPierre Ossman if (timeout > 0xffff) { 9351c6a0718SPierre Ossman reg |= (1 << 5); 9361c6a0718SPierre Ossman timeout /= 1024; 9371c6a0718SPierre Ossman } else 9381c6a0718SPierre Ossman reg &= ~(1 << 5); 9391c6a0718SPierre Ossman OMAP_MMC_WRITE(host, SDIO, reg); 9401c6a0718SPierre Ossman OMAP_MMC_WRITE(host, DTO, timeout); 9411c6a0718SPierre Ossman } 9421c6a0718SPierre Ossman 9431c6a0718SPierre Ossman static void 9441c6a0718SPierre Ossman mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) 9451c6a0718SPierre Ossman { 9461c6a0718SPierre Ossman struct mmc_data *data = req->data; 947a6c668fbSJarkko Nikula int i, use_dma = 1, block_size; 9488292adc6SFabian Frederick struct scatterlist *sg; 9491c6a0718SPierre Ossman unsigned sg_len; 9501c6a0718SPierre Ossman 9511c6a0718SPierre Ossman host->data = data; 9521c6a0718SPierre Ossman if (data == NULL) { 9531c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BLEN, 0); 9541c6a0718SPierre Ossman OMAP_MMC_WRITE(host, NBLK, 0); 9551c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BUF, 0); 9561c6a0718SPierre Ossman host->dma_in_use = 0; 9571c6a0718SPierre Ossman set_cmd_timeout(host, req); 9581c6a0718SPierre Ossman return; 9591c6a0718SPierre Ossman } 9601c6a0718SPierre Ossman 9611c6a0718SPierre Ossman block_size = data->blksz; 9621c6a0718SPierre Ossman 9631c6a0718SPierre Ossman OMAP_MMC_WRITE(host, NBLK, data->blocks - 1); 9641c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BLEN, block_size - 1); 9651c6a0718SPierre Ossman set_data_timeout(host, req); 9661c6a0718SPierre Ossman 9671c6a0718SPierre Ossman /* cope with calling layer confusion; it issues "single 9681c6a0718SPierre Ossman * block" writes using multi-block scatterlists. 9691c6a0718SPierre Ossman */ 9701c6a0718SPierre Ossman sg_len = (data->blocks == 1) ? 1 : data->sg_len; 9711c6a0718SPierre Ossman 9721c6a0718SPierre Ossman /* Only do DMA for entire blocks */ 9738292adc6SFabian Frederick for_each_sg(data->sg, sg, sg_len, i) { 9748292adc6SFabian Frederick if ((sg->length % block_size) != 0) { 9751c6a0718SPierre Ossman use_dma = 0; 9761c6a0718SPierre Ossman break; 9771c6a0718SPierre Ossman } 9781c6a0718SPierre Ossman } 9791c6a0718SPierre Ossman 9801c6a0718SPierre Ossman host->sg_idx = 0; 9811c6a0718SPierre Ossman if (use_dma) { 9823451c067SRussell King enum dma_data_direction dma_data_dir; 9833451c067SRussell King struct dma_async_tx_descriptor *tx; 9843451c067SRussell King struct dma_chan *c; 9853451c067SRussell King u32 burst, *bp; 9863451c067SRussell King u16 buf; 9873451c067SRussell King 9883451c067SRussell King /* 9893451c067SRussell King * FIFO is 16x2 bytes on 15xx, and 32x2 bytes on 16xx 9903451c067SRussell King * and 24xx. Use 16 or 32 word frames when the 9913451c067SRussell King * blocksize is at least that large. Blocksize is 9923451c067SRussell King * usually 512 bytes; but not for some SD reads. 9933451c067SRussell King */ 99453db20d1STony Lindgren burst = mmc_omap15xx() ? 32 : 64; 9953451c067SRussell King if (burst > data->blksz) 9963451c067SRussell King burst = data->blksz; 9973451c067SRussell King 9983451c067SRussell King burst >>= 1; 9993451c067SRussell King 10003451c067SRussell King if (data->flags & MMC_DATA_WRITE) { 10013451c067SRussell King c = host->dma_tx; 10023451c067SRussell King bp = &host->dma_tx_burst; 10033451c067SRussell King buf = 0x0f80 | (burst - 1) << 0; 10043451c067SRussell King dma_data_dir = DMA_TO_DEVICE; 10053451c067SRussell King } else { 10063451c067SRussell King c = host->dma_rx; 10073451c067SRussell King bp = &host->dma_rx_burst; 10083451c067SRussell King buf = 0x800f | (burst - 1) << 8; 10093451c067SRussell King dma_data_dir = DMA_FROM_DEVICE; 10103451c067SRussell King } 10113451c067SRussell King 10123451c067SRussell King if (!c) 10133451c067SRussell King goto use_pio; 10143451c067SRussell King 10153451c067SRussell King /* Only reconfigure if we have a different burst size */ 10163451c067SRussell King if (*bp != burst) { 1017df804d5eSPeter Ujfalusi struct dma_slave_config cfg = { 1018df804d5eSPeter Ujfalusi .src_addr = host->phys_base + 1019df804d5eSPeter Ujfalusi OMAP_MMC_REG(host, DATA), 1020df804d5eSPeter Ujfalusi .dst_addr = host->phys_base + 1021df804d5eSPeter Ujfalusi OMAP_MMC_REG(host, DATA), 1022df804d5eSPeter Ujfalusi .src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES, 1023df804d5eSPeter Ujfalusi .dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES, 1024df804d5eSPeter Ujfalusi .src_maxburst = burst, 1025df804d5eSPeter Ujfalusi .dst_maxburst = burst, 1026df804d5eSPeter Ujfalusi }; 10273451c067SRussell King 10283451c067SRussell King if (dmaengine_slave_config(c, &cfg)) 10293451c067SRussell King goto use_pio; 10303451c067SRussell King 10313451c067SRussell King *bp = burst; 10323451c067SRussell King } 10333451c067SRussell King 10343451c067SRussell King host->sg_len = dma_map_sg(c->device->dev, data->sg, sg_len, 10353451c067SRussell King dma_data_dir); 10363451c067SRussell King if (host->sg_len == 0) 10373451c067SRussell King goto use_pio; 10383451c067SRussell King 10393451c067SRussell King tx = dmaengine_prep_slave_sg(c, data->sg, host->sg_len, 10403451c067SRussell King data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM, 10413451c067SRussell King DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 10423451c067SRussell King if (!tx) 10433451c067SRussell King goto use_pio; 10443451c067SRussell King 10453451c067SRussell King OMAP_MMC_WRITE(host, BUF, buf); 10463451c067SRussell King 10473451c067SRussell King tx->callback = mmc_omap_dma_callback; 10483451c067SRussell King tx->callback_param = host; 10493451c067SRussell King dmaengine_submit(tx); 10503451c067SRussell King host->brs_received = 0; 10513451c067SRussell King host->dma_done = 0; 10523451c067SRussell King host->dma_in_use = 1; 10533451c067SRussell King return; 10543451c067SRussell King } 10553451c067SRussell King use_pio: 10561c6a0718SPierre Ossman 10571c6a0718SPierre Ossman /* Revert to PIO? */ 10581c6a0718SPierre Ossman OMAP_MMC_WRITE(host, BUF, 0x1f1f); 10591c6a0718SPierre Ossman host->total_bytes_left = data->blocks * block_size; 10601c6a0718SPierre Ossman host->sg_len = sg_len; 10611c6a0718SPierre Ossman mmc_omap_sg_to_buf(host); 10621c6a0718SPierre Ossman host->dma_in_use = 0; 10631c6a0718SPierre Ossman } 10641c6a0718SPierre Ossman 1065abfbe5f7SJuha Yrjola static void mmc_omap_start_request(struct mmc_omap_host *host, 1066abfbe5f7SJuha Yrjola struct mmc_request *req) 10671c6a0718SPierre Ossman { 1068abfbe5f7SJuha Yrjola BUG_ON(host->mrq != NULL); 10691c6a0718SPierre Ossman 10701c6a0718SPierre Ossman host->mrq = req; 10711c6a0718SPierre Ossman 10721c6a0718SPierre Ossman /* only touch fifo AFTER the controller readies it */ 10731c6a0718SPierre Ossman mmc_omap_prepare_data(host, req); 10741c6a0718SPierre Ossman mmc_omap_start_command(host, req->cmd); 10753451c067SRussell King if (host->dma_in_use) { 10763451c067SRussell King struct dma_chan *c = host->data->flags & MMC_DATA_WRITE ? 10773451c067SRussell King host->dma_tx : host->dma_rx; 10783451c067SRussell King 10793451c067SRussell King dma_async_issue_pending(c); 10803451c067SRussell King } 1081abfbe5f7SJuha Yrjola } 1082abfbe5f7SJuha Yrjola 1083abfbe5f7SJuha Yrjola static void mmc_omap_request(struct mmc_host *mmc, struct mmc_request *req) 1084abfbe5f7SJuha Yrjola { 1085abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 1086abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 1087abfbe5f7SJuha Yrjola unsigned long flags; 1088abfbe5f7SJuha Yrjola 1089abfbe5f7SJuha Yrjola spin_lock_irqsave(&host->slot_lock, flags); 1090abfbe5f7SJuha Yrjola if (host->mmc != NULL) { 1091abfbe5f7SJuha Yrjola BUG_ON(slot->mrq != NULL); 1092abfbe5f7SJuha Yrjola slot->mrq = req; 1093abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 1094abfbe5f7SJuha Yrjola return; 1095abfbe5f7SJuha Yrjola } else 1096abfbe5f7SJuha Yrjola host->mmc = mmc; 1097abfbe5f7SJuha Yrjola spin_unlock_irqrestore(&host->slot_lock, flags); 1098abfbe5f7SJuha Yrjola mmc_omap_select_slot(slot, 1); 1099abfbe5f7SJuha Yrjola mmc_omap_start_request(host, req); 11001c6a0718SPierre Ossman } 11011c6a0718SPierre Ossman 110265b5b6e5SJuha Yrjola static void mmc_omap_set_power(struct mmc_omap_slot *slot, int power_on, 110365b5b6e5SJuha Yrjola int vdd) 11041c6a0718SPierre Ossman { 110565b5b6e5SJuha Yrjola struct mmc_omap_host *host; 11061c6a0718SPierre Ossman 110765b5b6e5SJuha Yrjola host = slot->host; 110865b5b6e5SJuha Yrjola 110965b5b6e5SJuha Yrjola if (slot->pdata->set_power != NULL) 111065b5b6e5SJuha Yrjola slot->pdata->set_power(mmc_dev(slot->mmc), slot->id, power_on, 111165b5b6e5SJuha Yrjola vdd); 111253db20d1STony Lindgren if (mmc_omap2()) { 111365b5b6e5SJuha Yrjola u16 w; 111465b5b6e5SJuha Yrjola 111565b5b6e5SJuha Yrjola if (power_on) { 111665b5b6e5SJuha Yrjola w = OMAP_MMC_READ(host, CON); 111765b5b6e5SJuha Yrjola OMAP_MMC_WRITE(host, CON, w | (1 << 11)); 11181c6a0718SPierre Ossman } else { 111965b5b6e5SJuha Yrjola w = OMAP_MMC_READ(host, CON); 112065b5b6e5SJuha Yrjola OMAP_MMC_WRITE(host, CON, w & ~(1 << 11)); 112165b5b6e5SJuha Yrjola } 11221c6a0718SPierre Ossman } 11231c6a0718SPierre Ossman } 11241c6a0718SPierre Ossman 1125d3af5abeSTony Lindgren static int mmc_omap_calc_divisor(struct mmc_host *mmc, struct mmc_ios *ios) 11261c6a0718SPierre Ossman { 1127abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 1128abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 1129d3af5abeSTony Lindgren int func_clk_rate = clk_get_rate(host->fclk); 11301c6a0718SPierre Ossman int dsor; 11311c6a0718SPierre Ossman 11321c6a0718SPierre Ossman if (ios->clock == 0) 1133d3af5abeSTony Lindgren return 0; 11341c6a0718SPierre Ossman 1135d3af5abeSTony Lindgren dsor = func_clk_rate / ios->clock; 11361c6a0718SPierre Ossman if (dsor < 1) 11371c6a0718SPierre Ossman dsor = 1; 11381c6a0718SPierre Ossman 1139d3af5abeSTony Lindgren if (func_clk_rate / dsor > ios->clock) 11401c6a0718SPierre Ossman dsor++; 11411c6a0718SPierre Ossman 11421c6a0718SPierre Ossman if (dsor > 250) 11431c6a0718SPierre Ossman dsor = 250; 11441c6a0718SPierre Ossman 1145abfbe5f7SJuha Yrjola slot->fclk_freq = func_clk_rate / dsor; 1146abfbe5f7SJuha Yrjola 11471c6a0718SPierre Ossman if (ios->bus_width == MMC_BUS_WIDTH_4) 11481c6a0718SPierre Ossman dsor |= 1 << 15; 1149d3af5abeSTony Lindgren 1150d3af5abeSTony Lindgren return dsor; 11511c6a0718SPierre Ossman } 11521c6a0718SPierre Ossman 1153d3af5abeSTony Lindgren static void mmc_omap_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1154d3af5abeSTony Lindgren { 1155abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = mmc_priv(mmc); 1156abfbe5f7SJuha Yrjola struct mmc_omap_host *host = slot->host; 1157abfbe5f7SJuha Yrjola int i, dsor; 1158e8cde625SAaro Koskinen int clk_enabled, init_stream; 115965b5b6e5SJuha Yrjola 116065b5b6e5SJuha Yrjola mmc_omap_select_slot(slot, 0); 116165b5b6e5SJuha Yrjola 11620807a9b5SJarkko Lavinen dsor = mmc_omap_calc_divisor(mmc, ios); 11630807a9b5SJarkko Lavinen 116465b5b6e5SJuha Yrjola if (ios->vdd != slot->vdd) 116565b5b6e5SJuha Yrjola slot->vdd = ios->vdd; 1166d3af5abeSTony Lindgren 11670807a9b5SJarkko Lavinen clk_enabled = 0; 1168e8cde625SAaro Koskinen init_stream = 0; 11691c6a0718SPierre Ossman switch (ios->power_mode) { 11701c6a0718SPierre Ossman case MMC_POWER_OFF: 117165b5b6e5SJuha Yrjola mmc_omap_set_power(slot, 0, ios->vdd); 11721c6a0718SPierre Ossman break; 11731c6a0718SPierre Ossman case MMC_POWER_UP: 117446a6730eSTony Lindgren /* Cannot touch dsor yet, just power up MMC */ 117565b5b6e5SJuha Yrjola mmc_omap_set_power(slot, 1, ios->vdd); 1176e8cde625SAaro Koskinen slot->power_mode = ios->power_mode; 117765b5b6e5SJuha Yrjola goto exit; 117846a6730eSTony Lindgren case MMC_POWER_ON: 11790807a9b5SJarkko Lavinen mmc_omap_fclk_enable(host, 1); 11800807a9b5SJarkko Lavinen clk_enabled = 1; 11811c6a0718SPierre Ossman dsor |= 1 << 11; 1182e8cde625SAaro Koskinen if (slot->power_mode != MMC_POWER_ON) 1183e8cde625SAaro Koskinen init_stream = 1; 11841c6a0718SPierre Ossman break; 11851c6a0718SPierre Ossman } 1186e8cde625SAaro Koskinen slot->power_mode = ios->power_mode; 11871c6a0718SPierre Ossman 118865b5b6e5SJuha Yrjola if (slot->bus_mode != ios->bus_mode) { 118965b5b6e5SJuha Yrjola if (slot->pdata->set_bus_mode != NULL) 119065b5b6e5SJuha Yrjola slot->pdata->set_bus_mode(mmc_dev(mmc), slot->id, 119165b5b6e5SJuha Yrjola ios->bus_mode); 119265b5b6e5SJuha Yrjola slot->bus_mode = ios->bus_mode; 119365b5b6e5SJuha Yrjola } 11941c6a0718SPierre Ossman 11951c6a0718SPierre Ossman /* On insanely high arm_per frequencies something sometimes 11961c6a0718SPierre Ossman * goes somehow out of sync, and the POW bit is not being set, 11971c6a0718SPierre Ossman * which results in the while loop below getting stuck. 11981c6a0718SPierre Ossman * Writing to the CON register twice seems to do the trick. */ 11991c6a0718SPierre Ossman for (i = 0; i < 2; i++) 12001c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CON, dsor); 120165b5b6e5SJuha Yrjola slot->saved_con = dsor; 1202e8cde625SAaro Koskinen if (init_stream) { 12039d7c6eeeSJarkko Lavinen /* worst case at 400kHz, 80 cycles makes 200 microsecs */ 12049d7c6eeeSJarkko Lavinen int usecs = 250; 12059d7c6eeeSJarkko Lavinen 12061c6a0718SPierre Ossman /* Send clock cycles, poll completion */ 12071c6a0718SPierre Ossman OMAP_MMC_WRITE(host, IE, 0); 12081c6a0718SPierre Ossman OMAP_MMC_WRITE(host, STAT, 0xffff); 12091c6a0718SPierre Ossman OMAP_MMC_WRITE(host, CMD, 1 << 7); 12109d7c6eeeSJarkko Lavinen while (usecs > 0 && (OMAP_MMC_READ(host, STAT) & 1) == 0) { 12119d7c6eeeSJarkko Lavinen udelay(1); 12129d7c6eeeSJarkko Lavinen usecs--; 12139d7c6eeeSJarkko Lavinen } 12141c6a0718SPierre Ossman OMAP_MMC_WRITE(host, STAT, 1); 12151c6a0718SPierre Ossman } 121665b5b6e5SJuha Yrjola 121765b5b6e5SJuha Yrjola exit: 12180807a9b5SJarkko Lavinen mmc_omap_release_slot(slot, clk_enabled); 12191c6a0718SPierre Ossman } 12201c6a0718SPierre Ossman 12211c6a0718SPierre Ossman static const struct mmc_host_ops mmc_omap_ops = { 12221c6a0718SPierre Ossman .request = mmc_omap_request, 12231c6a0718SPierre Ossman .set_ios = mmc_omap_set_ios, 12241c6a0718SPierre Ossman }; 12251c6a0718SPierre Ossman 1226c3be1efdSBill Pemberton static int mmc_omap_new_slot(struct mmc_omap_host *host, int id) 1227abfbe5f7SJuha Yrjola { 1228abfbe5f7SJuha Yrjola struct mmc_omap_slot *slot = NULL; 1229abfbe5f7SJuha Yrjola struct mmc_host *mmc; 1230abfbe5f7SJuha Yrjola int r; 1231abfbe5f7SJuha Yrjola 1232abfbe5f7SJuha Yrjola mmc = mmc_alloc_host(sizeof(struct mmc_omap_slot), host->dev); 1233abfbe5f7SJuha Yrjola if (mmc == NULL) 1234abfbe5f7SJuha Yrjola return -ENOMEM; 1235abfbe5f7SJuha Yrjola 1236abfbe5f7SJuha Yrjola slot = mmc_priv(mmc); 1237abfbe5f7SJuha Yrjola slot->host = host; 1238abfbe5f7SJuha Yrjola slot->mmc = mmc; 1239abfbe5f7SJuha Yrjola slot->id = id; 1240e8cde625SAaro Koskinen slot->power_mode = MMC_POWER_UNDEFINED; 1241abfbe5f7SJuha Yrjola slot->pdata = &host->pdata->slots[id]; 1242abfbe5f7SJuha Yrjola 1243abfbe5f7SJuha Yrjola host->slots[id] = slot; 1244abfbe5f7SJuha Yrjola 124523af6039SPierre Ossman mmc->caps = 0; 124690c62bf0STony Lindgren if (host->pdata->slots[id].wires >= 4) 12471be64c79SUlf Hansson mmc->caps |= MMC_CAP_4_BIT_DATA; 1248abfbe5f7SJuha Yrjola 1249abfbe5f7SJuha Yrjola mmc->ops = &mmc_omap_ops; 1250abfbe5f7SJuha Yrjola mmc->f_min = 400000; 1251abfbe5f7SJuha Yrjola 125253db20d1STony Lindgren if (mmc_omap2()) 1253abfbe5f7SJuha Yrjola mmc->f_max = 48000000; 1254abfbe5f7SJuha Yrjola else 1255abfbe5f7SJuha Yrjola mmc->f_max = 24000000; 1256abfbe5f7SJuha Yrjola if (host->pdata->max_freq) 1257abfbe5f7SJuha Yrjola mmc->f_max = min(host->pdata->max_freq, mmc->f_max); 1258abfbe5f7SJuha Yrjola mmc->ocr_avail = slot->pdata->ocr_mask; 1259abfbe5f7SJuha Yrjola 1260abfbe5f7SJuha Yrjola /* Use scatterlist DMA to reduce per-transfer costs. 1261abfbe5f7SJuha Yrjola * NOTE max_seg_size assumption that small blocks aren't 1262abfbe5f7SJuha Yrjola * normally used (except e.g. for reading SD registers). 1263abfbe5f7SJuha Yrjola */ 1264a36274e0SMartin K. Petersen mmc->max_segs = 32; 1265abfbe5f7SJuha Yrjola mmc->max_blk_size = 2048; /* BLEN is 11 bits (+1) */ 1266abfbe5f7SJuha Yrjola mmc->max_blk_count = 2048; /* NBLK is 11 bits (+1) */ 1267abfbe5f7SJuha Yrjola mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1268abfbe5f7SJuha Yrjola mmc->max_seg_size = mmc->max_req_size; 1269abfbe5f7SJuha Yrjola 12700e5c93e0SJarkko Nikula if (slot->pdata->get_cover_state != NULL) { 12712ee4f620SKees Cook timer_setup(&slot->cover_timer, mmc_omap_cover_timer, 0); 12720f5a7cb6SEmil Renner Berthing tasklet_setup(&slot->cover_tasklet, mmc_omap_cover_handler); 12730e5c93e0SJarkko Nikula } 12740e5c93e0SJarkko Nikula 1275abfbe5f7SJuha Yrjola r = mmc_add_host(mmc); 1276abfbe5f7SJuha Yrjola if (r < 0) 1277abfbe5f7SJuha Yrjola goto err_remove_host; 1278abfbe5f7SJuha Yrjola 1279abfbe5f7SJuha Yrjola if (slot->pdata->name != NULL) { 1280abfbe5f7SJuha Yrjola r = device_create_file(&mmc->class_dev, 1281abfbe5f7SJuha Yrjola &dev_attr_slot_name); 1282abfbe5f7SJuha Yrjola if (r < 0) 1283abfbe5f7SJuha Yrjola goto err_remove_host; 1284abfbe5f7SJuha Yrjola } 1285abfbe5f7SJuha Yrjola 12865a0f3f1fSJuha Yrjola if (slot->pdata->get_cover_state != NULL) { 12875a0f3f1fSJuha Yrjola r = device_create_file(&mmc->class_dev, 12885a0f3f1fSJuha Yrjola &dev_attr_cover_switch); 12895a0f3f1fSJuha Yrjola if (r < 0) 12905a0f3f1fSJuha Yrjola goto err_remove_slot_name; 12917584d276SJarkko Lavinen tasklet_schedule(&slot->cover_tasklet); 12925a0f3f1fSJuha Yrjola } 12935a0f3f1fSJuha Yrjola 1294abfbe5f7SJuha Yrjola return 0; 1295abfbe5f7SJuha Yrjola 12965a0f3f1fSJuha Yrjola err_remove_slot_name: 12975a0f3f1fSJuha Yrjola if (slot->pdata->name != NULL) 12985a0f3f1fSJuha Yrjola device_remove_file(&mmc->class_dev, &dev_attr_slot_name); 1299abfbe5f7SJuha Yrjola err_remove_host: 1300abfbe5f7SJuha Yrjola mmc_remove_host(mmc); 1301abfbe5f7SJuha Yrjola mmc_free_host(mmc); 1302abfbe5f7SJuha Yrjola return r; 1303abfbe5f7SJuha Yrjola } 1304abfbe5f7SJuha Yrjola 1305abfbe5f7SJuha Yrjola static void mmc_omap_remove_slot(struct mmc_omap_slot *slot) 1306abfbe5f7SJuha Yrjola { 1307abfbe5f7SJuha Yrjola struct mmc_host *mmc = slot->mmc; 1308abfbe5f7SJuha Yrjola 1309abfbe5f7SJuha Yrjola if (slot->pdata->name != NULL) 1310abfbe5f7SJuha Yrjola device_remove_file(&mmc->class_dev, &dev_attr_slot_name); 13115a0f3f1fSJuha Yrjola if (slot->pdata->get_cover_state != NULL) 13125a0f3f1fSJuha Yrjola device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); 13135a0f3f1fSJuha Yrjola 13147584d276SJarkko Lavinen tasklet_kill(&slot->cover_tasklet); 13157584d276SJarkko Lavinen del_timer_sync(&slot->cover_timer); 1316b01a4f1cSVenkatraman S flush_workqueue(slot->host->mmc_omap_wq); 1317abfbe5f7SJuha Yrjola 1318abfbe5f7SJuha Yrjola mmc_remove_host(mmc); 1319abfbe5f7SJuha Yrjola mmc_free_host(mmc); 1320abfbe5f7SJuha Yrjola } 1321abfbe5f7SJuha Yrjola 1322c3be1efdSBill Pemberton static int mmc_omap_probe(struct platform_device *pdev) 13231c6a0718SPierre Ossman { 1324abfbe5f7SJuha Yrjola struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 13251c6a0718SPierre Ossman struct mmc_omap_host *host = NULL; 13261c6a0718SPierre Ossman struct resource *res; 1327abfbe5f7SJuha Yrjola int i, ret = 0; 13281c6a0718SPierre Ossman int irq; 13291c6a0718SPierre Ossman 1330abfbe5f7SJuha Yrjola if (pdata == NULL) { 13311c6a0718SPierre Ossman dev_err(&pdev->dev, "platform data missing\n"); 13321c6a0718SPierre Ossman return -ENXIO; 13331c6a0718SPierre Ossman } 1334abfbe5f7SJuha Yrjola if (pdata->nr_slots == 0) { 1335abfbe5f7SJuha Yrjola dev_err(&pdev->dev, "no slots\n"); 13369cb238c0STony Lindgren return -EPROBE_DEFER; 1337abfbe5f7SJuha Yrjola } 13381c6a0718SPierre Ossman 1339ae9b79c6SJarkko Nikula host = devm_kzalloc(&pdev->dev, sizeof(struct mmc_omap_host), 1340ae9b79c6SJarkko Nikula GFP_KERNEL); 134164ac16ecSJarkko Nikula if (host == NULL) 134264ac16ecSJarkko Nikula return -ENOMEM; 134364ac16ecSJarkko Nikula 134464ac16ecSJarkko Nikula irq = platform_get_irq(pdev, 0); 134564ac16ecSJarkko Nikula if (irq < 0) 134664ac16ecSJarkko Nikula return -ENXIO; 134764ac16ecSJarkko Nikula 1348*73226532SYang Li host->virt_base = devm_platform_get_and_ioremap_resource(pdev, 0, &res); 134964ac16ecSJarkko Nikula if (IS_ERR(host->virt_base)) 135064ac16ecSJarkko Nikula return PTR_ERR(host->virt_base); 13511c6a0718SPierre Ossman 13520f602ec7SJarkko Lavinen INIT_WORK(&host->slot_release_work, mmc_omap_slot_release_work); 13530f602ec7SJarkko Lavinen INIT_WORK(&host->send_stop_work, mmc_omap_send_stop_work); 13540f602ec7SJarkko Lavinen 13550fb4723dSJarkko Lavinen INIT_WORK(&host->cmd_abort_work, mmc_omap_abort_command); 13562ee4f620SKees Cook timer_setup(&host->cmd_abort_timer, mmc_omap_cmd_timer, 0); 1357eb1860bcSJarkko Lavinen 13580807a9b5SJarkko Lavinen spin_lock_init(&host->clk_lock); 13592ee4f620SKees Cook timer_setup(&host->clk_timer, mmc_omap_clk_timer, 0); 13600807a9b5SJarkko Lavinen 13611c6a0718SPierre Ossman spin_lock_init(&host->dma_lock); 1362abfbe5f7SJuha Yrjola spin_lock_init(&host->slot_lock); 1363abfbe5f7SJuha Yrjola init_waitqueue_head(&host->slot_wq); 1364abfbe5f7SJuha Yrjola 1365abfbe5f7SJuha Yrjola host->pdata = pdata; 136653db20d1STony Lindgren host->features = host->pdata->slots[0].features; 1367abfbe5f7SJuha Yrjola host->dev = &pdev->dev; 1368abfbe5f7SJuha Yrjola platform_set_drvdata(pdev, host); 1369abfbe5f7SJuha Yrjola 13701c6a0718SPierre Ossman host->id = pdev->id; 13711c6a0718SPierre Ossman host->irq = irq; 13722ca5dc6fSJarkko Nikula host->phys_base = res->start; 13735c9e02b1SRussell King host->iclk = clk_get(&pdev->dev, "ick"); 137464ac16ecSJarkko Nikula if (IS_ERR(host->iclk)) 137564ac16ecSJarkko Nikula return PTR_ERR(host->iclk); 1376e3e5255eSJanusz Krzysztofik clk_prepare_enable(host->iclk); 13771c6a0718SPierre Ossman 13785c9e02b1SRussell King host->fclk = clk_get(&pdev->dev, "fck"); 13791c6a0718SPierre Ossman if (IS_ERR(host->fclk)) { 13801c6a0718SPierre Ossman ret = PTR_ERR(host->fclk); 13811c6a0718SPierre Ossman goto err_free_iclk; 13821c6a0718SPierre Ossman } 13831c6a0718SPierre Ossman 1384e3e5255eSJanusz Krzysztofik ret = clk_prepare(host->fclk); 1385e3e5255eSJanusz Krzysztofik if (ret) 1386e3e5255eSJanusz Krzysztofik goto err_put_fclk; 1387e3e5255eSJanusz Krzysztofik 13883451c067SRussell King host->dma_tx_burst = -1; 13893451c067SRussell King host->dma_rx_burst = -1; 13903451c067SRussell King 1391d15b08fbSPeter Ujfalusi host->dma_tx = dma_request_chan(&pdev->dev, "tx"); 1392d15b08fbSPeter Ujfalusi if (IS_ERR(host->dma_tx)) { 1393d15b08fbSPeter Ujfalusi ret = PTR_ERR(host->dma_tx); 1394e3e5255eSJanusz Krzysztofik if (ret == -EPROBE_DEFER) 1395e3e5255eSJanusz Krzysztofik goto err_free_fclk; 139631ee9181STony Lindgren 1397d15b08fbSPeter Ujfalusi host->dma_tx = NULL; 1398d15b08fbSPeter Ujfalusi dev_warn(host->dev, "TX DMA channel request failed\n"); 1399d15b08fbSPeter Ujfalusi } 1400d15b08fbSPeter Ujfalusi 1401d15b08fbSPeter Ujfalusi host->dma_rx = dma_request_chan(&pdev->dev, "rx"); 1402d15b08fbSPeter Ujfalusi if (IS_ERR(host->dma_rx)) { 1403d15b08fbSPeter Ujfalusi ret = PTR_ERR(host->dma_rx); 1404d15b08fbSPeter Ujfalusi if (ret == -EPROBE_DEFER) { 1405d15b08fbSPeter Ujfalusi if (host->dma_tx) 1406d15b08fbSPeter Ujfalusi dma_release_channel(host->dma_tx); 1407e3e5255eSJanusz Krzysztofik goto err_free_fclk; 1408d15b08fbSPeter Ujfalusi } 1409d15b08fbSPeter Ujfalusi 1410d15b08fbSPeter Ujfalusi host->dma_rx = NULL; 1411d15b08fbSPeter Ujfalusi dev_warn(host->dev, "RX DMA channel request failed\n"); 1412d15b08fbSPeter Ujfalusi } 14133451c067SRussell King 14141c6a0718SPierre Ossman ret = request_irq(host->irq, mmc_omap_irq, 0, DRIVER_NAME, host); 14151c6a0718SPierre Ossman if (ret) 14163451c067SRussell King goto err_free_dma; 14171c6a0718SPierre Ossman 1418abfbe5f7SJuha Yrjola if (pdata->init != NULL) { 1419abfbe5f7SJuha Yrjola ret = pdata->init(&pdev->dev); 1420abfbe5f7SJuha Yrjola if (ret < 0) 1421abfbe5f7SJuha Yrjola goto err_free_irq; 1422abfbe5f7SJuha Yrjola } 14231c6a0718SPierre Ossman 1424abfbe5f7SJuha Yrjola host->nr_slots = pdata->nr_slots; 142553db20d1STony Lindgren host->reg_shift = (mmc_omap7xx() ? 1 : 2); 14263caf4140STony Lindgren 14273caf4140STony Lindgren host->mmc_omap_wq = alloc_workqueue("mmc_omap", 0, 0); 142838276a91SJulia Lawall if (!host->mmc_omap_wq) { 142938276a91SJulia Lawall ret = -ENOMEM; 14303caf4140STony Lindgren goto err_plat_cleanup; 143138276a91SJulia Lawall } 14323caf4140STony Lindgren 1433abfbe5f7SJuha Yrjola for (i = 0; i < pdata->nr_slots; i++) { 1434abfbe5f7SJuha Yrjola ret = mmc_omap_new_slot(host, i); 1435abfbe5f7SJuha Yrjola if (ret < 0) { 1436abfbe5f7SJuha Yrjola while (--i >= 0) 1437abfbe5f7SJuha Yrjola mmc_omap_remove_slot(host->slots[i]); 1438abfbe5f7SJuha Yrjola 14393caf4140STony Lindgren goto err_destroy_wq; 1440abfbe5f7SJuha Yrjola } 1441abfbe5f7SJuha Yrjola } 14421c6a0718SPierre Ossman 14431c6a0718SPierre Ossman return 0; 14441c6a0718SPierre Ossman 14453caf4140STony Lindgren err_destroy_wq: 14463caf4140STony Lindgren destroy_workqueue(host->mmc_omap_wq); 1447abfbe5f7SJuha Yrjola err_plat_cleanup: 1448abfbe5f7SJuha Yrjola if (pdata->cleanup) 1449abfbe5f7SJuha Yrjola pdata->cleanup(&pdev->dev); 1450abfbe5f7SJuha Yrjola err_free_irq: 1451abfbe5f7SJuha Yrjola free_irq(host->irq, host); 14523451c067SRussell King err_free_dma: 14533451c067SRussell King if (host->dma_tx) 14543451c067SRussell King dma_release_channel(host->dma_tx); 14553451c067SRussell King if (host->dma_rx) 14563451c067SRussell King dma_release_channel(host->dma_rx); 1457e3e5255eSJanusz Krzysztofik err_free_fclk: 1458e3e5255eSJanusz Krzysztofik clk_unprepare(host->fclk); 1459e3e5255eSJanusz Krzysztofik err_put_fclk: 14601c6a0718SPierre Ossman clk_put(host->fclk); 14611c6a0718SPierre Ossman err_free_iclk: 1462e3e5255eSJanusz Krzysztofik clk_disable_unprepare(host->iclk); 14631c6a0718SPierre Ossman clk_put(host->iclk); 14641c6a0718SPierre Ossman return ret; 14651c6a0718SPierre Ossman } 14661c6a0718SPierre Ossman 14676e0ee714SBill Pemberton static int mmc_omap_remove(struct platform_device *pdev) 14681c6a0718SPierre Ossman { 14691c6a0718SPierre Ossman struct mmc_omap_host *host = platform_get_drvdata(pdev); 1470abfbe5f7SJuha Yrjola int i; 14711c6a0718SPierre Ossman 14721c6a0718SPierre Ossman BUG_ON(host == NULL); 14731c6a0718SPierre Ossman 1474abfbe5f7SJuha Yrjola for (i = 0; i < host->nr_slots; i++) 1475abfbe5f7SJuha Yrjola mmc_omap_remove_slot(host->slots[i]); 14761c6a0718SPierre Ossman 1477abfbe5f7SJuha Yrjola if (host->pdata->cleanup) 1478abfbe5f7SJuha Yrjola host->pdata->cleanup(&pdev->dev); 1479abfbe5f7SJuha Yrjola 1480d4a36645SRussell King mmc_omap_fclk_enable(host, 0); 148149c1d9daSLadislav Michl free_irq(host->irq, host); 1482e3e5255eSJanusz Krzysztofik clk_unprepare(host->fclk); 14831c6a0718SPierre Ossman clk_put(host->fclk); 1484e3e5255eSJanusz Krzysztofik clk_disable_unprepare(host->iclk); 1485d4a36645SRussell King clk_put(host->iclk); 14861c6a0718SPierre Ossman 14873451c067SRussell King if (host->dma_tx) 14883451c067SRussell King dma_release_channel(host->dma_tx); 14893451c067SRussell King if (host->dma_rx) 14903451c067SRussell King dma_release_channel(host->dma_rx); 14913451c067SRussell King 1492b01a4f1cSVenkatraman S destroy_workqueue(host->mmc_omap_wq); 14931c6a0718SPierre Ossman 14941c6a0718SPierre Ossman return 0; 14951c6a0718SPierre Ossman } 14961c6a0718SPierre Ossman 14979cb238c0STony Lindgren #if IS_BUILTIN(CONFIG_OF) 14989cb238c0STony Lindgren static const struct of_device_id mmc_omap_match[] = { 14999cb238c0STony Lindgren { .compatible = "ti,omap2420-mmc", }, 15009cb238c0STony Lindgren { }, 15019cb238c0STony Lindgren }; 1502b73f34c2SLuis de Bethencourt MODULE_DEVICE_TABLE(of, mmc_omap_match); 15039cb238c0STony Lindgren #endif 15049cb238c0STony Lindgren 15051c6a0718SPierre Ossman static struct platform_driver mmc_omap_driver = { 1506b6e0703bSVenkatraman S .probe = mmc_omap_probe, 15070433c143SBill Pemberton .remove = mmc_omap_remove, 15081c6a0718SPierre Ossman .driver = { 15091c6a0718SPierre Ossman .name = DRIVER_NAME, 151021b2cec6SDouglas Anderson .probe_type = PROBE_PREFER_ASYNCHRONOUS, 15119cb238c0STony Lindgren .of_match_table = of_match_ptr(mmc_omap_match), 15121c6a0718SPierre Ossman }, 15131c6a0718SPierre Ossman }; 15141c6a0718SPierre Ossman 1515680f1b5bSVenkatraman S module_platform_driver(mmc_omap_driver); 15161c6a0718SPierre Ossman MODULE_DESCRIPTION("OMAP Multimedia Card driver"); 15171c6a0718SPierre Ossman MODULE_LICENSE("GPL"); 1518bc65c724SKay Sievers MODULE_ALIAS("platform:" DRIVER_NAME); 1519d36b6910SAl Viro MODULE_AUTHOR("Juha Yrjölä"); 1520