1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * LiteX LiteSDCard driver 4 * 5 * Copyright (C) 2019-2020 Antmicro <contact@antmicro.com> 6 * Copyright (C) 2019-2020 Kamil Rakoczy <krakoczy@antmicro.com> 7 * Copyright (C) 2019-2020 Maciej Dudek <mdudek@internships.antmicro.com> 8 * Copyright (C) 2020 Paul Mackerras <paulus@ozlabs.org> 9 * Copyright (C) 2020-2022 Gabriel Somlo <gsomlo@gmail.com> 10 */ 11 12 #include <linux/bits.h> 13 #include <linux/clk.h> 14 #include <linux/delay.h> 15 #include <linux/dma-mapping.h> 16 #include <linux/interrupt.h> 17 #include <linux/iopoll.h> 18 #include <linux/litex.h> 19 #include <linux/math.h> 20 #include <linux/module.h> 21 #include <linux/platform_device.h> 22 23 #include <linux/mmc/host.h> 24 #include <linux/mmc/mmc.h> 25 #include <linux/mmc/sd.h> 26 27 #define LITEX_PHY_CARDDETECT 0x00 28 #define LITEX_PHY_CLOCKERDIV 0x04 29 #define LITEX_PHY_INITIALIZE 0x08 30 #define LITEX_PHY_WRITESTATUS 0x0C 31 #define LITEX_PHY_SETTINGS 0x18 32 #define LITEX_CORE_CMDARG 0x00 33 #define LITEX_CORE_CMDCMD 0x04 34 #define LITEX_CORE_CMDSND 0x08 35 #define LITEX_CORE_CMDRSP 0x0C 36 #define LITEX_CORE_CMDEVT 0x1C 37 #define LITEX_CORE_DATEVT 0x20 38 #define LITEX_CORE_BLKLEN 0x24 39 #define LITEX_CORE_BLKCNT 0x28 40 #define LITEX_BLK2MEM_BASE 0x00 41 #define LITEX_BLK2MEM_LEN 0x08 42 #define LITEX_BLK2MEM_ENA 0x0C 43 #define LITEX_BLK2MEM_DONE 0x10 44 #define LITEX_BLK2MEM_LOOP 0x14 45 #define LITEX_MEM2BLK_BASE 0x00 46 #define LITEX_MEM2BLK_LEN 0x08 47 #define LITEX_MEM2BLK_ENA 0x0C 48 #define LITEX_MEM2BLK_DONE 0x10 49 #define LITEX_MEM2BLK_LOOP 0x14 50 #define LITEX_MEM2BLK 0x18 51 #define LITEX_IRQ_STATUS 0x00 52 #define LITEX_IRQ_PENDING 0x04 53 #define LITEX_IRQ_ENABLE 0x08 54 55 #define SD_CTL_DATA_XFER_NONE 0 56 #define SD_CTL_DATA_XFER_READ 1 57 #define SD_CTL_DATA_XFER_WRITE 2 58 59 #define SD_CTL_RESP_NONE 0 60 #define SD_CTL_RESP_SHORT 1 61 #define SD_CTL_RESP_LONG 2 62 #define SD_CTL_RESP_SHORT_BUSY 3 63 64 #define SD_BIT_DONE BIT(0) 65 #define SD_BIT_WR_ERR BIT(1) 66 #define SD_BIT_TIMEOUT BIT(2) 67 #define SD_BIT_CRC_ERR BIT(3) 68 69 #define SD_SLEEP_US 5 70 #define SD_TIMEOUT_US 20000 71 72 #define SD_INIT_DELAY_US 1000 73 #define SD_INIT_CLK_HZ 400000 74 75 #define SD_PHY_SPEED_1X 0 76 #define SD_PHY_SPEED_4X 1 77 #define SD_PHY_SPEED_8X 2 78 79 #define SDIRQ_CARD_DETECT 1 80 #define SDIRQ_SD_TO_MEM_DONE 2 81 #define SDIRQ_MEM_TO_SD_DONE 4 82 #define SDIRQ_CMD_DONE 8 83 84 struct litex_mmc_host { 85 struct mmc_host *mmc; 86 87 void __iomem *sdphy; 88 void __iomem *sdcore; 89 void __iomem *sdreader; 90 void __iomem *sdwriter; 91 void __iomem *sdirq; 92 93 void *buffer; 94 size_t buf_size; 95 dma_addr_t dma; 96 97 struct completion cmd_done; 98 int irq; 99 100 unsigned int ref_clk; 101 unsigned int sd_clk; 102 103 u8 width; 104 105 u32 resp[4]; 106 }; 107 108 static int litex_mmc_sdcard_wait_done(void __iomem *reg, struct device *dev) 109 { 110 u8 evt; 111 int ret; 112 113 ret = readx_poll_timeout(litex_read8, reg, evt, evt & SD_BIT_DONE, 114 SD_SLEEP_US, SD_TIMEOUT_US); 115 if (ret) 116 return ret; 117 if (evt == SD_BIT_DONE) 118 return 0; 119 if (evt & SD_BIT_WR_ERR) 120 return -EIO; 121 if (evt & SD_BIT_TIMEOUT) 122 return -ETIMEDOUT; 123 if (evt & SD_BIT_CRC_ERR) 124 return -EILSEQ; 125 dev_err(dev, "%s: unknown error (evt=%x)\n", __func__, evt); 126 return -EINVAL; 127 } 128 129 static int litex_mmc_send_cmd(struct litex_mmc_host *host, 130 u8 cmd, u32 arg, u8 response_len, u8 transfer) 131 { 132 struct device *dev = mmc_dev(host->mmc); 133 void __iomem *reg; 134 int ret; 135 u8 evt; 136 137 litex_write32(host->sdcore + LITEX_CORE_CMDARG, arg); 138 litex_write32(host->sdcore + LITEX_CORE_CMDCMD, 139 cmd << 8 | transfer << 5 | response_len); 140 litex_write8(host->sdcore + LITEX_CORE_CMDSND, 1); 141 142 /* 143 * Wait for an interrupt if we have an interrupt and either there is 144 * data to be transferred, or if the card can report busy via DAT0. 145 */ 146 if (host->irq > 0 && 147 (transfer != SD_CTL_DATA_XFER_NONE || 148 response_len == SD_CTL_RESP_SHORT_BUSY)) { 149 reinit_completion(&host->cmd_done); 150 litex_write32(host->sdirq + LITEX_IRQ_ENABLE, 151 SDIRQ_CMD_DONE | SDIRQ_CARD_DETECT); 152 wait_for_completion(&host->cmd_done); 153 } 154 155 ret = litex_mmc_sdcard_wait_done(host->sdcore + LITEX_CORE_CMDEVT, dev); 156 if (ret) { 157 dev_err(dev, "Command (cmd %d) error, status %d\n", cmd, ret); 158 return ret; 159 } 160 161 if (response_len != SD_CTL_RESP_NONE) { 162 /* 163 * NOTE: this matches the semantics of litex_read32() 164 * regardless of underlying arch endianness! 165 */ 166 memcpy_fromio(host->resp, 167 host->sdcore + LITEX_CORE_CMDRSP, 0x10); 168 } 169 170 if (transfer == SD_CTL_DATA_XFER_NONE) 171 return ret; /* OK from prior litex_mmc_sdcard_wait_done() */ 172 173 ret = litex_mmc_sdcard_wait_done(host->sdcore + LITEX_CORE_DATEVT, dev); 174 if (ret) { 175 dev_err(dev, "Data xfer (cmd %d) error, status %d\n", cmd, ret); 176 return ret; 177 } 178 179 /* Wait for completion of (read or write) DMA transfer */ 180 reg = (transfer == SD_CTL_DATA_XFER_READ) ? 181 host->sdreader + LITEX_BLK2MEM_DONE : 182 host->sdwriter + LITEX_MEM2BLK_DONE; 183 ret = readx_poll_timeout(litex_read8, reg, evt, evt & SD_BIT_DONE, 184 SD_SLEEP_US, SD_TIMEOUT_US); 185 if (ret) 186 dev_err(dev, "DMA timeout (cmd %d)\n", cmd); 187 188 return ret; 189 } 190 191 static int litex_mmc_get_cd(struct mmc_host *mmc) 192 { 193 struct litex_mmc_host *host = mmc_priv(mmc); 194 int ret; 195 196 if (!mmc_card_is_removable(mmc)) 197 return 1; 198 199 ret = !litex_read8(host->sdphy + LITEX_PHY_CARDDETECT); 200 if (ret) 201 return ret; 202 203 return 0; 204 } 205 206 static irqreturn_t litex_mmc_interrupt(int irq, void *arg) 207 { 208 struct mmc_host *mmc = arg; 209 struct litex_mmc_host *host = mmc_priv(mmc); 210 u32 pending = litex_read32(host->sdirq + LITEX_IRQ_PENDING); 211 irqreturn_t ret = IRQ_NONE; 212 213 /* Check for card change interrupt */ 214 if (pending & SDIRQ_CARD_DETECT) { 215 litex_write32(host->sdirq + LITEX_IRQ_PENDING, 216 SDIRQ_CARD_DETECT); 217 mmc_detect_change(mmc, msecs_to_jiffies(10)); 218 ret = IRQ_HANDLED; 219 } 220 221 /* Check for command completed */ 222 if (pending & SDIRQ_CMD_DONE) { 223 /* Disable it so it doesn't keep interrupting */ 224 litex_write32(host->sdirq + LITEX_IRQ_ENABLE, 225 SDIRQ_CARD_DETECT); 226 complete(&host->cmd_done); 227 ret = IRQ_HANDLED; 228 } 229 230 return ret; 231 } 232 233 static u32 litex_mmc_response_len(struct mmc_command *cmd) 234 { 235 if (cmd->flags & MMC_RSP_136) 236 return SD_CTL_RESP_LONG; 237 if (!(cmd->flags & MMC_RSP_PRESENT)) 238 return SD_CTL_RESP_NONE; 239 if (cmd->flags & MMC_RSP_BUSY) 240 return SD_CTL_RESP_SHORT_BUSY; 241 return SD_CTL_RESP_SHORT; 242 } 243 244 static void litex_mmc_do_dma(struct litex_mmc_host *host, struct mmc_data *data, 245 unsigned int *len, bool *direct, u8 *transfer) 246 { 247 struct device *dev = mmc_dev(host->mmc); 248 dma_addr_t dma; 249 int sg_count; 250 251 /* 252 * Try to DMA directly to/from the data buffer. 253 * We can do that if the buffer can be mapped for DMA 254 * in one contiguous chunk. 255 */ 256 dma = host->dma; 257 *len = data->blksz * data->blocks; 258 sg_count = dma_map_sg(dev, data->sg, data->sg_len, 259 mmc_get_dma_dir(data)); 260 if (sg_count == 1) { 261 dma = sg_dma_address(data->sg); 262 *len = sg_dma_len(data->sg); 263 *direct = true; 264 } else if (*len > host->buf_size) 265 *len = host->buf_size; 266 267 if (data->flags & MMC_DATA_READ) { 268 litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 0); 269 litex_write64(host->sdreader + LITEX_BLK2MEM_BASE, dma); 270 litex_write32(host->sdreader + LITEX_BLK2MEM_LEN, *len); 271 litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 1); 272 *transfer = SD_CTL_DATA_XFER_READ; 273 } else if (data->flags & MMC_DATA_WRITE) { 274 if (!*direct) 275 sg_copy_to_buffer(data->sg, data->sg_len, 276 host->buffer, *len); 277 litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 0); 278 litex_write64(host->sdwriter + LITEX_MEM2BLK_BASE, dma); 279 litex_write32(host->sdwriter + LITEX_MEM2BLK_LEN, *len); 280 litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 1); 281 *transfer = SD_CTL_DATA_XFER_WRITE; 282 } else { 283 dev_warn(dev, "Data present w/o read or write flag.\n"); 284 /* Continue: set cmd status, mark req done */ 285 } 286 287 litex_write16(host->sdcore + LITEX_CORE_BLKLEN, data->blksz); 288 litex_write32(host->sdcore + LITEX_CORE_BLKCNT, data->blocks); 289 } 290 291 static void litex_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 292 { 293 struct litex_mmc_host *host = mmc_priv(mmc); 294 struct device *dev = mmc_dev(mmc); 295 struct mmc_command *cmd = mrq->cmd; 296 struct mmc_command *sbc = mrq->sbc; 297 struct mmc_data *data = mrq->data; 298 struct mmc_command *stop = mrq->stop; 299 unsigned int retries = cmd->retries; 300 unsigned int len = 0; 301 bool direct = false; 302 u32 response_len = litex_mmc_response_len(cmd); 303 u8 transfer = SD_CTL_DATA_XFER_NONE; 304 305 /* First check that the card is still there */ 306 if (!litex_mmc_get_cd(mmc)) { 307 cmd->error = -ENOMEDIUM; 308 mmc_request_done(mmc, mrq); 309 return; 310 } 311 312 /* Send set-block-count command if needed */ 313 if (sbc) { 314 sbc->error = litex_mmc_send_cmd(host, sbc->opcode, sbc->arg, 315 litex_mmc_response_len(sbc), 316 SD_CTL_DATA_XFER_NONE); 317 if (sbc->error) { 318 mmc_request_done(mmc, mrq); 319 return; 320 } 321 } 322 323 if (data) 324 litex_mmc_do_dma(host, data, &len, &direct, &transfer); 325 326 do { 327 cmd->error = litex_mmc_send_cmd(host, cmd->opcode, cmd->arg, 328 response_len, transfer); 329 } while (cmd->error && retries-- > 0); 330 331 if (response_len == SD_CTL_RESP_SHORT) { 332 /* Pull short response fields from appropriate host registers */ 333 cmd->resp[0] = host->resp[3]; 334 cmd->resp[1] = host->resp[2] & 0xFF; 335 } else if (response_len == SD_CTL_RESP_LONG) { 336 cmd->resp[0] = host->resp[0]; 337 cmd->resp[1] = host->resp[1]; 338 cmd->resp[2] = host->resp[2]; 339 cmd->resp[3] = host->resp[3]; 340 } 341 342 /* Send stop-transmission command if required */ 343 if (stop && (cmd->error || !sbc)) 344 stop->error = litex_mmc_send_cmd(host, stop->opcode, stop->arg, 345 litex_mmc_response_len(stop), 346 SD_CTL_DATA_XFER_NONE); 347 348 if (data) { 349 dma_unmap_sg(dev, data->sg, data->sg_len, 350 mmc_get_dma_dir(data)); 351 } 352 353 if (!cmd->error && transfer != SD_CTL_DATA_XFER_NONE) { 354 data->bytes_xfered = min(len, mmc->max_req_size); 355 if (transfer == SD_CTL_DATA_XFER_READ && !direct) { 356 sg_copy_from_buffer(data->sg, sg_nents(data->sg), 357 host->buffer, data->bytes_xfered); 358 } 359 } 360 361 mmc_request_done(mmc, mrq); 362 } 363 364 static void litex_mmc_setclk(struct litex_mmc_host *host, unsigned int freq) 365 { 366 struct device *dev = mmc_dev(host->mmc); 367 u32 div; 368 369 div = freq ? DIV_ROUND_UP(host->ref_clk, freq) : 256U; 370 div = clamp(div, 2U, 256U); 371 dev_dbg(dev, "sd_clk_freq=%d: set to %d via div=%d\n", 372 freq, host->ref_clk / ((div + 1) & ~1U), div); 373 litex_write16(host->sdphy + LITEX_PHY_CLOCKERDIV, div); 374 host->sd_clk = freq; 375 } 376 377 static void litex_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 378 { 379 struct litex_mmc_host *host = mmc_priv(mmc); 380 unsigned int bus_width = SD_PHY_SPEED_1X; 381 382 switch (ios->bus_width) { 383 case MMC_BUS_WIDTH_1: 384 bus_width = SD_PHY_SPEED_1X; 385 break; 386 case MMC_BUS_WIDTH_4: 387 bus_width = SD_PHY_SPEED_4X; 388 break; 389 case MMC_BUS_WIDTH_8: 390 bus_width = SD_PHY_SPEED_8X; 391 break; 392 } 393 394 if (host->width != ios->bus_width) { 395 litex_write8(host->sdphy + LITEX_PHY_SETTINGS, bus_width); 396 host->width = ios->bus_width; 397 } 398 399 /* 400 * The SD specification requires at least 74 idle clocks before CMD0. 401 * These dummy cycles is generated by writing LITEX_PHY_INITIALIZE. 402 */ 403 if (ios->chip_select == MMC_CS_HIGH) { 404 litex_mmc_setclk(host, SD_INIT_CLK_HZ); 405 litex_write8(host->sdphy + LITEX_PHY_INITIALIZE, 1); 406 fsleep(SD_INIT_DELAY_US); 407 return; 408 } 409 410 /* Update sd_clk */ 411 if (ios->clock != host->sd_clk) 412 litex_mmc_setclk(host, ios->clock); 413 } 414 415 static const struct mmc_host_ops litex_mmc_ops = { 416 .get_cd = litex_mmc_get_cd, 417 .request = litex_mmc_request, 418 .set_ios = litex_mmc_set_ios, 419 }; 420 421 static int litex_mmc_irq_init(struct platform_device *pdev, 422 struct litex_mmc_host *host) 423 { 424 struct device *dev = mmc_dev(host->mmc); 425 int ret; 426 427 ret = platform_get_irq_optional(pdev, 0); 428 if (ret < 0 && ret != -ENXIO) 429 return ret; 430 if (ret > 0) 431 host->irq = ret; 432 else { 433 dev_warn(dev, "Failed to get IRQ, using polling\n"); 434 goto use_polling; 435 } 436 437 host->sdirq = devm_platform_ioremap_resource_byname(pdev, "irq"); 438 if (IS_ERR(host->sdirq)) 439 return PTR_ERR(host->sdirq); 440 441 ret = devm_request_irq(dev, host->irq, litex_mmc_interrupt, 0, 442 "litex-mmc", host->mmc); 443 if (ret < 0) { 444 dev_warn(dev, "IRQ request error %d, using polling\n", ret); 445 goto use_polling; 446 } 447 448 /* Clear & enable card-change interrupts */ 449 litex_write32(host->sdirq + LITEX_IRQ_PENDING, SDIRQ_CARD_DETECT); 450 litex_write32(host->sdirq + LITEX_IRQ_ENABLE, SDIRQ_CARD_DETECT); 451 452 return 0; 453 454 use_polling: 455 host->mmc->caps |= MMC_CAP_NEEDS_POLL; 456 host->irq = 0; 457 return 0; 458 } 459 460 static int litex_mmc_probe(struct platform_device *pdev) 461 { 462 struct device *dev = &pdev->dev; 463 struct litex_mmc_host *host; 464 struct mmc_host *mmc; 465 struct clk *clk; 466 int ret; 467 468 /* 469 * NOTE: defaults to max_[req,seg]_size=PAGE_SIZE, max_blk_size=512, 470 * and max_blk_count accordingly set to 8; 471 * If for some reason we need to modify max_blk_count, we must also 472 * re-calculate `max_[req,seg]_size = max_blk_size * max_blk_count;` 473 */ 474 mmc = devm_mmc_alloc_host(dev, sizeof(*host)); 475 if (!mmc) 476 return -ENOMEM; 477 478 host = mmc_priv(mmc); 479 host->mmc = mmc; 480 481 /* Initialize clock source */ 482 clk = devm_clk_get(dev, NULL); 483 if (IS_ERR(clk)) 484 return dev_err_probe(dev, PTR_ERR(clk), "can't get clock\n"); 485 host->ref_clk = clk_get_rate(clk); 486 host->sd_clk = 0; 487 host->width = MMC_BUS_WIDTH_1; 488 489 /* LiteSDCard can support 64-bit DMA addressing */ 490 ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64)); 491 if (ret) 492 return ret; 493 494 host->buf_size = mmc->max_req_size * 2; 495 host->buffer = dmam_alloc_coherent(dev, host->buf_size, 496 &host->dma, GFP_KERNEL); 497 if (host->buffer == NULL) 498 return -ENOMEM; 499 500 host->sdphy = devm_platform_ioremap_resource_byname(pdev, "phy"); 501 if (IS_ERR(host->sdphy)) 502 return PTR_ERR(host->sdphy); 503 504 host->sdcore = devm_platform_ioremap_resource_byname(pdev, "core"); 505 if (IS_ERR(host->sdcore)) 506 return PTR_ERR(host->sdcore); 507 508 host->sdreader = devm_platform_ioremap_resource_byname(pdev, "reader"); 509 if (IS_ERR(host->sdreader)) 510 return PTR_ERR(host->sdreader); 511 512 host->sdwriter = devm_platform_ioremap_resource_byname(pdev, "writer"); 513 if (IS_ERR(host->sdwriter)) 514 return PTR_ERR(host->sdwriter); 515 516 /* Ensure DMA bus masters are disabled */ 517 litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 0); 518 litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 0); 519 520 /* Ensure the litex is at bus width x1 */ 521 litex_write8(host->sdphy + LITEX_PHY_SETTINGS, SD_PHY_SPEED_1X); 522 523 init_completion(&host->cmd_done); 524 ret = litex_mmc_irq_init(pdev, host); 525 if (ret) 526 return ret; 527 528 mmc->ops = &litex_mmc_ops; 529 530 ret = mmc_regulator_get_supply(mmc); 531 if (ret || mmc->ocr_avail == 0) { 532 dev_warn(dev, "can't get voltage, defaulting to 3.3V\n"); 533 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 534 } 535 536 /* 537 * Set default sd_clk frequency range based on empirical observations 538 * of LiteSDCard gateware behavior on typical SDCard media 539 */ 540 mmc->f_min = 12.5e6; 541 mmc->f_max = 50e6; 542 543 ret = mmc_of_parse(mmc); 544 if (ret) 545 return ret; 546 547 /* Only drop 8-bit bus_width support */ 548 mmc->caps &= ~MMC_CAP_8_BIT_DATA; 549 550 /* Set default capabilities */ 551 mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY | 552 MMC_CAP_DRIVER_TYPE_D | 553 MMC_CAP_CMD23; 554 mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT | 555 MMC_CAP2_NO_SDIO | 556 MMC_CAP2_NO_MMC; 557 558 platform_set_drvdata(pdev, host); 559 560 ret = mmc_add_host(mmc); 561 if (ret) 562 return ret; 563 564 dev_info(dev, "LiteX MMC controller initialized.\n"); 565 return 0; 566 } 567 568 static void litex_mmc_remove(struct platform_device *pdev) 569 { 570 struct litex_mmc_host *host = platform_get_drvdata(pdev); 571 572 mmc_remove_host(host->mmc); 573 } 574 575 static const struct of_device_id litex_match[] = { 576 { .compatible = "litex,mmc" }, 577 { } 578 }; 579 MODULE_DEVICE_TABLE(of, litex_match); 580 581 static struct platform_driver litex_mmc_driver = { 582 .probe = litex_mmc_probe, 583 .remove = litex_mmc_remove, 584 .driver = { 585 .name = "litex-mmc", 586 .of_match_table = litex_match, 587 .probe_type = PROBE_PREFER_ASYNCHRONOUS, 588 }, 589 }; 590 module_platform_driver(litex_mmc_driver); 591 592 MODULE_DESCRIPTION("LiteX SDCard driver"); 593 MODULE_AUTHOR("Antmicro <contact@antmicro.com>"); 594 MODULE_AUTHOR("Kamil Rakoczy <krakoczy@antmicro.com>"); 595 MODULE_AUTHOR("Maciej Dudek <mdudek@internships.antmicro.com>"); 596 MODULE_AUTHOR("Paul Mackerras <paulus@ozlabs.org>"); 597 MODULE_AUTHOR("Gabriel Somlo <gsomlo@gmail.com>"); 598 MODULE_LICENSE("GPL v2"); 599