1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/scatterlist.h> 26f95f3850SWill Newton #include <linux/seq_file.h> 27f95f3850SWill Newton #include <linux/slab.h> 28f95f3850SWill Newton #include <linux/stat.h> 29f95f3850SWill Newton #include <linux/delay.h> 30f95f3850SWill Newton #include <linux/irq.h> 31f95f3850SWill Newton #include <linux/mmc/host.h> 32f95f3850SWill Newton #include <linux/mmc/mmc.h> 33f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 34f95f3850SWill Newton #include <linux/bitops.h> 35f95f3850SWill Newton 36f95f3850SWill Newton #include "dw_mmc.h" 37f95f3850SWill Newton 38f95f3850SWill Newton /* Common flag combinations */ 39f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 40f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 41f95f3850SWill Newton SDMMC_INT_EBE) 42f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 43f95f3850SWill Newton SDMMC_INT_RESP_ERR) 44f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 45f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 46f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 47f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 48f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 49f95f3850SWill Newton 50f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 51f95f3850SWill Newton struct idmac_desc { 52f95f3850SWill Newton u32 des0; /* Control Descriptor */ 53f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 54f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 55f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 56f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 57f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 58f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 59f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 60f95f3850SWill Newton 61f95f3850SWill Newton u32 des1; /* Buffer sizes */ 62f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 63f95f3850SWill Newton ((d)->des1 = ((d)->des1 & 0x03ffc000) | ((s) & 0x3fff)) 64f95f3850SWill Newton 65f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 66f95f3850SWill Newton 67f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 68f95f3850SWill Newton }; 69f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 70f95f3850SWill Newton 71f95f3850SWill Newton /** 72f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 73f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 74f95f3850SWill Newton * @host: The MMC controller this slot is using. 75f95f3850SWill Newton * @ctype: Card type for this slot. 76f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 77f95f3850SWill Newton * processed, or NULL when the slot is idle. 78f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 79f95f3850SWill Newton * &struct dw_mci. 80f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 81f95f3850SWill Newton * @flags: Random state bits associated with the slot. 82f95f3850SWill Newton * @id: Number of this slot. 83f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 84f95f3850SWill Newton */ 85f95f3850SWill Newton struct dw_mci_slot { 86f95f3850SWill Newton struct mmc_host *mmc; 87f95f3850SWill Newton struct dw_mci *host; 88f95f3850SWill Newton 89f95f3850SWill Newton u32 ctype; 90f95f3850SWill Newton 91f95f3850SWill Newton struct mmc_request *mrq; 92f95f3850SWill Newton struct list_head queue_node; 93f95f3850SWill Newton 94f95f3850SWill Newton unsigned int clock; 95f95f3850SWill Newton unsigned long flags; 96f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 97f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 98f95f3850SWill Newton int id; 99f95f3850SWill Newton int last_detect_state; 100f95f3850SWill Newton }; 101f95f3850SWill Newton 102f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 103f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 104f95f3850SWill Newton { 105f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 106f95f3850SWill Newton struct mmc_request *mrq; 107f95f3850SWill Newton struct mmc_command *cmd; 108f95f3850SWill Newton struct mmc_command *stop; 109f95f3850SWill Newton struct mmc_data *data; 110f95f3850SWill Newton 111f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 112f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 113f95f3850SWill Newton mrq = slot->mrq; 114f95f3850SWill Newton 115f95f3850SWill Newton if (mrq) { 116f95f3850SWill Newton cmd = mrq->cmd; 117f95f3850SWill Newton data = mrq->data; 118f95f3850SWill Newton stop = mrq->stop; 119f95f3850SWill Newton 120f95f3850SWill Newton if (cmd) 121f95f3850SWill Newton seq_printf(s, 122f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 123f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 124f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 125f95f3850SWill Newton cmd->resp[2], cmd->error); 126f95f3850SWill Newton if (data) 127f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 128f95f3850SWill Newton data->bytes_xfered, data->blocks, 129f95f3850SWill Newton data->blksz, data->flags, data->error); 130f95f3850SWill Newton if (stop) 131f95f3850SWill Newton seq_printf(s, 132f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 133f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 134f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 135f95f3850SWill Newton stop->resp[2], stop->error); 136f95f3850SWill Newton } 137f95f3850SWill Newton 138f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 139f95f3850SWill Newton 140f95f3850SWill Newton return 0; 141f95f3850SWill Newton } 142f95f3850SWill Newton 143f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 144f95f3850SWill Newton { 145f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 146f95f3850SWill Newton } 147f95f3850SWill Newton 148f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 149f95f3850SWill Newton .owner = THIS_MODULE, 150f95f3850SWill Newton .open = dw_mci_req_open, 151f95f3850SWill Newton .read = seq_read, 152f95f3850SWill Newton .llseek = seq_lseek, 153f95f3850SWill Newton .release = single_release, 154f95f3850SWill Newton }; 155f95f3850SWill Newton 156f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 157f95f3850SWill Newton { 158f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 159f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 160f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 161f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 162f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 163f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 164f95f3850SWill Newton 165f95f3850SWill Newton return 0; 166f95f3850SWill Newton } 167f95f3850SWill Newton 168f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 169f95f3850SWill Newton { 170f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 171f95f3850SWill Newton } 172f95f3850SWill Newton 173f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 174f95f3850SWill Newton .owner = THIS_MODULE, 175f95f3850SWill Newton .open = dw_mci_regs_open, 176f95f3850SWill Newton .read = seq_read, 177f95f3850SWill Newton .llseek = seq_lseek, 178f95f3850SWill Newton .release = single_release, 179f95f3850SWill Newton }; 180f95f3850SWill Newton 181f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 182f95f3850SWill Newton { 183f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 184f95f3850SWill Newton struct dw_mci *host = slot->host; 185f95f3850SWill Newton struct dentry *root; 186f95f3850SWill Newton struct dentry *node; 187f95f3850SWill Newton 188f95f3850SWill Newton root = mmc->debugfs_root; 189f95f3850SWill Newton if (!root) 190f95f3850SWill Newton return; 191f95f3850SWill Newton 192f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 193f95f3850SWill Newton &dw_mci_regs_fops); 194f95f3850SWill Newton if (!node) 195f95f3850SWill Newton goto err; 196f95f3850SWill Newton 197f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 198f95f3850SWill Newton &dw_mci_req_fops); 199f95f3850SWill Newton if (!node) 200f95f3850SWill Newton goto err; 201f95f3850SWill Newton 202f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 203f95f3850SWill Newton if (!node) 204f95f3850SWill Newton goto err; 205f95f3850SWill Newton 206f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 207f95f3850SWill Newton (u32 *)&host->pending_events); 208f95f3850SWill Newton if (!node) 209f95f3850SWill Newton goto err; 210f95f3850SWill Newton 211f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 212f95f3850SWill Newton (u32 *)&host->completed_events); 213f95f3850SWill Newton if (!node) 214f95f3850SWill Newton goto err; 215f95f3850SWill Newton 216f95f3850SWill Newton return; 217f95f3850SWill Newton 218f95f3850SWill Newton err: 219f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 220f95f3850SWill Newton } 221f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 222f95f3850SWill Newton 223f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 224f95f3850SWill Newton { 225f95f3850SWill Newton /* timeout (maximum) */ 226f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 227f95f3850SWill Newton } 228f95f3850SWill Newton 229f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 230f95f3850SWill Newton { 231f95f3850SWill Newton struct mmc_data *data; 232f95f3850SWill Newton u32 cmdr; 233f95f3850SWill Newton cmd->error = -EINPROGRESS; 234f95f3850SWill Newton 235f95f3850SWill Newton cmdr = cmd->opcode; 236f95f3850SWill Newton 237f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 238f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 239f95f3850SWill Newton else 240f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 241f95f3850SWill Newton 242f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 243f95f3850SWill Newton /* We expect a response, so set this bit */ 244f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 245f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 246f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 247f95f3850SWill Newton } 248f95f3850SWill Newton 249f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 250f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 251f95f3850SWill Newton 252f95f3850SWill Newton data = cmd->data; 253f95f3850SWill Newton if (data) { 254f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 255f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 256f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 257f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 258f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 259f95f3850SWill Newton } 260f95f3850SWill Newton 261f95f3850SWill Newton return cmdr; 262f95f3850SWill Newton } 263f95f3850SWill Newton 264f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 265f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 266f95f3850SWill Newton { 267f95f3850SWill Newton host->cmd = cmd; 268f95f3850SWill Newton dev_vdbg(&host->pdev->dev, 269f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 270f95f3850SWill Newton cmd->arg, cmd_flags); 271f95f3850SWill Newton 272f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 273f95f3850SWill Newton wmb(); 274f95f3850SWill Newton 275f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 276f95f3850SWill Newton } 277f95f3850SWill Newton 278f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 279f95f3850SWill Newton { 280f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 281f95f3850SWill Newton } 282f95f3850SWill Newton 283f95f3850SWill Newton /* DMA interface functions */ 284f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 285f95f3850SWill Newton { 286f95f3850SWill Newton if (host->use_dma) { 287f95f3850SWill Newton host->dma_ops->stop(host); 288f95f3850SWill Newton host->dma_ops->cleanup(host); 289f95f3850SWill Newton } else { 290f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 291f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 292f95f3850SWill Newton } 293f95f3850SWill Newton } 294f95f3850SWill Newton 295f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 296f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 297f95f3850SWill Newton { 298f95f3850SWill Newton struct mmc_data *data = host->data; 299f95f3850SWill Newton 300f95f3850SWill Newton if (data) 301f95f3850SWill Newton dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, 302f95f3850SWill Newton ((data->flags & MMC_DATA_WRITE) 303f95f3850SWill Newton ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 304f95f3850SWill Newton } 305f95f3850SWill Newton 306f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 307f95f3850SWill Newton { 308f95f3850SWill Newton u32 temp; 309f95f3850SWill Newton 310f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 311f95f3850SWill Newton temp = mci_readl(host, CTRL); 312f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 313f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 314f95f3850SWill Newton mci_writel(host, CTRL, temp); 315f95f3850SWill Newton 316f95f3850SWill Newton /* Stop the IDMAC running */ 317f95f3850SWill Newton temp = mci_readl(host, BMOD); 318f95f3850SWill Newton temp &= ~SDMMC_IDMAC_ENABLE; 319f95f3850SWill Newton mci_writel(host, BMOD, temp); 320f95f3850SWill Newton } 321f95f3850SWill Newton 322f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 323f95f3850SWill Newton { 324f95f3850SWill Newton struct mmc_data *data = host->data; 325f95f3850SWill Newton 326f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "DMA complete\n"); 327f95f3850SWill Newton 328f95f3850SWill Newton host->dma_ops->cleanup(host); 329f95f3850SWill Newton 330f95f3850SWill Newton /* 331f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 332f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 333f95f3850SWill Newton */ 334f95f3850SWill Newton if (data) { 335f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 336f95f3850SWill Newton tasklet_schedule(&host->tasklet); 337f95f3850SWill Newton } 338f95f3850SWill Newton } 339f95f3850SWill Newton 340f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 341f95f3850SWill Newton unsigned int sg_len) 342f95f3850SWill Newton { 343f95f3850SWill Newton int i; 344f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 345f95f3850SWill Newton 346f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 347f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 348f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 349f95f3850SWill Newton 350f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 351f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 352f95f3850SWill Newton 353f95f3850SWill Newton /* Buffer length */ 354f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 355f95f3850SWill Newton 356f95f3850SWill Newton /* Physical address to DMA to/from */ 357f95f3850SWill Newton desc->des2 = mem_addr; 358f95f3850SWill Newton } 359f95f3850SWill Newton 360f95f3850SWill Newton /* Set first descriptor */ 361f95f3850SWill Newton desc = host->sg_cpu; 362f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 363f95f3850SWill Newton 364f95f3850SWill Newton /* Set last descriptor */ 365f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 366f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 367f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 368f95f3850SWill Newton 369f95f3850SWill Newton wmb(); 370f95f3850SWill Newton } 371f95f3850SWill Newton 372f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 373f95f3850SWill Newton { 374f95f3850SWill Newton u32 temp; 375f95f3850SWill Newton 376f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 377f95f3850SWill Newton 378f95f3850SWill Newton /* Select IDMAC interface */ 379f95f3850SWill Newton temp = mci_readl(host, CTRL); 380f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 381f95f3850SWill Newton mci_writel(host, CTRL, temp); 382f95f3850SWill Newton 383f95f3850SWill Newton wmb(); 384f95f3850SWill Newton 385f95f3850SWill Newton /* Enable the IDMAC */ 386f95f3850SWill Newton temp = mci_readl(host, BMOD); 387f95f3850SWill Newton temp |= SDMMC_IDMAC_ENABLE; 388f95f3850SWill Newton mci_writel(host, BMOD, temp); 389f95f3850SWill Newton 390f95f3850SWill Newton /* Start it running */ 391f95f3850SWill Newton mci_writel(host, PLDMND, 1); 392f95f3850SWill Newton } 393f95f3850SWill Newton 394f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 395f95f3850SWill Newton { 396f95f3850SWill Newton struct idmac_desc *p; 397f95f3850SWill Newton int i; 398f95f3850SWill Newton 399f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 400f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 401f95f3850SWill Newton 402f95f3850SWill Newton /* Forward link the descriptor list */ 403f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 404f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 405f95f3850SWill Newton 406f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 407f95f3850SWill Newton p->des3 = host->sg_dma; 408f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 409f95f3850SWill Newton 410f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 411f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 412f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 413f95f3850SWill Newton 414f95f3850SWill Newton /* Set the descriptor base address */ 415f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 416f95f3850SWill Newton return 0; 417f95f3850SWill Newton } 418f95f3850SWill Newton 419f95f3850SWill Newton static struct dw_mci_dma_ops dw_mci_idmac_ops = { 420f95f3850SWill Newton .init = dw_mci_idmac_init, 421f95f3850SWill Newton .start = dw_mci_idmac_start_dma, 422f95f3850SWill Newton .stop = dw_mci_idmac_stop_dma, 423f95f3850SWill Newton .complete = dw_mci_idmac_complete_dma, 424f95f3850SWill Newton .cleanup = dw_mci_dma_cleanup, 425f95f3850SWill Newton }; 426f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 427f95f3850SWill Newton 428f95f3850SWill Newton static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 429f95f3850SWill Newton { 430f95f3850SWill Newton struct scatterlist *sg; 431f95f3850SWill Newton unsigned int i, direction, sg_len; 432f95f3850SWill Newton u32 temp; 433f95f3850SWill Newton 434f95f3850SWill Newton /* If we don't have a channel, we can't do DMA */ 435f95f3850SWill Newton if (!host->use_dma) 436f95f3850SWill Newton return -ENODEV; 437f95f3850SWill Newton 438f95f3850SWill Newton /* 439f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 440f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 441f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 442f95f3850SWill Newton */ 443f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 444f95f3850SWill Newton return -EINVAL; 445f95f3850SWill Newton if (data->blksz & 3) 446f95f3850SWill Newton return -EINVAL; 447f95f3850SWill Newton 448f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 449f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 450f95f3850SWill Newton return -EINVAL; 451f95f3850SWill Newton } 452f95f3850SWill Newton 453f95f3850SWill Newton if (data->flags & MMC_DATA_READ) 454f95f3850SWill Newton direction = DMA_FROM_DEVICE; 455f95f3850SWill Newton else 456f95f3850SWill Newton direction = DMA_TO_DEVICE; 457f95f3850SWill Newton 458f95f3850SWill Newton sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, 459f95f3850SWill Newton direction); 460f95f3850SWill Newton 461f95f3850SWill Newton dev_vdbg(&host->pdev->dev, 462f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 463f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 464f95f3850SWill Newton sg_len); 465f95f3850SWill Newton 466f95f3850SWill Newton /* Enable the DMA interface */ 467f95f3850SWill Newton temp = mci_readl(host, CTRL); 468f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 469f95f3850SWill Newton mci_writel(host, CTRL, temp); 470f95f3850SWill Newton 471f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 472f95f3850SWill Newton temp = mci_readl(host, INTMASK); 473f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 474f95f3850SWill Newton mci_writel(host, INTMASK, temp); 475f95f3850SWill Newton 476f95f3850SWill Newton host->dma_ops->start(host, sg_len); 477f95f3850SWill Newton 478f95f3850SWill Newton return 0; 479f95f3850SWill Newton } 480f95f3850SWill Newton 481f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 482f95f3850SWill Newton { 483f95f3850SWill Newton u32 temp; 484f95f3850SWill Newton 485f95f3850SWill Newton data->error = -EINPROGRESS; 486f95f3850SWill Newton 487f95f3850SWill Newton WARN_ON(host->data); 488f95f3850SWill Newton host->sg = NULL; 489f95f3850SWill Newton host->data = data; 490f95f3850SWill Newton 491f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 492f95f3850SWill Newton host->sg = data->sg; 493f95f3850SWill Newton host->pio_offset = 0; 494f95f3850SWill Newton if (data->flags & MMC_DATA_READ) 495f95f3850SWill Newton host->dir_status = DW_MCI_RECV_STATUS; 496f95f3850SWill Newton else 497f95f3850SWill Newton host->dir_status = DW_MCI_SEND_STATUS; 498f95f3850SWill Newton 499f95f3850SWill Newton temp = mci_readl(host, INTMASK); 500f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 501f95f3850SWill Newton mci_writel(host, INTMASK, temp); 502f95f3850SWill Newton 503f95f3850SWill Newton temp = mci_readl(host, CTRL); 504f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 505f95f3850SWill Newton mci_writel(host, CTRL, temp); 506f95f3850SWill Newton } 507f95f3850SWill Newton } 508f95f3850SWill Newton 509f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 510f95f3850SWill Newton { 511f95f3850SWill Newton struct dw_mci *host = slot->host; 512f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 513f95f3850SWill Newton unsigned int cmd_status = 0; 514f95f3850SWill Newton 515f95f3850SWill Newton mci_writel(host, CMDARG, arg); 516f95f3850SWill Newton wmb(); 517f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 518f95f3850SWill Newton 519f95f3850SWill Newton while (time_before(jiffies, timeout)) { 520f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 521f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 522f95f3850SWill Newton return; 523f95f3850SWill Newton } 524f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 525f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 526f95f3850SWill Newton cmd, arg, cmd_status); 527f95f3850SWill Newton } 528f95f3850SWill Newton 529f95f3850SWill Newton static void dw_mci_setup_bus(struct dw_mci_slot *slot) 530f95f3850SWill Newton { 531f95f3850SWill Newton struct dw_mci *host = slot->host; 532f95f3850SWill Newton u32 div; 533f95f3850SWill Newton 534f95f3850SWill Newton if (slot->clock != host->current_speed) { 535f95f3850SWill Newton if (host->bus_hz % slot->clock) 536f95f3850SWill Newton /* 537f95f3850SWill Newton * move the + 1 after the divide to prevent 538f95f3850SWill Newton * over-clocking the card. 539f95f3850SWill Newton */ 540f95f3850SWill Newton div = ((host->bus_hz / slot->clock) >> 1) + 1; 541f95f3850SWill Newton else 542f95f3850SWill Newton div = (host->bus_hz / slot->clock) >> 1; 543f95f3850SWill Newton 544f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 545f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 546f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 547f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 548f95f3850SWill Newton 549f95f3850SWill Newton /* disable clock */ 550f95f3850SWill Newton mci_writel(host, CLKENA, 0); 551f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 552f95f3850SWill Newton 553f95f3850SWill Newton /* inform CIU */ 554f95f3850SWill Newton mci_send_cmd(slot, 555f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 556f95f3850SWill Newton 557f95f3850SWill Newton /* set clock to desired speed */ 558f95f3850SWill Newton mci_writel(host, CLKDIV, div); 559f95f3850SWill Newton 560f95f3850SWill Newton /* inform CIU */ 561f95f3850SWill Newton mci_send_cmd(slot, 562f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 563f95f3850SWill Newton 564f95f3850SWill Newton /* enable clock */ 565aadb9f41SWill Newton mci_writel(host, CLKENA, SDMMC_CLKEN_ENABLE | 566aadb9f41SWill Newton SDMMC_CLKEN_LOW_PWR); 567f95f3850SWill Newton 568f95f3850SWill Newton /* inform CIU */ 569f95f3850SWill Newton mci_send_cmd(slot, 570f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 571f95f3850SWill Newton 572f95f3850SWill Newton host->current_speed = slot->clock; 573f95f3850SWill Newton } 574f95f3850SWill Newton 575f95f3850SWill Newton /* Set the current slot bus width */ 576f95f3850SWill Newton mci_writel(host, CTYPE, slot->ctype); 577f95f3850SWill Newton } 578f95f3850SWill Newton 579f95f3850SWill Newton static void dw_mci_start_request(struct dw_mci *host, 580f95f3850SWill Newton struct dw_mci_slot *slot) 581f95f3850SWill Newton { 582f95f3850SWill Newton struct mmc_request *mrq; 583f95f3850SWill Newton struct mmc_command *cmd; 584f95f3850SWill Newton struct mmc_data *data; 585f95f3850SWill Newton u32 cmdflags; 586f95f3850SWill Newton 587f95f3850SWill Newton mrq = slot->mrq; 588f95f3850SWill Newton if (host->pdata->select_slot) 589f95f3850SWill Newton host->pdata->select_slot(slot->id); 590f95f3850SWill Newton 591f95f3850SWill Newton /* Slot specific timing and width adjustment */ 592f95f3850SWill Newton dw_mci_setup_bus(slot); 593f95f3850SWill Newton 594f95f3850SWill Newton host->cur_slot = slot; 595f95f3850SWill Newton host->mrq = mrq; 596f95f3850SWill Newton 597f95f3850SWill Newton host->pending_events = 0; 598f95f3850SWill Newton host->completed_events = 0; 599f95f3850SWill Newton host->data_status = 0; 600f95f3850SWill Newton 601f95f3850SWill Newton data = mrq->data; 602f95f3850SWill Newton if (data) { 603f95f3850SWill Newton dw_mci_set_timeout(host); 604f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 605f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 606f95f3850SWill Newton } 607f95f3850SWill Newton 608f95f3850SWill Newton cmd = mrq->cmd; 609f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 610f95f3850SWill Newton 611f95f3850SWill Newton /* this is the first command, send the initialization clock */ 612f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 613f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 614f95f3850SWill Newton 615f95f3850SWill Newton if (data) { 616f95f3850SWill Newton dw_mci_submit_data(host, data); 617f95f3850SWill Newton wmb(); 618f95f3850SWill Newton } 619f95f3850SWill Newton 620f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 621f95f3850SWill Newton 622f95f3850SWill Newton if (mrq->stop) 623f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 624f95f3850SWill Newton } 625f95f3850SWill Newton 626f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 627f95f3850SWill Newton struct mmc_request *mrq) 628f95f3850SWill Newton { 629f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 630f95f3850SWill Newton host->state); 631f95f3850SWill Newton 632f95f3850SWill Newton spin_lock_bh(&host->lock); 633f95f3850SWill Newton slot->mrq = mrq; 634f95f3850SWill Newton 635f95f3850SWill Newton if (host->state == STATE_IDLE) { 636f95f3850SWill Newton host->state = STATE_SENDING_CMD; 637f95f3850SWill Newton dw_mci_start_request(host, slot); 638f95f3850SWill Newton } else { 639f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 640f95f3850SWill Newton } 641f95f3850SWill Newton 642f95f3850SWill Newton spin_unlock_bh(&host->lock); 643f95f3850SWill Newton } 644f95f3850SWill Newton 645f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 646f95f3850SWill Newton { 647f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 648f95f3850SWill Newton struct dw_mci *host = slot->host; 649f95f3850SWill Newton 650f95f3850SWill Newton WARN_ON(slot->mrq); 651f95f3850SWill Newton 652f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 653f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 654f95f3850SWill Newton mmc_request_done(mmc, mrq); 655f95f3850SWill Newton return; 656f95f3850SWill Newton } 657f95f3850SWill Newton 658f95f3850SWill Newton /* We don't support multiple blocks of weird lengths. */ 659f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 660f95f3850SWill Newton } 661f95f3850SWill Newton 662f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 663f95f3850SWill Newton { 664f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 66541babf75SJaehoon Chung u32 regs; 666f95f3850SWill Newton 667f95f3850SWill Newton /* set default 1 bit mode */ 668f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 669f95f3850SWill Newton 670f95f3850SWill Newton switch (ios->bus_width) { 671f95f3850SWill Newton case MMC_BUS_WIDTH_1: 672f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 673f95f3850SWill Newton break; 674f95f3850SWill Newton case MMC_BUS_WIDTH_4: 675f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 676f95f3850SWill Newton break; 677c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 678c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 679c9b2a06fSJaehoon Chung break; 680f95f3850SWill Newton } 681f95f3850SWill Newton 68241babf75SJaehoon Chung /* DDR mode set */ 68341babf75SJaehoon Chung if (ios->ddr) { 68441babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 68541babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 68641babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 68741babf75SJaehoon Chung } 68841babf75SJaehoon Chung 689f95f3850SWill Newton if (ios->clock) { 690f95f3850SWill Newton /* 691f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 692f95f3850SWill Newton * core ios update when finding the minimum. 693f95f3850SWill Newton */ 694f95f3850SWill Newton slot->clock = ios->clock; 695f95f3850SWill Newton } 696f95f3850SWill Newton 697f95f3850SWill Newton switch (ios->power_mode) { 698f95f3850SWill Newton case MMC_POWER_UP: 699f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 700f95f3850SWill Newton break; 701f95f3850SWill Newton default: 702f95f3850SWill Newton break; 703f95f3850SWill Newton } 704f95f3850SWill Newton } 705f95f3850SWill Newton 706f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 707f95f3850SWill Newton { 708f95f3850SWill Newton int read_only; 709f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 710f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 711f95f3850SWill Newton 712f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 713f95f3850SWill Newton if (brd->get_ro) 714f95f3850SWill Newton read_only = brd->get_ro(slot->id); 715f95f3850SWill Newton else 716f95f3850SWill Newton read_only = 717f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 718f95f3850SWill Newton 719f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 720f95f3850SWill Newton read_only ? "read-only" : "read-write"); 721f95f3850SWill Newton 722f95f3850SWill Newton return read_only; 723f95f3850SWill Newton } 724f95f3850SWill Newton 725f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 726f95f3850SWill Newton { 727f95f3850SWill Newton int present; 728f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 729f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 730f95f3850SWill Newton 731f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 732fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 733fc3d7720SJaehoon Chung present = 1; 734fc3d7720SJaehoon Chung else if (brd->get_cd) 735f95f3850SWill Newton present = !brd->get_cd(slot->id); 736f95f3850SWill Newton else 737f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 738f95f3850SWill Newton == 0 ? 1 : 0; 739f95f3850SWill Newton 740f95f3850SWill Newton if (present) 741f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 742f95f3850SWill Newton else 743f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 744f95f3850SWill Newton 745f95f3850SWill Newton return present; 746f95f3850SWill Newton } 747f95f3850SWill Newton 748f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 749f95f3850SWill Newton .request = dw_mci_request, 750f95f3850SWill Newton .set_ios = dw_mci_set_ios, 751f95f3850SWill Newton .get_ro = dw_mci_get_ro, 752f95f3850SWill Newton .get_cd = dw_mci_get_cd, 753f95f3850SWill Newton }; 754f95f3850SWill Newton 755f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 756f95f3850SWill Newton __releases(&host->lock) 757f95f3850SWill Newton __acquires(&host->lock) 758f95f3850SWill Newton { 759f95f3850SWill Newton struct dw_mci_slot *slot; 760f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 761f95f3850SWill Newton 762f95f3850SWill Newton WARN_ON(host->cmd || host->data); 763f95f3850SWill Newton 764f95f3850SWill Newton host->cur_slot->mrq = NULL; 765f95f3850SWill Newton host->mrq = NULL; 766f95f3850SWill Newton if (!list_empty(&host->queue)) { 767f95f3850SWill Newton slot = list_entry(host->queue.next, 768f95f3850SWill Newton struct dw_mci_slot, queue_node); 769f95f3850SWill Newton list_del(&slot->queue_node); 770f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n", 771f95f3850SWill Newton mmc_hostname(slot->mmc)); 772f95f3850SWill Newton host->state = STATE_SENDING_CMD; 773f95f3850SWill Newton dw_mci_start_request(host, slot); 774f95f3850SWill Newton } else { 775f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "list empty\n"); 776f95f3850SWill Newton host->state = STATE_IDLE; 777f95f3850SWill Newton } 778f95f3850SWill Newton 779f95f3850SWill Newton spin_unlock(&host->lock); 780f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 781f95f3850SWill Newton spin_lock(&host->lock); 782f95f3850SWill Newton } 783f95f3850SWill Newton 784f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 785f95f3850SWill Newton { 786f95f3850SWill Newton u32 status = host->cmd_status; 787f95f3850SWill Newton 788f95f3850SWill Newton host->cmd_status = 0; 789f95f3850SWill Newton 790f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 791f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 792f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 793f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 794f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 795f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 796f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 797f95f3850SWill Newton } else { 798f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 799f95f3850SWill Newton cmd->resp[1] = 0; 800f95f3850SWill Newton cmd->resp[2] = 0; 801f95f3850SWill Newton cmd->resp[3] = 0; 802f95f3850SWill Newton } 803f95f3850SWill Newton } 804f95f3850SWill Newton 805f95f3850SWill Newton if (status & SDMMC_INT_RTO) 806f95f3850SWill Newton cmd->error = -ETIMEDOUT; 807f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 808f95f3850SWill Newton cmd->error = -EILSEQ; 809f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 810f95f3850SWill Newton cmd->error = -EIO; 811f95f3850SWill Newton else 812f95f3850SWill Newton cmd->error = 0; 813f95f3850SWill Newton 814f95f3850SWill Newton if (cmd->error) { 815f95f3850SWill Newton /* newer ip versions need a delay between retries */ 816f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 817f95f3850SWill Newton mdelay(20); 818f95f3850SWill Newton 819f95f3850SWill Newton if (cmd->data) { 820f95f3850SWill Newton host->data = NULL; 821f95f3850SWill Newton dw_mci_stop_dma(host); 822f95f3850SWill Newton } 823f95f3850SWill Newton } 824f95f3850SWill Newton } 825f95f3850SWill Newton 826f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 827f95f3850SWill Newton { 828f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 829f95f3850SWill Newton struct mmc_data *data; 830f95f3850SWill Newton struct mmc_command *cmd; 831f95f3850SWill Newton enum dw_mci_state state; 832f95f3850SWill Newton enum dw_mci_state prev_state; 833f95f3850SWill Newton u32 status; 834f95f3850SWill Newton 835f95f3850SWill Newton spin_lock(&host->lock); 836f95f3850SWill Newton 837f95f3850SWill Newton state = host->state; 838f95f3850SWill Newton data = host->data; 839f95f3850SWill Newton 840f95f3850SWill Newton do { 841f95f3850SWill Newton prev_state = state; 842f95f3850SWill Newton 843f95f3850SWill Newton switch (state) { 844f95f3850SWill Newton case STATE_IDLE: 845f95f3850SWill Newton break; 846f95f3850SWill Newton 847f95f3850SWill Newton case STATE_SENDING_CMD: 848f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 849f95f3850SWill Newton &host->pending_events)) 850f95f3850SWill Newton break; 851f95f3850SWill Newton 852f95f3850SWill Newton cmd = host->cmd; 853f95f3850SWill Newton host->cmd = NULL; 854f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 855f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->cmd); 856f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 857f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 858f95f3850SWill Newton goto unlock; 859f95f3850SWill Newton } 860f95f3850SWill Newton 861f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 862f95f3850SWill Newton /* fall through */ 863f95f3850SWill Newton 864f95f3850SWill Newton case STATE_SENDING_DATA: 865f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 866f95f3850SWill Newton &host->pending_events)) { 867f95f3850SWill Newton dw_mci_stop_dma(host); 868f95f3850SWill Newton if (data->stop) 869f95f3850SWill Newton send_stop_cmd(host, data); 870f95f3850SWill Newton state = STATE_DATA_ERROR; 871f95f3850SWill Newton break; 872f95f3850SWill Newton } 873f95f3850SWill Newton 874f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 875f95f3850SWill Newton &host->pending_events)) 876f95f3850SWill Newton break; 877f95f3850SWill Newton 878f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 879f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 880f95f3850SWill Newton /* fall through */ 881f95f3850SWill Newton 882f95f3850SWill Newton case STATE_DATA_BUSY: 883f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 884f95f3850SWill Newton &host->pending_events)) 885f95f3850SWill Newton break; 886f95f3850SWill Newton 887f95f3850SWill Newton host->data = NULL; 888f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 889f95f3850SWill Newton status = host->data_status; 890f95f3850SWill Newton 891f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 892f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 893f95f3850SWill Newton dev_err(&host->pdev->dev, 894f95f3850SWill Newton "data timeout error\n"); 895f95f3850SWill Newton data->error = -ETIMEDOUT; 896f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 897f95f3850SWill Newton dev_err(&host->pdev->dev, 898f95f3850SWill Newton "data CRC error\n"); 899f95f3850SWill Newton data->error = -EILSEQ; 900f95f3850SWill Newton } else { 901f95f3850SWill Newton dev_err(&host->pdev->dev, 902f95f3850SWill Newton "data FIFO error " 903f95f3850SWill Newton "(status=%08x)\n", 904f95f3850SWill Newton status); 905f95f3850SWill Newton data->error = -EIO; 906f95f3850SWill Newton } 907f95f3850SWill Newton } else { 908f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 909f95f3850SWill Newton data->error = 0; 910f95f3850SWill Newton } 911f95f3850SWill Newton 912f95f3850SWill Newton if (!data->stop) { 913f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 914f95f3850SWill Newton goto unlock; 915f95f3850SWill Newton } 916f95f3850SWill Newton 917f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 918f95f3850SWill Newton if (!data->error) 919f95f3850SWill Newton send_stop_cmd(host, data); 920f95f3850SWill Newton /* fall through */ 921f95f3850SWill Newton 922f95f3850SWill Newton case STATE_SENDING_STOP: 923f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 924f95f3850SWill Newton &host->pending_events)) 925f95f3850SWill Newton break; 926f95f3850SWill Newton 927f95f3850SWill Newton host->cmd = NULL; 928f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 929f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 930f95f3850SWill Newton goto unlock; 931f95f3850SWill Newton 932f95f3850SWill Newton case STATE_DATA_ERROR: 933f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 934f95f3850SWill Newton &host->pending_events)) 935f95f3850SWill Newton break; 936f95f3850SWill Newton 937f95f3850SWill Newton state = STATE_DATA_BUSY; 938f95f3850SWill Newton break; 939f95f3850SWill Newton } 940f95f3850SWill Newton } while (state != prev_state); 941f95f3850SWill Newton 942f95f3850SWill Newton host->state = state; 943f95f3850SWill Newton unlock: 944f95f3850SWill Newton spin_unlock(&host->lock); 945f95f3850SWill Newton 946f95f3850SWill Newton } 947f95f3850SWill Newton 948f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 949f95f3850SWill Newton { 950f95f3850SWill Newton u16 *pdata = (u16 *)buf; 951f95f3850SWill Newton 952f95f3850SWill Newton WARN_ON(cnt % 2 != 0); 953f95f3850SWill Newton 954f95f3850SWill Newton cnt = cnt >> 1; 955f95f3850SWill Newton while (cnt > 0) { 956f95f3850SWill Newton mci_writew(host, DATA, *pdata++); 957f95f3850SWill Newton cnt--; 958f95f3850SWill Newton } 959f95f3850SWill Newton } 960f95f3850SWill Newton 961f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 962f95f3850SWill Newton { 963f95f3850SWill Newton u16 *pdata = (u16 *)buf; 964f95f3850SWill Newton 965f95f3850SWill Newton WARN_ON(cnt % 2 != 0); 966f95f3850SWill Newton 967f95f3850SWill Newton cnt = cnt >> 1; 968f95f3850SWill Newton while (cnt > 0) { 969f95f3850SWill Newton *pdata++ = mci_readw(host, DATA); 970f95f3850SWill Newton cnt--; 971f95f3850SWill Newton } 972f95f3850SWill Newton } 973f95f3850SWill Newton 974f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 975f95f3850SWill Newton { 976f95f3850SWill Newton u32 *pdata = (u32 *)buf; 977f95f3850SWill Newton 978f95f3850SWill Newton WARN_ON(cnt % 4 != 0); 979f95f3850SWill Newton WARN_ON((unsigned long)pdata & 0x3); 980f95f3850SWill Newton 981f95f3850SWill Newton cnt = cnt >> 2; 982f95f3850SWill Newton while (cnt > 0) { 983f95f3850SWill Newton mci_writel(host, DATA, *pdata++); 984f95f3850SWill Newton cnt--; 985f95f3850SWill Newton } 986f95f3850SWill Newton } 987f95f3850SWill Newton 988f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 989f95f3850SWill Newton { 990f95f3850SWill Newton u32 *pdata = (u32 *)buf; 991f95f3850SWill Newton 992f95f3850SWill Newton WARN_ON(cnt % 4 != 0); 993f95f3850SWill Newton WARN_ON((unsigned long)pdata & 0x3); 994f95f3850SWill Newton 995f95f3850SWill Newton cnt = cnt >> 2; 996f95f3850SWill Newton while (cnt > 0) { 997f95f3850SWill Newton *pdata++ = mci_readl(host, DATA); 998f95f3850SWill Newton cnt--; 999f95f3850SWill Newton } 1000f95f3850SWill Newton } 1001f95f3850SWill Newton 1002f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1003f95f3850SWill Newton { 1004f95f3850SWill Newton u64 *pdata = (u64 *)buf; 1005f95f3850SWill Newton 1006f95f3850SWill Newton WARN_ON(cnt % 8 != 0); 1007f95f3850SWill Newton 1008f95f3850SWill Newton cnt = cnt >> 3; 1009f95f3850SWill Newton while (cnt > 0) { 1010f95f3850SWill Newton mci_writeq(host, DATA, *pdata++); 1011f95f3850SWill Newton cnt--; 1012f95f3850SWill Newton } 1013f95f3850SWill Newton } 1014f95f3850SWill Newton 1015f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1016f95f3850SWill Newton { 1017f95f3850SWill Newton u64 *pdata = (u64 *)buf; 1018f95f3850SWill Newton 1019f95f3850SWill Newton WARN_ON(cnt % 8 != 0); 1020f95f3850SWill Newton 1021f95f3850SWill Newton cnt = cnt >> 3; 1022f95f3850SWill Newton while (cnt > 0) { 1023f95f3850SWill Newton *pdata++ = mci_readq(host, DATA); 1024f95f3850SWill Newton cnt--; 1025f95f3850SWill Newton } 1026f95f3850SWill Newton } 1027f95f3850SWill Newton 1028f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1029f95f3850SWill Newton { 1030f95f3850SWill Newton struct scatterlist *sg = host->sg; 1031f95f3850SWill Newton void *buf = sg_virt(sg); 1032f95f3850SWill Newton unsigned int offset = host->pio_offset; 1033f95f3850SWill Newton struct mmc_data *data = host->data; 1034f95f3850SWill Newton int shift = host->data_shift; 1035f95f3850SWill Newton u32 status; 1036ba6a902dSChris Ball unsigned int nbytes = 0, len; 1037f95f3850SWill Newton 1038f95f3850SWill Newton do { 1039f95f3850SWill Newton len = SDMMC_GET_FCNT(mci_readl(host, STATUS)) << shift; 1040f95f3850SWill Newton if (offset + len <= sg->length) { 1041f95f3850SWill Newton host->pull_data(host, (void *)(buf + offset), len); 1042f95f3850SWill Newton 1043f95f3850SWill Newton offset += len; 1044f95f3850SWill Newton nbytes += len; 1045f95f3850SWill Newton 1046f95f3850SWill Newton if (offset == sg->length) { 1047f95f3850SWill Newton flush_dcache_page(sg_page(sg)); 1048f95f3850SWill Newton host->sg = sg = sg_next(sg); 1049f95f3850SWill Newton if (!sg) 1050f95f3850SWill Newton goto done; 1051f95f3850SWill Newton 1052f95f3850SWill Newton offset = 0; 1053f95f3850SWill Newton buf = sg_virt(sg); 1054f95f3850SWill Newton } 1055f95f3850SWill Newton } else { 1056f95f3850SWill Newton unsigned int remaining = sg->length - offset; 1057f95f3850SWill Newton host->pull_data(host, (void *)(buf + offset), 1058f95f3850SWill Newton remaining); 1059f95f3850SWill Newton nbytes += remaining; 1060f95f3850SWill Newton 1061f95f3850SWill Newton flush_dcache_page(sg_page(sg)); 1062f95f3850SWill Newton host->sg = sg = sg_next(sg); 1063f95f3850SWill Newton if (!sg) 1064f95f3850SWill Newton goto done; 1065f95f3850SWill Newton 1066f95f3850SWill Newton offset = len - remaining; 1067f95f3850SWill Newton buf = sg_virt(sg); 1068f95f3850SWill Newton host->pull_data(host, buf, offset); 1069f95f3850SWill Newton nbytes += offset; 1070f95f3850SWill Newton } 1071f95f3850SWill Newton 1072f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1073f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1074f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1075f95f3850SWill Newton host->data_status = status; 1076f95f3850SWill Newton data->bytes_xfered += nbytes; 1077f95f3850SWill Newton smp_wmb(); 1078f95f3850SWill Newton 1079f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1080f95f3850SWill Newton 1081f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1082f95f3850SWill Newton return; 1083f95f3850SWill Newton } 1084f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1085f95f3850SWill Newton len = SDMMC_GET_FCNT(mci_readl(host, STATUS)); 1086f95f3850SWill Newton host->pio_offset = offset; 1087f95f3850SWill Newton data->bytes_xfered += nbytes; 1088f95f3850SWill Newton return; 1089f95f3850SWill Newton 1090f95f3850SWill Newton done: 1091f95f3850SWill Newton data->bytes_xfered += nbytes; 1092f95f3850SWill Newton smp_wmb(); 1093f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1094f95f3850SWill Newton } 1095f95f3850SWill Newton 1096f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1097f95f3850SWill Newton { 1098f95f3850SWill Newton struct scatterlist *sg = host->sg; 1099f95f3850SWill Newton void *buf = sg_virt(sg); 1100f95f3850SWill Newton unsigned int offset = host->pio_offset; 1101f95f3850SWill Newton struct mmc_data *data = host->data; 1102f95f3850SWill Newton int shift = host->data_shift; 1103f95f3850SWill Newton u32 status; 1104f95f3850SWill Newton unsigned int nbytes = 0, len; 1105f95f3850SWill Newton 1106f95f3850SWill Newton do { 1107f95f3850SWill Newton len = SDMMC_FIFO_SZ - 1108f95f3850SWill Newton (SDMMC_GET_FCNT(mci_readl(host, STATUS)) << shift); 1109f95f3850SWill Newton if (offset + len <= sg->length) { 1110f95f3850SWill Newton host->push_data(host, (void *)(buf + offset), len); 1111f95f3850SWill Newton 1112f95f3850SWill Newton offset += len; 1113f95f3850SWill Newton nbytes += len; 1114f95f3850SWill Newton if (offset == sg->length) { 1115f95f3850SWill Newton host->sg = sg = sg_next(sg); 1116f95f3850SWill Newton if (!sg) 1117f95f3850SWill Newton goto done; 1118f95f3850SWill Newton 1119f95f3850SWill Newton offset = 0; 1120f95f3850SWill Newton buf = sg_virt(sg); 1121f95f3850SWill Newton } 1122f95f3850SWill Newton } else { 1123f95f3850SWill Newton unsigned int remaining = sg->length - offset; 1124f95f3850SWill Newton 1125f95f3850SWill Newton host->push_data(host, (void *)(buf + offset), 1126f95f3850SWill Newton remaining); 1127f95f3850SWill Newton nbytes += remaining; 1128f95f3850SWill Newton 1129f95f3850SWill Newton host->sg = sg = sg_next(sg); 1130f95f3850SWill Newton if (!sg) 1131f95f3850SWill Newton goto done; 1132f95f3850SWill Newton 1133f95f3850SWill Newton offset = len - remaining; 1134f95f3850SWill Newton buf = sg_virt(sg); 1135f95f3850SWill Newton host->push_data(host, (void *)buf, offset); 1136f95f3850SWill Newton nbytes += offset; 1137f95f3850SWill Newton } 1138f95f3850SWill Newton 1139f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1140f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1141f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1142f95f3850SWill Newton host->data_status = status; 1143f95f3850SWill Newton data->bytes_xfered += nbytes; 1144f95f3850SWill Newton 1145f95f3850SWill Newton smp_wmb(); 1146f95f3850SWill Newton 1147f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1148f95f3850SWill Newton 1149f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1150f95f3850SWill Newton return; 1151f95f3850SWill Newton } 1152f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1153f95f3850SWill Newton 1154f95f3850SWill Newton host->pio_offset = offset; 1155f95f3850SWill Newton data->bytes_xfered += nbytes; 1156f95f3850SWill Newton 1157f95f3850SWill Newton return; 1158f95f3850SWill Newton 1159f95f3850SWill Newton done: 1160f95f3850SWill Newton data->bytes_xfered += nbytes; 1161f95f3850SWill Newton smp_wmb(); 1162f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1163f95f3850SWill Newton } 1164f95f3850SWill Newton 1165f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1166f95f3850SWill Newton { 1167f95f3850SWill Newton if (!host->cmd_status) 1168f95f3850SWill Newton host->cmd_status = status; 1169f95f3850SWill Newton 1170f95f3850SWill Newton smp_wmb(); 1171f95f3850SWill Newton 1172f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1173f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1174f95f3850SWill Newton } 1175f95f3850SWill Newton 1176f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1177f95f3850SWill Newton { 1178f95f3850SWill Newton struct dw_mci *host = dev_id; 1179f95f3850SWill Newton u32 status, pending; 1180f95f3850SWill Newton unsigned int pass_count = 0; 1181f95f3850SWill Newton 1182f95f3850SWill Newton do { 1183f95f3850SWill Newton status = mci_readl(host, RINTSTS); 1184f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1185f95f3850SWill Newton 1186f95f3850SWill Newton /* 1187f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1188f95f3850SWill Newton * is configured. 1189f95f3850SWill Newton */ 1190f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1191f95f3850SWill Newton if (!pending && 1192f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1193f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1194f95f3850SWill Newton } 1195f95f3850SWill Newton 1196f95f3850SWill Newton if (!pending) 1197f95f3850SWill Newton break; 1198f95f3850SWill Newton 1199f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1200f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1201f95f3850SWill Newton host->cmd_status = status; 1202f95f3850SWill Newton smp_wmb(); 1203f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1204f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1205f95f3850SWill Newton } 1206f95f3850SWill Newton 1207f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1208f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1209f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1210f95f3850SWill Newton host->data_status = status; 1211f95f3850SWill Newton smp_wmb(); 1212f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1213f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1214f95f3850SWill Newton } 1215f95f3850SWill Newton 1216f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1217f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1218f95f3850SWill Newton if (!host->data_status) 1219f95f3850SWill Newton host->data_status = status; 1220f95f3850SWill Newton smp_wmb(); 1221f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1222f95f3850SWill Newton if (host->sg != NULL) 1223f95f3850SWill Newton dw_mci_read_data_pio(host); 1224f95f3850SWill Newton } 1225f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1226f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1227f95f3850SWill Newton } 1228f95f3850SWill Newton 1229f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1230f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1231f95f3850SWill Newton if (host->sg) 1232f95f3850SWill Newton dw_mci_read_data_pio(host); 1233f95f3850SWill Newton } 1234f95f3850SWill Newton 1235f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1236f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1237f95f3850SWill Newton if (host->sg) 1238f95f3850SWill Newton dw_mci_write_data_pio(host); 1239f95f3850SWill Newton } 1240f95f3850SWill Newton 1241f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1242f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1243f95f3850SWill Newton dw_mci_cmd_interrupt(host, status); 1244f95f3850SWill Newton } 1245f95f3850SWill Newton 1246f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1247f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 1248f95f3850SWill Newton tasklet_schedule(&host->card_tasklet); 1249f95f3850SWill Newton } 1250f95f3850SWill Newton 1251f95f3850SWill Newton } while (pass_count++ < 5); 1252f95f3850SWill Newton 1253f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1254f95f3850SWill Newton /* Handle DMA interrupts */ 1255f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1256f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1257f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1258f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1259f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1260f95f3850SWill Newton host->dma_ops->complete(host); 1261f95f3850SWill Newton } 1262f95f3850SWill Newton #endif 1263f95f3850SWill Newton 1264f95f3850SWill Newton return IRQ_HANDLED; 1265f95f3850SWill Newton } 1266f95f3850SWill Newton 1267f95f3850SWill Newton static void dw_mci_tasklet_card(unsigned long data) 1268f95f3850SWill Newton { 1269f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)data; 1270f95f3850SWill Newton int i; 1271f95f3850SWill Newton 1272f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1273f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1274f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1275f95f3850SWill Newton struct mmc_request *mrq; 1276f95f3850SWill Newton int present; 1277f95f3850SWill Newton u32 ctrl; 1278f95f3850SWill Newton 1279f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1280f95f3850SWill Newton while (present != slot->last_detect_state) { 1281f95f3850SWill Newton spin_lock(&host->lock); 1282f95f3850SWill Newton 1283f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1284f95f3850SWill Newton present ? "inserted" : "removed"); 1285f95f3850SWill Newton 1286f95f3850SWill Newton /* Card change detected */ 1287f95f3850SWill Newton slot->last_detect_state = present; 1288f95f3850SWill Newton 1289f95f3850SWill Newton /* Power up slot */ 1290f95f3850SWill Newton if (present != 0) { 1291f95f3850SWill Newton if (host->pdata->setpower) 1292f95f3850SWill Newton host->pdata->setpower(slot->id, 1293f95f3850SWill Newton mmc->ocr_avail); 1294f95f3850SWill Newton 1295f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1296f95f3850SWill Newton } 1297f95f3850SWill Newton 1298f95f3850SWill Newton /* Clean up queue if present */ 1299f95f3850SWill Newton mrq = slot->mrq; 1300f95f3850SWill Newton if (mrq) { 1301f95f3850SWill Newton if (mrq == host->mrq) { 1302f95f3850SWill Newton host->data = NULL; 1303f95f3850SWill Newton host->cmd = NULL; 1304f95f3850SWill Newton 1305f95f3850SWill Newton switch (host->state) { 1306f95f3850SWill Newton case STATE_IDLE: 1307f95f3850SWill Newton break; 1308f95f3850SWill Newton case STATE_SENDING_CMD: 1309f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1310f95f3850SWill Newton if (!mrq->data) 1311f95f3850SWill Newton break; 1312f95f3850SWill Newton /* fall through */ 1313f95f3850SWill Newton case STATE_SENDING_DATA: 1314f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1315f95f3850SWill Newton dw_mci_stop_dma(host); 1316f95f3850SWill Newton break; 1317f95f3850SWill Newton case STATE_DATA_BUSY: 1318f95f3850SWill Newton case STATE_DATA_ERROR: 1319f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1320f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1321f95f3850SWill Newton if (!mrq->stop) 1322f95f3850SWill Newton break; 1323f95f3850SWill Newton /* fall through */ 1324f95f3850SWill Newton case STATE_SENDING_STOP: 1325f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1326f95f3850SWill Newton break; 1327f95f3850SWill Newton } 1328f95f3850SWill Newton 1329f95f3850SWill Newton dw_mci_request_end(host, mrq); 1330f95f3850SWill Newton } else { 1331f95f3850SWill Newton list_del(&slot->queue_node); 1332f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1333f95f3850SWill Newton if (mrq->data) 1334f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1335f95f3850SWill Newton if (mrq->stop) 1336f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1337f95f3850SWill Newton 1338f95f3850SWill Newton spin_unlock(&host->lock); 1339f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1340f95f3850SWill Newton spin_lock(&host->lock); 1341f95f3850SWill Newton } 1342f95f3850SWill Newton } 1343f95f3850SWill Newton 1344f95f3850SWill Newton /* Power down slot */ 1345f95f3850SWill Newton if (present == 0) { 1346f95f3850SWill Newton if (host->pdata->setpower) 1347f95f3850SWill Newton host->pdata->setpower(slot->id, 0); 1348f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1349f95f3850SWill Newton 1350f95f3850SWill Newton /* 1351f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1352f95f3850SWill Newton * block interrupt, hence setting the 1353f95f3850SWill Newton * scatter-gather pointer to NULL. 1354f95f3850SWill Newton */ 1355f95f3850SWill Newton host->sg = NULL; 1356f95f3850SWill Newton 1357f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1358f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1359f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1360f95f3850SWill Newton 1361f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1362f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1363f95f3850SWill Newton ctrl |= 0x01; /* Software reset of DMA */ 1364f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1365f95f3850SWill Newton #endif 1366f95f3850SWill Newton 1367f95f3850SWill Newton } 1368f95f3850SWill Newton 1369f95f3850SWill Newton spin_unlock(&host->lock); 1370f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1371f95f3850SWill Newton } 1372f95f3850SWill Newton 1373f95f3850SWill Newton mmc_detect_change(slot->mmc, 1374f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1375f95f3850SWill Newton } 1376f95f3850SWill Newton } 1377f95f3850SWill Newton 1378f95f3850SWill Newton static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1379f95f3850SWill Newton { 1380f95f3850SWill Newton struct mmc_host *mmc; 1381f95f3850SWill Newton struct dw_mci_slot *slot; 1382f95f3850SWill Newton 1383f95f3850SWill Newton mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), &host->pdev->dev); 1384f95f3850SWill Newton if (!mmc) 1385f95f3850SWill Newton return -ENOMEM; 1386f95f3850SWill Newton 1387f95f3850SWill Newton slot = mmc_priv(mmc); 1388f95f3850SWill Newton slot->id = id; 1389f95f3850SWill Newton slot->mmc = mmc; 1390f95f3850SWill Newton slot->host = host; 1391f95f3850SWill Newton 1392f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1393f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1394f95f3850SWill Newton mmc->f_max = host->bus_hz; 1395f95f3850SWill Newton 1396f95f3850SWill Newton if (host->pdata->get_ocr) 1397f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1398f95f3850SWill Newton else 1399f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1400f95f3850SWill Newton 1401f95f3850SWill Newton /* 1402f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1403f95f3850SWill Newton * is detected. 1404f95f3850SWill Newton */ 1405f95f3850SWill Newton if (host->pdata->setpower) 1406f95f3850SWill Newton host->pdata->setpower(id, 0); 1407f95f3850SWill Newton 1408fc3d7720SJaehoon Chung if (host->pdata->caps) 1409fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1410fc3d7720SJaehoon Chung else 1411f95f3850SWill Newton mmc->caps = 0; 1412fc3d7720SJaehoon Chung 1413f95f3850SWill Newton if (host->pdata->get_bus_wd) 1414f95f3850SWill Newton if (host->pdata->get_bus_wd(slot->id) >= 4) 1415f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1416f95f3850SWill Newton 1417f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 1418f95f3850SWill Newton mmc->caps |= MMC_CAP_SD_HIGHSPEED; 1419f95f3850SWill Newton 1420f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1421f95f3850SWill Newton mmc->max_segs = host->ring_size; 1422f95f3850SWill Newton mmc->max_blk_size = 65536; 1423f95f3850SWill Newton mmc->max_blk_count = host->ring_size; 1424f95f3850SWill Newton mmc->max_seg_size = 0x1000; 1425f95f3850SWill Newton mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1426f95f3850SWill Newton #else 1427f95f3850SWill Newton if (host->pdata->blk_settings) { 1428f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1429f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1430f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1431f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1432f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1433f95f3850SWill Newton } else { 1434f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1435f95f3850SWill Newton mmc->max_segs = 64; 1436f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1437f95f3850SWill Newton mmc->max_blk_count = 512; 1438f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1439f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1440f95f3850SWill Newton } 1441f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1442f95f3850SWill Newton 1443f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1444f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1445f95f3850SWill Newton else 1446f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1447f95f3850SWill Newton 1448f95f3850SWill Newton host->slot[id] = slot; 1449f95f3850SWill Newton mmc_add_host(mmc); 1450f95f3850SWill Newton 1451f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1452f95f3850SWill Newton dw_mci_init_debugfs(slot); 1453f95f3850SWill Newton #endif 1454f95f3850SWill Newton 1455f95f3850SWill Newton /* Card initially undetected */ 1456f95f3850SWill Newton slot->last_detect_state = 0; 1457f95f3850SWill Newton 1458dd6c4b98SWill Newton /* 1459dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 1460dd6c4b98SWill Newton * need to run the detect tasklet 1461dd6c4b98SWill Newton */ 1462dd6c4b98SWill Newton tasklet_schedule(&host->card_tasklet); 1463dd6c4b98SWill Newton 1464f95f3850SWill Newton return 0; 1465f95f3850SWill Newton } 1466f95f3850SWill Newton 1467f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 1468f95f3850SWill Newton { 1469f95f3850SWill Newton /* Shutdown detect IRQ */ 1470f95f3850SWill Newton if (slot->host->pdata->exit) 1471f95f3850SWill Newton slot->host->pdata->exit(id); 1472f95f3850SWill Newton 1473f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 1474f95f3850SWill Newton mmc_remove_host(slot->mmc); 1475f95f3850SWill Newton slot->host->slot[id] = NULL; 1476f95f3850SWill Newton mmc_free_host(slot->mmc); 1477f95f3850SWill Newton } 1478f95f3850SWill Newton 1479f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 1480f95f3850SWill Newton { 1481f95f3850SWill Newton /* Alloc memory for sg translation */ 1482f95f3850SWill Newton host->sg_cpu = dma_alloc_coherent(&host->pdev->dev, PAGE_SIZE, 1483f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 1484f95f3850SWill Newton if (!host->sg_cpu) { 1485f95f3850SWill Newton dev_err(&host->pdev->dev, "%s: could not alloc DMA memory\n", 1486f95f3850SWill Newton __func__); 1487f95f3850SWill Newton goto no_dma; 1488f95f3850SWill Newton } 1489f95f3850SWill Newton 1490f95f3850SWill Newton /* Determine which DMA interface to use */ 1491f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1492f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 1493f95f3850SWill Newton dev_info(&host->pdev->dev, "Using internal DMA controller.\n"); 1494f95f3850SWill Newton #endif 1495f95f3850SWill Newton 1496f95f3850SWill Newton if (!host->dma_ops) 1497f95f3850SWill Newton goto no_dma; 1498f95f3850SWill Newton 1499f95f3850SWill Newton if (host->dma_ops->init) { 1500f95f3850SWill Newton if (host->dma_ops->init(host)) { 1501f95f3850SWill Newton dev_err(&host->pdev->dev, "%s: Unable to initialize " 1502f95f3850SWill Newton "DMA Controller.\n", __func__); 1503f95f3850SWill Newton goto no_dma; 1504f95f3850SWill Newton } 1505f95f3850SWill Newton } else { 1506f95f3850SWill Newton dev_err(&host->pdev->dev, "DMA initialization not found.\n"); 1507f95f3850SWill Newton goto no_dma; 1508f95f3850SWill Newton } 1509f95f3850SWill Newton 1510f95f3850SWill Newton host->use_dma = 1; 1511f95f3850SWill Newton return; 1512f95f3850SWill Newton 1513f95f3850SWill Newton no_dma: 1514f95f3850SWill Newton dev_info(&host->pdev->dev, "Using PIO mode.\n"); 1515f95f3850SWill Newton host->use_dma = 0; 1516f95f3850SWill Newton return; 1517f95f3850SWill Newton } 1518f95f3850SWill Newton 1519f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 1520f95f3850SWill Newton { 1521f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 1522f95f3850SWill Newton unsigned int ctrl; 1523f95f3850SWill Newton 1524f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1525f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 1526f95f3850SWill Newton 1527f95f3850SWill Newton /* wait till resets clear */ 1528f95f3850SWill Newton do { 1529f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1530f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1531f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 1532f95f3850SWill Newton return true; 1533f95f3850SWill Newton } while (time_before(jiffies, timeout)); 1534f95f3850SWill Newton 1535f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 1536f95f3850SWill Newton 1537f95f3850SWill Newton return false; 1538f95f3850SWill Newton } 1539f95f3850SWill Newton 1540f95f3850SWill Newton static int dw_mci_probe(struct platform_device *pdev) 1541f95f3850SWill Newton { 1542f95f3850SWill Newton struct dw_mci *host; 1543f95f3850SWill Newton struct resource *regs; 1544f95f3850SWill Newton struct dw_mci_board *pdata; 1545f95f3850SWill Newton int irq, ret, i, width; 1546f95f3850SWill Newton u32 fifo_size; 1547f95f3850SWill Newton 1548f95f3850SWill Newton regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1549f95f3850SWill Newton if (!regs) 1550f95f3850SWill Newton return -ENXIO; 1551f95f3850SWill Newton 1552f95f3850SWill Newton irq = platform_get_irq(pdev, 0); 1553f95f3850SWill Newton if (irq < 0) 1554f95f3850SWill Newton return irq; 1555f95f3850SWill Newton 1556f95f3850SWill Newton host = kzalloc(sizeof(struct dw_mci), GFP_KERNEL); 1557f95f3850SWill Newton if (!host) 1558f95f3850SWill Newton return -ENOMEM; 1559f95f3850SWill Newton 1560f95f3850SWill Newton host->pdev = pdev; 1561f95f3850SWill Newton host->pdata = pdata = pdev->dev.platform_data; 1562f95f3850SWill Newton if (!pdata || !pdata->init) { 1563f95f3850SWill Newton dev_err(&pdev->dev, 1564f95f3850SWill Newton "Platform data must supply init function\n"); 1565f95f3850SWill Newton ret = -ENODEV; 1566f95f3850SWill Newton goto err_freehost; 1567f95f3850SWill Newton } 1568f95f3850SWill Newton 1569f95f3850SWill Newton if (!pdata->select_slot && pdata->num_slots > 1) { 1570f95f3850SWill Newton dev_err(&pdev->dev, 1571f95f3850SWill Newton "Platform data must supply select_slot function\n"); 1572f95f3850SWill Newton ret = -ENODEV; 1573f95f3850SWill Newton goto err_freehost; 1574f95f3850SWill Newton } 1575f95f3850SWill Newton 1576f95f3850SWill Newton if (!pdata->bus_hz) { 1577f95f3850SWill Newton dev_err(&pdev->dev, 1578f95f3850SWill Newton "Platform data must supply bus speed\n"); 1579f95f3850SWill Newton ret = -ENODEV; 1580f95f3850SWill Newton goto err_freehost; 1581f95f3850SWill Newton } 1582f95f3850SWill Newton 1583f95f3850SWill Newton host->bus_hz = pdata->bus_hz; 1584f95f3850SWill Newton host->quirks = pdata->quirks; 1585f95f3850SWill Newton 1586f95f3850SWill Newton spin_lock_init(&host->lock); 1587f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 1588f95f3850SWill Newton 1589f95f3850SWill Newton ret = -ENOMEM; 1590f95f3850SWill Newton host->regs = ioremap(regs->start, regs->end - regs->start + 1); 1591f95f3850SWill Newton if (!host->regs) 1592f95f3850SWill Newton goto err_freehost; 1593f95f3850SWill Newton 1594f95f3850SWill Newton host->dma_ops = pdata->dma_ops; 1595f95f3850SWill Newton dw_mci_init_dma(host); 1596f95f3850SWill Newton 1597f95f3850SWill Newton /* 1598f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 1599f95f3850SWill Newton * the correct values. 1600f95f3850SWill Newton */ 1601f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 1602f95f3850SWill Newton if (!i) { 1603f95f3850SWill Newton host->push_data = dw_mci_push_data16; 1604f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 1605f95f3850SWill Newton width = 16; 1606f95f3850SWill Newton host->data_shift = 1; 1607f95f3850SWill Newton } else if (i == 2) { 1608f95f3850SWill Newton host->push_data = dw_mci_push_data64; 1609f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 1610f95f3850SWill Newton width = 64; 1611f95f3850SWill Newton host->data_shift = 3; 1612f95f3850SWill Newton } else { 1613f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 1614f95f3850SWill Newton WARN((i != 1), 1615f95f3850SWill Newton "HCON reports a reserved host data width!\n" 1616f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 1617f95f3850SWill Newton host->push_data = dw_mci_push_data32; 1618f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 1619f95f3850SWill Newton width = 32; 1620f95f3850SWill Newton host->data_shift = 2; 1621f95f3850SWill Newton } 1622f95f3850SWill Newton 1623f95f3850SWill Newton /* Reset all blocks */ 1624f95f3850SWill Newton if (!mci_wait_reset(&pdev->dev, host)) { 1625f95f3850SWill Newton ret = -ENODEV; 1626f95f3850SWill Newton goto err_dmaunmap; 1627f95f3850SWill Newton } 1628f95f3850SWill Newton 1629f95f3850SWill Newton /* Clear the interrupts for the host controller */ 1630f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1631f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 1632f95f3850SWill Newton 1633f95f3850SWill Newton /* Put in max timeout */ 1634f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 1635f95f3850SWill Newton 1636f95f3850SWill Newton /* 1637f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 1638f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 1639f95f3850SWill Newton */ 1640f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 1641f95f3850SWill Newton fifo_size = (fifo_size >> 16) & 0x7ff; 1642*e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 1643*e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 1644*e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 1645f95f3850SWill Newton 1646f95f3850SWill Newton /* disable clock to CIU */ 1647f95f3850SWill Newton mci_writel(host, CLKENA, 0); 1648f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 1649f95f3850SWill Newton 1650f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 1651f95f3850SWill Newton tasklet_init(&host->card_tasklet, 1652f95f3850SWill Newton dw_mci_tasklet_card, (unsigned long)host); 1653f95f3850SWill Newton 1654f95f3850SWill Newton ret = request_irq(irq, dw_mci_interrupt, 0, "dw-mci", host); 1655f95f3850SWill Newton if (ret) 1656f95f3850SWill Newton goto err_dmaunmap; 1657f95f3850SWill Newton 1658f95f3850SWill Newton platform_set_drvdata(pdev, host); 1659f95f3850SWill Newton 1660f95f3850SWill Newton if (host->pdata->num_slots) 1661f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 1662f95f3850SWill Newton else 1663f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 1664f95f3850SWill Newton 1665f95f3850SWill Newton /* We need at least one slot to succeed */ 1666f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1667f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 1668f95f3850SWill Newton if (ret) { 1669f95f3850SWill Newton ret = -ENODEV; 1670f95f3850SWill Newton goto err_init_slot; 1671f95f3850SWill Newton } 1672f95f3850SWill Newton } 1673f95f3850SWill Newton 1674f95f3850SWill Newton /* 1675f95f3850SWill Newton * Enable interrupts for command done, data over, data empty, card det, 1676f95f3850SWill Newton * receive ready and error such as transmit, receive timeout, crc error 1677f95f3850SWill Newton */ 1678f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1679f95f3850SWill Newton mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 1680f95f3850SWill Newton SDMMC_INT_TXDR | SDMMC_INT_RXDR | 1681f95f3850SWill Newton DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 1682f95f3850SWill Newton mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 1683f95f3850SWill Newton 1684f95f3850SWill Newton dev_info(&pdev->dev, "DW MMC controller at irq %d, " 1685f95f3850SWill Newton "%d bit host data width\n", irq, width); 1686f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 1687f95f3850SWill Newton dev_info(&pdev->dev, "Internal DMAC interrupt fix enabled.\n"); 1688f95f3850SWill Newton 1689f95f3850SWill Newton return 0; 1690f95f3850SWill Newton 1691f95f3850SWill Newton err_init_slot: 1692f95f3850SWill Newton /* De-init any initialized slots */ 1693f95f3850SWill Newton while (i > 0) { 1694f95f3850SWill Newton if (host->slot[i]) 1695f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 1696f95f3850SWill Newton i--; 1697f95f3850SWill Newton } 1698f95f3850SWill Newton free_irq(irq, host); 1699f95f3850SWill Newton 1700f95f3850SWill Newton err_dmaunmap: 1701f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 1702f95f3850SWill Newton host->dma_ops->exit(host); 1703f95f3850SWill Newton dma_free_coherent(&host->pdev->dev, PAGE_SIZE, 1704f95f3850SWill Newton host->sg_cpu, host->sg_dma); 1705f95f3850SWill Newton iounmap(host->regs); 1706f95f3850SWill Newton 1707f95f3850SWill Newton err_freehost: 1708f95f3850SWill Newton kfree(host); 1709f95f3850SWill Newton return ret; 1710f95f3850SWill Newton } 1711f95f3850SWill Newton 1712f95f3850SWill Newton static int __exit dw_mci_remove(struct platform_device *pdev) 1713f95f3850SWill Newton { 1714f95f3850SWill Newton struct dw_mci *host = platform_get_drvdata(pdev); 1715f95f3850SWill Newton int i; 1716f95f3850SWill Newton 1717f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1718f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 1719f95f3850SWill Newton 1720f95f3850SWill Newton platform_set_drvdata(pdev, NULL); 1721f95f3850SWill Newton 1722f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1723f95f3850SWill Newton dev_dbg(&pdev->dev, "remove slot %d\n", i); 1724f95f3850SWill Newton if (host->slot[i]) 1725f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 1726f95f3850SWill Newton } 1727f95f3850SWill Newton 1728f95f3850SWill Newton /* disable clock to CIU */ 1729f95f3850SWill Newton mci_writel(host, CLKENA, 0); 1730f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 1731f95f3850SWill Newton 1732f95f3850SWill Newton free_irq(platform_get_irq(pdev, 0), host); 1733f95f3850SWill Newton dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); 1734f95f3850SWill Newton 1735f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 1736f95f3850SWill Newton host->dma_ops->exit(host); 1737f95f3850SWill Newton 1738f95f3850SWill Newton iounmap(host->regs); 1739f95f3850SWill Newton 1740f95f3850SWill Newton kfree(host); 1741f95f3850SWill Newton return 0; 1742f95f3850SWill Newton } 1743f95f3850SWill Newton 1744f95f3850SWill Newton #ifdef CONFIG_PM 1745f95f3850SWill Newton /* 1746f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 1747f95f3850SWill Newton */ 1748f95f3850SWill Newton static int dw_mci_suspend(struct platform_device *pdev, pm_message_t mesg) 1749f95f3850SWill Newton { 1750f95f3850SWill Newton int i, ret; 1751f95f3850SWill Newton struct dw_mci *host = platform_get_drvdata(pdev); 1752f95f3850SWill Newton 1753f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1754f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1755f95f3850SWill Newton if (!slot) 1756f95f3850SWill Newton continue; 1757f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 1758f95f3850SWill Newton if (ret < 0) { 1759f95f3850SWill Newton while (--i >= 0) { 1760f95f3850SWill Newton slot = host->slot[i]; 1761f95f3850SWill Newton if (slot) 1762f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 1763f95f3850SWill Newton } 1764f95f3850SWill Newton return ret; 1765f95f3850SWill Newton } 1766f95f3850SWill Newton } 1767f95f3850SWill Newton 1768f95f3850SWill Newton return 0; 1769f95f3850SWill Newton } 1770f95f3850SWill Newton 1771f95f3850SWill Newton static int dw_mci_resume(struct platform_device *pdev) 1772f95f3850SWill Newton { 1773f95f3850SWill Newton int i, ret; 1774f95f3850SWill Newton struct dw_mci *host = platform_get_drvdata(pdev); 1775f95f3850SWill Newton 1776*e61cf118SJaehoon Chung if (host->dma_ops->init) 1777*e61cf118SJaehoon Chung host->dma_ops->init(host); 1778*e61cf118SJaehoon Chung 1779*e61cf118SJaehoon Chung if (!mci_wait_reset(&pdev->dev, host)) { 1780*e61cf118SJaehoon Chung ret = -ENODEV; 1781*e61cf118SJaehoon Chung return ret; 1782*e61cf118SJaehoon Chung } 1783*e61cf118SJaehoon Chung 1784*e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 1785*e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 1786*e61cf118SJaehoon Chung 1787*e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 1788*e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 1789*e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 1790*e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 1791*e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 1792*e61cf118SJaehoon Chung 1793f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1794f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1795f95f3850SWill Newton if (!slot) 1796f95f3850SWill Newton continue; 1797f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 1798f95f3850SWill Newton if (ret < 0) 1799f95f3850SWill Newton return ret; 1800f95f3850SWill Newton } 1801f95f3850SWill Newton 1802f95f3850SWill Newton return 0; 1803f95f3850SWill Newton } 1804f95f3850SWill Newton #else 1805f95f3850SWill Newton #define dw_mci_suspend NULL 1806f95f3850SWill Newton #define dw_mci_resume NULL 1807f95f3850SWill Newton #endif /* CONFIG_PM */ 1808f95f3850SWill Newton 1809f95f3850SWill Newton static struct platform_driver dw_mci_driver = { 1810f95f3850SWill Newton .remove = __exit_p(dw_mci_remove), 1811f95f3850SWill Newton .suspend = dw_mci_suspend, 1812f95f3850SWill Newton .resume = dw_mci_resume, 1813f95f3850SWill Newton .driver = { 1814f95f3850SWill Newton .name = "dw_mmc", 1815f95f3850SWill Newton }, 1816f95f3850SWill Newton }; 1817f95f3850SWill Newton 1818f95f3850SWill Newton static int __init dw_mci_init(void) 1819f95f3850SWill Newton { 1820f95f3850SWill Newton return platform_driver_probe(&dw_mci_driver, dw_mci_probe); 1821f95f3850SWill Newton } 1822f95f3850SWill Newton 1823f95f3850SWill Newton static void __exit dw_mci_exit(void) 1824f95f3850SWill Newton { 1825f95f3850SWill Newton platform_driver_unregister(&dw_mci_driver); 1826f95f3850SWill Newton } 1827f95f3850SWill Newton 1828f95f3850SWill Newton module_init(dw_mci_init); 1829f95f3850SWill Newton module_exit(dw_mci_exit); 1830f95f3850SWill Newton 1831f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 1832f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 1833f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 1834f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 1835