1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/scatterlist.h> 26f95f3850SWill Newton #include <linux/seq_file.h> 27f95f3850SWill Newton #include <linux/slab.h> 28f95f3850SWill Newton #include <linux/stat.h> 29f95f3850SWill Newton #include <linux/delay.h> 30f95f3850SWill Newton #include <linux/irq.h> 31f95f3850SWill Newton #include <linux/mmc/host.h> 32f95f3850SWill Newton #include <linux/mmc/mmc.h> 33f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 34f95f3850SWill Newton #include <linux/bitops.h> 35c07946a3SJaehoon Chung #include <linux/regulator/consumer.h> 361791b13eSJames Hogan #include <linux/workqueue.h> 37f95f3850SWill Newton 38f95f3850SWill Newton #include "dw_mmc.h" 39f95f3850SWill Newton 40f95f3850SWill Newton /* Common flag combinations */ 41f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 42f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 43f95f3850SWill Newton SDMMC_INT_EBE) 44f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 45f95f3850SWill Newton SDMMC_INT_RESP_ERR) 46f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 47f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 48f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 49f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 50f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 51f95f3850SWill Newton 52f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 53f95f3850SWill Newton struct idmac_desc { 54f95f3850SWill Newton u32 des0; /* Control Descriptor */ 55f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 56f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 57f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 58f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 59f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 60f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 61f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 62f95f3850SWill Newton 63f95f3850SWill Newton u32 des1; /* Buffer sizes */ 64f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 65f95f3850SWill Newton ((d)->des1 = ((d)->des1 & 0x03ffc000) | ((s) & 0x3fff)) 66f95f3850SWill Newton 67f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 68f95f3850SWill Newton 69f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 70f95f3850SWill Newton }; 71f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 72f95f3850SWill Newton 73f95f3850SWill Newton /** 74f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 75f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 76f95f3850SWill Newton * @host: The MMC controller this slot is using. 77f95f3850SWill Newton * @ctype: Card type for this slot. 78f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 79f95f3850SWill Newton * processed, or NULL when the slot is idle. 80f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 81f95f3850SWill Newton * &struct dw_mci. 82f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 83f95f3850SWill Newton * @flags: Random state bits associated with the slot. 84f95f3850SWill Newton * @id: Number of this slot. 85f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 86f95f3850SWill Newton */ 87f95f3850SWill Newton struct dw_mci_slot { 88f95f3850SWill Newton struct mmc_host *mmc; 89f95f3850SWill Newton struct dw_mci *host; 90f95f3850SWill Newton 91f95f3850SWill Newton u32 ctype; 92f95f3850SWill Newton 93f95f3850SWill Newton struct mmc_request *mrq; 94f95f3850SWill Newton struct list_head queue_node; 95f95f3850SWill Newton 96f95f3850SWill Newton unsigned int clock; 97f95f3850SWill Newton unsigned long flags; 98f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 99f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 100f95f3850SWill Newton int id; 101f95f3850SWill Newton int last_detect_state; 102f95f3850SWill Newton }; 103f95f3850SWill Newton 1041791b13eSJames Hogan static struct workqueue_struct *dw_mci_card_workqueue; 1051791b13eSJames Hogan 106f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 107f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 108f95f3850SWill Newton { 109f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 110f95f3850SWill Newton struct mmc_request *mrq; 111f95f3850SWill Newton struct mmc_command *cmd; 112f95f3850SWill Newton struct mmc_command *stop; 113f95f3850SWill Newton struct mmc_data *data; 114f95f3850SWill Newton 115f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 116f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 117f95f3850SWill Newton mrq = slot->mrq; 118f95f3850SWill Newton 119f95f3850SWill Newton if (mrq) { 120f95f3850SWill Newton cmd = mrq->cmd; 121f95f3850SWill Newton data = mrq->data; 122f95f3850SWill Newton stop = mrq->stop; 123f95f3850SWill Newton 124f95f3850SWill Newton if (cmd) 125f95f3850SWill Newton seq_printf(s, 126f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 127f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 128f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 129f95f3850SWill Newton cmd->resp[2], cmd->error); 130f95f3850SWill Newton if (data) 131f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 132f95f3850SWill Newton data->bytes_xfered, data->blocks, 133f95f3850SWill Newton data->blksz, data->flags, data->error); 134f95f3850SWill Newton if (stop) 135f95f3850SWill Newton seq_printf(s, 136f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 137f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 138f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 139f95f3850SWill Newton stop->resp[2], stop->error); 140f95f3850SWill Newton } 141f95f3850SWill Newton 142f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 143f95f3850SWill Newton 144f95f3850SWill Newton return 0; 145f95f3850SWill Newton } 146f95f3850SWill Newton 147f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 148f95f3850SWill Newton { 149f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 150f95f3850SWill Newton } 151f95f3850SWill Newton 152f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 153f95f3850SWill Newton .owner = THIS_MODULE, 154f95f3850SWill Newton .open = dw_mci_req_open, 155f95f3850SWill Newton .read = seq_read, 156f95f3850SWill Newton .llseek = seq_lseek, 157f95f3850SWill Newton .release = single_release, 158f95f3850SWill Newton }; 159f95f3850SWill Newton 160f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 161f95f3850SWill Newton { 162f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 163f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 164f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 165f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 166f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 167f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 168f95f3850SWill Newton 169f95f3850SWill Newton return 0; 170f95f3850SWill Newton } 171f95f3850SWill Newton 172f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 173f95f3850SWill Newton { 174f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 175f95f3850SWill Newton } 176f95f3850SWill Newton 177f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 178f95f3850SWill Newton .owner = THIS_MODULE, 179f95f3850SWill Newton .open = dw_mci_regs_open, 180f95f3850SWill Newton .read = seq_read, 181f95f3850SWill Newton .llseek = seq_lseek, 182f95f3850SWill Newton .release = single_release, 183f95f3850SWill Newton }; 184f95f3850SWill Newton 185f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 186f95f3850SWill Newton { 187f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 188f95f3850SWill Newton struct dw_mci *host = slot->host; 189f95f3850SWill Newton struct dentry *root; 190f95f3850SWill Newton struct dentry *node; 191f95f3850SWill Newton 192f95f3850SWill Newton root = mmc->debugfs_root; 193f95f3850SWill Newton if (!root) 194f95f3850SWill Newton return; 195f95f3850SWill Newton 196f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 197f95f3850SWill Newton &dw_mci_regs_fops); 198f95f3850SWill Newton if (!node) 199f95f3850SWill Newton goto err; 200f95f3850SWill Newton 201f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 202f95f3850SWill Newton &dw_mci_req_fops); 203f95f3850SWill Newton if (!node) 204f95f3850SWill Newton goto err; 205f95f3850SWill Newton 206f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 207f95f3850SWill Newton if (!node) 208f95f3850SWill Newton goto err; 209f95f3850SWill Newton 210f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 211f95f3850SWill Newton (u32 *)&host->pending_events); 212f95f3850SWill Newton if (!node) 213f95f3850SWill Newton goto err; 214f95f3850SWill Newton 215f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 216f95f3850SWill Newton (u32 *)&host->completed_events); 217f95f3850SWill Newton if (!node) 218f95f3850SWill Newton goto err; 219f95f3850SWill Newton 220f95f3850SWill Newton return; 221f95f3850SWill Newton 222f95f3850SWill Newton err: 223f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 224f95f3850SWill Newton } 225f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 226f95f3850SWill Newton 227f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 228f95f3850SWill Newton { 229f95f3850SWill Newton /* timeout (maximum) */ 230f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 231f95f3850SWill Newton } 232f95f3850SWill Newton 233f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 234f95f3850SWill Newton { 235f95f3850SWill Newton struct mmc_data *data; 236f95f3850SWill Newton u32 cmdr; 237f95f3850SWill Newton cmd->error = -EINPROGRESS; 238f95f3850SWill Newton 239f95f3850SWill Newton cmdr = cmd->opcode; 240f95f3850SWill Newton 241f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 242f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 243f95f3850SWill Newton else 244f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 245f95f3850SWill Newton 246f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 247f95f3850SWill Newton /* We expect a response, so set this bit */ 248f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 249f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 250f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 251f95f3850SWill Newton } 252f95f3850SWill Newton 253f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 254f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 255f95f3850SWill Newton 256f95f3850SWill Newton data = cmd->data; 257f95f3850SWill Newton if (data) { 258f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 259f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 260f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 261f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 262f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 263f95f3850SWill Newton } 264f95f3850SWill Newton 265f95f3850SWill Newton return cmdr; 266f95f3850SWill Newton } 267f95f3850SWill Newton 268f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 269f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 270f95f3850SWill Newton { 271f95f3850SWill Newton host->cmd = cmd; 272f95f3850SWill Newton dev_vdbg(&host->pdev->dev, 273f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 274f95f3850SWill Newton cmd->arg, cmd_flags); 275f95f3850SWill Newton 276f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 277f95f3850SWill Newton wmb(); 278f95f3850SWill Newton 279f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 280f95f3850SWill Newton } 281f95f3850SWill Newton 282f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 283f95f3850SWill Newton { 284f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 285f95f3850SWill Newton } 286f95f3850SWill Newton 287f95f3850SWill Newton /* DMA interface functions */ 288f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 289f95f3850SWill Newton { 290f95f3850SWill Newton if (host->use_dma) { 291f95f3850SWill Newton host->dma_ops->stop(host); 292f95f3850SWill Newton host->dma_ops->cleanup(host); 293f95f3850SWill Newton } else { 294f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 295f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 296f95f3850SWill Newton } 297f95f3850SWill Newton } 298f95f3850SWill Newton 299f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 300f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 301f95f3850SWill Newton { 302f95f3850SWill Newton struct mmc_data *data = host->data; 303f95f3850SWill Newton 304f95f3850SWill Newton if (data) 305f95f3850SWill Newton dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, 306f95f3850SWill Newton ((data->flags & MMC_DATA_WRITE) 307f95f3850SWill Newton ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 308f95f3850SWill Newton } 309f95f3850SWill Newton 310f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 311f95f3850SWill Newton { 312f95f3850SWill Newton u32 temp; 313f95f3850SWill Newton 314f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 315f95f3850SWill Newton temp = mci_readl(host, CTRL); 316f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 317f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 318f95f3850SWill Newton mci_writel(host, CTRL, temp); 319f95f3850SWill Newton 320f95f3850SWill Newton /* Stop the IDMAC running */ 321f95f3850SWill Newton temp = mci_readl(host, BMOD); 322a5289a43SJaehoon Chung temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB); 323f95f3850SWill Newton mci_writel(host, BMOD, temp); 324f95f3850SWill Newton } 325f95f3850SWill Newton 326f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 327f95f3850SWill Newton { 328f95f3850SWill Newton struct mmc_data *data = host->data; 329f95f3850SWill Newton 330f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "DMA complete\n"); 331f95f3850SWill Newton 332f95f3850SWill Newton host->dma_ops->cleanup(host); 333f95f3850SWill Newton 334f95f3850SWill Newton /* 335f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 336f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 337f95f3850SWill Newton */ 338f95f3850SWill Newton if (data) { 339f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 340f95f3850SWill Newton tasklet_schedule(&host->tasklet); 341f95f3850SWill Newton } 342f95f3850SWill Newton } 343f95f3850SWill Newton 344f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 345f95f3850SWill Newton unsigned int sg_len) 346f95f3850SWill Newton { 347f95f3850SWill Newton int i; 348f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 349f95f3850SWill Newton 350f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 351f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 352f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 353f95f3850SWill Newton 354f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 355f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 356f95f3850SWill Newton 357f95f3850SWill Newton /* Buffer length */ 358f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 359f95f3850SWill Newton 360f95f3850SWill Newton /* Physical address to DMA to/from */ 361f95f3850SWill Newton desc->des2 = mem_addr; 362f95f3850SWill Newton } 363f95f3850SWill Newton 364f95f3850SWill Newton /* Set first descriptor */ 365f95f3850SWill Newton desc = host->sg_cpu; 366f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 367f95f3850SWill Newton 368f95f3850SWill Newton /* Set last descriptor */ 369f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 370f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 371f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 372f95f3850SWill Newton 373f95f3850SWill Newton wmb(); 374f95f3850SWill Newton } 375f95f3850SWill Newton 376f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 377f95f3850SWill Newton { 378f95f3850SWill Newton u32 temp; 379f95f3850SWill Newton 380f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 381f95f3850SWill Newton 382f95f3850SWill Newton /* Select IDMAC interface */ 383f95f3850SWill Newton temp = mci_readl(host, CTRL); 384f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 385f95f3850SWill Newton mci_writel(host, CTRL, temp); 386f95f3850SWill Newton 387f95f3850SWill Newton wmb(); 388f95f3850SWill Newton 389f95f3850SWill Newton /* Enable the IDMAC */ 390f95f3850SWill Newton temp = mci_readl(host, BMOD); 391a5289a43SJaehoon Chung temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB; 392f95f3850SWill Newton mci_writel(host, BMOD, temp); 393f95f3850SWill Newton 394f95f3850SWill Newton /* Start it running */ 395f95f3850SWill Newton mci_writel(host, PLDMND, 1); 396f95f3850SWill Newton } 397f95f3850SWill Newton 398f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 399f95f3850SWill Newton { 400f95f3850SWill Newton struct idmac_desc *p; 401f95f3850SWill Newton int i; 402f95f3850SWill Newton 403f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 404f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 405f95f3850SWill Newton 406f95f3850SWill Newton /* Forward link the descriptor list */ 407f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 408f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 409f95f3850SWill Newton 410f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 411f95f3850SWill Newton p->des3 = host->sg_dma; 412f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 413f95f3850SWill Newton 414f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 415f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 416f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 417f95f3850SWill Newton 418f95f3850SWill Newton /* Set the descriptor base address */ 419f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 420f95f3850SWill Newton return 0; 421f95f3850SWill Newton } 422f95f3850SWill Newton 423f95f3850SWill Newton static struct dw_mci_dma_ops dw_mci_idmac_ops = { 424f95f3850SWill Newton .init = dw_mci_idmac_init, 425f95f3850SWill Newton .start = dw_mci_idmac_start_dma, 426f95f3850SWill Newton .stop = dw_mci_idmac_stop_dma, 427f95f3850SWill Newton .complete = dw_mci_idmac_complete_dma, 428f95f3850SWill Newton .cleanup = dw_mci_dma_cleanup, 429f95f3850SWill Newton }; 430f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 431f95f3850SWill Newton 432f95f3850SWill Newton static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 433f95f3850SWill Newton { 434f95f3850SWill Newton struct scatterlist *sg; 435f95f3850SWill Newton unsigned int i, direction, sg_len; 436f95f3850SWill Newton u32 temp; 437f95f3850SWill Newton 438f95f3850SWill Newton /* If we don't have a channel, we can't do DMA */ 439f95f3850SWill Newton if (!host->use_dma) 440f95f3850SWill Newton return -ENODEV; 441f95f3850SWill Newton 442f95f3850SWill Newton /* 443f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 444f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 445f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 446f95f3850SWill Newton */ 447f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 448f95f3850SWill Newton return -EINVAL; 449f95f3850SWill Newton if (data->blksz & 3) 450f95f3850SWill Newton return -EINVAL; 451f95f3850SWill Newton 452f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 453f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 454f95f3850SWill Newton return -EINVAL; 455f95f3850SWill Newton } 456f95f3850SWill Newton 457f95f3850SWill Newton if (data->flags & MMC_DATA_READ) 458f95f3850SWill Newton direction = DMA_FROM_DEVICE; 459f95f3850SWill Newton else 460f95f3850SWill Newton direction = DMA_TO_DEVICE; 461f95f3850SWill Newton 462f95f3850SWill Newton sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, 463f95f3850SWill Newton direction); 464f95f3850SWill Newton 465f95f3850SWill Newton dev_vdbg(&host->pdev->dev, 466f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 467f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 468f95f3850SWill Newton sg_len); 469f95f3850SWill Newton 470f95f3850SWill Newton /* Enable the DMA interface */ 471f95f3850SWill Newton temp = mci_readl(host, CTRL); 472f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 473f95f3850SWill Newton mci_writel(host, CTRL, temp); 474f95f3850SWill Newton 475f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 476f95f3850SWill Newton temp = mci_readl(host, INTMASK); 477f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 478f95f3850SWill Newton mci_writel(host, INTMASK, temp); 479f95f3850SWill Newton 480f95f3850SWill Newton host->dma_ops->start(host, sg_len); 481f95f3850SWill Newton 482f95f3850SWill Newton return 0; 483f95f3850SWill Newton } 484f95f3850SWill Newton 485f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 486f95f3850SWill Newton { 487f95f3850SWill Newton u32 temp; 488f95f3850SWill Newton 489f95f3850SWill Newton data->error = -EINPROGRESS; 490f95f3850SWill Newton 491f95f3850SWill Newton WARN_ON(host->data); 492f95f3850SWill Newton host->sg = NULL; 493f95f3850SWill Newton host->data = data; 494f95f3850SWill Newton 495f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 496f95f3850SWill Newton host->sg = data->sg; 497f95f3850SWill Newton host->pio_offset = 0; 498f95f3850SWill Newton if (data->flags & MMC_DATA_READ) 499f95f3850SWill Newton host->dir_status = DW_MCI_RECV_STATUS; 500f95f3850SWill Newton else 501f95f3850SWill Newton host->dir_status = DW_MCI_SEND_STATUS; 502f95f3850SWill Newton 503b40af3aaSJames Hogan mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); 504f95f3850SWill Newton temp = mci_readl(host, INTMASK); 505f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 506f95f3850SWill Newton mci_writel(host, INTMASK, temp); 507f95f3850SWill Newton 508f95f3850SWill Newton temp = mci_readl(host, CTRL); 509f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 510f95f3850SWill Newton mci_writel(host, CTRL, temp); 511f95f3850SWill Newton } 512f95f3850SWill Newton } 513f95f3850SWill Newton 514f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 515f95f3850SWill Newton { 516f95f3850SWill Newton struct dw_mci *host = slot->host; 517f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 518f95f3850SWill Newton unsigned int cmd_status = 0; 519f95f3850SWill Newton 520f95f3850SWill Newton mci_writel(host, CMDARG, arg); 521f95f3850SWill Newton wmb(); 522f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 523f95f3850SWill Newton 524f95f3850SWill Newton while (time_before(jiffies, timeout)) { 525f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 526f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 527f95f3850SWill Newton return; 528f95f3850SWill Newton } 529f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 530f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 531f95f3850SWill Newton cmd, arg, cmd_status); 532f95f3850SWill Newton } 533f95f3850SWill Newton 534f95f3850SWill Newton static void dw_mci_setup_bus(struct dw_mci_slot *slot) 535f95f3850SWill Newton { 536f95f3850SWill Newton struct dw_mci *host = slot->host; 537f95f3850SWill Newton u32 div; 538f95f3850SWill Newton 539f95f3850SWill Newton if (slot->clock != host->current_speed) { 540f95f3850SWill Newton if (host->bus_hz % slot->clock) 541f95f3850SWill Newton /* 542f95f3850SWill Newton * move the + 1 after the divide to prevent 543f95f3850SWill Newton * over-clocking the card. 544f95f3850SWill Newton */ 545f95f3850SWill Newton div = ((host->bus_hz / slot->clock) >> 1) + 1; 546f95f3850SWill Newton else 547f95f3850SWill Newton div = (host->bus_hz / slot->clock) >> 1; 548f95f3850SWill Newton 549f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 550f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 551f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 552f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 553f95f3850SWill Newton 554f95f3850SWill Newton /* disable clock */ 555f95f3850SWill Newton mci_writel(host, CLKENA, 0); 556f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 557f95f3850SWill Newton 558f95f3850SWill Newton /* inform CIU */ 559f95f3850SWill Newton mci_send_cmd(slot, 560f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 561f95f3850SWill Newton 562f95f3850SWill Newton /* set clock to desired speed */ 563f95f3850SWill Newton mci_writel(host, CLKDIV, div); 564f95f3850SWill Newton 565f95f3850SWill Newton /* inform CIU */ 566f95f3850SWill Newton mci_send_cmd(slot, 567f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 568f95f3850SWill Newton 569f95f3850SWill Newton /* enable clock */ 570aadb9f41SWill Newton mci_writel(host, CLKENA, SDMMC_CLKEN_ENABLE | 571aadb9f41SWill Newton SDMMC_CLKEN_LOW_PWR); 572f95f3850SWill Newton 573f95f3850SWill Newton /* inform CIU */ 574f95f3850SWill Newton mci_send_cmd(slot, 575f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 576f95f3850SWill Newton 577f95f3850SWill Newton host->current_speed = slot->clock; 578f95f3850SWill Newton } 579f95f3850SWill Newton 580f95f3850SWill Newton /* Set the current slot bus width */ 5811d56c453SSeungwon Jeon mci_writel(host, CTYPE, (slot->ctype << slot->id)); 582f95f3850SWill Newton } 583f95f3850SWill Newton 584f95f3850SWill Newton static void dw_mci_start_request(struct dw_mci *host, 585f95f3850SWill Newton struct dw_mci_slot *slot) 586f95f3850SWill Newton { 587f95f3850SWill Newton struct mmc_request *mrq; 588f95f3850SWill Newton struct mmc_command *cmd; 589f95f3850SWill Newton struct mmc_data *data; 590f95f3850SWill Newton u32 cmdflags; 591f95f3850SWill Newton 592f95f3850SWill Newton mrq = slot->mrq; 593f95f3850SWill Newton if (host->pdata->select_slot) 594f95f3850SWill Newton host->pdata->select_slot(slot->id); 595f95f3850SWill Newton 596f95f3850SWill Newton /* Slot specific timing and width adjustment */ 597f95f3850SWill Newton dw_mci_setup_bus(slot); 598f95f3850SWill Newton 599f95f3850SWill Newton host->cur_slot = slot; 600f95f3850SWill Newton host->mrq = mrq; 601f95f3850SWill Newton 602f95f3850SWill Newton host->pending_events = 0; 603f95f3850SWill Newton host->completed_events = 0; 604f95f3850SWill Newton host->data_status = 0; 605f95f3850SWill Newton 606f95f3850SWill Newton data = mrq->data; 607f95f3850SWill Newton if (data) { 608f95f3850SWill Newton dw_mci_set_timeout(host); 609f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 610f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 611f95f3850SWill Newton } 612f95f3850SWill Newton 613f95f3850SWill Newton cmd = mrq->cmd; 614f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 615f95f3850SWill Newton 616f95f3850SWill Newton /* this is the first command, send the initialization clock */ 617f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 618f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 619f95f3850SWill Newton 620f95f3850SWill Newton if (data) { 621f95f3850SWill Newton dw_mci_submit_data(host, data); 622f95f3850SWill Newton wmb(); 623f95f3850SWill Newton } 624f95f3850SWill Newton 625f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 626f95f3850SWill Newton 627f95f3850SWill Newton if (mrq->stop) 628f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 629f95f3850SWill Newton } 630f95f3850SWill Newton 6317456caaeSJames Hogan /* must be called with host->lock held */ 632f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 633f95f3850SWill Newton struct mmc_request *mrq) 634f95f3850SWill Newton { 635f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 636f95f3850SWill Newton host->state); 637f95f3850SWill Newton 638f95f3850SWill Newton slot->mrq = mrq; 639f95f3850SWill Newton 640f95f3850SWill Newton if (host->state == STATE_IDLE) { 641f95f3850SWill Newton host->state = STATE_SENDING_CMD; 642f95f3850SWill Newton dw_mci_start_request(host, slot); 643f95f3850SWill Newton } else { 644f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 645f95f3850SWill Newton } 646f95f3850SWill Newton } 647f95f3850SWill Newton 648f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 649f95f3850SWill Newton { 650f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 651f95f3850SWill Newton struct dw_mci *host = slot->host; 652f95f3850SWill Newton 653f95f3850SWill Newton WARN_ON(slot->mrq); 654f95f3850SWill Newton 6557456caaeSJames Hogan /* 6567456caaeSJames Hogan * The check for card presence and queueing of the request must be 6577456caaeSJames Hogan * atomic, otherwise the card could be removed in between and the 6587456caaeSJames Hogan * request wouldn't fail until another card was inserted. 6597456caaeSJames Hogan */ 6607456caaeSJames Hogan spin_lock_bh(&host->lock); 6617456caaeSJames Hogan 662f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 6637456caaeSJames Hogan spin_unlock_bh(&host->lock); 664f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 665f95f3850SWill Newton mmc_request_done(mmc, mrq); 666f95f3850SWill Newton return; 667f95f3850SWill Newton } 668f95f3850SWill Newton 669f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 6707456caaeSJames Hogan 6717456caaeSJames Hogan spin_unlock_bh(&host->lock); 672f95f3850SWill Newton } 673f95f3850SWill Newton 674f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 675f95f3850SWill Newton { 676f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 67741babf75SJaehoon Chung u32 regs; 678f95f3850SWill Newton 679f95f3850SWill Newton /* set default 1 bit mode */ 680f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 681f95f3850SWill Newton 682f95f3850SWill Newton switch (ios->bus_width) { 683f95f3850SWill Newton case MMC_BUS_WIDTH_1: 684f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 685f95f3850SWill Newton break; 686f95f3850SWill Newton case MMC_BUS_WIDTH_4: 687f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 688f95f3850SWill Newton break; 689c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 690c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 691c9b2a06fSJaehoon Chung break; 692f95f3850SWill Newton } 693f95f3850SWill Newton 69441babf75SJaehoon Chung /* DDR mode set */ 69541babf75SJaehoon Chung if (ios->ddr) { 69641babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 69741babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 69841babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 69941babf75SJaehoon Chung } 70041babf75SJaehoon Chung 701f95f3850SWill Newton if (ios->clock) { 702f95f3850SWill Newton /* 703f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 704f95f3850SWill Newton * core ios update when finding the minimum. 705f95f3850SWill Newton */ 706f95f3850SWill Newton slot->clock = ios->clock; 707f95f3850SWill Newton } 708f95f3850SWill Newton 709f95f3850SWill Newton switch (ios->power_mode) { 710f95f3850SWill Newton case MMC_POWER_UP: 711f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 712f95f3850SWill Newton break; 713f95f3850SWill Newton default: 714f95f3850SWill Newton break; 715f95f3850SWill Newton } 716f95f3850SWill Newton } 717f95f3850SWill Newton 718f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 719f95f3850SWill Newton { 720f95f3850SWill Newton int read_only; 721f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 722f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 723f95f3850SWill Newton 724f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 725f95f3850SWill Newton if (brd->get_ro) 726f95f3850SWill Newton read_only = brd->get_ro(slot->id); 727f95f3850SWill Newton else 728f95f3850SWill Newton read_only = 729f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 730f95f3850SWill Newton 731f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 732f95f3850SWill Newton read_only ? "read-only" : "read-write"); 733f95f3850SWill Newton 734f95f3850SWill Newton return read_only; 735f95f3850SWill Newton } 736f95f3850SWill Newton 737f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 738f95f3850SWill Newton { 739f95f3850SWill Newton int present; 740f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 741f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 742f95f3850SWill Newton 743f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 744fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 745fc3d7720SJaehoon Chung present = 1; 746fc3d7720SJaehoon Chung else if (brd->get_cd) 747f95f3850SWill Newton present = !brd->get_cd(slot->id); 748f95f3850SWill Newton else 749f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 750f95f3850SWill Newton == 0 ? 1 : 0; 751f95f3850SWill Newton 752f95f3850SWill Newton if (present) 753f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 754f95f3850SWill Newton else 755f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 756f95f3850SWill Newton 757f95f3850SWill Newton return present; 758f95f3850SWill Newton } 759f95f3850SWill Newton 760f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 761f95f3850SWill Newton .request = dw_mci_request, 762f95f3850SWill Newton .set_ios = dw_mci_set_ios, 763f95f3850SWill Newton .get_ro = dw_mci_get_ro, 764f95f3850SWill Newton .get_cd = dw_mci_get_cd, 765f95f3850SWill Newton }; 766f95f3850SWill Newton 767f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 768f95f3850SWill Newton __releases(&host->lock) 769f95f3850SWill Newton __acquires(&host->lock) 770f95f3850SWill Newton { 771f95f3850SWill Newton struct dw_mci_slot *slot; 772f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 773f95f3850SWill Newton 774f95f3850SWill Newton WARN_ON(host->cmd || host->data); 775f95f3850SWill Newton 776f95f3850SWill Newton host->cur_slot->mrq = NULL; 777f95f3850SWill Newton host->mrq = NULL; 778f95f3850SWill Newton if (!list_empty(&host->queue)) { 779f95f3850SWill Newton slot = list_entry(host->queue.next, 780f95f3850SWill Newton struct dw_mci_slot, queue_node); 781f95f3850SWill Newton list_del(&slot->queue_node); 782f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n", 783f95f3850SWill Newton mmc_hostname(slot->mmc)); 784f95f3850SWill Newton host->state = STATE_SENDING_CMD; 785f95f3850SWill Newton dw_mci_start_request(host, slot); 786f95f3850SWill Newton } else { 787f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "list empty\n"); 788f95f3850SWill Newton host->state = STATE_IDLE; 789f95f3850SWill Newton } 790f95f3850SWill Newton 791f95f3850SWill Newton spin_unlock(&host->lock); 792f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 793f95f3850SWill Newton spin_lock(&host->lock); 794f95f3850SWill Newton } 795f95f3850SWill Newton 796f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 797f95f3850SWill Newton { 798f95f3850SWill Newton u32 status = host->cmd_status; 799f95f3850SWill Newton 800f95f3850SWill Newton host->cmd_status = 0; 801f95f3850SWill Newton 802f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 803f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 804f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 805f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 806f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 807f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 808f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 809f95f3850SWill Newton } else { 810f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 811f95f3850SWill Newton cmd->resp[1] = 0; 812f95f3850SWill Newton cmd->resp[2] = 0; 813f95f3850SWill Newton cmd->resp[3] = 0; 814f95f3850SWill Newton } 815f95f3850SWill Newton } 816f95f3850SWill Newton 817f95f3850SWill Newton if (status & SDMMC_INT_RTO) 818f95f3850SWill Newton cmd->error = -ETIMEDOUT; 819f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 820f95f3850SWill Newton cmd->error = -EILSEQ; 821f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 822f95f3850SWill Newton cmd->error = -EIO; 823f95f3850SWill Newton else 824f95f3850SWill Newton cmd->error = 0; 825f95f3850SWill Newton 826f95f3850SWill Newton if (cmd->error) { 827f95f3850SWill Newton /* newer ip versions need a delay between retries */ 828f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 829f95f3850SWill Newton mdelay(20); 830f95f3850SWill Newton 831f95f3850SWill Newton if (cmd->data) { 832f95f3850SWill Newton host->data = NULL; 833f95f3850SWill Newton dw_mci_stop_dma(host); 834f95f3850SWill Newton } 835f95f3850SWill Newton } 836f95f3850SWill Newton } 837f95f3850SWill Newton 838f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 839f95f3850SWill Newton { 840f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 841f95f3850SWill Newton struct mmc_data *data; 842f95f3850SWill Newton struct mmc_command *cmd; 843f95f3850SWill Newton enum dw_mci_state state; 844f95f3850SWill Newton enum dw_mci_state prev_state; 845f95f3850SWill Newton u32 status; 846f95f3850SWill Newton 847f95f3850SWill Newton spin_lock(&host->lock); 848f95f3850SWill Newton 849f95f3850SWill Newton state = host->state; 850f95f3850SWill Newton data = host->data; 851f95f3850SWill Newton 852f95f3850SWill Newton do { 853f95f3850SWill Newton prev_state = state; 854f95f3850SWill Newton 855f95f3850SWill Newton switch (state) { 856f95f3850SWill Newton case STATE_IDLE: 857f95f3850SWill Newton break; 858f95f3850SWill Newton 859f95f3850SWill Newton case STATE_SENDING_CMD: 860f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 861f95f3850SWill Newton &host->pending_events)) 862f95f3850SWill Newton break; 863f95f3850SWill Newton 864f95f3850SWill Newton cmd = host->cmd; 865f95f3850SWill Newton host->cmd = NULL; 866f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 867f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->cmd); 868f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 869f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 870f95f3850SWill Newton goto unlock; 871f95f3850SWill Newton } 872f95f3850SWill Newton 873f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 874f95f3850SWill Newton /* fall through */ 875f95f3850SWill Newton 876f95f3850SWill Newton case STATE_SENDING_DATA: 877f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 878f95f3850SWill Newton &host->pending_events)) { 879f95f3850SWill Newton dw_mci_stop_dma(host); 880f95f3850SWill Newton if (data->stop) 881f95f3850SWill Newton send_stop_cmd(host, data); 882f95f3850SWill Newton state = STATE_DATA_ERROR; 883f95f3850SWill Newton break; 884f95f3850SWill Newton } 885f95f3850SWill Newton 886f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 887f95f3850SWill Newton &host->pending_events)) 888f95f3850SWill Newton break; 889f95f3850SWill Newton 890f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 891f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 892f95f3850SWill Newton /* fall through */ 893f95f3850SWill Newton 894f95f3850SWill Newton case STATE_DATA_BUSY: 895f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 896f95f3850SWill Newton &host->pending_events)) 897f95f3850SWill Newton break; 898f95f3850SWill Newton 899f95f3850SWill Newton host->data = NULL; 900f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 901f95f3850SWill Newton status = host->data_status; 902f95f3850SWill Newton 903f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 904f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 905f95f3850SWill Newton dev_err(&host->pdev->dev, 906f95f3850SWill Newton "data timeout error\n"); 907f95f3850SWill Newton data->error = -ETIMEDOUT; 908f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 909f95f3850SWill Newton dev_err(&host->pdev->dev, 910f95f3850SWill Newton "data CRC error\n"); 911f95f3850SWill Newton data->error = -EILSEQ; 912f95f3850SWill Newton } else { 913f95f3850SWill Newton dev_err(&host->pdev->dev, 914f95f3850SWill Newton "data FIFO error " 915f95f3850SWill Newton "(status=%08x)\n", 916f95f3850SWill Newton status); 917f95f3850SWill Newton data->error = -EIO; 918f95f3850SWill Newton } 919f95f3850SWill Newton } else { 920f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 921f95f3850SWill Newton data->error = 0; 922f95f3850SWill Newton } 923f95f3850SWill Newton 924f95f3850SWill Newton if (!data->stop) { 925f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 926f95f3850SWill Newton goto unlock; 927f95f3850SWill Newton } 928f95f3850SWill Newton 929f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 930f95f3850SWill Newton if (!data->error) 931f95f3850SWill Newton send_stop_cmd(host, data); 932f95f3850SWill Newton /* fall through */ 933f95f3850SWill Newton 934f95f3850SWill Newton case STATE_SENDING_STOP: 935f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 936f95f3850SWill Newton &host->pending_events)) 937f95f3850SWill Newton break; 938f95f3850SWill Newton 939f95f3850SWill Newton host->cmd = NULL; 940f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 941f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 942f95f3850SWill Newton goto unlock; 943f95f3850SWill Newton 944f95f3850SWill Newton case STATE_DATA_ERROR: 945f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 946f95f3850SWill Newton &host->pending_events)) 947f95f3850SWill Newton break; 948f95f3850SWill Newton 949f95f3850SWill Newton state = STATE_DATA_BUSY; 950f95f3850SWill Newton break; 951f95f3850SWill Newton } 952f95f3850SWill Newton } while (state != prev_state); 953f95f3850SWill Newton 954f95f3850SWill Newton host->state = state; 955f95f3850SWill Newton unlock: 956f95f3850SWill Newton spin_unlock(&host->lock); 957f95f3850SWill Newton 958f95f3850SWill Newton } 959f95f3850SWill Newton 960f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 961f95f3850SWill Newton { 962f95f3850SWill Newton u16 *pdata = (u16 *)buf; 963f95f3850SWill Newton 964f95f3850SWill Newton WARN_ON(cnt % 2 != 0); 965f95f3850SWill Newton 966f95f3850SWill Newton cnt = cnt >> 1; 967f95f3850SWill Newton while (cnt > 0) { 968f95f3850SWill Newton mci_writew(host, DATA, *pdata++); 969f95f3850SWill Newton cnt--; 970f95f3850SWill Newton } 971f95f3850SWill Newton } 972f95f3850SWill Newton 973f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 974f95f3850SWill Newton { 975f95f3850SWill Newton u16 *pdata = (u16 *)buf; 976f95f3850SWill Newton 977f95f3850SWill Newton WARN_ON(cnt % 2 != 0); 978f95f3850SWill Newton 979f95f3850SWill Newton cnt = cnt >> 1; 980f95f3850SWill Newton while (cnt > 0) { 981f95f3850SWill Newton *pdata++ = mci_readw(host, DATA); 982f95f3850SWill Newton cnt--; 983f95f3850SWill Newton } 984f95f3850SWill Newton } 985f95f3850SWill Newton 986f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 987f95f3850SWill Newton { 988f95f3850SWill Newton u32 *pdata = (u32 *)buf; 989f95f3850SWill Newton 990f95f3850SWill Newton WARN_ON(cnt % 4 != 0); 991f95f3850SWill Newton WARN_ON((unsigned long)pdata & 0x3); 992f95f3850SWill Newton 993f95f3850SWill Newton cnt = cnt >> 2; 994f95f3850SWill Newton while (cnt > 0) { 995f95f3850SWill Newton mci_writel(host, DATA, *pdata++); 996f95f3850SWill Newton cnt--; 997f95f3850SWill Newton } 998f95f3850SWill Newton } 999f95f3850SWill Newton 1000f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 1001f95f3850SWill Newton { 1002f95f3850SWill Newton u32 *pdata = (u32 *)buf; 1003f95f3850SWill Newton 1004f95f3850SWill Newton WARN_ON(cnt % 4 != 0); 1005f95f3850SWill Newton WARN_ON((unsigned long)pdata & 0x3); 1006f95f3850SWill Newton 1007f95f3850SWill Newton cnt = cnt >> 2; 1008f95f3850SWill Newton while (cnt > 0) { 1009f95f3850SWill Newton *pdata++ = mci_readl(host, DATA); 1010f95f3850SWill Newton cnt--; 1011f95f3850SWill Newton } 1012f95f3850SWill Newton } 1013f95f3850SWill Newton 1014f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1015f95f3850SWill Newton { 1016f95f3850SWill Newton u64 *pdata = (u64 *)buf; 1017f95f3850SWill Newton 1018f95f3850SWill Newton WARN_ON(cnt % 8 != 0); 1019f95f3850SWill Newton 1020f95f3850SWill Newton cnt = cnt >> 3; 1021f95f3850SWill Newton while (cnt > 0) { 1022f95f3850SWill Newton mci_writeq(host, DATA, *pdata++); 1023f95f3850SWill Newton cnt--; 1024f95f3850SWill Newton } 1025f95f3850SWill Newton } 1026f95f3850SWill Newton 1027f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1028f95f3850SWill Newton { 1029f95f3850SWill Newton u64 *pdata = (u64 *)buf; 1030f95f3850SWill Newton 1031f95f3850SWill Newton WARN_ON(cnt % 8 != 0); 1032f95f3850SWill Newton 1033f95f3850SWill Newton cnt = cnt >> 3; 1034f95f3850SWill Newton while (cnt > 0) { 1035f95f3850SWill Newton *pdata++ = mci_readq(host, DATA); 1036f95f3850SWill Newton cnt--; 1037f95f3850SWill Newton } 1038f95f3850SWill Newton } 1039f95f3850SWill Newton 1040f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1041f95f3850SWill Newton { 1042f95f3850SWill Newton struct scatterlist *sg = host->sg; 1043f95f3850SWill Newton void *buf = sg_virt(sg); 1044f95f3850SWill Newton unsigned int offset = host->pio_offset; 1045f95f3850SWill Newton struct mmc_data *data = host->data; 1046f95f3850SWill Newton int shift = host->data_shift; 1047f95f3850SWill Newton u32 status; 1048ba6a902dSChris Ball unsigned int nbytes = 0, len; 1049f95f3850SWill Newton 1050f95f3850SWill Newton do { 1051f95f3850SWill Newton len = SDMMC_GET_FCNT(mci_readl(host, STATUS)) << shift; 1052f95f3850SWill Newton if (offset + len <= sg->length) { 1053f95f3850SWill Newton host->pull_data(host, (void *)(buf + offset), len); 1054f95f3850SWill Newton 1055f95f3850SWill Newton offset += len; 1056f95f3850SWill Newton nbytes += len; 1057f95f3850SWill Newton 1058f95f3850SWill Newton if (offset == sg->length) { 1059f95f3850SWill Newton flush_dcache_page(sg_page(sg)); 1060f95f3850SWill Newton host->sg = sg = sg_next(sg); 1061f95f3850SWill Newton if (!sg) 1062f95f3850SWill Newton goto done; 1063f95f3850SWill Newton 1064f95f3850SWill Newton offset = 0; 1065f95f3850SWill Newton buf = sg_virt(sg); 1066f95f3850SWill Newton } 1067f95f3850SWill Newton } else { 1068f95f3850SWill Newton unsigned int remaining = sg->length - offset; 1069f95f3850SWill Newton host->pull_data(host, (void *)(buf + offset), 1070f95f3850SWill Newton remaining); 1071f95f3850SWill Newton nbytes += remaining; 1072f95f3850SWill Newton 1073f95f3850SWill Newton flush_dcache_page(sg_page(sg)); 1074f95f3850SWill Newton host->sg = sg = sg_next(sg); 1075f95f3850SWill Newton if (!sg) 1076f95f3850SWill Newton goto done; 1077f95f3850SWill Newton 1078f95f3850SWill Newton offset = len - remaining; 1079f95f3850SWill Newton buf = sg_virt(sg); 1080f95f3850SWill Newton host->pull_data(host, buf, offset); 1081f95f3850SWill Newton nbytes += offset; 1082f95f3850SWill Newton } 1083f95f3850SWill Newton 1084f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1085f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1086f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1087f95f3850SWill Newton host->data_status = status; 1088f95f3850SWill Newton data->bytes_xfered += nbytes; 1089f95f3850SWill Newton smp_wmb(); 1090f95f3850SWill Newton 1091f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1092f95f3850SWill Newton 1093f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1094f95f3850SWill Newton return; 1095f95f3850SWill Newton } 1096f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1097f95f3850SWill Newton len = SDMMC_GET_FCNT(mci_readl(host, STATUS)); 1098f95f3850SWill Newton host->pio_offset = offset; 1099f95f3850SWill Newton data->bytes_xfered += nbytes; 1100f95f3850SWill Newton return; 1101f95f3850SWill Newton 1102f95f3850SWill Newton done: 1103f95f3850SWill Newton data->bytes_xfered += nbytes; 1104f95f3850SWill Newton smp_wmb(); 1105f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1106f95f3850SWill Newton } 1107f95f3850SWill Newton 1108f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1109f95f3850SWill Newton { 1110f95f3850SWill Newton struct scatterlist *sg = host->sg; 1111f95f3850SWill Newton void *buf = sg_virt(sg); 1112f95f3850SWill Newton unsigned int offset = host->pio_offset; 1113f95f3850SWill Newton struct mmc_data *data = host->data; 1114f95f3850SWill Newton int shift = host->data_shift; 1115f95f3850SWill Newton u32 status; 1116f95f3850SWill Newton unsigned int nbytes = 0, len; 1117f95f3850SWill Newton 1118f95f3850SWill Newton do { 1119*b86d8253SJames Hogan len = (host->fifo_depth - 1120*b86d8253SJames Hogan SDMMC_GET_FCNT(mci_readl(host, STATUS))) << shift; 1121f95f3850SWill Newton if (offset + len <= sg->length) { 1122f95f3850SWill Newton host->push_data(host, (void *)(buf + offset), len); 1123f95f3850SWill Newton 1124f95f3850SWill Newton offset += len; 1125f95f3850SWill Newton nbytes += len; 1126f95f3850SWill Newton if (offset == sg->length) { 1127f95f3850SWill Newton host->sg = sg = sg_next(sg); 1128f95f3850SWill Newton if (!sg) 1129f95f3850SWill Newton goto done; 1130f95f3850SWill Newton 1131f95f3850SWill Newton offset = 0; 1132f95f3850SWill Newton buf = sg_virt(sg); 1133f95f3850SWill Newton } 1134f95f3850SWill Newton } else { 1135f95f3850SWill Newton unsigned int remaining = sg->length - offset; 1136f95f3850SWill Newton 1137f95f3850SWill Newton host->push_data(host, (void *)(buf + offset), 1138f95f3850SWill Newton remaining); 1139f95f3850SWill Newton nbytes += remaining; 1140f95f3850SWill Newton 1141f95f3850SWill Newton host->sg = sg = sg_next(sg); 1142f95f3850SWill Newton if (!sg) 1143f95f3850SWill Newton goto done; 1144f95f3850SWill Newton 1145f95f3850SWill Newton offset = len - remaining; 1146f95f3850SWill Newton buf = sg_virt(sg); 1147f95f3850SWill Newton host->push_data(host, (void *)buf, offset); 1148f95f3850SWill Newton nbytes += offset; 1149f95f3850SWill Newton } 1150f95f3850SWill Newton 1151f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1152f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1153f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1154f95f3850SWill Newton host->data_status = status; 1155f95f3850SWill Newton data->bytes_xfered += nbytes; 1156f95f3850SWill Newton 1157f95f3850SWill Newton smp_wmb(); 1158f95f3850SWill Newton 1159f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1160f95f3850SWill Newton 1161f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1162f95f3850SWill Newton return; 1163f95f3850SWill Newton } 1164f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1165f95f3850SWill Newton 1166f95f3850SWill Newton host->pio_offset = offset; 1167f95f3850SWill Newton data->bytes_xfered += nbytes; 1168f95f3850SWill Newton 1169f95f3850SWill Newton return; 1170f95f3850SWill Newton 1171f95f3850SWill Newton done: 1172f95f3850SWill Newton data->bytes_xfered += nbytes; 1173f95f3850SWill Newton smp_wmb(); 1174f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1175f95f3850SWill Newton } 1176f95f3850SWill Newton 1177f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1178f95f3850SWill Newton { 1179f95f3850SWill Newton if (!host->cmd_status) 1180f95f3850SWill Newton host->cmd_status = status; 1181f95f3850SWill Newton 1182f95f3850SWill Newton smp_wmb(); 1183f95f3850SWill Newton 1184f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1185f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1186f95f3850SWill Newton } 1187f95f3850SWill Newton 1188f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1189f95f3850SWill Newton { 1190f95f3850SWill Newton struct dw_mci *host = dev_id; 1191f95f3850SWill Newton u32 status, pending; 1192f95f3850SWill Newton unsigned int pass_count = 0; 1193f95f3850SWill Newton 1194f95f3850SWill Newton do { 1195f95f3850SWill Newton status = mci_readl(host, RINTSTS); 1196f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1197f95f3850SWill Newton 1198f95f3850SWill Newton /* 1199f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1200f95f3850SWill Newton * is configured. 1201f95f3850SWill Newton */ 1202f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1203f95f3850SWill Newton if (!pending && 1204f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1205f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1206f95f3850SWill Newton } 1207f95f3850SWill Newton 1208f95f3850SWill Newton if (!pending) 1209f95f3850SWill Newton break; 1210f95f3850SWill Newton 1211f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1212f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1213f95f3850SWill Newton host->cmd_status = status; 1214f95f3850SWill Newton smp_wmb(); 1215f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1216f95f3850SWill Newton } 1217f95f3850SWill Newton 1218f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1219f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1220f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1221f95f3850SWill Newton host->data_status = status; 1222f95f3850SWill Newton smp_wmb(); 1223f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 12246e83e10dSSeungwon Jeon if (!(pending & (SDMMC_INT_DTO | SDMMC_INT_DCRC | 12256e83e10dSSeungwon Jeon SDMMC_INT_SBE | SDMMC_INT_EBE))) 1226f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1227f95f3850SWill Newton } 1228f95f3850SWill Newton 1229f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1230f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1231f95f3850SWill Newton if (!host->data_status) 1232f95f3850SWill Newton host->data_status = status; 1233f95f3850SWill Newton smp_wmb(); 1234f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1235f95f3850SWill Newton if (host->sg != NULL) 1236f95f3850SWill Newton dw_mci_read_data_pio(host); 1237f95f3850SWill Newton } 1238f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1239f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1240f95f3850SWill Newton } 1241f95f3850SWill Newton 1242f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1243f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1244b40af3aaSJames Hogan if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) 1245f95f3850SWill Newton dw_mci_read_data_pio(host); 1246f95f3850SWill Newton } 1247f95f3850SWill Newton 1248f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1249f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1250b40af3aaSJames Hogan if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) 1251f95f3850SWill Newton dw_mci_write_data_pio(host); 1252f95f3850SWill Newton } 1253f95f3850SWill Newton 1254f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1255f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1256f95f3850SWill Newton dw_mci_cmd_interrupt(host, status); 1257f95f3850SWill Newton } 1258f95f3850SWill Newton 1259f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1260f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 12611791b13eSJames Hogan queue_work(dw_mci_card_workqueue, &host->card_work); 1262f95f3850SWill Newton } 1263f95f3850SWill Newton 1264f95f3850SWill Newton } while (pass_count++ < 5); 1265f95f3850SWill Newton 1266f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1267f95f3850SWill Newton /* Handle DMA interrupts */ 1268f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1269f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1270f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1271f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1272f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1273f95f3850SWill Newton host->dma_ops->complete(host); 1274f95f3850SWill Newton } 1275f95f3850SWill Newton #endif 1276f95f3850SWill Newton 1277f95f3850SWill Newton return IRQ_HANDLED; 1278f95f3850SWill Newton } 1279f95f3850SWill Newton 12801791b13eSJames Hogan static void dw_mci_work_routine_card(struct work_struct *work) 1281f95f3850SWill Newton { 12821791b13eSJames Hogan struct dw_mci *host = container_of(work, struct dw_mci, card_work); 1283f95f3850SWill Newton int i; 1284f95f3850SWill Newton 1285f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1286f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1287f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1288f95f3850SWill Newton struct mmc_request *mrq; 1289f95f3850SWill Newton int present; 1290f95f3850SWill Newton u32 ctrl; 1291f95f3850SWill Newton 1292f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1293f95f3850SWill Newton while (present != slot->last_detect_state) { 1294f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1295f95f3850SWill Newton present ? "inserted" : "removed"); 1296f95f3850SWill Newton 12971791b13eSJames Hogan /* Power up slot (before spin_lock, may sleep) */ 12981791b13eSJames Hogan if (present != 0 && host->pdata->setpower) 12991791b13eSJames Hogan host->pdata->setpower(slot->id, mmc->ocr_avail); 13001791b13eSJames Hogan 13011791b13eSJames Hogan spin_lock_bh(&host->lock); 13021791b13eSJames Hogan 1303f95f3850SWill Newton /* Card change detected */ 1304f95f3850SWill Newton slot->last_detect_state = present; 1305f95f3850SWill Newton 13061791b13eSJames Hogan /* Mark card as present if applicable */ 13071791b13eSJames Hogan if (present != 0) 1308f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1309f95f3850SWill Newton 1310f95f3850SWill Newton /* Clean up queue if present */ 1311f95f3850SWill Newton mrq = slot->mrq; 1312f95f3850SWill Newton if (mrq) { 1313f95f3850SWill Newton if (mrq == host->mrq) { 1314f95f3850SWill Newton host->data = NULL; 1315f95f3850SWill Newton host->cmd = NULL; 1316f95f3850SWill Newton 1317f95f3850SWill Newton switch (host->state) { 1318f95f3850SWill Newton case STATE_IDLE: 1319f95f3850SWill Newton break; 1320f95f3850SWill Newton case STATE_SENDING_CMD: 1321f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1322f95f3850SWill Newton if (!mrq->data) 1323f95f3850SWill Newton break; 1324f95f3850SWill Newton /* fall through */ 1325f95f3850SWill Newton case STATE_SENDING_DATA: 1326f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1327f95f3850SWill Newton dw_mci_stop_dma(host); 1328f95f3850SWill Newton break; 1329f95f3850SWill Newton case STATE_DATA_BUSY: 1330f95f3850SWill Newton case STATE_DATA_ERROR: 1331f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1332f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1333f95f3850SWill Newton if (!mrq->stop) 1334f95f3850SWill Newton break; 1335f95f3850SWill Newton /* fall through */ 1336f95f3850SWill Newton case STATE_SENDING_STOP: 1337f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1338f95f3850SWill Newton break; 1339f95f3850SWill Newton } 1340f95f3850SWill Newton 1341f95f3850SWill Newton dw_mci_request_end(host, mrq); 1342f95f3850SWill Newton } else { 1343f95f3850SWill Newton list_del(&slot->queue_node); 1344f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1345f95f3850SWill Newton if (mrq->data) 1346f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1347f95f3850SWill Newton if (mrq->stop) 1348f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1349f95f3850SWill Newton 1350f95f3850SWill Newton spin_unlock(&host->lock); 1351f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1352f95f3850SWill Newton spin_lock(&host->lock); 1353f95f3850SWill Newton } 1354f95f3850SWill Newton } 1355f95f3850SWill Newton 1356f95f3850SWill Newton /* Power down slot */ 1357f95f3850SWill Newton if (present == 0) { 1358f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1359f95f3850SWill Newton 1360f95f3850SWill Newton /* 1361f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1362f95f3850SWill Newton * block interrupt, hence setting the 1363f95f3850SWill Newton * scatter-gather pointer to NULL. 1364f95f3850SWill Newton */ 1365f95f3850SWill Newton host->sg = NULL; 1366f95f3850SWill Newton 1367f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1368f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1369f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1370f95f3850SWill Newton 1371f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1372f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1373f95f3850SWill Newton ctrl |= 0x01; /* Software reset of DMA */ 1374f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1375f95f3850SWill Newton #endif 1376f95f3850SWill Newton 1377f95f3850SWill Newton } 1378f95f3850SWill Newton 13791791b13eSJames Hogan spin_unlock_bh(&host->lock); 13801791b13eSJames Hogan 13811791b13eSJames Hogan /* Power down slot (after spin_unlock, may sleep) */ 13821791b13eSJames Hogan if (present == 0 && host->pdata->setpower) 13831791b13eSJames Hogan host->pdata->setpower(slot->id, 0); 13841791b13eSJames Hogan 1385f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1386f95f3850SWill Newton } 1387f95f3850SWill Newton 1388f95f3850SWill Newton mmc_detect_change(slot->mmc, 1389f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1390f95f3850SWill Newton } 1391f95f3850SWill Newton } 1392f95f3850SWill Newton 1393f95f3850SWill Newton static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1394f95f3850SWill Newton { 1395f95f3850SWill Newton struct mmc_host *mmc; 1396f95f3850SWill Newton struct dw_mci_slot *slot; 1397f95f3850SWill Newton 1398f95f3850SWill Newton mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), &host->pdev->dev); 1399f95f3850SWill Newton if (!mmc) 1400f95f3850SWill Newton return -ENOMEM; 1401f95f3850SWill Newton 1402f95f3850SWill Newton slot = mmc_priv(mmc); 1403f95f3850SWill Newton slot->id = id; 1404f95f3850SWill Newton slot->mmc = mmc; 1405f95f3850SWill Newton slot->host = host; 1406f95f3850SWill Newton 1407f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1408f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1409f95f3850SWill Newton mmc->f_max = host->bus_hz; 1410f95f3850SWill Newton 1411f95f3850SWill Newton if (host->pdata->get_ocr) 1412f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1413f95f3850SWill Newton else 1414f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1415f95f3850SWill Newton 1416f95f3850SWill Newton /* 1417f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1418f95f3850SWill Newton * is detected. 1419f95f3850SWill Newton */ 1420f95f3850SWill Newton if (host->pdata->setpower) 1421f95f3850SWill Newton host->pdata->setpower(id, 0); 1422f95f3850SWill Newton 1423fc3d7720SJaehoon Chung if (host->pdata->caps) 1424fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1425fc3d7720SJaehoon Chung else 1426f95f3850SWill Newton mmc->caps = 0; 1427fc3d7720SJaehoon Chung 1428f95f3850SWill Newton if (host->pdata->get_bus_wd) 1429f95f3850SWill Newton if (host->pdata->get_bus_wd(slot->id) >= 4) 1430f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1431f95f3850SWill Newton 1432f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 1433f95f3850SWill Newton mmc->caps |= MMC_CAP_SD_HIGHSPEED; 1434f95f3850SWill Newton 1435f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1436f95f3850SWill Newton mmc->max_segs = host->ring_size; 1437f95f3850SWill Newton mmc->max_blk_size = 65536; 1438f95f3850SWill Newton mmc->max_blk_count = host->ring_size; 1439f95f3850SWill Newton mmc->max_seg_size = 0x1000; 1440f95f3850SWill Newton mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1441f95f3850SWill Newton #else 1442f95f3850SWill Newton if (host->pdata->blk_settings) { 1443f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1444f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1445f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1446f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1447f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1448f95f3850SWill Newton } else { 1449f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1450f95f3850SWill Newton mmc->max_segs = 64; 1451f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1452f95f3850SWill Newton mmc->max_blk_count = 512; 1453f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1454f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1455f95f3850SWill Newton } 1456f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1457f95f3850SWill Newton 1458c07946a3SJaehoon Chung host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 1459c07946a3SJaehoon Chung if (IS_ERR(host->vmmc)) { 1460c07946a3SJaehoon Chung printk(KERN_INFO "%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1461c07946a3SJaehoon Chung host->vmmc = NULL; 1462c07946a3SJaehoon Chung } else 1463c07946a3SJaehoon Chung regulator_enable(host->vmmc); 1464c07946a3SJaehoon Chung 1465f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1466f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1467f95f3850SWill Newton else 1468f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1469f95f3850SWill Newton 1470f95f3850SWill Newton host->slot[id] = slot; 1471f95f3850SWill Newton mmc_add_host(mmc); 1472f95f3850SWill Newton 1473f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1474f95f3850SWill Newton dw_mci_init_debugfs(slot); 1475f95f3850SWill Newton #endif 1476f95f3850SWill Newton 1477f95f3850SWill Newton /* Card initially undetected */ 1478f95f3850SWill Newton slot->last_detect_state = 0; 1479f95f3850SWill Newton 1480dd6c4b98SWill Newton /* 1481dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 1482dd6c4b98SWill Newton * need to run the detect tasklet 1483dd6c4b98SWill Newton */ 14841791b13eSJames Hogan queue_work(dw_mci_card_workqueue, &host->card_work); 1485dd6c4b98SWill Newton 1486f95f3850SWill Newton return 0; 1487f95f3850SWill Newton } 1488f95f3850SWill Newton 1489f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 1490f95f3850SWill Newton { 1491f95f3850SWill Newton /* Shutdown detect IRQ */ 1492f95f3850SWill Newton if (slot->host->pdata->exit) 1493f95f3850SWill Newton slot->host->pdata->exit(id); 1494f95f3850SWill Newton 1495f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 1496f95f3850SWill Newton mmc_remove_host(slot->mmc); 1497f95f3850SWill Newton slot->host->slot[id] = NULL; 1498f95f3850SWill Newton mmc_free_host(slot->mmc); 1499f95f3850SWill Newton } 1500f95f3850SWill Newton 1501f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 1502f95f3850SWill Newton { 1503f95f3850SWill Newton /* Alloc memory for sg translation */ 1504f95f3850SWill Newton host->sg_cpu = dma_alloc_coherent(&host->pdev->dev, PAGE_SIZE, 1505f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 1506f95f3850SWill Newton if (!host->sg_cpu) { 1507f95f3850SWill Newton dev_err(&host->pdev->dev, "%s: could not alloc DMA memory\n", 1508f95f3850SWill Newton __func__); 1509f95f3850SWill Newton goto no_dma; 1510f95f3850SWill Newton } 1511f95f3850SWill Newton 1512f95f3850SWill Newton /* Determine which DMA interface to use */ 1513f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1514f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 1515f95f3850SWill Newton dev_info(&host->pdev->dev, "Using internal DMA controller.\n"); 1516f95f3850SWill Newton #endif 1517f95f3850SWill Newton 1518f95f3850SWill Newton if (!host->dma_ops) 1519f95f3850SWill Newton goto no_dma; 1520f95f3850SWill Newton 1521f95f3850SWill Newton if (host->dma_ops->init) { 1522f95f3850SWill Newton if (host->dma_ops->init(host)) { 1523f95f3850SWill Newton dev_err(&host->pdev->dev, "%s: Unable to initialize " 1524f95f3850SWill Newton "DMA Controller.\n", __func__); 1525f95f3850SWill Newton goto no_dma; 1526f95f3850SWill Newton } 1527f95f3850SWill Newton } else { 1528f95f3850SWill Newton dev_err(&host->pdev->dev, "DMA initialization not found.\n"); 1529f95f3850SWill Newton goto no_dma; 1530f95f3850SWill Newton } 1531f95f3850SWill Newton 1532f95f3850SWill Newton host->use_dma = 1; 1533f95f3850SWill Newton return; 1534f95f3850SWill Newton 1535f95f3850SWill Newton no_dma: 1536f95f3850SWill Newton dev_info(&host->pdev->dev, "Using PIO mode.\n"); 1537f95f3850SWill Newton host->use_dma = 0; 1538f95f3850SWill Newton return; 1539f95f3850SWill Newton } 1540f95f3850SWill Newton 1541f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 1542f95f3850SWill Newton { 1543f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 1544f95f3850SWill Newton unsigned int ctrl; 1545f95f3850SWill Newton 1546f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1547f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 1548f95f3850SWill Newton 1549f95f3850SWill Newton /* wait till resets clear */ 1550f95f3850SWill Newton do { 1551f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1552f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1553f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 1554f95f3850SWill Newton return true; 1555f95f3850SWill Newton } while (time_before(jiffies, timeout)); 1556f95f3850SWill Newton 1557f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 1558f95f3850SWill Newton 1559f95f3850SWill Newton return false; 1560f95f3850SWill Newton } 1561f95f3850SWill Newton 1562f95f3850SWill Newton static int dw_mci_probe(struct platform_device *pdev) 1563f95f3850SWill Newton { 1564f95f3850SWill Newton struct dw_mci *host; 1565f95f3850SWill Newton struct resource *regs; 1566f95f3850SWill Newton struct dw_mci_board *pdata; 1567f95f3850SWill Newton int irq, ret, i, width; 1568f95f3850SWill Newton u32 fifo_size; 1569f95f3850SWill Newton 1570f95f3850SWill Newton regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1571f95f3850SWill Newton if (!regs) 1572f95f3850SWill Newton return -ENXIO; 1573f95f3850SWill Newton 1574f95f3850SWill Newton irq = platform_get_irq(pdev, 0); 1575f95f3850SWill Newton if (irq < 0) 1576f95f3850SWill Newton return irq; 1577f95f3850SWill Newton 1578f95f3850SWill Newton host = kzalloc(sizeof(struct dw_mci), GFP_KERNEL); 1579f95f3850SWill Newton if (!host) 1580f95f3850SWill Newton return -ENOMEM; 1581f95f3850SWill Newton 1582f95f3850SWill Newton host->pdev = pdev; 1583f95f3850SWill Newton host->pdata = pdata = pdev->dev.platform_data; 1584f95f3850SWill Newton if (!pdata || !pdata->init) { 1585f95f3850SWill Newton dev_err(&pdev->dev, 1586f95f3850SWill Newton "Platform data must supply init function\n"); 1587f95f3850SWill Newton ret = -ENODEV; 1588f95f3850SWill Newton goto err_freehost; 1589f95f3850SWill Newton } 1590f95f3850SWill Newton 1591f95f3850SWill Newton if (!pdata->select_slot && pdata->num_slots > 1) { 1592f95f3850SWill Newton dev_err(&pdev->dev, 1593f95f3850SWill Newton "Platform data must supply select_slot function\n"); 1594f95f3850SWill Newton ret = -ENODEV; 1595f95f3850SWill Newton goto err_freehost; 1596f95f3850SWill Newton } 1597f95f3850SWill Newton 1598f95f3850SWill Newton if (!pdata->bus_hz) { 1599f95f3850SWill Newton dev_err(&pdev->dev, 1600f95f3850SWill Newton "Platform data must supply bus speed\n"); 1601f95f3850SWill Newton ret = -ENODEV; 1602f95f3850SWill Newton goto err_freehost; 1603f95f3850SWill Newton } 1604f95f3850SWill Newton 1605f95f3850SWill Newton host->bus_hz = pdata->bus_hz; 1606f95f3850SWill Newton host->quirks = pdata->quirks; 1607f95f3850SWill Newton 1608f95f3850SWill Newton spin_lock_init(&host->lock); 1609f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 1610f95f3850SWill Newton 1611f95f3850SWill Newton ret = -ENOMEM; 1612f95f3850SWill Newton host->regs = ioremap(regs->start, regs->end - regs->start + 1); 1613f95f3850SWill Newton if (!host->regs) 1614f95f3850SWill Newton goto err_freehost; 1615f95f3850SWill Newton 1616f95f3850SWill Newton host->dma_ops = pdata->dma_ops; 1617f95f3850SWill Newton dw_mci_init_dma(host); 1618f95f3850SWill Newton 1619f95f3850SWill Newton /* 1620f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 1621f95f3850SWill Newton * the correct values. 1622f95f3850SWill Newton */ 1623f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 1624f95f3850SWill Newton if (!i) { 1625f95f3850SWill Newton host->push_data = dw_mci_push_data16; 1626f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 1627f95f3850SWill Newton width = 16; 1628f95f3850SWill Newton host->data_shift = 1; 1629f95f3850SWill Newton } else if (i == 2) { 1630f95f3850SWill Newton host->push_data = dw_mci_push_data64; 1631f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 1632f95f3850SWill Newton width = 64; 1633f95f3850SWill Newton host->data_shift = 3; 1634f95f3850SWill Newton } else { 1635f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 1636f95f3850SWill Newton WARN((i != 1), 1637f95f3850SWill Newton "HCON reports a reserved host data width!\n" 1638f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 1639f95f3850SWill Newton host->push_data = dw_mci_push_data32; 1640f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 1641f95f3850SWill Newton width = 32; 1642f95f3850SWill Newton host->data_shift = 2; 1643f95f3850SWill Newton } 1644f95f3850SWill Newton 1645f95f3850SWill Newton /* Reset all blocks */ 1646f95f3850SWill Newton if (!mci_wait_reset(&pdev->dev, host)) { 1647f95f3850SWill Newton ret = -ENODEV; 1648f95f3850SWill Newton goto err_dmaunmap; 1649f95f3850SWill Newton } 1650f95f3850SWill Newton 1651f95f3850SWill Newton /* Clear the interrupts for the host controller */ 1652f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1653f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 1654f95f3850SWill Newton 1655f95f3850SWill Newton /* Put in max timeout */ 1656f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 1657f95f3850SWill Newton 1658f95f3850SWill Newton /* 1659f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 1660f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 1661f95f3850SWill Newton */ 1662*b86d8253SJames Hogan if (!host->pdata->fifo_depth) { 1663*b86d8253SJames Hogan /* 1664*b86d8253SJames Hogan * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may 1665*b86d8253SJames Hogan * have been overwritten by the bootloader, just like we're 1666*b86d8253SJames Hogan * about to do, so if you know the value for your hardware, you 1667*b86d8253SJames Hogan * should put it in the platform data. 1668*b86d8253SJames Hogan */ 1669f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 1670*b86d8253SJames Hogan fifo_size = 1 + ((fifo_size >> 16) & 0x7ff); 1671*b86d8253SJames Hogan } else { 1672*b86d8253SJames Hogan fifo_size = host->pdata->fifo_depth; 1673*b86d8253SJames Hogan } 1674*b86d8253SJames Hogan host->fifo_depth = fifo_size; 1675e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 1676e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 1677e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 1678f95f3850SWill Newton 1679f95f3850SWill Newton /* disable clock to CIU */ 1680f95f3850SWill Newton mci_writel(host, CLKENA, 0); 1681f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 1682f95f3850SWill Newton 1683f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 16841791b13eSJames Hogan dw_mci_card_workqueue = alloc_workqueue("dw-mci-card", 16851791b13eSJames Hogan WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); 16861791b13eSJames Hogan if (!dw_mci_card_workqueue) 16871791b13eSJames Hogan goto err_dmaunmap; 16881791b13eSJames Hogan INIT_WORK(&host->card_work, dw_mci_work_routine_card); 1689f95f3850SWill Newton 1690f95f3850SWill Newton ret = request_irq(irq, dw_mci_interrupt, 0, "dw-mci", host); 1691f95f3850SWill Newton if (ret) 16921791b13eSJames Hogan goto err_workqueue; 1693f95f3850SWill Newton 1694f95f3850SWill Newton platform_set_drvdata(pdev, host); 1695f95f3850SWill Newton 1696f95f3850SWill Newton if (host->pdata->num_slots) 1697f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 1698f95f3850SWill Newton else 1699f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 1700f95f3850SWill Newton 1701f95f3850SWill Newton /* We need at least one slot to succeed */ 1702f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1703f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 1704f95f3850SWill Newton if (ret) { 1705f95f3850SWill Newton ret = -ENODEV; 1706f95f3850SWill Newton goto err_init_slot; 1707f95f3850SWill Newton } 1708f95f3850SWill Newton } 1709f95f3850SWill Newton 1710f95f3850SWill Newton /* 1711f95f3850SWill Newton * Enable interrupts for command done, data over, data empty, card det, 1712f95f3850SWill Newton * receive ready and error such as transmit, receive timeout, crc error 1713f95f3850SWill Newton */ 1714f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1715f95f3850SWill Newton mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 1716f95f3850SWill Newton SDMMC_INT_TXDR | SDMMC_INT_RXDR | 1717f95f3850SWill Newton DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 1718f95f3850SWill Newton mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 1719f95f3850SWill Newton 1720f95f3850SWill Newton dev_info(&pdev->dev, "DW MMC controller at irq %d, " 1721*b86d8253SJames Hogan "%d bit host data width, " 1722*b86d8253SJames Hogan "%u deep fifo\n", 1723*b86d8253SJames Hogan irq, width, fifo_size); 1724f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 1725f95f3850SWill Newton dev_info(&pdev->dev, "Internal DMAC interrupt fix enabled.\n"); 1726f95f3850SWill Newton 1727f95f3850SWill Newton return 0; 1728f95f3850SWill Newton 1729f95f3850SWill Newton err_init_slot: 1730f95f3850SWill Newton /* De-init any initialized slots */ 1731f95f3850SWill Newton while (i > 0) { 1732f95f3850SWill Newton if (host->slot[i]) 1733f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 1734f95f3850SWill Newton i--; 1735f95f3850SWill Newton } 1736f95f3850SWill Newton free_irq(irq, host); 1737f95f3850SWill Newton 17381791b13eSJames Hogan err_workqueue: 17391791b13eSJames Hogan destroy_workqueue(dw_mci_card_workqueue); 17401791b13eSJames Hogan 1741f95f3850SWill Newton err_dmaunmap: 1742f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 1743f95f3850SWill Newton host->dma_ops->exit(host); 1744f95f3850SWill Newton dma_free_coherent(&host->pdev->dev, PAGE_SIZE, 1745f95f3850SWill Newton host->sg_cpu, host->sg_dma); 1746f95f3850SWill Newton iounmap(host->regs); 1747f95f3850SWill Newton 1748c07946a3SJaehoon Chung if (host->vmmc) { 1749c07946a3SJaehoon Chung regulator_disable(host->vmmc); 1750c07946a3SJaehoon Chung regulator_put(host->vmmc); 1751c07946a3SJaehoon Chung } 1752c07946a3SJaehoon Chung 1753c07946a3SJaehoon Chung 1754f95f3850SWill Newton err_freehost: 1755f95f3850SWill Newton kfree(host); 1756f95f3850SWill Newton return ret; 1757f95f3850SWill Newton } 1758f95f3850SWill Newton 1759f95f3850SWill Newton static int __exit dw_mci_remove(struct platform_device *pdev) 1760f95f3850SWill Newton { 1761f95f3850SWill Newton struct dw_mci *host = platform_get_drvdata(pdev); 1762f95f3850SWill Newton int i; 1763f95f3850SWill Newton 1764f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1765f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 1766f95f3850SWill Newton 1767f95f3850SWill Newton platform_set_drvdata(pdev, NULL); 1768f95f3850SWill Newton 1769f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1770f95f3850SWill Newton dev_dbg(&pdev->dev, "remove slot %d\n", i); 1771f95f3850SWill Newton if (host->slot[i]) 1772f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 1773f95f3850SWill Newton } 1774f95f3850SWill Newton 1775f95f3850SWill Newton /* disable clock to CIU */ 1776f95f3850SWill Newton mci_writel(host, CLKENA, 0); 1777f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 1778f95f3850SWill Newton 1779f95f3850SWill Newton free_irq(platform_get_irq(pdev, 0), host); 17801791b13eSJames Hogan destroy_workqueue(dw_mci_card_workqueue); 1781f95f3850SWill Newton dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); 1782f95f3850SWill Newton 1783f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 1784f95f3850SWill Newton host->dma_ops->exit(host); 1785f95f3850SWill Newton 1786c07946a3SJaehoon Chung if (host->vmmc) { 1787c07946a3SJaehoon Chung regulator_disable(host->vmmc); 1788c07946a3SJaehoon Chung regulator_put(host->vmmc); 1789c07946a3SJaehoon Chung } 1790c07946a3SJaehoon Chung 1791f95f3850SWill Newton iounmap(host->regs); 1792f95f3850SWill Newton 1793f95f3850SWill Newton kfree(host); 1794f95f3850SWill Newton return 0; 1795f95f3850SWill Newton } 1796f95f3850SWill Newton 1797f95f3850SWill Newton #ifdef CONFIG_PM 1798f95f3850SWill Newton /* 1799f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 1800f95f3850SWill Newton */ 1801f95f3850SWill Newton static int dw_mci_suspend(struct platform_device *pdev, pm_message_t mesg) 1802f95f3850SWill Newton { 1803f95f3850SWill Newton int i, ret; 1804f95f3850SWill Newton struct dw_mci *host = platform_get_drvdata(pdev); 1805f95f3850SWill Newton 1806f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1807f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1808f95f3850SWill Newton if (!slot) 1809f95f3850SWill Newton continue; 1810f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 1811f95f3850SWill Newton if (ret < 0) { 1812f95f3850SWill Newton while (--i >= 0) { 1813f95f3850SWill Newton slot = host->slot[i]; 1814f95f3850SWill Newton if (slot) 1815f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 1816f95f3850SWill Newton } 1817f95f3850SWill Newton return ret; 1818f95f3850SWill Newton } 1819f95f3850SWill Newton } 1820f95f3850SWill Newton 1821c07946a3SJaehoon Chung if (host->vmmc) 1822c07946a3SJaehoon Chung regulator_disable(host->vmmc); 1823c07946a3SJaehoon Chung 1824f95f3850SWill Newton return 0; 1825f95f3850SWill Newton } 1826f95f3850SWill Newton 1827f95f3850SWill Newton static int dw_mci_resume(struct platform_device *pdev) 1828f95f3850SWill Newton { 1829f95f3850SWill Newton int i, ret; 1830f95f3850SWill Newton struct dw_mci *host = platform_get_drvdata(pdev); 1831f95f3850SWill Newton 18321d6c4e0aSJaehoon Chung if (host->vmmc) 18331d6c4e0aSJaehoon Chung regulator_enable(host->vmmc); 18341d6c4e0aSJaehoon Chung 1835e61cf118SJaehoon Chung if (host->dma_ops->init) 1836e61cf118SJaehoon Chung host->dma_ops->init(host); 1837e61cf118SJaehoon Chung 1838e61cf118SJaehoon Chung if (!mci_wait_reset(&pdev->dev, host)) { 1839e61cf118SJaehoon Chung ret = -ENODEV; 1840e61cf118SJaehoon Chung return ret; 1841e61cf118SJaehoon Chung } 1842e61cf118SJaehoon Chung 1843e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 1844e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 1845e61cf118SJaehoon Chung 1846e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 1847e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 1848e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 1849e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 1850e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 1851e61cf118SJaehoon Chung 1852f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1853f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1854f95f3850SWill Newton if (!slot) 1855f95f3850SWill Newton continue; 1856f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 1857f95f3850SWill Newton if (ret < 0) 1858f95f3850SWill Newton return ret; 1859f95f3850SWill Newton } 1860f95f3850SWill Newton 1861f95f3850SWill Newton return 0; 1862f95f3850SWill Newton } 1863f95f3850SWill Newton #else 1864f95f3850SWill Newton #define dw_mci_suspend NULL 1865f95f3850SWill Newton #define dw_mci_resume NULL 1866f95f3850SWill Newton #endif /* CONFIG_PM */ 1867f95f3850SWill Newton 1868f95f3850SWill Newton static struct platform_driver dw_mci_driver = { 1869f95f3850SWill Newton .remove = __exit_p(dw_mci_remove), 1870f95f3850SWill Newton .suspend = dw_mci_suspend, 1871f95f3850SWill Newton .resume = dw_mci_resume, 1872f95f3850SWill Newton .driver = { 1873f95f3850SWill Newton .name = "dw_mmc", 1874f95f3850SWill Newton }, 1875f95f3850SWill Newton }; 1876f95f3850SWill Newton 1877f95f3850SWill Newton static int __init dw_mci_init(void) 1878f95f3850SWill Newton { 1879f95f3850SWill Newton return platform_driver_probe(&dw_mci_driver, dw_mci_probe); 1880f95f3850SWill Newton } 1881f95f3850SWill Newton 1882f95f3850SWill Newton static void __exit dw_mci_exit(void) 1883f95f3850SWill Newton { 1884f95f3850SWill Newton platform_driver_unregister(&dw_mci_driver); 1885f95f3850SWill Newton } 1886f95f3850SWill Newton 1887f95f3850SWill Newton module_init(dw_mci_init); 1888f95f3850SWill Newton module_exit(dw_mci_exit); 1889f95f3850SWill Newton 1890f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 1891f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 1892f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 1893f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 1894