1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/seq_file.h> 26f95f3850SWill Newton #include <linux/slab.h> 27f95f3850SWill Newton #include <linux/stat.h> 28f95f3850SWill Newton #include <linux/delay.h> 29f95f3850SWill Newton #include <linux/irq.h> 30f95f3850SWill Newton #include <linux/mmc/host.h> 31f95f3850SWill Newton #include <linux/mmc/mmc.h> 32f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 33f95f3850SWill Newton #include <linux/bitops.h> 34c07946a3SJaehoon Chung #include <linux/regulator/consumer.h> 351791b13eSJames Hogan #include <linux/workqueue.h> 36c91eab4bSThomas Abraham #include <linux/of.h> 37f95f3850SWill Newton 38f95f3850SWill Newton #include "dw_mmc.h" 39f95f3850SWill Newton 40f95f3850SWill Newton /* Common flag combinations */ 41f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 42f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 43f95f3850SWill Newton SDMMC_INT_EBE) 44f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 45f95f3850SWill Newton SDMMC_INT_RESP_ERR) 46f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 47f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 48f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 49f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 50f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 51f95f3850SWill Newton 52f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 53f95f3850SWill Newton struct idmac_desc { 54f95f3850SWill Newton u32 des0; /* Control Descriptor */ 55f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 56f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 57f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 58f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 59f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 60f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 61f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 62f95f3850SWill Newton 63f95f3850SWill Newton u32 des1; /* Buffer sizes */ 64f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 659b7bbe10SShashidhar Hiremath ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) 66f95f3850SWill Newton 67f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 68f95f3850SWill Newton 69f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 70f95f3850SWill Newton }; 71f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 72f95f3850SWill Newton 73f95f3850SWill Newton /** 74f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 75f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 76f95f3850SWill Newton * @host: The MMC controller this slot is using. 77f95f3850SWill Newton * @ctype: Card type for this slot. 78f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 79f95f3850SWill Newton * processed, or NULL when the slot is idle. 80f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 81f95f3850SWill Newton * &struct dw_mci. 82f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 83f95f3850SWill Newton * @flags: Random state bits associated with the slot. 84f95f3850SWill Newton * @id: Number of this slot. 85f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 86f95f3850SWill Newton */ 87f95f3850SWill Newton struct dw_mci_slot { 88f95f3850SWill Newton struct mmc_host *mmc; 89f95f3850SWill Newton struct dw_mci *host; 90f95f3850SWill Newton 91f95f3850SWill Newton u32 ctype; 92f95f3850SWill Newton 93f95f3850SWill Newton struct mmc_request *mrq; 94f95f3850SWill Newton struct list_head queue_node; 95f95f3850SWill Newton 96f95f3850SWill Newton unsigned int clock; 97f95f3850SWill Newton unsigned long flags; 98f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 99f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 100f95f3850SWill Newton int id; 101f95f3850SWill Newton int last_detect_state; 102f95f3850SWill Newton }; 103f95f3850SWill Newton 104f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 105f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 106f95f3850SWill Newton { 107f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 108f95f3850SWill Newton struct mmc_request *mrq; 109f95f3850SWill Newton struct mmc_command *cmd; 110f95f3850SWill Newton struct mmc_command *stop; 111f95f3850SWill Newton struct mmc_data *data; 112f95f3850SWill Newton 113f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 114f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 115f95f3850SWill Newton mrq = slot->mrq; 116f95f3850SWill Newton 117f95f3850SWill Newton if (mrq) { 118f95f3850SWill Newton cmd = mrq->cmd; 119f95f3850SWill Newton data = mrq->data; 120f95f3850SWill Newton stop = mrq->stop; 121f95f3850SWill Newton 122f95f3850SWill Newton if (cmd) 123f95f3850SWill Newton seq_printf(s, 124f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 125f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 126f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 127f95f3850SWill Newton cmd->resp[2], cmd->error); 128f95f3850SWill Newton if (data) 129f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 130f95f3850SWill Newton data->bytes_xfered, data->blocks, 131f95f3850SWill Newton data->blksz, data->flags, data->error); 132f95f3850SWill Newton if (stop) 133f95f3850SWill Newton seq_printf(s, 134f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 135f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 136f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 137f95f3850SWill Newton stop->resp[2], stop->error); 138f95f3850SWill Newton } 139f95f3850SWill Newton 140f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 141f95f3850SWill Newton 142f95f3850SWill Newton return 0; 143f95f3850SWill Newton } 144f95f3850SWill Newton 145f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 146f95f3850SWill Newton { 147f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 148f95f3850SWill Newton } 149f95f3850SWill Newton 150f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 151f95f3850SWill Newton .owner = THIS_MODULE, 152f95f3850SWill Newton .open = dw_mci_req_open, 153f95f3850SWill Newton .read = seq_read, 154f95f3850SWill Newton .llseek = seq_lseek, 155f95f3850SWill Newton .release = single_release, 156f95f3850SWill Newton }; 157f95f3850SWill Newton 158f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 159f95f3850SWill Newton { 160f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 161f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 162f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 163f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 164f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 165f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 166f95f3850SWill Newton 167f95f3850SWill Newton return 0; 168f95f3850SWill Newton } 169f95f3850SWill Newton 170f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 171f95f3850SWill Newton { 172f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 173f95f3850SWill Newton } 174f95f3850SWill Newton 175f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 176f95f3850SWill Newton .owner = THIS_MODULE, 177f95f3850SWill Newton .open = dw_mci_regs_open, 178f95f3850SWill Newton .read = seq_read, 179f95f3850SWill Newton .llseek = seq_lseek, 180f95f3850SWill Newton .release = single_release, 181f95f3850SWill Newton }; 182f95f3850SWill Newton 183f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 184f95f3850SWill Newton { 185f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 186f95f3850SWill Newton struct dw_mci *host = slot->host; 187f95f3850SWill Newton struct dentry *root; 188f95f3850SWill Newton struct dentry *node; 189f95f3850SWill Newton 190f95f3850SWill Newton root = mmc->debugfs_root; 191f95f3850SWill Newton if (!root) 192f95f3850SWill Newton return; 193f95f3850SWill Newton 194f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 195f95f3850SWill Newton &dw_mci_regs_fops); 196f95f3850SWill Newton if (!node) 197f95f3850SWill Newton goto err; 198f95f3850SWill Newton 199f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 200f95f3850SWill Newton &dw_mci_req_fops); 201f95f3850SWill Newton if (!node) 202f95f3850SWill Newton goto err; 203f95f3850SWill Newton 204f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 205f95f3850SWill Newton if (!node) 206f95f3850SWill Newton goto err; 207f95f3850SWill Newton 208f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 209f95f3850SWill Newton (u32 *)&host->pending_events); 210f95f3850SWill Newton if (!node) 211f95f3850SWill Newton goto err; 212f95f3850SWill Newton 213f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 214f95f3850SWill Newton (u32 *)&host->completed_events); 215f95f3850SWill Newton if (!node) 216f95f3850SWill Newton goto err; 217f95f3850SWill Newton 218f95f3850SWill Newton return; 219f95f3850SWill Newton 220f95f3850SWill Newton err: 221f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 222f95f3850SWill Newton } 223f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 224f95f3850SWill Newton 225f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 226f95f3850SWill Newton { 227f95f3850SWill Newton /* timeout (maximum) */ 228f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 229f95f3850SWill Newton } 230f95f3850SWill Newton 231f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 232f95f3850SWill Newton { 233f95f3850SWill Newton struct mmc_data *data; 234800d78bfSThomas Abraham struct dw_mci_slot *slot = mmc_priv(mmc); 235f95f3850SWill Newton u32 cmdr; 236f95f3850SWill Newton cmd->error = -EINPROGRESS; 237f95f3850SWill Newton 238f95f3850SWill Newton cmdr = cmd->opcode; 239f95f3850SWill Newton 240f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 241f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 242f95f3850SWill Newton else 243f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 244f95f3850SWill Newton 245f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 246f95f3850SWill Newton /* We expect a response, so set this bit */ 247f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 248f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 249f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 250f95f3850SWill Newton } 251f95f3850SWill Newton 252f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 253f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 254f95f3850SWill Newton 255f95f3850SWill Newton data = cmd->data; 256f95f3850SWill Newton if (data) { 257f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 258f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 259f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 260f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 261f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 262f95f3850SWill Newton } 263f95f3850SWill Newton 264800d78bfSThomas Abraham if (slot->host->drv_data->prepare_command) 265800d78bfSThomas Abraham slot->host->drv_data->prepare_command(slot->host, &cmdr); 266800d78bfSThomas Abraham 267f95f3850SWill Newton return cmdr; 268f95f3850SWill Newton } 269f95f3850SWill Newton 270f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 271f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 272f95f3850SWill Newton { 273f95f3850SWill Newton host->cmd = cmd; 2744a90920cSThomas Abraham dev_vdbg(host->dev, 275f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 276f95f3850SWill Newton cmd->arg, cmd_flags); 277f95f3850SWill Newton 278f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 279f95f3850SWill Newton wmb(); 280f95f3850SWill Newton 281f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 282f95f3850SWill Newton } 283f95f3850SWill Newton 284f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 285f95f3850SWill Newton { 286f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 287f95f3850SWill Newton } 288f95f3850SWill Newton 289f95f3850SWill Newton /* DMA interface functions */ 290f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 291f95f3850SWill Newton { 29203e8cb53SJames Hogan if (host->using_dma) { 293f95f3850SWill Newton host->dma_ops->stop(host); 294f95f3850SWill Newton host->dma_ops->cleanup(host); 295f95f3850SWill Newton } else { 296f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 297f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 298f95f3850SWill Newton } 299f95f3850SWill Newton } 300f95f3850SWill Newton 3019aa51408SSeungwon Jeon static int dw_mci_get_dma_dir(struct mmc_data *data) 3029aa51408SSeungwon Jeon { 3039aa51408SSeungwon Jeon if (data->flags & MMC_DATA_WRITE) 3049aa51408SSeungwon Jeon return DMA_TO_DEVICE; 3059aa51408SSeungwon Jeon else 3069aa51408SSeungwon Jeon return DMA_FROM_DEVICE; 3079aa51408SSeungwon Jeon } 3089aa51408SSeungwon Jeon 3099beee912SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 310f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 311f95f3850SWill Newton { 312f95f3850SWill Newton struct mmc_data *data = host->data; 313f95f3850SWill Newton 314f95f3850SWill Newton if (data) 3159aa51408SSeungwon Jeon if (!data->host_cookie) 3164a90920cSThomas Abraham dma_unmap_sg(host->dev, 3179aa51408SSeungwon Jeon data->sg, 3189aa51408SSeungwon Jeon data->sg_len, 3199aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 320f95f3850SWill Newton } 321f95f3850SWill Newton 322f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 323f95f3850SWill Newton { 324f95f3850SWill Newton u32 temp; 325f95f3850SWill Newton 326f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 327f95f3850SWill Newton temp = mci_readl(host, CTRL); 328f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 329f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 330f95f3850SWill Newton mci_writel(host, CTRL, temp); 331f95f3850SWill Newton 332f95f3850SWill Newton /* Stop the IDMAC running */ 333f95f3850SWill Newton temp = mci_readl(host, BMOD); 334a5289a43SJaehoon Chung temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB); 335f95f3850SWill Newton mci_writel(host, BMOD, temp); 336f95f3850SWill Newton } 337f95f3850SWill Newton 338f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 339f95f3850SWill Newton { 340f95f3850SWill Newton struct mmc_data *data = host->data; 341f95f3850SWill Newton 3424a90920cSThomas Abraham dev_vdbg(host->dev, "DMA complete\n"); 343f95f3850SWill Newton 344f95f3850SWill Newton host->dma_ops->cleanup(host); 345f95f3850SWill Newton 346f95f3850SWill Newton /* 347f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 348f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 349f95f3850SWill Newton */ 350f95f3850SWill Newton if (data) { 351f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 352f95f3850SWill Newton tasklet_schedule(&host->tasklet); 353f95f3850SWill Newton } 354f95f3850SWill Newton } 355f95f3850SWill Newton 356f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 357f95f3850SWill Newton unsigned int sg_len) 358f95f3850SWill Newton { 359f95f3850SWill Newton int i; 360f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 361f95f3850SWill Newton 362f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 363f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 364f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 365f95f3850SWill Newton 366f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 367f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 368f95f3850SWill Newton 369f95f3850SWill Newton /* Buffer length */ 370f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 371f95f3850SWill Newton 372f95f3850SWill Newton /* Physical address to DMA to/from */ 373f95f3850SWill Newton desc->des2 = mem_addr; 374f95f3850SWill Newton } 375f95f3850SWill Newton 376f95f3850SWill Newton /* Set first descriptor */ 377f95f3850SWill Newton desc = host->sg_cpu; 378f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 379f95f3850SWill Newton 380f95f3850SWill Newton /* Set last descriptor */ 381f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 382f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 383f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 384f95f3850SWill Newton 385f95f3850SWill Newton wmb(); 386f95f3850SWill Newton } 387f95f3850SWill Newton 388f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 389f95f3850SWill Newton { 390f95f3850SWill Newton u32 temp; 391f95f3850SWill Newton 392f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 393f95f3850SWill Newton 394f95f3850SWill Newton /* Select IDMAC interface */ 395f95f3850SWill Newton temp = mci_readl(host, CTRL); 396f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 397f95f3850SWill Newton mci_writel(host, CTRL, temp); 398f95f3850SWill Newton 399f95f3850SWill Newton wmb(); 400f95f3850SWill Newton 401f95f3850SWill Newton /* Enable the IDMAC */ 402f95f3850SWill Newton temp = mci_readl(host, BMOD); 403a5289a43SJaehoon Chung temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB; 404f95f3850SWill Newton mci_writel(host, BMOD, temp); 405f95f3850SWill Newton 406f95f3850SWill Newton /* Start it running */ 407f95f3850SWill Newton mci_writel(host, PLDMND, 1); 408f95f3850SWill Newton } 409f95f3850SWill Newton 410f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 411f95f3850SWill Newton { 412f95f3850SWill Newton struct idmac_desc *p; 413*897b69e7SSeungwon Jeon int i; 414f95f3850SWill Newton 415f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 416f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 417f95f3850SWill Newton 418f95f3850SWill Newton /* Forward link the descriptor list */ 419f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 420f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 421f95f3850SWill Newton 422f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 423f95f3850SWill Newton p->des3 = host->sg_dma; 424f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 425f95f3850SWill Newton 426141a712aSSeungwon Jeon mci_writel(host, BMOD, SDMMC_IDMAC_SWRESET); 427141a712aSSeungwon Jeon 428f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 429f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 430f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 431f95f3850SWill Newton 432f95f3850SWill Newton /* Set the descriptor base address */ 433f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 434f95f3850SWill Newton return 0; 435f95f3850SWill Newton } 436f95f3850SWill Newton 437885c3e80SSeungwon Jeon static struct dw_mci_dma_ops dw_mci_idmac_ops = { 438885c3e80SSeungwon Jeon .init = dw_mci_idmac_init, 439885c3e80SSeungwon Jeon .start = dw_mci_idmac_start_dma, 440885c3e80SSeungwon Jeon .stop = dw_mci_idmac_stop_dma, 441885c3e80SSeungwon Jeon .complete = dw_mci_idmac_complete_dma, 442885c3e80SSeungwon Jeon .cleanup = dw_mci_dma_cleanup, 443885c3e80SSeungwon Jeon }; 444885c3e80SSeungwon Jeon #endif /* CONFIG_MMC_DW_IDMAC */ 445885c3e80SSeungwon Jeon 4469aa51408SSeungwon Jeon static int dw_mci_pre_dma_transfer(struct dw_mci *host, 4479aa51408SSeungwon Jeon struct mmc_data *data, 4489aa51408SSeungwon Jeon bool next) 449f95f3850SWill Newton { 450f95f3850SWill Newton struct scatterlist *sg; 4519aa51408SSeungwon Jeon unsigned int i, sg_len; 452f95f3850SWill Newton 4539aa51408SSeungwon Jeon if (!next && data->host_cookie) 4549aa51408SSeungwon Jeon return data->host_cookie; 455f95f3850SWill Newton 456f95f3850SWill Newton /* 457f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 458f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 459f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 460f95f3850SWill Newton */ 461f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 462f95f3850SWill Newton return -EINVAL; 4639aa51408SSeungwon Jeon 464f95f3850SWill Newton if (data->blksz & 3) 465f95f3850SWill Newton return -EINVAL; 466f95f3850SWill Newton 467f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 468f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 469f95f3850SWill Newton return -EINVAL; 470f95f3850SWill Newton } 471f95f3850SWill Newton 4724a90920cSThomas Abraham sg_len = dma_map_sg(host->dev, 4739aa51408SSeungwon Jeon data->sg, 4749aa51408SSeungwon Jeon data->sg_len, 4759aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 4769aa51408SSeungwon Jeon if (sg_len == 0) 4779aa51408SSeungwon Jeon return -EINVAL; 4789aa51408SSeungwon Jeon 4799aa51408SSeungwon Jeon if (next) 4809aa51408SSeungwon Jeon data->host_cookie = sg_len; 4819aa51408SSeungwon Jeon 4829aa51408SSeungwon Jeon return sg_len; 4839aa51408SSeungwon Jeon } 4849aa51408SSeungwon Jeon 4859aa51408SSeungwon Jeon static void dw_mci_pre_req(struct mmc_host *mmc, 4869aa51408SSeungwon Jeon struct mmc_request *mrq, 4879aa51408SSeungwon Jeon bool is_first_req) 4889aa51408SSeungwon Jeon { 4899aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 4909aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 4919aa51408SSeungwon Jeon 4929aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 4939aa51408SSeungwon Jeon return; 4949aa51408SSeungwon Jeon 4959aa51408SSeungwon Jeon if (data->host_cookie) { 4969aa51408SSeungwon Jeon data->host_cookie = 0; 4979aa51408SSeungwon Jeon return; 4989aa51408SSeungwon Jeon } 4999aa51408SSeungwon Jeon 5009aa51408SSeungwon Jeon if (dw_mci_pre_dma_transfer(slot->host, mrq->data, 1) < 0) 5019aa51408SSeungwon Jeon data->host_cookie = 0; 5029aa51408SSeungwon Jeon } 5039aa51408SSeungwon Jeon 5049aa51408SSeungwon Jeon static void dw_mci_post_req(struct mmc_host *mmc, 5059aa51408SSeungwon Jeon struct mmc_request *mrq, 5069aa51408SSeungwon Jeon int err) 5079aa51408SSeungwon Jeon { 5089aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 5099aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 5109aa51408SSeungwon Jeon 5119aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 5129aa51408SSeungwon Jeon return; 5139aa51408SSeungwon Jeon 5149aa51408SSeungwon Jeon if (data->host_cookie) 5154a90920cSThomas Abraham dma_unmap_sg(slot->host->dev, 5169aa51408SSeungwon Jeon data->sg, 5179aa51408SSeungwon Jeon data->sg_len, 5189aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 5199aa51408SSeungwon Jeon data->host_cookie = 0; 5209aa51408SSeungwon Jeon } 5219aa51408SSeungwon Jeon 5229aa51408SSeungwon Jeon static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 5239aa51408SSeungwon Jeon { 5249aa51408SSeungwon Jeon int sg_len; 5259aa51408SSeungwon Jeon u32 temp; 5269aa51408SSeungwon Jeon 5279aa51408SSeungwon Jeon host->using_dma = 0; 5289aa51408SSeungwon Jeon 5299aa51408SSeungwon Jeon /* If we don't have a channel, we can't do DMA */ 5309aa51408SSeungwon Jeon if (!host->use_dma) 5319aa51408SSeungwon Jeon return -ENODEV; 5329aa51408SSeungwon Jeon 5339aa51408SSeungwon Jeon sg_len = dw_mci_pre_dma_transfer(host, data, 0); 534a99aa9b9SSeungwon Jeon if (sg_len < 0) { 535a99aa9b9SSeungwon Jeon host->dma_ops->stop(host); 5369aa51408SSeungwon Jeon return sg_len; 537a99aa9b9SSeungwon Jeon } 5389aa51408SSeungwon Jeon 53903e8cb53SJames Hogan host->using_dma = 1; 54003e8cb53SJames Hogan 5414a90920cSThomas Abraham dev_vdbg(host->dev, 542f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 543f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 544f95f3850SWill Newton sg_len); 545f95f3850SWill Newton 546f95f3850SWill Newton /* Enable the DMA interface */ 547f95f3850SWill Newton temp = mci_readl(host, CTRL); 548f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 549f95f3850SWill Newton mci_writel(host, CTRL, temp); 550f95f3850SWill Newton 551f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 552f95f3850SWill Newton temp = mci_readl(host, INTMASK); 553f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 554f95f3850SWill Newton mci_writel(host, INTMASK, temp); 555f95f3850SWill Newton 556f95f3850SWill Newton host->dma_ops->start(host, sg_len); 557f95f3850SWill Newton 558f95f3850SWill Newton return 0; 559f95f3850SWill Newton } 560f95f3850SWill Newton 561f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 562f95f3850SWill Newton { 563f95f3850SWill Newton u32 temp; 564f95f3850SWill Newton 565f95f3850SWill Newton data->error = -EINPROGRESS; 566f95f3850SWill Newton 567f95f3850SWill Newton WARN_ON(host->data); 568f95f3850SWill Newton host->sg = NULL; 569f95f3850SWill Newton host->data = data; 570f95f3850SWill Newton 57155c5efbcSJames Hogan if (data->flags & MMC_DATA_READ) 57255c5efbcSJames Hogan host->dir_status = DW_MCI_RECV_STATUS; 57355c5efbcSJames Hogan else 57455c5efbcSJames Hogan host->dir_status = DW_MCI_SEND_STATUS; 57555c5efbcSJames Hogan 576f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 577f9c2a0dcSSeungwon Jeon int flags = SG_MITER_ATOMIC; 578f9c2a0dcSSeungwon Jeon if (host->data->flags & MMC_DATA_READ) 579f9c2a0dcSSeungwon Jeon flags |= SG_MITER_TO_SG; 580f9c2a0dcSSeungwon Jeon else 581f9c2a0dcSSeungwon Jeon flags |= SG_MITER_FROM_SG; 582f9c2a0dcSSeungwon Jeon 583f9c2a0dcSSeungwon Jeon sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 584f95f3850SWill Newton host->sg = data->sg; 58534b664a2SJames Hogan host->part_buf_start = 0; 58634b664a2SJames Hogan host->part_buf_count = 0; 587f95f3850SWill Newton 588b40af3aaSJames Hogan mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); 589f95f3850SWill Newton temp = mci_readl(host, INTMASK); 590f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 591f95f3850SWill Newton mci_writel(host, INTMASK, temp); 592f95f3850SWill Newton 593f95f3850SWill Newton temp = mci_readl(host, CTRL); 594f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 595f95f3850SWill Newton mci_writel(host, CTRL, temp); 596f95f3850SWill Newton } 597f95f3850SWill Newton } 598f95f3850SWill Newton 599f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 600f95f3850SWill Newton { 601f95f3850SWill Newton struct dw_mci *host = slot->host; 602f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 603f95f3850SWill Newton unsigned int cmd_status = 0; 604f95f3850SWill Newton 605f95f3850SWill Newton mci_writel(host, CMDARG, arg); 606f95f3850SWill Newton wmb(); 607f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 608f95f3850SWill Newton 609f95f3850SWill Newton while (time_before(jiffies, timeout)) { 610f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 611f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 612f95f3850SWill Newton return; 613f95f3850SWill Newton } 614f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 615f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 616f95f3850SWill Newton cmd, arg, cmd_status); 617f95f3850SWill Newton } 618f95f3850SWill Newton 619f95f3850SWill Newton static void dw_mci_setup_bus(struct dw_mci_slot *slot) 620f95f3850SWill Newton { 621f95f3850SWill Newton struct dw_mci *host = slot->host; 622f95f3850SWill Newton u32 div; 6239623b5b9SDoug Anderson u32 clk_en_a; 624f95f3850SWill Newton 625f95f3850SWill Newton if (slot->clock != host->current_speed) { 626e419990bSSeungwon Jeon div = host->bus_hz / slot->clock; 627e419990bSSeungwon Jeon if (host->bus_hz % slot->clock && host->bus_hz > slot->clock) 628f95f3850SWill Newton /* 629f95f3850SWill Newton * move the + 1 after the divide to prevent 630f95f3850SWill Newton * over-clocking the card. 631f95f3850SWill Newton */ 632e419990bSSeungwon Jeon div += 1; 633e419990bSSeungwon Jeon 634e419990bSSeungwon Jeon div = (host->bus_hz != slot->clock) ? DIV_ROUND_UP(div, 2) : 0; 635f95f3850SWill Newton 636f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 637f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 638f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 639f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 640f95f3850SWill Newton 641f95f3850SWill Newton /* disable clock */ 642f95f3850SWill Newton mci_writel(host, CLKENA, 0); 643f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 644f95f3850SWill Newton 645f95f3850SWill Newton /* inform CIU */ 646f95f3850SWill Newton mci_send_cmd(slot, 647f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 648f95f3850SWill Newton 649f95f3850SWill Newton /* set clock to desired speed */ 650f95f3850SWill Newton mci_writel(host, CLKDIV, div); 651f95f3850SWill Newton 652f95f3850SWill Newton /* inform CIU */ 653f95f3850SWill Newton mci_send_cmd(slot, 654f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 655f95f3850SWill Newton 6569623b5b9SDoug Anderson /* enable clock; only low power if no SDIO */ 6579623b5b9SDoug Anderson clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; 6589623b5b9SDoug Anderson if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id))) 6599623b5b9SDoug Anderson clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id; 6609623b5b9SDoug Anderson mci_writel(host, CLKENA, clk_en_a); 661f95f3850SWill Newton 662f95f3850SWill Newton /* inform CIU */ 663f95f3850SWill Newton mci_send_cmd(slot, 664f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 665f95f3850SWill Newton 666f95f3850SWill Newton host->current_speed = slot->clock; 667f95f3850SWill Newton } 668f95f3850SWill Newton 669f95f3850SWill Newton /* Set the current slot bus width */ 6701d56c453SSeungwon Jeon mci_writel(host, CTYPE, (slot->ctype << slot->id)); 671f95f3850SWill Newton } 672f95f3850SWill Newton 673053b3ce6SSeungwon Jeon static void __dw_mci_start_request(struct dw_mci *host, 674053b3ce6SSeungwon Jeon struct dw_mci_slot *slot, 675053b3ce6SSeungwon Jeon struct mmc_command *cmd) 676f95f3850SWill Newton { 677f95f3850SWill Newton struct mmc_request *mrq; 678f95f3850SWill Newton struct mmc_data *data; 679f95f3850SWill Newton u32 cmdflags; 680f95f3850SWill Newton 681f95f3850SWill Newton mrq = slot->mrq; 682f95f3850SWill Newton if (host->pdata->select_slot) 683f95f3850SWill Newton host->pdata->select_slot(slot->id); 684f95f3850SWill Newton 685f95f3850SWill Newton /* Slot specific timing and width adjustment */ 686f95f3850SWill Newton dw_mci_setup_bus(slot); 687f95f3850SWill Newton 688f95f3850SWill Newton host->cur_slot = slot; 689f95f3850SWill Newton host->mrq = mrq; 690f95f3850SWill Newton 691f95f3850SWill Newton host->pending_events = 0; 692f95f3850SWill Newton host->completed_events = 0; 693f95f3850SWill Newton host->data_status = 0; 694f95f3850SWill Newton 695053b3ce6SSeungwon Jeon data = cmd->data; 696f95f3850SWill Newton if (data) { 697f95f3850SWill Newton dw_mci_set_timeout(host); 698f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 699f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 700f95f3850SWill Newton } 701f95f3850SWill Newton 702f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 703f95f3850SWill Newton 704f95f3850SWill Newton /* this is the first command, send the initialization clock */ 705f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 706f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 707f95f3850SWill Newton 708f95f3850SWill Newton if (data) { 709f95f3850SWill Newton dw_mci_submit_data(host, data); 710f95f3850SWill Newton wmb(); 711f95f3850SWill Newton } 712f95f3850SWill Newton 713f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 714f95f3850SWill Newton 715f95f3850SWill Newton if (mrq->stop) 716f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 717f95f3850SWill Newton } 718f95f3850SWill Newton 719053b3ce6SSeungwon Jeon static void dw_mci_start_request(struct dw_mci *host, 720053b3ce6SSeungwon Jeon struct dw_mci_slot *slot) 721053b3ce6SSeungwon Jeon { 722053b3ce6SSeungwon Jeon struct mmc_request *mrq = slot->mrq; 723053b3ce6SSeungwon Jeon struct mmc_command *cmd; 724053b3ce6SSeungwon Jeon 725053b3ce6SSeungwon Jeon cmd = mrq->sbc ? mrq->sbc : mrq->cmd; 726053b3ce6SSeungwon Jeon __dw_mci_start_request(host, slot, cmd); 727053b3ce6SSeungwon Jeon } 728053b3ce6SSeungwon Jeon 7297456caaeSJames Hogan /* must be called with host->lock held */ 730f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 731f95f3850SWill Newton struct mmc_request *mrq) 732f95f3850SWill Newton { 733f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 734f95f3850SWill Newton host->state); 735f95f3850SWill Newton 736f95f3850SWill Newton slot->mrq = mrq; 737f95f3850SWill Newton 738f95f3850SWill Newton if (host->state == STATE_IDLE) { 739f95f3850SWill Newton host->state = STATE_SENDING_CMD; 740f95f3850SWill Newton dw_mci_start_request(host, slot); 741f95f3850SWill Newton } else { 742f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 743f95f3850SWill Newton } 744f95f3850SWill Newton } 745f95f3850SWill Newton 746f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 747f95f3850SWill Newton { 748f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 749f95f3850SWill Newton struct dw_mci *host = slot->host; 750f95f3850SWill Newton 751f95f3850SWill Newton WARN_ON(slot->mrq); 752f95f3850SWill Newton 7537456caaeSJames Hogan /* 7547456caaeSJames Hogan * The check for card presence and queueing of the request must be 7557456caaeSJames Hogan * atomic, otherwise the card could be removed in between and the 7567456caaeSJames Hogan * request wouldn't fail until another card was inserted. 7577456caaeSJames Hogan */ 7587456caaeSJames Hogan spin_lock_bh(&host->lock); 7597456caaeSJames Hogan 760f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 7617456caaeSJames Hogan spin_unlock_bh(&host->lock); 762f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 763f95f3850SWill Newton mmc_request_done(mmc, mrq); 764f95f3850SWill Newton return; 765f95f3850SWill Newton } 766f95f3850SWill Newton 767f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 7687456caaeSJames Hogan 7697456caaeSJames Hogan spin_unlock_bh(&host->lock); 770f95f3850SWill Newton } 771f95f3850SWill Newton 772f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 773f95f3850SWill Newton { 774f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 77541babf75SJaehoon Chung u32 regs; 776f95f3850SWill Newton 777f95f3850SWill Newton /* set default 1 bit mode */ 778f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 779f95f3850SWill Newton 780f95f3850SWill Newton switch (ios->bus_width) { 781f95f3850SWill Newton case MMC_BUS_WIDTH_1: 782f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 783f95f3850SWill Newton break; 784f95f3850SWill Newton case MMC_BUS_WIDTH_4: 785f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 786f95f3850SWill Newton break; 787c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 788c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 789c9b2a06fSJaehoon Chung break; 790f95f3850SWill Newton } 791f95f3850SWill Newton 79241babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 7933f514291SSeungwon Jeon 7943f514291SSeungwon Jeon /* DDR mode set */ 7953f514291SSeungwon Jeon if (ios->timing == MMC_TIMING_UHS_DDR50) 79641babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 7973f514291SSeungwon Jeon else 7983f514291SSeungwon Jeon regs &= ~(0x1 << slot->id) << 16; 7993f514291SSeungwon Jeon 80041babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 80141babf75SJaehoon Chung 802f95f3850SWill Newton if (ios->clock) { 803f95f3850SWill Newton /* 804f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 805f95f3850SWill Newton * core ios update when finding the minimum. 806f95f3850SWill Newton */ 807f95f3850SWill Newton slot->clock = ios->clock; 808f95f3850SWill Newton } 809f95f3850SWill Newton 810800d78bfSThomas Abraham if (slot->host->drv_data->set_ios) 811800d78bfSThomas Abraham slot->host->drv_data->set_ios(slot->host, ios); 812800d78bfSThomas Abraham 813f95f3850SWill Newton switch (ios->power_mode) { 814f95f3850SWill Newton case MMC_POWER_UP: 815f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 816f95f3850SWill Newton break; 817f95f3850SWill Newton default: 818f95f3850SWill Newton break; 819f95f3850SWill Newton } 820f95f3850SWill Newton } 821f95f3850SWill Newton 822f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 823f95f3850SWill Newton { 824f95f3850SWill Newton int read_only; 825f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 826f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 827f95f3850SWill Newton 828f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 829b4967aa5SThomas Abraham if (brd->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT) 830b4967aa5SThomas Abraham read_only = 0; 831b4967aa5SThomas Abraham else if (brd->get_ro) 832f95f3850SWill Newton read_only = brd->get_ro(slot->id); 833f95f3850SWill Newton else 834f95f3850SWill Newton read_only = 835f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 836f95f3850SWill Newton 837f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 838f95f3850SWill Newton read_only ? "read-only" : "read-write"); 839f95f3850SWill Newton 840f95f3850SWill Newton return read_only; 841f95f3850SWill Newton } 842f95f3850SWill Newton 843f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 844f95f3850SWill Newton { 845f95f3850SWill Newton int present; 846f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 847f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 848f95f3850SWill Newton 849f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 850fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 851fc3d7720SJaehoon Chung present = 1; 852fc3d7720SJaehoon Chung else if (brd->get_cd) 853f95f3850SWill Newton present = !brd->get_cd(slot->id); 854f95f3850SWill Newton else 855f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 856f95f3850SWill Newton == 0 ? 1 : 0; 857f95f3850SWill Newton 858f95f3850SWill Newton if (present) 859f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 860f95f3850SWill Newton else 861f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 862f95f3850SWill Newton 863f95f3850SWill Newton return present; 864f95f3850SWill Newton } 865f95f3850SWill Newton 8669623b5b9SDoug Anderson /* 8679623b5b9SDoug Anderson * Disable lower power mode. 8689623b5b9SDoug Anderson * 8699623b5b9SDoug Anderson * Low power mode will stop the card clock when idle. According to the 8709623b5b9SDoug Anderson * description of the CLKENA register we should disable low power mode 8719623b5b9SDoug Anderson * for SDIO cards if we need SDIO interrupts to work. 8729623b5b9SDoug Anderson * 8739623b5b9SDoug Anderson * This function is fast if low power mode is already disabled. 8749623b5b9SDoug Anderson */ 8759623b5b9SDoug Anderson static void dw_mci_disable_low_power(struct dw_mci_slot *slot) 8769623b5b9SDoug Anderson { 8779623b5b9SDoug Anderson struct dw_mci *host = slot->host; 8789623b5b9SDoug Anderson u32 clk_en_a; 8799623b5b9SDoug Anderson const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR << slot->id; 8809623b5b9SDoug Anderson 8819623b5b9SDoug Anderson clk_en_a = mci_readl(host, CLKENA); 8829623b5b9SDoug Anderson 8839623b5b9SDoug Anderson if (clk_en_a & clken_low_pwr) { 8849623b5b9SDoug Anderson mci_writel(host, CLKENA, clk_en_a & ~clken_low_pwr); 8859623b5b9SDoug Anderson mci_send_cmd(slot, SDMMC_CMD_UPD_CLK | 8869623b5b9SDoug Anderson SDMMC_CMD_PRV_DAT_WAIT, 0); 8879623b5b9SDoug Anderson } 8889623b5b9SDoug Anderson } 8899623b5b9SDoug Anderson 8901a5c8e1fSShashidhar Hiremath static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) 8911a5c8e1fSShashidhar Hiremath { 8921a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = mmc_priv(mmc); 8931a5c8e1fSShashidhar Hiremath struct dw_mci *host = slot->host; 8941a5c8e1fSShashidhar Hiremath u32 int_mask; 8951a5c8e1fSShashidhar Hiremath 8961a5c8e1fSShashidhar Hiremath /* Enable/disable Slot Specific SDIO interrupt */ 8971a5c8e1fSShashidhar Hiremath int_mask = mci_readl(host, INTMASK); 8981a5c8e1fSShashidhar Hiremath if (enb) { 8999623b5b9SDoug Anderson /* 9009623b5b9SDoug Anderson * Turn off low power mode if it was enabled. This is a bit of 9019623b5b9SDoug Anderson * a heavy operation and we disable / enable IRQs a lot, so 9029623b5b9SDoug Anderson * we'll leave low power mode disabled and it will get 9039623b5b9SDoug Anderson * re-enabled again in dw_mci_setup_bus(). 9049623b5b9SDoug Anderson */ 9059623b5b9SDoug Anderson dw_mci_disable_low_power(slot); 9069623b5b9SDoug Anderson 9071a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 908705ad047SKyoungil Kim (int_mask | SDMMC_INT_SDIO(slot->id))); 9091a5c8e1fSShashidhar Hiremath } else { 9101a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 911705ad047SKyoungil Kim (int_mask & ~SDMMC_INT_SDIO(slot->id))); 9121a5c8e1fSShashidhar Hiremath } 9131a5c8e1fSShashidhar Hiremath } 9141a5c8e1fSShashidhar Hiremath 915f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 916f95f3850SWill Newton .request = dw_mci_request, 9179aa51408SSeungwon Jeon .pre_req = dw_mci_pre_req, 9189aa51408SSeungwon Jeon .post_req = dw_mci_post_req, 919f95f3850SWill Newton .set_ios = dw_mci_set_ios, 920f95f3850SWill Newton .get_ro = dw_mci_get_ro, 921f95f3850SWill Newton .get_cd = dw_mci_get_cd, 9221a5c8e1fSShashidhar Hiremath .enable_sdio_irq = dw_mci_enable_sdio_irq, 923f95f3850SWill Newton }; 924f95f3850SWill Newton 925f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 926f95f3850SWill Newton __releases(&host->lock) 927f95f3850SWill Newton __acquires(&host->lock) 928f95f3850SWill Newton { 929f95f3850SWill Newton struct dw_mci_slot *slot; 930f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 931f95f3850SWill Newton 932f95f3850SWill Newton WARN_ON(host->cmd || host->data); 933f95f3850SWill Newton 934f95f3850SWill Newton host->cur_slot->mrq = NULL; 935f95f3850SWill Newton host->mrq = NULL; 936f95f3850SWill Newton if (!list_empty(&host->queue)) { 937f95f3850SWill Newton slot = list_entry(host->queue.next, 938f95f3850SWill Newton struct dw_mci_slot, queue_node); 939f95f3850SWill Newton list_del(&slot->queue_node); 9404a90920cSThomas Abraham dev_vdbg(host->dev, "list not empty: %s is next\n", 941f95f3850SWill Newton mmc_hostname(slot->mmc)); 942f95f3850SWill Newton host->state = STATE_SENDING_CMD; 943f95f3850SWill Newton dw_mci_start_request(host, slot); 944f95f3850SWill Newton } else { 9454a90920cSThomas Abraham dev_vdbg(host->dev, "list empty\n"); 946f95f3850SWill Newton host->state = STATE_IDLE; 947f95f3850SWill Newton } 948f95f3850SWill Newton 949f95f3850SWill Newton spin_unlock(&host->lock); 950f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 951f95f3850SWill Newton spin_lock(&host->lock); 952f95f3850SWill Newton } 953f95f3850SWill Newton 954f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 955f95f3850SWill Newton { 956f95f3850SWill Newton u32 status = host->cmd_status; 957f95f3850SWill Newton 958f95f3850SWill Newton host->cmd_status = 0; 959f95f3850SWill Newton 960f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 961f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 962f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 963f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 964f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 965f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 966f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 967f95f3850SWill Newton } else { 968f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 969f95f3850SWill Newton cmd->resp[1] = 0; 970f95f3850SWill Newton cmd->resp[2] = 0; 971f95f3850SWill Newton cmd->resp[3] = 0; 972f95f3850SWill Newton } 973f95f3850SWill Newton } 974f95f3850SWill Newton 975f95f3850SWill Newton if (status & SDMMC_INT_RTO) 976f95f3850SWill Newton cmd->error = -ETIMEDOUT; 977f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 978f95f3850SWill Newton cmd->error = -EILSEQ; 979f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 980f95f3850SWill Newton cmd->error = -EIO; 981f95f3850SWill Newton else 982f95f3850SWill Newton cmd->error = 0; 983f95f3850SWill Newton 984f95f3850SWill Newton if (cmd->error) { 985f95f3850SWill Newton /* newer ip versions need a delay between retries */ 986f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 987f95f3850SWill Newton mdelay(20); 988f95f3850SWill Newton 989f95f3850SWill Newton if (cmd->data) { 990f95f3850SWill Newton dw_mci_stop_dma(host); 991fda5f736SSeungwon Jeon host->data = NULL; 992f95f3850SWill Newton } 993f95f3850SWill Newton } 994f95f3850SWill Newton } 995f95f3850SWill Newton 996f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 997f95f3850SWill Newton { 998f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 999f95f3850SWill Newton struct mmc_data *data; 1000f95f3850SWill Newton struct mmc_command *cmd; 1001f95f3850SWill Newton enum dw_mci_state state; 1002f95f3850SWill Newton enum dw_mci_state prev_state; 100394dd5b33SJames Hogan u32 status, ctrl; 1004f95f3850SWill Newton 1005f95f3850SWill Newton spin_lock(&host->lock); 1006f95f3850SWill Newton 1007f95f3850SWill Newton state = host->state; 1008f95f3850SWill Newton data = host->data; 1009f95f3850SWill Newton 1010f95f3850SWill Newton do { 1011f95f3850SWill Newton prev_state = state; 1012f95f3850SWill Newton 1013f95f3850SWill Newton switch (state) { 1014f95f3850SWill Newton case STATE_IDLE: 1015f95f3850SWill Newton break; 1016f95f3850SWill Newton 1017f95f3850SWill Newton case STATE_SENDING_CMD: 1018f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1019f95f3850SWill Newton &host->pending_events)) 1020f95f3850SWill Newton break; 1021f95f3850SWill Newton 1022f95f3850SWill Newton cmd = host->cmd; 1023f95f3850SWill Newton host->cmd = NULL; 1024f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 1025053b3ce6SSeungwon Jeon dw_mci_command_complete(host, cmd); 1026053b3ce6SSeungwon Jeon if (cmd == host->mrq->sbc && !cmd->error) { 1027053b3ce6SSeungwon Jeon prev_state = state = STATE_SENDING_CMD; 1028053b3ce6SSeungwon Jeon __dw_mci_start_request(host, host->cur_slot, 1029053b3ce6SSeungwon Jeon host->mrq->cmd); 1030053b3ce6SSeungwon Jeon goto unlock; 1031053b3ce6SSeungwon Jeon } 1032053b3ce6SSeungwon Jeon 1033f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 1034f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1035f95f3850SWill Newton goto unlock; 1036f95f3850SWill Newton } 1037f95f3850SWill Newton 1038f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 1039f95f3850SWill Newton /* fall through */ 1040f95f3850SWill Newton 1041f95f3850SWill Newton case STATE_SENDING_DATA: 1042f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 1043f95f3850SWill Newton &host->pending_events)) { 1044f95f3850SWill Newton dw_mci_stop_dma(host); 1045f95f3850SWill Newton if (data->stop) 1046f95f3850SWill Newton send_stop_cmd(host, data); 1047f95f3850SWill Newton state = STATE_DATA_ERROR; 1048f95f3850SWill Newton break; 1049f95f3850SWill Newton } 1050f95f3850SWill Newton 1051f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1052f95f3850SWill Newton &host->pending_events)) 1053f95f3850SWill Newton break; 1054f95f3850SWill Newton 1055f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 1056f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 1057f95f3850SWill Newton /* fall through */ 1058f95f3850SWill Newton 1059f95f3850SWill Newton case STATE_DATA_BUSY: 1060f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 1061f95f3850SWill Newton &host->pending_events)) 1062f95f3850SWill Newton break; 1063f95f3850SWill Newton 1064f95f3850SWill Newton host->data = NULL; 1065f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 1066f95f3850SWill Newton status = host->data_status; 1067f95f3850SWill Newton 1068f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1069f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 1070f95f3850SWill Newton data->error = -ETIMEDOUT; 1071f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 1072f95f3850SWill Newton data->error = -EILSEQ; 107355c5efbcSJames Hogan } else if (status & SDMMC_INT_EBE && 107455c5efbcSJames Hogan host->dir_status == 107555c5efbcSJames Hogan DW_MCI_SEND_STATUS) { 107655c5efbcSJames Hogan /* 107755c5efbcSJames Hogan * No data CRC status was returned. 107855c5efbcSJames Hogan * The number of bytes transferred will 107955c5efbcSJames Hogan * be exaggerated in PIO mode. 108055c5efbcSJames Hogan */ 108155c5efbcSJames Hogan data->bytes_xfered = 0; 108255c5efbcSJames Hogan data->error = -ETIMEDOUT; 1083f95f3850SWill Newton } else { 10844a90920cSThomas Abraham dev_err(host->dev, 1085f95f3850SWill Newton "data FIFO error " 1086f95f3850SWill Newton "(status=%08x)\n", 1087f95f3850SWill Newton status); 1088f95f3850SWill Newton data->error = -EIO; 1089f95f3850SWill Newton } 109094dd5b33SJames Hogan /* 109194dd5b33SJames Hogan * After an error, there may be data lingering 109294dd5b33SJames Hogan * in the FIFO, so reset it - doing so 109394dd5b33SJames Hogan * generates a block interrupt, hence setting 109494dd5b33SJames Hogan * the scatter-gather pointer to NULL. 109594dd5b33SJames Hogan */ 1096f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 109794dd5b33SJames Hogan host->sg = NULL; 109894dd5b33SJames Hogan ctrl = mci_readl(host, CTRL); 109994dd5b33SJames Hogan ctrl |= SDMMC_CTRL_FIFO_RESET; 110094dd5b33SJames Hogan mci_writel(host, CTRL, ctrl); 1101f95f3850SWill Newton } else { 1102f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 1103f95f3850SWill Newton data->error = 0; 1104f95f3850SWill Newton } 1105f95f3850SWill Newton 1106f95f3850SWill Newton if (!data->stop) { 1107f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1108f95f3850SWill Newton goto unlock; 1109f95f3850SWill Newton } 1110f95f3850SWill Newton 1111053b3ce6SSeungwon Jeon if (host->mrq->sbc && !data->error) { 1112053b3ce6SSeungwon Jeon data->stop->error = 0; 1113053b3ce6SSeungwon Jeon dw_mci_request_end(host, host->mrq); 1114053b3ce6SSeungwon Jeon goto unlock; 1115053b3ce6SSeungwon Jeon } 1116053b3ce6SSeungwon Jeon 1117f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 1118f95f3850SWill Newton if (!data->error) 1119f95f3850SWill Newton send_stop_cmd(host, data); 1120f95f3850SWill Newton /* fall through */ 1121f95f3850SWill Newton 1122f95f3850SWill Newton case STATE_SENDING_STOP: 1123f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1124f95f3850SWill Newton &host->pending_events)) 1125f95f3850SWill Newton break; 1126f95f3850SWill Newton 1127f95f3850SWill Newton host->cmd = NULL; 1128f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 1129f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1130f95f3850SWill Newton goto unlock; 1131f95f3850SWill Newton 1132f95f3850SWill Newton case STATE_DATA_ERROR: 1133f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1134f95f3850SWill Newton &host->pending_events)) 1135f95f3850SWill Newton break; 1136f95f3850SWill Newton 1137f95f3850SWill Newton state = STATE_DATA_BUSY; 1138f95f3850SWill Newton break; 1139f95f3850SWill Newton } 1140f95f3850SWill Newton } while (state != prev_state); 1141f95f3850SWill Newton 1142f95f3850SWill Newton host->state = state; 1143f95f3850SWill Newton unlock: 1144f95f3850SWill Newton spin_unlock(&host->lock); 1145f95f3850SWill Newton 1146f95f3850SWill Newton } 1147f95f3850SWill Newton 114834b664a2SJames Hogan /* push final bytes to part_buf, only use during push */ 114934b664a2SJames Hogan static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) 115034b664a2SJames Hogan { 115134b664a2SJames Hogan memcpy((void *)&host->part_buf, buf, cnt); 115234b664a2SJames Hogan host->part_buf_count = cnt; 115334b664a2SJames Hogan } 115434b664a2SJames Hogan 115534b664a2SJames Hogan /* append bytes to part_buf, only use during push */ 115634b664a2SJames Hogan static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) 115734b664a2SJames Hogan { 115834b664a2SJames Hogan cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); 115934b664a2SJames Hogan memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); 116034b664a2SJames Hogan host->part_buf_count += cnt; 116134b664a2SJames Hogan return cnt; 116234b664a2SJames Hogan } 116334b664a2SJames Hogan 116434b664a2SJames Hogan /* pull first bytes from part_buf, only use during pull */ 116534b664a2SJames Hogan static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) 116634b664a2SJames Hogan { 116734b664a2SJames Hogan cnt = min(cnt, (int)host->part_buf_count); 116834b664a2SJames Hogan if (cnt) { 116934b664a2SJames Hogan memcpy(buf, (void *)&host->part_buf + host->part_buf_start, 117034b664a2SJames Hogan cnt); 117134b664a2SJames Hogan host->part_buf_count -= cnt; 117234b664a2SJames Hogan host->part_buf_start += cnt; 117334b664a2SJames Hogan } 117434b664a2SJames Hogan return cnt; 117534b664a2SJames Hogan } 117634b664a2SJames Hogan 117734b664a2SJames Hogan /* pull final bytes from the part_buf, assuming it's just been filled */ 117834b664a2SJames Hogan static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) 117934b664a2SJames Hogan { 118034b664a2SJames Hogan memcpy(buf, &host->part_buf, cnt); 118134b664a2SJames Hogan host->part_buf_start = cnt; 118234b664a2SJames Hogan host->part_buf_count = (1 << host->data_shift) - cnt; 118334b664a2SJames Hogan } 118434b664a2SJames Hogan 1185f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 1186f95f3850SWill Newton { 118734b664a2SJames Hogan /* try and push anything in the part_buf */ 118834b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 118934b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 119034b664a2SJames Hogan buf += len; 119134b664a2SJames Hogan cnt -= len; 119234b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 2) { 11934e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 11944e0a5adfSJaehoon Chung host->part_buf16); 119534b664a2SJames Hogan host->part_buf_count = 0; 119634b664a2SJames Hogan } 119734b664a2SJames Hogan } 119834b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 119934b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 120034b664a2SJames Hogan while (cnt >= 2) { 120134b664a2SJames Hogan u16 aligned_buf[64]; 120234b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 120334b664a2SJames Hogan int items = len >> 1; 120434b664a2SJames Hogan int i; 120534b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 120634b664a2SJames Hogan memcpy(aligned_buf, buf, len); 120734b664a2SJames Hogan buf += len; 120834b664a2SJames Hogan cnt -= len; 120934b664a2SJames Hogan /* push data from aligned buffer into fifo */ 121034b664a2SJames Hogan for (i = 0; i < items; ++i) 12114e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12124e0a5adfSJaehoon Chung aligned_buf[i]); 121334b664a2SJames Hogan } 121434b664a2SJames Hogan } else 121534b664a2SJames Hogan #endif 121634b664a2SJames Hogan { 121734b664a2SJames Hogan u16 *pdata = buf; 121834b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 12194e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), *pdata++); 122034b664a2SJames Hogan buf = pdata; 122134b664a2SJames Hogan } 122234b664a2SJames Hogan /* put anything remaining in the part_buf */ 122334b664a2SJames Hogan if (cnt) { 122434b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 122534b664a2SJames Hogan if (!sg_next(host->sg)) 12264e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12274e0a5adfSJaehoon Chung host->part_buf16); 1228f95f3850SWill Newton } 1229f95f3850SWill Newton } 1230f95f3850SWill Newton 1231f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 1232f95f3850SWill Newton { 123334b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 123434b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 123534b664a2SJames Hogan while (cnt >= 2) { 123634b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 123734b664a2SJames Hogan u16 aligned_buf[64]; 123834b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 123934b664a2SJames Hogan int items = len >> 1; 124034b664a2SJames Hogan int i; 124134b664a2SJames Hogan for (i = 0; i < items; ++i) 12424e0a5adfSJaehoon Chung aligned_buf[i] = mci_readw(host, 12434e0a5adfSJaehoon Chung DATA(host->data_offset)); 124434b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 124534b664a2SJames Hogan memcpy(buf, aligned_buf, len); 124634b664a2SJames Hogan buf += len; 124734b664a2SJames Hogan cnt -= len; 124834b664a2SJames Hogan } 124934b664a2SJames Hogan } else 125034b664a2SJames Hogan #endif 125134b664a2SJames Hogan { 125234b664a2SJames Hogan u16 *pdata = buf; 125334b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 12544e0a5adfSJaehoon Chung *pdata++ = mci_readw(host, DATA(host->data_offset)); 125534b664a2SJames Hogan buf = pdata; 125634b664a2SJames Hogan } 125734b664a2SJames Hogan if (cnt) { 12584e0a5adfSJaehoon Chung host->part_buf16 = mci_readw(host, DATA(host->data_offset)); 125934b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1260f95f3850SWill Newton } 1261f95f3850SWill Newton } 1262f95f3850SWill Newton 1263f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 1264f95f3850SWill Newton { 126534b664a2SJames Hogan /* try and push anything in the part_buf */ 126634b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 126734b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 126834b664a2SJames Hogan buf += len; 126934b664a2SJames Hogan cnt -= len; 127034b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 4) { 12714e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12724e0a5adfSJaehoon Chung host->part_buf32); 127334b664a2SJames Hogan host->part_buf_count = 0; 127434b664a2SJames Hogan } 127534b664a2SJames Hogan } 127634b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 127734b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 127834b664a2SJames Hogan while (cnt >= 4) { 127934b664a2SJames Hogan u32 aligned_buf[32]; 128034b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 128134b664a2SJames Hogan int items = len >> 2; 128234b664a2SJames Hogan int i; 128334b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 128434b664a2SJames Hogan memcpy(aligned_buf, buf, len); 128534b664a2SJames Hogan buf += len; 128634b664a2SJames Hogan cnt -= len; 128734b664a2SJames Hogan /* push data from aligned buffer into fifo */ 128834b664a2SJames Hogan for (i = 0; i < items; ++i) 12894e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12904e0a5adfSJaehoon Chung aligned_buf[i]); 129134b664a2SJames Hogan } 129234b664a2SJames Hogan } else 129334b664a2SJames Hogan #endif 129434b664a2SJames Hogan { 129534b664a2SJames Hogan u32 *pdata = buf; 129634b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 12974e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), *pdata++); 129834b664a2SJames Hogan buf = pdata; 129934b664a2SJames Hogan } 130034b664a2SJames Hogan /* put anything remaining in the part_buf */ 130134b664a2SJames Hogan if (cnt) { 130234b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 130334b664a2SJames Hogan if (!sg_next(host->sg)) 13044e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 13054e0a5adfSJaehoon Chung host->part_buf32); 1306f95f3850SWill Newton } 1307f95f3850SWill Newton } 1308f95f3850SWill Newton 1309f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 1310f95f3850SWill Newton { 131134b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 131234b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 131334b664a2SJames Hogan while (cnt >= 4) { 131434b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 131534b664a2SJames Hogan u32 aligned_buf[32]; 131634b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 131734b664a2SJames Hogan int items = len >> 2; 131834b664a2SJames Hogan int i; 131934b664a2SJames Hogan for (i = 0; i < items; ++i) 13204e0a5adfSJaehoon Chung aligned_buf[i] = mci_readl(host, 13214e0a5adfSJaehoon Chung DATA(host->data_offset)); 132234b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 132334b664a2SJames Hogan memcpy(buf, aligned_buf, len); 132434b664a2SJames Hogan buf += len; 132534b664a2SJames Hogan cnt -= len; 132634b664a2SJames Hogan } 132734b664a2SJames Hogan } else 132834b664a2SJames Hogan #endif 132934b664a2SJames Hogan { 133034b664a2SJames Hogan u32 *pdata = buf; 133134b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 13324e0a5adfSJaehoon Chung *pdata++ = mci_readl(host, DATA(host->data_offset)); 133334b664a2SJames Hogan buf = pdata; 133434b664a2SJames Hogan } 133534b664a2SJames Hogan if (cnt) { 13364e0a5adfSJaehoon Chung host->part_buf32 = mci_readl(host, DATA(host->data_offset)); 133734b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1338f95f3850SWill Newton } 1339f95f3850SWill Newton } 1340f95f3850SWill Newton 1341f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1342f95f3850SWill Newton { 134334b664a2SJames Hogan /* try and push anything in the part_buf */ 134434b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 134534b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 134634b664a2SJames Hogan buf += len; 134734b664a2SJames Hogan cnt -= len; 134834b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 8) { 13494e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 13504e0a5adfSJaehoon Chung host->part_buf); 135134b664a2SJames Hogan host->part_buf_count = 0; 135234b664a2SJames Hogan } 135334b664a2SJames Hogan } 135434b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 135534b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 135634b664a2SJames Hogan while (cnt >= 8) { 135734b664a2SJames Hogan u64 aligned_buf[16]; 135834b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 135934b664a2SJames Hogan int items = len >> 3; 136034b664a2SJames Hogan int i; 136134b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 136234b664a2SJames Hogan memcpy(aligned_buf, buf, len); 136334b664a2SJames Hogan buf += len; 136434b664a2SJames Hogan cnt -= len; 136534b664a2SJames Hogan /* push data from aligned buffer into fifo */ 136634b664a2SJames Hogan for (i = 0; i < items; ++i) 13674e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13684e0a5adfSJaehoon Chung aligned_buf[i]); 136934b664a2SJames Hogan } 137034b664a2SJames Hogan } else 137134b664a2SJames Hogan #endif 137234b664a2SJames Hogan { 137334b664a2SJames Hogan u64 *pdata = buf; 137434b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 13754e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), *pdata++); 137634b664a2SJames Hogan buf = pdata; 137734b664a2SJames Hogan } 137834b664a2SJames Hogan /* put anything remaining in the part_buf */ 137934b664a2SJames Hogan if (cnt) { 138034b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 138134b664a2SJames Hogan if (!sg_next(host->sg)) 13824e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13834e0a5adfSJaehoon Chung host->part_buf); 1384f95f3850SWill Newton } 1385f95f3850SWill Newton } 1386f95f3850SWill Newton 1387f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1388f95f3850SWill Newton { 138934b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 139034b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 139134b664a2SJames Hogan while (cnt >= 8) { 139234b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 139334b664a2SJames Hogan u64 aligned_buf[16]; 139434b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 139534b664a2SJames Hogan int items = len >> 3; 139634b664a2SJames Hogan int i; 139734b664a2SJames Hogan for (i = 0; i < items; ++i) 13984e0a5adfSJaehoon Chung aligned_buf[i] = mci_readq(host, 13994e0a5adfSJaehoon Chung DATA(host->data_offset)); 140034b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 140134b664a2SJames Hogan memcpy(buf, aligned_buf, len); 140234b664a2SJames Hogan buf += len; 140334b664a2SJames Hogan cnt -= len; 1404f95f3850SWill Newton } 140534b664a2SJames Hogan } else 140634b664a2SJames Hogan #endif 140734b664a2SJames Hogan { 140834b664a2SJames Hogan u64 *pdata = buf; 140934b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 14104e0a5adfSJaehoon Chung *pdata++ = mci_readq(host, DATA(host->data_offset)); 141134b664a2SJames Hogan buf = pdata; 141234b664a2SJames Hogan } 141334b664a2SJames Hogan if (cnt) { 14144e0a5adfSJaehoon Chung host->part_buf = mci_readq(host, DATA(host->data_offset)); 141534b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 141634b664a2SJames Hogan } 141734b664a2SJames Hogan } 141834b664a2SJames Hogan 141934b664a2SJames Hogan static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) 142034b664a2SJames Hogan { 142134b664a2SJames Hogan int len; 142234b664a2SJames Hogan 142334b664a2SJames Hogan /* get remaining partial bytes */ 142434b664a2SJames Hogan len = dw_mci_pull_part_bytes(host, buf, cnt); 142534b664a2SJames Hogan if (unlikely(len == cnt)) 142634b664a2SJames Hogan return; 142734b664a2SJames Hogan buf += len; 142834b664a2SJames Hogan cnt -= len; 142934b664a2SJames Hogan 143034b664a2SJames Hogan /* get the rest of the data */ 143134b664a2SJames Hogan host->pull_data(host, buf, cnt); 1432f95f3850SWill Newton } 1433f95f3850SWill Newton 1434f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1435f95f3850SWill Newton { 1436f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1437f9c2a0dcSSeungwon Jeon void *buf; 1438f9c2a0dcSSeungwon Jeon unsigned int offset; 1439f95f3850SWill Newton struct mmc_data *data = host->data; 1440f95f3850SWill Newton int shift = host->data_shift; 1441f95f3850SWill Newton u32 status; 1442ba6a902dSChris Ball unsigned int nbytes = 0, len; 1443f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1444f95f3850SWill Newton 1445f95f3850SWill Newton do { 1446f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1447f9c2a0dcSSeungwon Jeon goto done; 1448f95f3850SWill Newton 1449f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1450f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1451f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1452f9c2a0dcSSeungwon Jeon offset = 0; 1453f9c2a0dcSSeungwon Jeon 1454f9c2a0dcSSeungwon Jeon do { 1455f9c2a0dcSSeungwon Jeon fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) 1456f9c2a0dcSSeungwon Jeon << shift) + host->part_buf_count; 1457f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1458f9c2a0dcSSeungwon Jeon if (!len) 1459f9c2a0dcSSeungwon Jeon break; 1460f9c2a0dcSSeungwon Jeon dw_mci_pull_data(host, (void *)(buf + offset), len); 1461f95f3850SWill Newton offset += len; 1462f95f3850SWill Newton nbytes += len; 1463f9c2a0dcSSeungwon Jeon remain -= len; 1464f9c2a0dcSSeungwon Jeon } while (remain); 1465f95f3850SWill Newton 1466e74f3a9cSSeungwon Jeon sg_miter->consumed = offset; 1467f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1468f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1469f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1470f95f3850SWill Newton data->bytes_xfered += nbytes; 1471f9c2a0dcSSeungwon Jeon 1472f9c2a0dcSSeungwon Jeon if (!remain) { 1473f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1474f9c2a0dcSSeungwon Jeon goto done; 1475f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1476f9c2a0dcSSeungwon Jeon } 1477f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1478f95f3850SWill Newton return; 1479f95f3850SWill Newton 1480f95f3850SWill Newton done: 1481f95f3850SWill Newton data->bytes_xfered += nbytes; 1482f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1483f9c2a0dcSSeungwon Jeon host->sg = NULL; 1484f95f3850SWill Newton smp_wmb(); 1485f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1486f95f3850SWill Newton } 1487f95f3850SWill Newton 1488f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1489f95f3850SWill Newton { 1490f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1491f9c2a0dcSSeungwon Jeon void *buf; 1492f9c2a0dcSSeungwon Jeon unsigned int offset; 1493f95f3850SWill Newton struct mmc_data *data = host->data; 1494f95f3850SWill Newton int shift = host->data_shift; 1495f95f3850SWill Newton u32 status; 1496f95f3850SWill Newton unsigned int nbytes = 0, len; 1497f9c2a0dcSSeungwon Jeon unsigned int fifo_depth = host->fifo_depth; 1498f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1499f95f3850SWill Newton 1500f95f3850SWill Newton do { 1501f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1502f9c2a0dcSSeungwon Jeon goto done; 1503f95f3850SWill Newton 1504f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1505f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1506f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1507f9c2a0dcSSeungwon Jeon offset = 0; 1508f9c2a0dcSSeungwon Jeon 1509f9c2a0dcSSeungwon Jeon do { 1510f9c2a0dcSSeungwon Jeon fcnt = ((fifo_depth - 1511f9c2a0dcSSeungwon Jeon SDMMC_GET_FCNT(mci_readl(host, STATUS))) 1512f9c2a0dcSSeungwon Jeon << shift) - host->part_buf_count; 1513f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1514f9c2a0dcSSeungwon Jeon if (!len) 1515f9c2a0dcSSeungwon Jeon break; 1516f9c2a0dcSSeungwon Jeon host->push_data(host, (void *)(buf + offset), len); 1517f95f3850SWill Newton offset += len; 1518f95f3850SWill Newton nbytes += len; 1519f9c2a0dcSSeungwon Jeon remain -= len; 1520f9c2a0dcSSeungwon Jeon } while (remain); 1521f95f3850SWill Newton 1522e74f3a9cSSeungwon Jeon sg_miter->consumed = offset; 1523f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1524f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1525f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1526f95f3850SWill Newton data->bytes_xfered += nbytes; 1527f9c2a0dcSSeungwon Jeon 1528f9c2a0dcSSeungwon Jeon if (!remain) { 1529f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1530f9c2a0dcSSeungwon Jeon goto done; 1531f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1532f9c2a0dcSSeungwon Jeon } 1533f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1534f95f3850SWill Newton return; 1535f95f3850SWill Newton 1536f95f3850SWill Newton done: 1537f95f3850SWill Newton data->bytes_xfered += nbytes; 1538f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1539f9c2a0dcSSeungwon Jeon host->sg = NULL; 1540f95f3850SWill Newton smp_wmb(); 1541f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1542f95f3850SWill Newton } 1543f95f3850SWill Newton 1544f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1545f95f3850SWill Newton { 1546f95f3850SWill Newton if (!host->cmd_status) 1547f95f3850SWill Newton host->cmd_status = status; 1548f95f3850SWill Newton 1549f95f3850SWill Newton smp_wmb(); 1550f95f3850SWill Newton 1551f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1552f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1553f95f3850SWill Newton } 1554f95f3850SWill Newton 1555f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1556f95f3850SWill Newton { 1557f95f3850SWill Newton struct dw_mci *host = dev_id; 1558182c9081SSeungwon Jeon u32 pending; 1559f95f3850SWill Newton unsigned int pass_count = 0; 15601a5c8e1fSShashidhar Hiremath int i; 1561f95f3850SWill Newton 1562f95f3850SWill Newton do { 1563f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1564f95f3850SWill Newton 1565f95f3850SWill Newton /* 1566f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1567f95f3850SWill Newton * is configured. 1568f95f3850SWill Newton */ 1569f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1570f95f3850SWill Newton if (!pending && 1571f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1572f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1573f95f3850SWill Newton } 1574f95f3850SWill Newton 1575f95f3850SWill Newton if (!pending) 1576f95f3850SWill Newton break; 1577f95f3850SWill Newton 1578f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1579f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1580182c9081SSeungwon Jeon host->cmd_status = pending; 1581f95f3850SWill Newton smp_wmb(); 1582f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1583f95f3850SWill Newton } 1584f95f3850SWill Newton 1585f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1586f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1587f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1588182c9081SSeungwon Jeon host->data_status = pending; 1589f95f3850SWill Newton smp_wmb(); 1590f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1591f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1592f95f3850SWill Newton } 1593f95f3850SWill Newton 1594f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1595f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1596f95f3850SWill Newton if (!host->data_status) 1597182c9081SSeungwon Jeon host->data_status = pending; 1598f95f3850SWill Newton smp_wmb(); 1599f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1600f95f3850SWill Newton if (host->sg != NULL) 1601f95f3850SWill Newton dw_mci_read_data_pio(host); 1602f95f3850SWill Newton } 1603f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1604f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1605f95f3850SWill Newton } 1606f95f3850SWill Newton 1607f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1608f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1609b40af3aaSJames Hogan if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) 1610f95f3850SWill Newton dw_mci_read_data_pio(host); 1611f95f3850SWill Newton } 1612f95f3850SWill Newton 1613f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1614f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1615b40af3aaSJames Hogan if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) 1616f95f3850SWill Newton dw_mci_write_data_pio(host); 1617f95f3850SWill Newton } 1618f95f3850SWill Newton 1619f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1620f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1621182c9081SSeungwon Jeon dw_mci_cmd_interrupt(host, pending); 1622f95f3850SWill Newton } 1623f95f3850SWill Newton 1624f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1625f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 162695dcc2cbSThomas Abraham queue_work(host->card_workqueue, &host->card_work); 1627f95f3850SWill Newton } 1628f95f3850SWill Newton 16291a5c8e1fSShashidhar Hiremath /* Handle SDIO Interrupts */ 16301a5c8e1fSShashidhar Hiremath for (i = 0; i < host->num_slots; i++) { 16311a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = host->slot[i]; 16321a5c8e1fSShashidhar Hiremath if (pending & SDMMC_INT_SDIO(i)) { 16331a5c8e1fSShashidhar Hiremath mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i)); 16341a5c8e1fSShashidhar Hiremath mmc_signal_sdio_irq(slot->mmc); 16351a5c8e1fSShashidhar Hiremath } 16361a5c8e1fSShashidhar Hiremath } 16371a5c8e1fSShashidhar Hiremath 1638f95f3850SWill Newton } while (pass_count++ < 5); 1639f95f3850SWill Newton 1640f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1641f95f3850SWill Newton /* Handle DMA interrupts */ 1642f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1643f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1644f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1645f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1646f95f3850SWill Newton host->dma_ops->complete(host); 1647f95f3850SWill Newton } 1648f95f3850SWill Newton #endif 1649f95f3850SWill Newton 1650f95f3850SWill Newton return IRQ_HANDLED; 1651f95f3850SWill Newton } 1652f95f3850SWill Newton 16531791b13eSJames Hogan static void dw_mci_work_routine_card(struct work_struct *work) 1654f95f3850SWill Newton { 16551791b13eSJames Hogan struct dw_mci *host = container_of(work, struct dw_mci, card_work); 1656f95f3850SWill Newton int i; 1657f95f3850SWill Newton 1658f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1659f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1660f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1661f95f3850SWill Newton struct mmc_request *mrq; 1662f95f3850SWill Newton int present; 1663f95f3850SWill Newton u32 ctrl; 1664f95f3850SWill Newton 1665f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1666f95f3850SWill Newton while (present != slot->last_detect_state) { 1667f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1668f95f3850SWill Newton present ? "inserted" : "removed"); 1669f95f3850SWill Newton 16701791b13eSJames Hogan /* Power up slot (before spin_lock, may sleep) */ 16711791b13eSJames Hogan if (present != 0 && host->pdata->setpower) 16721791b13eSJames Hogan host->pdata->setpower(slot->id, mmc->ocr_avail); 16731791b13eSJames Hogan 16741791b13eSJames Hogan spin_lock_bh(&host->lock); 16751791b13eSJames Hogan 1676f95f3850SWill Newton /* Card change detected */ 1677f95f3850SWill Newton slot->last_detect_state = present; 1678f95f3850SWill Newton 16791791b13eSJames Hogan /* Mark card as present if applicable */ 16801791b13eSJames Hogan if (present != 0) 1681f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1682f95f3850SWill Newton 1683f95f3850SWill Newton /* Clean up queue if present */ 1684f95f3850SWill Newton mrq = slot->mrq; 1685f95f3850SWill Newton if (mrq) { 1686f95f3850SWill Newton if (mrq == host->mrq) { 1687f95f3850SWill Newton host->data = NULL; 1688f95f3850SWill Newton host->cmd = NULL; 1689f95f3850SWill Newton 1690f95f3850SWill Newton switch (host->state) { 1691f95f3850SWill Newton case STATE_IDLE: 1692f95f3850SWill Newton break; 1693f95f3850SWill Newton case STATE_SENDING_CMD: 1694f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1695f95f3850SWill Newton if (!mrq->data) 1696f95f3850SWill Newton break; 1697f95f3850SWill Newton /* fall through */ 1698f95f3850SWill Newton case STATE_SENDING_DATA: 1699f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1700f95f3850SWill Newton dw_mci_stop_dma(host); 1701f95f3850SWill Newton break; 1702f95f3850SWill Newton case STATE_DATA_BUSY: 1703f95f3850SWill Newton case STATE_DATA_ERROR: 1704f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1705f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1706f95f3850SWill Newton if (!mrq->stop) 1707f95f3850SWill Newton break; 1708f95f3850SWill Newton /* fall through */ 1709f95f3850SWill Newton case STATE_SENDING_STOP: 1710f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1711f95f3850SWill Newton break; 1712f95f3850SWill Newton } 1713f95f3850SWill Newton 1714f95f3850SWill Newton dw_mci_request_end(host, mrq); 1715f95f3850SWill Newton } else { 1716f95f3850SWill Newton list_del(&slot->queue_node); 1717f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1718f95f3850SWill Newton if (mrq->data) 1719f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1720f95f3850SWill Newton if (mrq->stop) 1721f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1722f95f3850SWill Newton 1723f95f3850SWill Newton spin_unlock(&host->lock); 1724f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1725f95f3850SWill Newton spin_lock(&host->lock); 1726f95f3850SWill Newton } 1727f95f3850SWill Newton } 1728f95f3850SWill Newton 1729f95f3850SWill Newton /* Power down slot */ 1730f95f3850SWill Newton if (present == 0) { 1731f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1732f95f3850SWill Newton 1733f95f3850SWill Newton /* 1734f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1735f95f3850SWill Newton * block interrupt, hence setting the 1736f95f3850SWill Newton * scatter-gather pointer to NULL. 1737f95f3850SWill Newton */ 1738f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 1739f95f3850SWill Newton host->sg = NULL; 1740f95f3850SWill Newton 1741f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1742f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1743f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1744f95f3850SWill Newton 1745f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1746f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1747141a712aSSeungwon Jeon /* Software reset of DMA */ 1748141a712aSSeungwon Jeon ctrl |= SDMMC_IDMAC_SWRESET; 1749f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1750f95f3850SWill Newton #endif 1751f95f3850SWill Newton 1752f95f3850SWill Newton } 1753f95f3850SWill Newton 17541791b13eSJames Hogan spin_unlock_bh(&host->lock); 17551791b13eSJames Hogan 17561791b13eSJames Hogan /* Power down slot (after spin_unlock, may sleep) */ 17571791b13eSJames Hogan if (present == 0 && host->pdata->setpower) 17581791b13eSJames Hogan host->pdata->setpower(slot->id, 0); 17591791b13eSJames Hogan 1760f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1761f95f3850SWill Newton } 1762f95f3850SWill Newton 1763f95f3850SWill Newton mmc_detect_change(slot->mmc, 1764f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1765f95f3850SWill Newton } 1766f95f3850SWill Newton } 1767f95f3850SWill Newton 1768c91eab4bSThomas Abraham #ifdef CONFIG_OF 1769c91eab4bSThomas Abraham /* given a slot id, find out the device node representing that slot */ 1770c91eab4bSThomas Abraham static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) 1771c91eab4bSThomas Abraham { 1772c91eab4bSThomas Abraham struct device_node *np; 1773c91eab4bSThomas Abraham const __be32 *addr; 1774c91eab4bSThomas Abraham int len; 1775c91eab4bSThomas Abraham 1776c91eab4bSThomas Abraham if (!dev || !dev->of_node) 1777c91eab4bSThomas Abraham return NULL; 1778c91eab4bSThomas Abraham 1779c91eab4bSThomas Abraham for_each_child_of_node(dev->of_node, np) { 1780c91eab4bSThomas Abraham addr = of_get_property(np, "reg", &len); 1781c91eab4bSThomas Abraham if (!addr || (len < sizeof(int))) 1782c91eab4bSThomas Abraham continue; 1783c91eab4bSThomas Abraham if (be32_to_cpup(addr) == slot) 1784c91eab4bSThomas Abraham return np; 1785c91eab4bSThomas Abraham } 1786c91eab4bSThomas Abraham return NULL; 1787c91eab4bSThomas Abraham } 1788c91eab4bSThomas Abraham 1789c91eab4bSThomas Abraham /* find out bus-width for a given slot */ 1790c91eab4bSThomas Abraham static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot) 1791c91eab4bSThomas Abraham { 1792c91eab4bSThomas Abraham struct device_node *np = dw_mci_of_find_slot_node(dev, slot); 1793c91eab4bSThomas Abraham u32 bus_wd = 1; 1794c91eab4bSThomas Abraham 1795c91eab4bSThomas Abraham if (!np) 1796c91eab4bSThomas Abraham return 1; 1797c91eab4bSThomas Abraham 1798c91eab4bSThomas Abraham if (of_property_read_u32(np, "bus-width", &bus_wd)) 1799c91eab4bSThomas Abraham dev_err(dev, "bus-width property not found, assuming width" 1800c91eab4bSThomas Abraham " as 1\n"); 1801c91eab4bSThomas Abraham return bus_wd; 1802c91eab4bSThomas Abraham } 1803c91eab4bSThomas Abraham #else /* CONFIG_OF */ 1804c91eab4bSThomas Abraham static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot) 1805c91eab4bSThomas Abraham { 1806c91eab4bSThomas Abraham return 1; 1807c91eab4bSThomas Abraham } 1808c91eab4bSThomas Abraham static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) 1809c91eab4bSThomas Abraham { 1810c91eab4bSThomas Abraham return NULL; 1811c91eab4bSThomas Abraham } 1812c91eab4bSThomas Abraham #endif /* CONFIG_OF */ 1813c91eab4bSThomas Abraham 181436c179a9SJaehoon Chung static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1815f95f3850SWill Newton { 1816f95f3850SWill Newton struct mmc_host *mmc; 1817f95f3850SWill Newton struct dw_mci_slot *slot; 1818800d78bfSThomas Abraham int ctrl_id, ret; 1819c91eab4bSThomas Abraham u8 bus_width; 1820f95f3850SWill Newton 18214a90920cSThomas Abraham mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); 1822f95f3850SWill Newton if (!mmc) 1823f95f3850SWill Newton return -ENOMEM; 1824f95f3850SWill Newton 1825f95f3850SWill Newton slot = mmc_priv(mmc); 1826f95f3850SWill Newton slot->id = id; 1827f95f3850SWill Newton slot->mmc = mmc; 1828f95f3850SWill Newton slot->host = host; 1829c91eab4bSThomas Abraham host->slot[id] = slot; 1830f95f3850SWill Newton 1831f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1832f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1833f95f3850SWill Newton mmc->f_max = host->bus_hz; 1834f95f3850SWill Newton 1835f95f3850SWill Newton if (host->pdata->get_ocr) 1836f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1837f95f3850SWill Newton else 1838f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1839f95f3850SWill Newton 1840f95f3850SWill Newton /* 1841f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1842f95f3850SWill Newton * is detected. 1843f95f3850SWill Newton */ 1844f95f3850SWill Newton if (host->pdata->setpower) 1845f95f3850SWill Newton host->pdata->setpower(id, 0); 1846f95f3850SWill Newton 1847fc3d7720SJaehoon Chung if (host->pdata->caps) 1848fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1849fc3d7720SJaehoon Chung 1850800d78bfSThomas Abraham if (host->dev->of_node) { 1851800d78bfSThomas Abraham ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); 1852800d78bfSThomas Abraham if (ctrl_id < 0) 1853800d78bfSThomas Abraham ctrl_id = 0; 1854800d78bfSThomas Abraham } else { 1855800d78bfSThomas Abraham ctrl_id = to_platform_device(host->dev)->id; 1856800d78bfSThomas Abraham } 1857800d78bfSThomas Abraham if (host->drv_data && host->drv_data->caps) 1858800d78bfSThomas Abraham mmc->caps |= host->drv_data->caps[ctrl_id]; 1859800d78bfSThomas Abraham 18604f408cc6SSeungwon Jeon if (host->pdata->caps2) 18614f408cc6SSeungwon Jeon mmc->caps2 = host->pdata->caps2; 18624f408cc6SSeungwon Jeon 1863f95f3850SWill Newton if (host->pdata->get_bus_wd) 1864c91eab4bSThomas Abraham bus_width = host->pdata->get_bus_wd(slot->id); 1865c91eab4bSThomas Abraham else if (host->dev->of_node) 1866c91eab4bSThomas Abraham bus_width = dw_mci_of_get_bus_wd(host->dev, slot->id); 1867c91eab4bSThomas Abraham else 1868c91eab4bSThomas Abraham bus_width = 1; 1869c91eab4bSThomas Abraham 1870800d78bfSThomas Abraham if (host->drv_data->setup_bus) { 1871800d78bfSThomas Abraham struct device_node *slot_np; 1872800d78bfSThomas Abraham slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); 1873800d78bfSThomas Abraham ret = host->drv_data->setup_bus(host, slot_np, bus_width); 1874800d78bfSThomas Abraham if (ret) 1875800d78bfSThomas Abraham goto err_setup_bus; 1876800d78bfSThomas Abraham } 1877800d78bfSThomas Abraham 1878c91eab4bSThomas Abraham switch (bus_width) { 1879c91eab4bSThomas Abraham case 8: 1880c91eab4bSThomas Abraham mmc->caps |= MMC_CAP_8_BIT_DATA; 1881c91eab4bSThomas Abraham case 4: 1882f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1883c91eab4bSThomas Abraham } 1884f95f3850SWill Newton 1885f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 18866daa7778SSeungwon Jeon mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 1887f95f3850SWill Newton 1888356ac2cfSJaehoon Chung if (mmc->caps2 & MMC_CAP2_POWEROFF_NOTIFY) 1889356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_SHORT; 1890356ac2cfSJaehoon Chung else 1891356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_NONE; 1892356ac2cfSJaehoon Chung 1893f95f3850SWill Newton if (host->pdata->blk_settings) { 1894f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1895f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1896f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1897f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1898f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1899f95f3850SWill Newton } else { 1900f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1901a39e5746SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 1902a39e5746SJaehoon Chung mmc->max_segs = host->ring_size; 1903a39e5746SJaehoon Chung mmc->max_blk_size = 65536; 1904a39e5746SJaehoon Chung mmc->max_blk_count = host->ring_size; 1905a39e5746SJaehoon Chung mmc->max_seg_size = 0x1000; 1906a39e5746SJaehoon Chung mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1907a39e5746SJaehoon Chung #else 1908f95f3850SWill Newton mmc->max_segs = 64; 1909f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1910f95f3850SWill Newton mmc->max_blk_count = 512; 1911f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1912f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1913f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1914a39e5746SJaehoon Chung } 1915f95f3850SWill Newton 1916c07946a3SJaehoon Chung host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 1917c07946a3SJaehoon Chung if (IS_ERR(host->vmmc)) { 1918a3c76eb9SGirish K S pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1919c07946a3SJaehoon Chung host->vmmc = NULL; 1920c07946a3SJaehoon Chung } else 1921c07946a3SJaehoon Chung regulator_enable(host->vmmc); 1922c07946a3SJaehoon Chung 1923f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1924f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1925f95f3850SWill Newton else 1926f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1927f95f3850SWill Newton 1928f95f3850SWill Newton mmc_add_host(mmc); 1929f95f3850SWill Newton 1930f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1931f95f3850SWill Newton dw_mci_init_debugfs(slot); 1932f95f3850SWill Newton #endif 1933f95f3850SWill Newton 1934f95f3850SWill Newton /* Card initially undetected */ 1935f95f3850SWill Newton slot->last_detect_state = 0; 1936f95f3850SWill Newton 1937dd6c4b98SWill Newton /* 1938dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 1939dd6c4b98SWill Newton * need to run the detect tasklet 1940dd6c4b98SWill Newton */ 194195dcc2cbSThomas Abraham queue_work(host->card_workqueue, &host->card_work); 1942dd6c4b98SWill Newton 1943f95f3850SWill Newton return 0; 1944800d78bfSThomas Abraham 1945800d78bfSThomas Abraham err_setup_bus: 1946800d78bfSThomas Abraham mmc_free_host(mmc); 1947800d78bfSThomas Abraham return -EINVAL; 1948f95f3850SWill Newton } 1949f95f3850SWill Newton 1950f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 1951f95f3850SWill Newton { 1952f95f3850SWill Newton /* Shutdown detect IRQ */ 1953f95f3850SWill Newton if (slot->host->pdata->exit) 1954f95f3850SWill Newton slot->host->pdata->exit(id); 1955f95f3850SWill Newton 1956f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 1957f95f3850SWill Newton mmc_remove_host(slot->mmc); 1958f95f3850SWill Newton slot->host->slot[id] = NULL; 1959f95f3850SWill Newton mmc_free_host(slot->mmc); 1960f95f3850SWill Newton } 1961f95f3850SWill Newton 1962f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 1963f95f3850SWill Newton { 1964f95f3850SWill Newton /* Alloc memory for sg translation */ 19654a90920cSThomas Abraham host->sg_cpu = dma_alloc_coherent(host->dev, PAGE_SIZE, 1966f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 1967f95f3850SWill Newton if (!host->sg_cpu) { 19684a90920cSThomas Abraham dev_err(host->dev, "%s: could not alloc DMA memory\n", 1969f95f3850SWill Newton __func__); 1970f95f3850SWill Newton goto no_dma; 1971f95f3850SWill Newton } 1972f95f3850SWill Newton 1973f95f3850SWill Newton /* Determine which DMA interface to use */ 1974f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1975f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 1976*897b69e7SSeungwon Jeon dev_info(&host->dev, "Using internal DMA controller.\n"); 1977f95f3850SWill Newton #endif 1978f95f3850SWill Newton 1979f95f3850SWill Newton if (!host->dma_ops) 1980f95f3850SWill Newton goto no_dma; 1981f95f3850SWill Newton 1982e1631f98SJaehoon Chung if (host->dma_ops->init && host->dma_ops->start && 1983e1631f98SJaehoon Chung host->dma_ops->stop && host->dma_ops->cleanup) { 1984f95f3850SWill Newton if (host->dma_ops->init(host)) { 19854a90920cSThomas Abraham dev_err(host->dev, "%s: Unable to initialize " 1986f95f3850SWill Newton "DMA Controller.\n", __func__); 1987f95f3850SWill Newton goto no_dma; 1988f95f3850SWill Newton } 1989f95f3850SWill Newton } else { 19904a90920cSThomas Abraham dev_err(host->dev, "DMA initialization not found.\n"); 1991f95f3850SWill Newton goto no_dma; 1992f95f3850SWill Newton } 1993f95f3850SWill Newton 1994f95f3850SWill Newton host->use_dma = 1; 1995f95f3850SWill Newton return; 1996f95f3850SWill Newton 1997f95f3850SWill Newton no_dma: 19984a90920cSThomas Abraham dev_info(host->dev, "Using PIO mode.\n"); 1999f95f3850SWill Newton host->use_dma = 0; 2000f95f3850SWill Newton return; 2001f95f3850SWill Newton } 2002f95f3850SWill Newton 2003f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 2004f95f3850SWill Newton { 2005f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 2006f95f3850SWill Newton unsigned int ctrl; 2007f95f3850SWill Newton 2008f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 2009f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 2010f95f3850SWill Newton 2011f95f3850SWill Newton /* wait till resets clear */ 2012f95f3850SWill Newton do { 2013f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 2014f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 2015f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 2016f95f3850SWill Newton return true; 2017f95f3850SWill Newton } while (time_before(jiffies, timeout)); 2018f95f3850SWill Newton 2019f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 2020f95f3850SWill Newton 2021f95f3850SWill Newton return false; 2022f95f3850SWill Newton } 2023f95f3850SWill Newton 2024c91eab4bSThomas Abraham #ifdef CONFIG_OF 2025c91eab4bSThomas Abraham static struct dw_mci_of_quirks { 2026c91eab4bSThomas Abraham char *quirk; 2027c91eab4bSThomas Abraham int id; 2028c91eab4bSThomas Abraham } of_quirks[] = { 2029c91eab4bSThomas Abraham { 2030c91eab4bSThomas Abraham .quirk = "supports-highspeed", 2031c91eab4bSThomas Abraham .id = DW_MCI_QUIRK_HIGHSPEED, 2032c91eab4bSThomas Abraham }, { 2033c91eab4bSThomas Abraham .quirk = "broken-cd", 2034c91eab4bSThomas Abraham .id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION, 2035c91eab4bSThomas Abraham }, 2036c91eab4bSThomas Abraham }; 2037c91eab4bSThomas Abraham 2038c91eab4bSThomas Abraham static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) 2039c91eab4bSThomas Abraham { 2040c91eab4bSThomas Abraham struct dw_mci_board *pdata; 2041c91eab4bSThomas Abraham struct device *dev = host->dev; 2042c91eab4bSThomas Abraham struct device_node *np = dev->of_node; 2043800d78bfSThomas Abraham int idx, ret; 2044c91eab4bSThomas Abraham 2045c91eab4bSThomas Abraham pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 2046c91eab4bSThomas Abraham if (!pdata) { 2047c91eab4bSThomas Abraham dev_err(dev, "could not allocate memory for pdata\n"); 2048c91eab4bSThomas Abraham return ERR_PTR(-ENOMEM); 2049c91eab4bSThomas Abraham } 2050c91eab4bSThomas Abraham 2051c91eab4bSThomas Abraham /* find out number of slots supported */ 2052c91eab4bSThomas Abraham if (of_property_read_u32(dev->of_node, "num-slots", 2053c91eab4bSThomas Abraham &pdata->num_slots)) { 2054c91eab4bSThomas Abraham dev_info(dev, "num-slots property not found, " 2055c91eab4bSThomas Abraham "assuming 1 slot is available\n"); 2056c91eab4bSThomas Abraham pdata->num_slots = 1; 2057c91eab4bSThomas Abraham } 2058c91eab4bSThomas Abraham 2059c91eab4bSThomas Abraham /* get quirks */ 2060c91eab4bSThomas Abraham for (idx = 0; idx < ARRAY_SIZE(of_quirks); idx++) 2061c91eab4bSThomas Abraham if (of_get_property(np, of_quirks[idx].quirk, NULL)) 2062c91eab4bSThomas Abraham pdata->quirks |= of_quirks[idx].id; 2063c91eab4bSThomas Abraham 2064c91eab4bSThomas Abraham if (of_property_read_u32(np, "fifo-depth", &pdata->fifo_depth)) 2065c91eab4bSThomas Abraham dev_info(dev, "fifo-depth property not found, using " 2066c91eab4bSThomas Abraham "value of FIFOTH register as default\n"); 2067c91eab4bSThomas Abraham 2068c91eab4bSThomas Abraham of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); 2069c91eab4bSThomas Abraham 2070800d78bfSThomas Abraham if (host->drv_data->parse_dt) { 2071800d78bfSThomas Abraham ret = host->drv_data->parse_dt(host); 2072800d78bfSThomas Abraham if (ret) 2073800d78bfSThomas Abraham return ERR_PTR(ret); 2074800d78bfSThomas Abraham } 2075800d78bfSThomas Abraham 2076c91eab4bSThomas Abraham return pdata; 2077c91eab4bSThomas Abraham } 2078c91eab4bSThomas Abraham 2079c91eab4bSThomas Abraham #else /* CONFIG_OF */ 2080c91eab4bSThomas Abraham static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) 2081c91eab4bSThomas Abraham { 2082c91eab4bSThomas Abraham return ERR_PTR(-EINVAL); 2083c91eab4bSThomas Abraham } 2084c91eab4bSThomas Abraham #endif /* CONFIG_OF */ 2085c91eab4bSThomas Abraham 208662ca8034SShashidhar Hiremath int dw_mci_probe(struct dw_mci *host) 2087f95f3850SWill Newton { 208862ca8034SShashidhar Hiremath int width, i, ret = 0; 2089f95f3850SWill Newton u32 fifo_size; 20901c2215b7SThomas Abraham int init_slots = 0; 2091f95f3850SWill Newton 2092c91eab4bSThomas Abraham if (!host->pdata) { 2093c91eab4bSThomas Abraham host->pdata = dw_mci_parse_dt(host); 2094c91eab4bSThomas Abraham if (IS_ERR(host->pdata)) { 2095c91eab4bSThomas Abraham dev_err(host->dev, "platform data not available\n"); 2096c91eab4bSThomas Abraham return -EINVAL; 2097c91eab4bSThomas Abraham } 2098f95f3850SWill Newton } 2099f95f3850SWill Newton 210062ca8034SShashidhar Hiremath if (!host->pdata->select_slot && host->pdata->num_slots > 1) { 21014a90920cSThomas Abraham dev_err(host->dev, 2102f95f3850SWill Newton "Platform data must supply select_slot function\n"); 210362ca8034SShashidhar Hiremath return -ENODEV; 2104f95f3850SWill Newton } 2105f95f3850SWill Newton 2106f90a0612SThomas Abraham host->biu_clk = clk_get(host->dev, "biu"); 2107f90a0612SThomas Abraham if (IS_ERR(host->biu_clk)) { 2108f90a0612SThomas Abraham dev_dbg(host->dev, "biu clock not available\n"); 2109f90a0612SThomas Abraham } else { 2110f90a0612SThomas Abraham ret = clk_prepare_enable(host->biu_clk); 2111f90a0612SThomas Abraham if (ret) { 2112f90a0612SThomas Abraham dev_err(host->dev, "failed to enable biu clock\n"); 2113f90a0612SThomas Abraham clk_put(host->biu_clk); 2114f90a0612SThomas Abraham return ret; 2115f90a0612SThomas Abraham } 2116f95f3850SWill Newton } 2117f95f3850SWill Newton 2118f90a0612SThomas Abraham host->ciu_clk = clk_get(host->dev, "ciu"); 2119f90a0612SThomas Abraham if (IS_ERR(host->ciu_clk)) { 2120f90a0612SThomas Abraham dev_dbg(host->dev, "ciu clock not available\n"); 2121f90a0612SThomas Abraham } else { 2122f90a0612SThomas Abraham ret = clk_prepare_enable(host->ciu_clk); 2123f90a0612SThomas Abraham if (ret) { 2124f90a0612SThomas Abraham dev_err(host->dev, "failed to enable ciu clock\n"); 2125f90a0612SThomas Abraham clk_put(host->ciu_clk); 2126f90a0612SThomas Abraham goto err_clk_biu; 2127f90a0612SThomas Abraham } 2128f90a0612SThomas Abraham } 2129f90a0612SThomas Abraham 2130f90a0612SThomas Abraham if (IS_ERR(host->ciu_clk)) 213162ca8034SShashidhar Hiremath host->bus_hz = host->pdata->bus_hz; 2132f90a0612SThomas Abraham else 2133f90a0612SThomas Abraham host->bus_hz = clk_get_rate(host->ciu_clk); 2134f90a0612SThomas Abraham 2135800d78bfSThomas Abraham if (host->drv_data->setup_clock) { 2136800d78bfSThomas Abraham ret = host->drv_data->setup_clock(host); 2137800d78bfSThomas Abraham if (ret) { 2138800d78bfSThomas Abraham dev_err(host->dev, 2139800d78bfSThomas Abraham "implementation specific clock setup failed\n"); 2140800d78bfSThomas Abraham goto err_clk_ciu; 2141800d78bfSThomas Abraham } 2142800d78bfSThomas Abraham } 2143800d78bfSThomas Abraham 2144f90a0612SThomas Abraham if (!host->bus_hz) { 2145f90a0612SThomas Abraham dev_err(host->dev, 2146f90a0612SThomas Abraham "Platform data must supply bus speed\n"); 2147f90a0612SThomas Abraham ret = -ENODEV; 2148f90a0612SThomas Abraham goto err_clk_ciu; 2149f90a0612SThomas Abraham } 2150f90a0612SThomas Abraham 215162ca8034SShashidhar Hiremath host->quirks = host->pdata->quirks; 2152f95f3850SWill Newton 2153f95f3850SWill Newton spin_lock_init(&host->lock); 2154f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 2155f95f3850SWill Newton 2156f95f3850SWill Newton /* 2157f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 2158f95f3850SWill Newton * the correct values. 2159f95f3850SWill Newton */ 2160f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 2161f95f3850SWill Newton if (!i) { 2162f95f3850SWill Newton host->push_data = dw_mci_push_data16; 2163f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 2164f95f3850SWill Newton width = 16; 2165f95f3850SWill Newton host->data_shift = 1; 2166f95f3850SWill Newton } else if (i == 2) { 2167f95f3850SWill Newton host->push_data = dw_mci_push_data64; 2168f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 2169f95f3850SWill Newton width = 64; 2170f95f3850SWill Newton host->data_shift = 3; 2171f95f3850SWill Newton } else { 2172f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 2173f95f3850SWill Newton WARN((i != 1), 2174f95f3850SWill Newton "HCON reports a reserved host data width!\n" 2175f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 2176f95f3850SWill Newton host->push_data = dw_mci_push_data32; 2177f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 2178f95f3850SWill Newton width = 32; 2179f95f3850SWill Newton host->data_shift = 2; 2180f95f3850SWill Newton } 2181f95f3850SWill Newton 2182f95f3850SWill Newton /* Reset all blocks */ 21834a90920cSThomas Abraham if (!mci_wait_reset(host->dev, host)) 2184141a712aSSeungwon Jeon return -ENODEV; 2185141a712aSSeungwon Jeon 2186141a712aSSeungwon Jeon host->dma_ops = host->pdata->dma_ops; 2187141a712aSSeungwon Jeon dw_mci_init_dma(host); 2188f95f3850SWill Newton 2189f95f3850SWill Newton /* Clear the interrupts for the host controller */ 2190f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2191f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2192f95f3850SWill Newton 2193f95f3850SWill Newton /* Put in max timeout */ 2194f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 2195f95f3850SWill Newton 2196f95f3850SWill Newton /* 2197f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 2198f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 2199f95f3850SWill Newton */ 2200b86d8253SJames Hogan if (!host->pdata->fifo_depth) { 2201b86d8253SJames Hogan /* 2202b86d8253SJames Hogan * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may 2203b86d8253SJames Hogan * have been overwritten by the bootloader, just like we're 2204b86d8253SJames Hogan * about to do, so if you know the value for your hardware, you 2205b86d8253SJames Hogan * should put it in the platform data. 2206b86d8253SJames Hogan */ 2207f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 22088234e869SJaehoon Chung fifo_size = 1 + ((fifo_size >> 16) & 0xfff); 2209b86d8253SJames Hogan } else { 2210b86d8253SJames Hogan fifo_size = host->pdata->fifo_depth; 2211b86d8253SJames Hogan } 2212b86d8253SJames Hogan host->fifo_depth = fifo_size; 2213e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 2214e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 2215e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2216f95f3850SWill Newton 2217f95f3850SWill Newton /* disable clock to CIU */ 2218f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2219f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2220f95f3850SWill Newton 2221f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 222295dcc2cbSThomas Abraham host->card_workqueue = alloc_workqueue("dw-mci-card", 22231791b13eSJames Hogan WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); 222495dcc2cbSThomas Abraham if (!host->card_workqueue) 22251791b13eSJames Hogan goto err_dmaunmap; 22261791b13eSJames Hogan INIT_WORK(&host->card_work, dw_mci_work_routine_card); 222762ca8034SShashidhar Hiremath ret = request_irq(host->irq, dw_mci_interrupt, host->irq_flags, "dw-mci", host); 2228f95f3850SWill Newton if (ret) 22291791b13eSJames Hogan goto err_workqueue; 2230f95f3850SWill Newton 2231f95f3850SWill Newton if (host->pdata->num_slots) 2232f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 2233f95f3850SWill Newton else 2234f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 2235f95f3850SWill Newton 2236f95f3850SWill Newton /* We need at least one slot to succeed */ 2237f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2238f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 22391c2215b7SThomas Abraham if (ret) 22401c2215b7SThomas Abraham dev_dbg(host->dev, "slot %d init failed\n", i); 22411c2215b7SThomas Abraham else 22421c2215b7SThomas Abraham init_slots++; 2243f95f3850SWill Newton } 22441c2215b7SThomas Abraham 22451c2215b7SThomas Abraham if (init_slots) { 22461c2215b7SThomas Abraham dev_info(host->dev, "%d slots initialized\n", init_slots); 22471c2215b7SThomas Abraham } else { 22481c2215b7SThomas Abraham dev_dbg(host->dev, "attempted to initialize %d slots, " 22491c2215b7SThomas Abraham "but failed on all\n", host->num_slots); 22501c2215b7SThomas Abraham goto err_init_slot; 2251f95f3850SWill Newton } 2252f95f3850SWill Newton 2253f95f3850SWill Newton /* 22544e0a5adfSJaehoon Chung * In 2.40a spec, Data offset is changed. 22554e0a5adfSJaehoon Chung * Need to check the version-id and set data-offset for DATA register. 22564e0a5adfSJaehoon Chung */ 22574e0a5adfSJaehoon Chung host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); 22584a90920cSThomas Abraham dev_info(host->dev, "Version ID is %04x\n", host->verid); 22594e0a5adfSJaehoon Chung 22604e0a5adfSJaehoon Chung if (host->verid < DW_MMC_240A) 22614e0a5adfSJaehoon Chung host->data_offset = DATA_OFFSET; 22624e0a5adfSJaehoon Chung else 22634e0a5adfSJaehoon Chung host->data_offset = DATA_240A_OFFSET; 22644e0a5adfSJaehoon Chung 22654e0a5adfSJaehoon Chung /* 2266f95f3850SWill Newton * Enable interrupts for command done, data over, data empty, card det, 2267f95f3850SWill Newton * receive ready and error such as transmit, receive timeout, crc error 2268f95f3850SWill Newton */ 2269f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2270f95f3850SWill Newton mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2271f95f3850SWill Newton SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2272f95f3850SWill Newton DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2273f95f3850SWill Newton mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 2274f95f3850SWill Newton 22754a90920cSThomas Abraham dev_info(host->dev, "DW MMC controller at irq %d, " 2276b86d8253SJames Hogan "%d bit host data width, " 2277b86d8253SJames Hogan "%u deep fifo\n", 227862ca8034SShashidhar Hiremath host->irq, width, fifo_size); 2279f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 22804a90920cSThomas Abraham dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); 2281f95f3850SWill Newton 2282f95f3850SWill Newton return 0; 2283f95f3850SWill Newton 2284f95f3850SWill Newton err_init_slot: 228562ca8034SShashidhar Hiremath free_irq(host->irq, host); 2286f95f3850SWill Newton 22871791b13eSJames Hogan err_workqueue: 228895dcc2cbSThomas Abraham destroy_workqueue(host->card_workqueue); 22891791b13eSJames Hogan 2290f95f3850SWill Newton err_dmaunmap: 2291f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2292f95f3850SWill Newton host->dma_ops->exit(host); 22934a90920cSThomas Abraham dma_free_coherent(host->dev, PAGE_SIZE, 2294f95f3850SWill Newton host->sg_cpu, host->sg_dma); 2295f95f3850SWill Newton 2296c07946a3SJaehoon Chung if (host->vmmc) { 2297c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2298c07946a3SJaehoon Chung regulator_put(host->vmmc); 2299c07946a3SJaehoon Chung } 2300f90a0612SThomas Abraham 2301f90a0612SThomas Abraham err_clk_ciu: 2302f90a0612SThomas Abraham if (!IS_ERR(host->ciu_clk)) { 2303f90a0612SThomas Abraham clk_disable_unprepare(host->ciu_clk); 2304f90a0612SThomas Abraham clk_put(host->ciu_clk); 2305f90a0612SThomas Abraham } 2306f90a0612SThomas Abraham err_clk_biu: 2307f90a0612SThomas Abraham if (!IS_ERR(host->biu_clk)) { 2308f90a0612SThomas Abraham clk_disable_unprepare(host->biu_clk); 2309f90a0612SThomas Abraham clk_put(host->biu_clk); 2310f90a0612SThomas Abraham } 2311f95f3850SWill Newton return ret; 2312f95f3850SWill Newton } 231362ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_probe); 2314f95f3850SWill Newton 231562ca8034SShashidhar Hiremath void dw_mci_remove(struct dw_mci *host) 2316f95f3850SWill Newton { 2317f95f3850SWill Newton int i; 2318f95f3850SWill Newton 2319f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2320f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2321f95f3850SWill Newton 2322f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 23234a90920cSThomas Abraham dev_dbg(host->dev, "remove slot %d\n", i); 2324f95f3850SWill Newton if (host->slot[i]) 2325f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2326f95f3850SWill Newton } 2327f95f3850SWill Newton 2328f95f3850SWill Newton /* disable clock to CIU */ 2329f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2330f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2331f95f3850SWill Newton 233262ca8034SShashidhar Hiremath free_irq(host->irq, host); 233395dcc2cbSThomas Abraham destroy_workqueue(host->card_workqueue); 23344a90920cSThomas Abraham dma_free_coherent(host->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); 2335f95f3850SWill Newton 2336f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2337f95f3850SWill Newton host->dma_ops->exit(host); 2338f95f3850SWill Newton 2339c07946a3SJaehoon Chung if (host->vmmc) { 2340c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2341c07946a3SJaehoon Chung regulator_put(host->vmmc); 2342c07946a3SJaehoon Chung } 2343c07946a3SJaehoon Chung 2344f90a0612SThomas Abraham if (!IS_ERR(host->ciu_clk)) 2345f90a0612SThomas Abraham clk_disable_unprepare(host->ciu_clk); 2346f90a0612SThomas Abraham if (!IS_ERR(host->biu_clk)) 2347f90a0612SThomas Abraham clk_disable_unprepare(host->biu_clk); 2348f90a0612SThomas Abraham clk_put(host->ciu_clk); 2349f90a0612SThomas Abraham clk_put(host->biu_clk); 2350f95f3850SWill Newton } 235162ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_remove); 235262ca8034SShashidhar Hiremath 235362ca8034SShashidhar Hiremath 2354f95f3850SWill Newton 23556fe8890dSJaehoon Chung #ifdef CONFIG_PM_SLEEP 2356f95f3850SWill Newton /* 2357f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 2358f95f3850SWill Newton */ 235962ca8034SShashidhar Hiremath int dw_mci_suspend(struct dw_mci *host) 2360f95f3850SWill Newton { 236162ca8034SShashidhar Hiremath int i, ret = 0; 2362f95f3850SWill Newton 2363f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2364f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2365f95f3850SWill Newton if (!slot) 2366f95f3850SWill Newton continue; 2367f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 2368f95f3850SWill Newton if (ret < 0) { 2369f95f3850SWill Newton while (--i >= 0) { 2370f95f3850SWill Newton slot = host->slot[i]; 2371f95f3850SWill Newton if (slot) 2372f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 2373f95f3850SWill Newton } 2374f95f3850SWill Newton return ret; 2375f95f3850SWill Newton } 2376f95f3850SWill Newton } 2377f95f3850SWill Newton 2378c07946a3SJaehoon Chung if (host->vmmc) 2379c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2380c07946a3SJaehoon Chung 2381f95f3850SWill Newton return 0; 2382f95f3850SWill Newton } 238362ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_suspend); 2384f95f3850SWill Newton 238562ca8034SShashidhar Hiremath int dw_mci_resume(struct dw_mci *host) 2386f95f3850SWill Newton { 2387f95f3850SWill Newton int i, ret; 2388f95f3850SWill Newton 23891d6c4e0aSJaehoon Chung if (host->vmmc) 23901d6c4e0aSJaehoon Chung regulator_enable(host->vmmc); 23911d6c4e0aSJaehoon Chung 23924a90920cSThomas Abraham if (!mci_wait_reset(host->dev, host)) { 2393e61cf118SJaehoon Chung ret = -ENODEV; 2394e61cf118SJaehoon Chung return ret; 2395e61cf118SJaehoon Chung } 2396e61cf118SJaehoon Chung 23973bfe619dSJonathan Kliegman if (host->use_dma && host->dma_ops->init) 2398141a712aSSeungwon Jeon host->dma_ops->init(host); 2399141a712aSSeungwon Jeon 2400e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 2401e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2402e61cf118SJaehoon Chung 2403e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 2404e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2405e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2406e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2407e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 2408e61cf118SJaehoon Chung 2409f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2410f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2411f95f3850SWill Newton if (!slot) 2412f95f3850SWill Newton continue; 2413f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 2414f95f3850SWill Newton if (ret < 0) 2415f95f3850SWill Newton return ret; 2416f95f3850SWill Newton } 2417f95f3850SWill Newton return 0; 2418f95f3850SWill Newton } 241962ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_resume); 24206fe8890dSJaehoon Chung #endif /* CONFIG_PM_SLEEP */ 24216fe8890dSJaehoon Chung 2422f95f3850SWill Newton static int __init dw_mci_init(void) 2423f95f3850SWill Newton { 242462ca8034SShashidhar Hiremath printk(KERN_INFO "Synopsys Designware Multimedia Card Interface Driver"); 242562ca8034SShashidhar Hiremath return 0; 2426f95f3850SWill Newton } 2427f95f3850SWill Newton 2428f95f3850SWill Newton static void __exit dw_mci_exit(void) 2429f95f3850SWill Newton { 2430f95f3850SWill Newton } 2431f95f3850SWill Newton 2432f95f3850SWill Newton module_init(dw_mci_init); 2433f95f3850SWill Newton module_exit(dw_mci_exit); 2434f95f3850SWill Newton 2435f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 2436f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 2437f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 2438f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 2439