1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/seq_file.h> 26f95f3850SWill Newton #include <linux/slab.h> 27f95f3850SWill Newton #include <linux/stat.h> 28f95f3850SWill Newton #include <linux/delay.h> 29f95f3850SWill Newton #include <linux/irq.h> 30f95f3850SWill Newton #include <linux/mmc/host.h> 31f95f3850SWill Newton #include <linux/mmc/mmc.h> 32f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 33f95f3850SWill Newton #include <linux/bitops.h> 34c07946a3SJaehoon Chung #include <linux/regulator/consumer.h> 351791b13eSJames Hogan #include <linux/workqueue.h> 36c91eab4bSThomas Abraham #include <linux/of.h> 37f95f3850SWill Newton 38f95f3850SWill Newton #include "dw_mmc.h" 39f95f3850SWill Newton 40f95f3850SWill Newton /* Common flag combinations */ 41f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 42f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 43f95f3850SWill Newton SDMMC_INT_EBE) 44f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 45f95f3850SWill Newton SDMMC_INT_RESP_ERR) 46f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 47f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 48f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 49f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 50f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 51f95f3850SWill Newton 52f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 53f95f3850SWill Newton struct idmac_desc { 54f95f3850SWill Newton u32 des0; /* Control Descriptor */ 55f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 56f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 57f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 58f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 59f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 60f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 61f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 62f95f3850SWill Newton 63f95f3850SWill Newton u32 des1; /* Buffer sizes */ 64f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 659b7bbe10SShashidhar Hiremath ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) 66f95f3850SWill Newton 67f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 68f95f3850SWill Newton 69f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 70f95f3850SWill Newton }; 71f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 72f95f3850SWill Newton 73f95f3850SWill Newton /** 74f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 75f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 76f95f3850SWill Newton * @host: The MMC controller this slot is using. 77f95f3850SWill Newton * @ctype: Card type for this slot. 78f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 79f95f3850SWill Newton * processed, or NULL when the slot is idle. 80f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 81f95f3850SWill Newton * &struct dw_mci. 82f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 83f95f3850SWill Newton * @flags: Random state bits associated with the slot. 84f95f3850SWill Newton * @id: Number of this slot. 85f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 86f95f3850SWill Newton */ 87f95f3850SWill Newton struct dw_mci_slot { 88f95f3850SWill Newton struct mmc_host *mmc; 89f95f3850SWill Newton struct dw_mci *host; 90f95f3850SWill Newton 91f95f3850SWill Newton u32 ctype; 92f95f3850SWill Newton 93f95f3850SWill Newton struct mmc_request *mrq; 94f95f3850SWill Newton struct list_head queue_node; 95f95f3850SWill Newton 96f95f3850SWill Newton unsigned int clock; 97f95f3850SWill Newton unsigned long flags; 98f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 99f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 100f95f3850SWill Newton int id; 101f95f3850SWill Newton int last_detect_state; 102f95f3850SWill Newton }; 103f95f3850SWill Newton 104f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 105f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 106f95f3850SWill Newton { 107f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 108f95f3850SWill Newton struct mmc_request *mrq; 109f95f3850SWill Newton struct mmc_command *cmd; 110f95f3850SWill Newton struct mmc_command *stop; 111f95f3850SWill Newton struct mmc_data *data; 112f95f3850SWill Newton 113f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 114f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 115f95f3850SWill Newton mrq = slot->mrq; 116f95f3850SWill Newton 117f95f3850SWill Newton if (mrq) { 118f95f3850SWill Newton cmd = mrq->cmd; 119f95f3850SWill Newton data = mrq->data; 120f95f3850SWill Newton stop = mrq->stop; 121f95f3850SWill Newton 122f95f3850SWill Newton if (cmd) 123f95f3850SWill Newton seq_printf(s, 124f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 125f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 126f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 127f95f3850SWill Newton cmd->resp[2], cmd->error); 128f95f3850SWill Newton if (data) 129f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 130f95f3850SWill Newton data->bytes_xfered, data->blocks, 131f95f3850SWill Newton data->blksz, data->flags, data->error); 132f95f3850SWill Newton if (stop) 133f95f3850SWill Newton seq_printf(s, 134f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 135f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 136f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 137f95f3850SWill Newton stop->resp[2], stop->error); 138f95f3850SWill Newton } 139f95f3850SWill Newton 140f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 141f95f3850SWill Newton 142f95f3850SWill Newton return 0; 143f95f3850SWill Newton } 144f95f3850SWill Newton 145f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 146f95f3850SWill Newton { 147f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 148f95f3850SWill Newton } 149f95f3850SWill Newton 150f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 151f95f3850SWill Newton .owner = THIS_MODULE, 152f95f3850SWill Newton .open = dw_mci_req_open, 153f95f3850SWill Newton .read = seq_read, 154f95f3850SWill Newton .llseek = seq_lseek, 155f95f3850SWill Newton .release = single_release, 156f95f3850SWill Newton }; 157f95f3850SWill Newton 158f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 159f95f3850SWill Newton { 160f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 161f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 162f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 163f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 164f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 165f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 166f95f3850SWill Newton 167f95f3850SWill Newton return 0; 168f95f3850SWill Newton } 169f95f3850SWill Newton 170f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 171f95f3850SWill Newton { 172f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 173f95f3850SWill Newton } 174f95f3850SWill Newton 175f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 176f95f3850SWill Newton .owner = THIS_MODULE, 177f95f3850SWill Newton .open = dw_mci_regs_open, 178f95f3850SWill Newton .read = seq_read, 179f95f3850SWill Newton .llseek = seq_lseek, 180f95f3850SWill Newton .release = single_release, 181f95f3850SWill Newton }; 182f95f3850SWill Newton 183f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 184f95f3850SWill Newton { 185f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 186f95f3850SWill Newton struct dw_mci *host = slot->host; 187f95f3850SWill Newton struct dentry *root; 188f95f3850SWill Newton struct dentry *node; 189f95f3850SWill Newton 190f95f3850SWill Newton root = mmc->debugfs_root; 191f95f3850SWill Newton if (!root) 192f95f3850SWill Newton return; 193f95f3850SWill Newton 194f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 195f95f3850SWill Newton &dw_mci_regs_fops); 196f95f3850SWill Newton if (!node) 197f95f3850SWill Newton goto err; 198f95f3850SWill Newton 199f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 200f95f3850SWill Newton &dw_mci_req_fops); 201f95f3850SWill Newton if (!node) 202f95f3850SWill Newton goto err; 203f95f3850SWill Newton 204f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 205f95f3850SWill Newton if (!node) 206f95f3850SWill Newton goto err; 207f95f3850SWill Newton 208f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 209f95f3850SWill Newton (u32 *)&host->pending_events); 210f95f3850SWill Newton if (!node) 211f95f3850SWill Newton goto err; 212f95f3850SWill Newton 213f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 214f95f3850SWill Newton (u32 *)&host->completed_events); 215f95f3850SWill Newton if (!node) 216f95f3850SWill Newton goto err; 217f95f3850SWill Newton 218f95f3850SWill Newton return; 219f95f3850SWill Newton 220f95f3850SWill Newton err: 221f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 222f95f3850SWill Newton } 223f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 224f95f3850SWill Newton 225f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 226f95f3850SWill Newton { 227f95f3850SWill Newton /* timeout (maximum) */ 228f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 229f95f3850SWill Newton } 230f95f3850SWill Newton 231f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 232f95f3850SWill Newton { 233f95f3850SWill Newton struct mmc_data *data; 234*800d78bfSThomas Abraham struct dw_mci_slot *slot = mmc_priv(mmc); 235f95f3850SWill Newton u32 cmdr; 236f95f3850SWill Newton cmd->error = -EINPROGRESS; 237f95f3850SWill Newton 238f95f3850SWill Newton cmdr = cmd->opcode; 239f95f3850SWill Newton 240f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 241f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 242f95f3850SWill Newton else 243f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 244f95f3850SWill Newton 245f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 246f95f3850SWill Newton /* We expect a response, so set this bit */ 247f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 248f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 249f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 250f95f3850SWill Newton } 251f95f3850SWill Newton 252f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 253f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 254f95f3850SWill Newton 255f95f3850SWill Newton data = cmd->data; 256f95f3850SWill Newton if (data) { 257f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 258f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 259f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 260f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 261f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 262f95f3850SWill Newton } 263f95f3850SWill Newton 264*800d78bfSThomas Abraham if (slot->host->drv_data->prepare_command) 265*800d78bfSThomas Abraham slot->host->drv_data->prepare_command(slot->host, &cmdr); 266*800d78bfSThomas Abraham 267f95f3850SWill Newton return cmdr; 268f95f3850SWill Newton } 269f95f3850SWill Newton 270f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 271f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 272f95f3850SWill Newton { 273f95f3850SWill Newton host->cmd = cmd; 2744a90920cSThomas Abraham dev_vdbg(host->dev, 275f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 276f95f3850SWill Newton cmd->arg, cmd_flags); 277f95f3850SWill Newton 278f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 279f95f3850SWill Newton wmb(); 280f95f3850SWill Newton 281f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 282f95f3850SWill Newton } 283f95f3850SWill Newton 284f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 285f95f3850SWill Newton { 286f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 287f95f3850SWill Newton } 288f95f3850SWill Newton 289f95f3850SWill Newton /* DMA interface functions */ 290f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 291f95f3850SWill Newton { 29203e8cb53SJames Hogan if (host->using_dma) { 293f95f3850SWill Newton host->dma_ops->stop(host); 294f95f3850SWill Newton host->dma_ops->cleanup(host); 295f95f3850SWill Newton } else { 296f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 297f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 298f95f3850SWill Newton } 299f95f3850SWill Newton } 300f95f3850SWill Newton 3019aa51408SSeungwon Jeon static int dw_mci_get_dma_dir(struct mmc_data *data) 3029aa51408SSeungwon Jeon { 3039aa51408SSeungwon Jeon if (data->flags & MMC_DATA_WRITE) 3049aa51408SSeungwon Jeon return DMA_TO_DEVICE; 3059aa51408SSeungwon Jeon else 3069aa51408SSeungwon Jeon return DMA_FROM_DEVICE; 3079aa51408SSeungwon Jeon } 3089aa51408SSeungwon Jeon 3099beee912SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 310f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 311f95f3850SWill Newton { 312f95f3850SWill Newton struct mmc_data *data = host->data; 313f95f3850SWill Newton 314f95f3850SWill Newton if (data) 3159aa51408SSeungwon Jeon if (!data->host_cookie) 3164a90920cSThomas Abraham dma_unmap_sg(host->dev, 3179aa51408SSeungwon Jeon data->sg, 3189aa51408SSeungwon Jeon data->sg_len, 3199aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 320f95f3850SWill Newton } 321f95f3850SWill Newton 322f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 323f95f3850SWill Newton { 324f95f3850SWill Newton u32 temp; 325f95f3850SWill Newton 326f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 327f95f3850SWill Newton temp = mci_readl(host, CTRL); 328f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 329f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 330f95f3850SWill Newton mci_writel(host, CTRL, temp); 331f95f3850SWill Newton 332f95f3850SWill Newton /* Stop the IDMAC running */ 333f95f3850SWill Newton temp = mci_readl(host, BMOD); 334a5289a43SJaehoon Chung temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB); 335f95f3850SWill Newton mci_writel(host, BMOD, temp); 336f95f3850SWill Newton } 337f95f3850SWill Newton 338f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 339f95f3850SWill Newton { 340f95f3850SWill Newton struct mmc_data *data = host->data; 341f95f3850SWill Newton 3424a90920cSThomas Abraham dev_vdbg(host->dev, "DMA complete\n"); 343f95f3850SWill Newton 344f95f3850SWill Newton host->dma_ops->cleanup(host); 345f95f3850SWill Newton 346f95f3850SWill Newton /* 347f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 348f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 349f95f3850SWill Newton */ 350f95f3850SWill Newton if (data) { 351f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 352f95f3850SWill Newton tasklet_schedule(&host->tasklet); 353f95f3850SWill Newton } 354f95f3850SWill Newton } 355f95f3850SWill Newton 356f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 357f95f3850SWill Newton unsigned int sg_len) 358f95f3850SWill Newton { 359f95f3850SWill Newton int i; 360f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 361f95f3850SWill Newton 362f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 363f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 364f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 365f95f3850SWill Newton 366f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 367f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 368f95f3850SWill Newton 369f95f3850SWill Newton /* Buffer length */ 370f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 371f95f3850SWill Newton 372f95f3850SWill Newton /* Physical address to DMA to/from */ 373f95f3850SWill Newton desc->des2 = mem_addr; 374f95f3850SWill Newton } 375f95f3850SWill Newton 376f95f3850SWill Newton /* Set first descriptor */ 377f95f3850SWill Newton desc = host->sg_cpu; 378f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 379f95f3850SWill Newton 380f95f3850SWill Newton /* Set last descriptor */ 381f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 382f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 383f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 384f95f3850SWill Newton 385f95f3850SWill Newton wmb(); 386f95f3850SWill Newton } 387f95f3850SWill Newton 388f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 389f95f3850SWill Newton { 390f95f3850SWill Newton u32 temp; 391f95f3850SWill Newton 392f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 393f95f3850SWill Newton 394f95f3850SWill Newton /* Select IDMAC interface */ 395f95f3850SWill Newton temp = mci_readl(host, CTRL); 396f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 397f95f3850SWill Newton mci_writel(host, CTRL, temp); 398f95f3850SWill Newton 399f95f3850SWill Newton wmb(); 400f95f3850SWill Newton 401f95f3850SWill Newton /* Enable the IDMAC */ 402f95f3850SWill Newton temp = mci_readl(host, BMOD); 403a5289a43SJaehoon Chung temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB; 404f95f3850SWill Newton mci_writel(host, BMOD, temp); 405f95f3850SWill Newton 406f95f3850SWill Newton /* Start it running */ 407f95f3850SWill Newton mci_writel(host, PLDMND, 1); 408f95f3850SWill Newton } 409f95f3850SWill Newton 410f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 411f95f3850SWill Newton { 412f95f3850SWill Newton struct idmac_desc *p; 41394c6cee9SGirish K S int i, dma_support; 414f95f3850SWill Newton 415f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 416f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 417f95f3850SWill Newton 41894c6cee9SGirish K S /* Check if Hardware Configuration Register has support for DMA */ 41994c6cee9SGirish K S dma_support = (mci_readl(host, HCON) >> 16) & 0x3; 42094c6cee9SGirish K S 42194c6cee9SGirish K S if (!dma_support || dma_support > 2) { 4224a90920cSThomas Abraham dev_err(host->dev, 42394c6cee9SGirish K S "Host Controller does not support IDMA Tx.\n"); 42494c6cee9SGirish K S host->dma_ops = NULL; 42594c6cee9SGirish K S return -ENODEV; 42694c6cee9SGirish K S } 42794c6cee9SGirish K S 4284a90920cSThomas Abraham dev_info(host->dev, "Using internal DMA controller.\n"); 42994c6cee9SGirish K S 430f95f3850SWill Newton /* Forward link the descriptor list */ 431f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 432f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 433f95f3850SWill Newton 434f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 435f95f3850SWill Newton p->des3 = host->sg_dma; 436f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 437f95f3850SWill Newton 438141a712aSSeungwon Jeon mci_writel(host, BMOD, SDMMC_IDMAC_SWRESET); 439141a712aSSeungwon Jeon 440f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 441f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 442f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 443f95f3850SWill Newton 444f95f3850SWill Newton /* Set the descriptor base address */ 445f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 446f95f3850SWill Newton return 0; 447f95f3850SWill Newton } 448f95f3850SWill Newton 449885c3e80SSeungwon Jeon static struct dw_mci_dma_ops dw_mci_idmac_ops = { 450885c3e80SSeungwon Jeon .init = dw_mci_idmac_init, 451885c3e80SSeungwon Jeon .start = dw_mci_idmac_start_dma, 452885c3e80SSeungwon Jeon .stop = dw_mci_idmac_stop_dma, 453885c3e80SSeungwon Jeon .complete = dw_mci_idmac_complete_dma, 454885c3e80SSeungwon Jeon .cleanup = dw_mci_dma_cleanup, 455885c3e80SSeungwon Jeon }; 456885c3e80SSeungwon Jeon #endif /* CONFIG_MMC_DW_IDMAC */ 457885c3e80SSeungwon Jeon 4589aa51408SSeungwon Jeon static int dw_mci_pre_dma_transfer(struct dw_mci *host, 4599aa51408SSeungwon Jeon struct mmc_data *data, 4609aa51408SSeungwon Jeon bool next) 461f95f3850SWill Newton { 462f95f3850SWill Newton struct scatterlist *sg; 4639aa51408SSeungwon Jeon unsigned int i, sg_len; 464f95f3850SWill Newton 4659aa51408SSeungwon Jeon if (!next && data->host_cookie) 4669aa51408SSeungwon Jeon return data->host_cookie; 467f95f3850SWill Newton 468f95f3850SWill Newton /* 469f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 470f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 471f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 472f95f3850SWill Newton */ 473f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 474f95f3850SWill Newton return -EINVAL; 4759aa51408SSeungwon Jeon 476f95f3850SWill Newton if (data->blksz & 3) 477f95f3850SWill Newton return -EINVAL; 478f95f3850SWill Newton 479f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 480f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 481f95f3850SWill Newton return -EINVAL; 482f95f3850SWill Newton } 483f95f3850SWill Newton 4844a90920cSThomas Abraham sg_len = dma_map_sg(host->dev, 4859aa51408SSeungwon Jeon data->sg, 4869aa51408SSeungwon Jeon data->sg_len, 4879aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 4889aa51408SSeungwon Jeon if (sg_len == 0) 4899aa51408SSeungwon Jeon return -EINVAL; 4909aa51408SSeungwon Jeon 4919aa51408SSeungwon Jeon if (next) 4929aa51408SSeungwon Jeon data->host_cookie = sg_len; 4939aa51408SSeungwon Jeon 4949aa51408SSeungwon Jeon return sg_len; 4959aa51408SSeungwon Jeon } 4969aa51408SSeungwon Jeon 4979aa51408SSeungwon Jeon static void dw_mci_pre_req(struct mmc_host *mmc, 4989aa51408SSeungwon Jeon struct mmc_request *mrq, 4999aa51408SSeungwon Jeon bool is_first_req) 5009aa51408SSeungwon Jeon { 5019aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 5029aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 5039aa51408SSeungwon Jeon 5049aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 5059aa51408SSeungwon Jeon return; 5069aa51408SSeungwon Jeon 5079aa51408SSeungwon Jeon if (data->host_cookie) { 5089aa51408SSeungwon Jeon data->host_cookie = 0; 5099aa51408SSeungwon Jeon return; 5109aa51408SSeungwon Jeon } 5119aa51408SSeungwon Jeon 5129aa51408SSeungwon Jeon if (dw_mci_pre_dma_transfer(slot->host, mrq->data, 1) < 0) 5139aa51408SSeungwon Jeon data->host_cookie = 0; 5149aa51408SSeungwon Jeon } 5159aa51408SSeungwon Jeon 5169aa51408SSeungwon Jeon static void dw_mci_post_req(struct mmc_host *mmc, 5179aa51408SSeungwon Jeon struct mmc_request *mrq, 5189aa51408SSeungwon Jeon int err) 5199aa51408SSeungwon Jeon { 5209aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 5219aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 5229aa51408SSeungwon Jeon 5239aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 5249aa51408SSeungwon Jeon return; 5259aa51408SSeungwon Jeon 5269aa51408SSeungwon Jeon if (data->host_cookie) 5274a90920cSThomas Abraham dma_unmap_sg(slot->host->dev, 5289aa51408SSeungwon Jeon data->sg, 5299aa51408SSeungwon Jeon data->sg_len, 5309aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 5319aa51408SSeungwon Jeon data->host_cookie = 0; 5329aa51408SSeungwon Jeon } 5339aa51408SSeungwon Jeon 5349aa51408SSeungwon Jeon static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 5359aa51408SSeungwon Jeon { 5369aa51408SSeungwon Jeon int sg_len; 5379aa51408SSeungwon Jeon u32 temp; 5389aa51408SSeungwon Jeon 5399aa51408SSeungwon Jeon host->using_dma = 0; 5409aa51408SSeungwon Jeon 5419aa51408SSeungwon Jeon /* If we don't have a channel, we can't do DMA */ 5429aa51408SSeungwon Jeon if (!host->use_dma) 5439aa51408SSeungwon Jeon return -ENODEV; 5449aa51408SSeungwon Jeon 5459aa51408SSeungwon Jeon sg_len = dw_mci_pre_dma_transfer(host, data, 0); 546a99aa9b9SSeungwon Jeon if (sg_len < 0) { 547a99aa9b9SSeungwon Jeon host->dma_ops->stop(host); 5489aa51408SSeungwon Jeon return sg_len; 549a99aa9b9SSeungwon Jeon } 5509aa51408SSeungwon Jeon 55103e8cb53SJames Hogan host->using_dma = 1; 55203e8cb53SJames Hogan 5534a90920cSThomas Abraham dev_vdbg(host->dev, 554f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 555f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 556f95f3850SWill Newton sg_len); 557f95f3850SWill Newton 558f95f3850SWill Newton /* Enable the DMA interface */ 559f95f3850SWill Newton temp = mci_readl(host, CTRL); 560f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 561f95f3850SWill Newton mci_writel(host, CTRL, temp); 562f95f3850SWill Newton 563f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 564f95f3850SWill Newton temp = mci_readl(host, INTMASK); 565f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 566f95f3850SWill Newton mci_writel(host, INTMASK, temp); 567f95f3850SWill Newton 568f95f3850SWill Newton host->dma_ops->start(host, sg_len); 569f95f3850SWill Newton 570f95f3850SWill Newton return 0; 571f95f3850SWill Newton } 572f95f3850SWill Newton 573f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 574f95f3850SWill Newton { 575f95f3850SWill Newton u32 temp; 576f95f3850SWill Newton 577f95f3850SWill Newton data->error = -EINPROGRESS; 578f95f3850SWill Newton 579f95f3850SWill Newton WARN_ON(host->data); 580f95f3850SWill Newton host->sg = NULL; 581f95f3850SWill Newton host->data = data; 582f95f3850SWill Newton 58355c5efbcSJames Hogan if (data->flags & MMC_DATA_READ) 58455c5efbcSJames Hogan host->dir_status = DW_MCI_RECV_STATUS; 58555c5efbcSJames Hogan else 58655c5efbcSJames Hogan host->dir_status = DW_MCI_SEND_STATUS; 58755c5efbcSJames Hogan 588f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 589f9c2a0dcSSeungwon Jeon int flags = SG_MITER_ATOMIC; 590f9c2a0dcSSeungwon Jeon if (host->data->flags & MMC_DATA_READ) 591f9c2a0dcSSeungwon Jeon flags |= SG_MITER_TO_SG; 592f9c2a0dcSSeungwon Jeon else 593f9c2a0dcSSeungwon Jeon flags |= SG_MITER_FROM_SG; 594f9c2a0dcSSeungwon Jeon 595f9c2a0dcSSeungwon Jeon sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 596f95f3850SWill Newton host->sg = data->sg; 59734b664a2SJames Hogan host->part_buf_start = 0; 59834b664a2SJames Hogan host->part_buf_count = 0; 599f95f3850SWill Newton 600b40af3aaSJames Hogan mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); 601f95f3850SWill Newton temp = mci_readl(host, INTMASK); 602f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 603f95f3850SWill Newton mci_writel(host, INTMASK, temp); 604f95f3850SWill Newton 605f95f3850SWill Newton temp = mci_readl(host, CTRL); 606f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 607f95f3850SWill Newton mci_writel(host, CTRL, temp); 608f95f3850SWill Newton } 609f95f3850SWill Newton } 610f95f3850SWill Newton 611f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 612f95f3850SWill Newton { 613f95f3850SWill Newton struct dw_mci *host = slot->host; 614f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 615f95f3850SWill Newton unsigned int cmd_status = 0; 616f95f3850SWill Newton 617f95f3850SWill Newton mci_writel(host, CMDARG, arg); 618f95f3850SWill Newton wmb(); 619f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 620f95f3850SWill Newton 621f95f3850SWill Newton while (time_before(jiffies, timeout)) { 622f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 623f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 624f95f3850SWill Newton return; 625f95f3850SWill Newton } 626f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 627f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 628f95f3850SWill Newton cmd, arg, cmd_status); 629f95f3850SWill Newton } 630f95f3850SWill Newton 631f95f3850SWill Newton static void dw_mci_setup_bus(struct dw_mci_slot *slot) 632f95f3850SWill Newton { 633f95f3850SWill Newton struct dw_mci *host = slot->host; 634f95f3850SWill Newton u32 div; 6359623b5b9SDoug Anderson u32 clk_en_a; 636f95f3850SWill Newton 637f95f3850SWill Newton if (slot->clock != host->current_speed) { 638e419990bSSeungwon Jeon div = host->bus_hz / slot->clock; 639e419990bSSeungwon Jeon if (host->bus_hz % slot->clock && host->bus_hz > slot->clock) 640f95f3850SWill Newton /* 641f95f3850SWill Newton * move the + 1 after the divide to prevent 642f95f3850SWill Newton * over-clocking the card. 643f95f3850SWill Newton */ 644e419990bSSeungwon Jeon div += 1; 645e419990bSSeungwon Jeon 646e419990bSSeungwon Jeon div = (host->bus_hz != slot->clock) ? DIV_ROUND_UP(div, 2) : 0; 647f95f3850SWill Newton 648f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 649f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 650f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 651f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 652f95f3850SWill Newton 653f95f3850SWill Newton /* disable clock */ 654f95f3850SWill Newton mci_writel(host, CLKENA, 0); 655f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 656f95f3850SWill Newton 657f95f3850SWill Newton /* inform CIU */ 658f95f3850SWill Newton mci_send_cmd(slot, 659f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 660f95f3850SWill Newton 661f95f3850SWill Newton /* set clock to desired speed */ 662f95f3850SWill Newton mci_writel(host, CLKDIV, div); 663f95f3850SWill Newton 664f95f3850SWill Newton /* inform CIU */ 665f95f3850SWill Newton mci_send_cmd(slot, 666f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 667f95f3850SWill Newton 6689623b5b9SDoug Anderson /* enable clock; only low power if no SDIO */ 6699623b5b9SDoug Anderson clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; 6709623b5b9SDoug Anderson if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id))) 6719623b5b9SDoug Anderson clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id; 6729623b5b9SDoug Anderson mci_writel(host, CLKENA, clk_en_a); 673f95f3850SWill Newton 674f95f3850SWill Newton /* inform CIU */ 675f95f3850SWill Newton mci_send_cmd(slot, 676f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 677f95f3850SWill Newton 678f95f3850SWill Newton host->current_speed = slot->clock; 679f95f3850SWill Newton } 680f95f3850SWill Newton 681f95f3850SWill Newton /* Set the current slot bus width */ 6821d56c453SSeungwon Jeon mci_writel(host, CTYPE, (slot->ctype << slot->id)); 683f95f3850SWill Newton } 684f95f3850SWill Newton 685053b3ce6SSeungwon Jeon static void __dw_mci_start_request(struct dw_mci *host, 686053b3ce6SSeungwon Jeon struct dw_mci_slot *slot, 687053b3ce6SSeungwon Jeon struct mmc_command *cmd) 688f95f3850SWill Newton { 689f95f3850SWill Newton struct mmc_request *mrq; 690f95f3850SWill Newton struct mmc_data *data; 691f95f3850SWill Newton u32 cmdflags; 692f95f3850SWill Newton 693f95f3850SWill Newton mrq = slot->mrq; 694f95f3850SWill Newton if (host->pdata->select_slot) 695f95f3850SWill Newton host->pdata->select_slot(slot->id); 696f95f3850SWill Newton 697f95f3850SWill Newton /* Slot specific timing and width adjustment */ 698f95f3850SWill Newton dw_mci_setup_bus(slot); 699f95f3850SWill Newton 700f95f3850SWill Newton host->cur_slot = slot; 701f95f3850SWill Newton host->mrq = mrq; 702f95f3850SWill Newton 703f95f3850SWill Newton host->pending_events = 0; 704f95f3850SWill Newton host->completed_events = 0; 705f95f3850SWill Newton host->data_status = 0; 706f95f3850SWill Newton 707053b3ce6SSeungwon Jeon data = cmd->data; 708f95f3850SWill Newton if (data) { 709f95f3850SWill Newton dw_mci_set_timeout(host); 710f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 711f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 712f95f3850SWill Newton } 713f95f3850SWill Newton 714f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 715f95f3850SWill Newton 716f95f3850SWill Newton /* this is the first command, send the initialization clock */ 717f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 718f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 719f95f3850SWill Newton 720f95f3850SWill Newton if (data) { 721f95f3850SWill Newton dw_mci_submit_data(host, data); 722f95f3850SWill Newton wmb(); 723f95f3850SWill Newton } 724f95f3850SWill Newton 725f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 726f95f3850SWill Newton 727f95f3850SWill Newton if (mrq->stop) 728f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 729f95f3850SWill Newton } 730f95f3850SWill Newton 731053b3ce6SSeungwon Jeon static void dw_mci_start_request(struct dw_mci *host, 732053b3ce6SSeungwon Jeon struct dw_mci_slot *slot) 733053b3ce6SSeungwon Jeon { 734053b3ce6SSeungwon Jeon struct mmc_request *mrq = slot->mrq; 735053b3ce6SSeungwon Jeon struct mmc_command *cmd; 736053b3ce6SSeungwon Jeon 737053b3ce6SSeungwon Jeon cmd = mrq->sbc ? mrq->sbc : mrq->cmd; 738053b3ce6SSeungwon Jeon __dw_mci_start_request(host, slot, cmd); 739053b3ce6SSeungwon Jeon } 740053b3ce6SSeungwon Jeon 7417456caaeSJames Hogan /* must be called with host->lock held */ 742f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 743f95f3850SWill Newton struct mmc_request *mrq) 744f95f3850SWill Newton { 745f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 746f95f3850SWill Newton host->state); 747f95f3850SWill Newton 748f95f3850SWill Newton slot->mrq = mrq; 749f95f3850SWill Newton 750f95f3850SWill Newton if (host->state == STATE_IDLE) { 751f95f3850SWill Newton host->state = STATE_SENDING_CMD; 752f95f3850SWill Newton dw_mci_start_request(host, slot); 753f95f3850SWill Newton } else { 754f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 755f95f3850SWill Newton } 756f95f3850SWill Newton } 757f95f3850SWill Newton 758f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 759f95f3850SWill Newton { 760f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 761f95f3850SWill Newton struct dw_mci *host = slot->host; 762f95f3850SWill Newton 763f95f3850SWill Newton WARN_ON(slot->mrq); 764f95f3850SWill Newton 7657456caaeSJames Hogan /* 7667456caaeSJames Hogan * The check for card presence and queueing of the request must be 7677456caaeSJames Hogan * atomic, otherwise the card could be removed in between and the 7687456caaeSJames Hogan * request wouldn't fail until another card was inserted. 7697456caaeSJames Hogan */ 7707456caaeSJames Hogan spin_lock_bh(&host->lock); 7717456caaeSJames Hogan 772f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 7737456caaeSJames Hogan spin_unlock_bh(&host->lock); 774f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 775f95f3850SWill Newton mmc_request_done(mmc, mrq); 776f95f3850SWill Newton return; 777f95f3850SWill Newton } 778f95f3850SWill Newton 779f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 7807456caaeSJames Hogan 7817456caaeSJames Hogan spin_unlock_bh(&host->lock); 782f95f3850SWill Newton } 783f95f3850SWill Newton 784f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 785f95f3850SWill Newton { 786f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 78741babf75SJaehoon Chung u32 regs; 788f95f3850SWill Newton 789f95f3850SWill Newton /* set default 1 bit mode */ 790f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 791f95f3850SWill Newton 792f95f3850SWill Newton switch (ios->bus_width) { 793f95f3850SWill Newton case MMC_BUS_WIDTH_1: 794f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 795f95f3850SWill Newton break; 796f95f3850SWill Newton case MMC_BUS_WIDTH_4: 797f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 798f95f3850SWill Newton break; 799c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 800c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 801c9b2a06fSJaehoon Chung break; 802f95f3850SWill Newton } 803f95f3850SWill Newton 80441babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 8053f514291SSeungwon Jeon 8063f514291SSeungwon Jeon /* DDR mode set */ 8073f514291SSeungwon Jeon if (ios->timing == MMC_TIMING_UHS_DDR50) 80841babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 8093f514291SSeungwon Jeon else 8103f514291SSeungwon Jeon regs &= ~(0x1 << slot->id) << 16; 8113f514291SSeungwon Jeon 81241babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 81341babf75SJaehoon Chung 814f95f3850SWill Newton if (ios->clock) { 815f95f3850SWill Newton /* 816f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 817f95f3850SWill Newton * core ios update when finding the minimum. 818f95f3850SWill Newton */ 819f95f3850SWill Newton slot->clock = ios->clock; 820f95f3850SWill Newton } 821f95f3850SWill Newton 822*800d78bfSThomas Abraham if (slot->host->drv_data->set_ios) 823*800d78bfSThomas Abraham slot->host->drv_data->set_ios(slot->host, ios); 824*800d78bfSThomas Abraham 825f95f3850SWill Newton switch (ios->power_mode) { 826f95f3850SWill Newton case MMC_POWER_UP: 827f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 828f95f3850SWill Newton break; 829f95f3850SWill Newton default: 830f95f3850SWill Newton break; 831f95f3850SWill Newton } 832f95f3850SWill Newton } 833f95f3850SWill Newton 834f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 835f95f3850SWill Newton { 836f95f3850SWill Newton int read_only; 837f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 838f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 839f95f3850SWill Newton 840f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 841b4967aa5SThomas Abraham if (brd->quirks & DW_MCI_QUIRK_NO_WRITE_PROTECT) 842b4967aa5SThomas Abraham read_only = 0; 843b4967aa5SThomas Abraham else if (brd->get_ro) 844f95f3850SWill Newton read_only = brd->get_ro(slot->id); 845f95f3850SWill Newton else 846f95f3850SWill Newton read_only = 847f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 848f95f3850SWill Newton 849f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 850f95f3850SWill Newton read_only ? "read-only" : "read-write"); 851f95f3850SWill Newton 852f95f3850SWill Newton return read_only; 853f95f3850SWill Newton } 854f95f3850SWill Newton 855f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 856f95f3850SWill Newton { 857f95f3850SWill Newton int present; 858f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 859f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 860f95f3850SWill Newton 861f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 862fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 863fc3d7720SJaehoon Chung present = 1; 864fc3d7720SJaehoon Chung else if (brd->get_cd) 865f95f3850SWill Newton present = !brd->get_cd(slot->id); 866f95f3850SWill Newton else 867f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 868f95f3850SWill Newton == 0 ? 1 : 0; 869f95f3850SWill Newton 870f95f3850SWill Newton if (present) 871f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 872f95f3850SWill Newton else 873f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 874f95f3850SWill Newton 875f95f3850SWill Newton return present; 876f95f3850SWill Newton } 877f95f3850SWill Newton 8789623b5b9SDoug Anderson /* 8799623b5b9SDoug Anderson * Disable lower power mode. 8809623b5b9SDoug Anderson * 8819623b5b9SDoug Anderson * Low power mode will stop the card clock when idle. According to the 8829623b5b9SDoug Anderson * description of the CLKENA register we should disable low power mode 8839623b5b9SDoug Anderson * for SDIO cards if we need SDIO interrupts to work. 8849623b5b9SDoug Anderson * 8859623b5b9SDoug Anderson * This function is fast if low power mode is already disabled. 8869623b5b9SDoug Anderson */ 8879623b5b9SDoug Anderson static void dw_mci_disable_low_power(struct dw_mci_slot *slot) 8889623b5b9SDoug Anderson { 8899623b5b9SDoug Anderson struct dw_mci *host = slot->host; 8909623b5b9SDoug Anderson u32 clk_en_a; 8919623b5b9SDoug Anderson const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR << slot->id; 8929623b5b9SDoug Anderson 8939623b5b9SDoug Anderson clk_en_a = mci_readl(host, CLKENA); 8949623b5b9SDoug Anderson 8959623b5b9SDoug Anderson if (clk_en_a & clken_low_pwr) { 8969623b5b9SDoug Anderson mci_writel(host, CLKENA, clk_en_a & ~clken_low_pwr); 8979623b5b9SDoug Anderson mci_send_cmd(slot, SDMMC_CMD_UPD_CLK | 8989623b5b9SDoug Anderson SDMMC_CMD_PRV_DAT_WAIT, 0); 8999623b5b9SDoug Anderson } 9009623b5b9SDoug Anderson } 9019623b5b9SDoug Anderson 9021a5c8e1fSShashidhar Hiremath static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) 9031a5c8e1fSShashidhar Hiremath { 9041a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = mmc_priv(mmc); 9051a5c8e1fSShashidhar Hiremath struct dw_mci *host = slot->host; 9061a5c8e1fSShashidhar Hiremath u32 int_mask; 9071a5c8e1fSShashidhar Hiremath 9081a5c8e1fSShashidhar Hiremath /* Enable/disable Slot Specific SDIO interrupt */ 9091a5c8e1fSShashidhar Hiremath int_mask = mci_readl(host, INTMASK); 9101a5c8e1fSShashidhar Hiremath if (enb) { 9119623b5b9SDoug Anderson /* 9129623b5b9SDoug Anderson * Turn off low power mode if it was enabled. This is a bit of 9139623b5b9SDoug Anderson * a heavy operation and we disable / enable IRQs a lot, so 9149623b5b9SDoug Anderson * we'll leave low power mode disabled and it will get 9159623b5b9SDoug Anderson * re-enabled again in dw_mci_setup_bus(). 9169623b5b9SDoug Anderson */ 9179623b5b9SDoug Anderson dw_mci_disable_low_power(slot); 9189623b5b9SDoug Anderson 9191a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 920705ad047SKyoungil Kim (int_mask | SDMMC_INT_SDIO(slot->id))); 9211a5c8e1fSShashidhar Hiremath } else { 9221a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 923705ad047SKyoungil Kim (int_mask & ~SDMMC_INT_SDIO(slot->id))); 9241a5c8e1fSShashidhar Hiremath } 9251a5c8e1fSShashidhar Hiremath } 9261a5c8e1fSShashidhar Hiremath 927f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 928f95f3850SWill Newton .request = dw_mci_request, 9299aa51408SSeungwon Jeon .pre_req = dw_mci_pre_req, 9309aa51408SSeungwon Jeon .post_req = dw_mci_post_req, 931f95f3850SWill Newton .set_ios = dw_mci_set_ios, 932f95f3850SWill Newton .get_ro = dw_mci_get_ro, 933f95f3850SWill Newton .get_cd = dw_mci_get_cd, 9341a5c8e1fSShashidhar Hiremath .enable_sdio_irq = dw_mci_enable_sdio_irq, 935f95f3850SWill Newton }; 936f95f3850SWill Newton 937f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 938f95f3850SWill Newton __releases(&host->lock) 939f95f3850SWill Newton __acquires(&host->lock) 940f95f3850SWill Newton { 941f95f3850SWill Newton struct dw_mci_slot *slot; 942f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 943f95f3850SWill Newton 944f95f3850SWill Newton WARN_ON(host->cmd || host->data); 945f95f3850SWill Newton 946f95f3850SWill Newton host->cur_slot->mrq = NULL; 947f95f3850SWill Newton host->mrq = NULL; 948f95f3850SWill Newton if (!list_empty(&host->queue)) { 949f95f3850SWill Newton slot = list_entry(host->queue.next, 950f95f3850SWill Newton struct dw_mci_slot, queue_node); 951f95f3850SWill Newton list_del(&slot->queue_node); 9524a90920cSThomas Abraham dev_vdbg(host->dev, "list not empty: %s is next\n", 953f95f3850SWill Newton mmc_hostname(slot->mmc)); 954f95f3850SWill Newton host->state = STATE_SENDING_CMD; 955f95f3850SWill Newton dw_mci_start_request(host, slot); 956f95f3850SWill Newton } else { 9574a90920cSThomas Abraham dev_vdbg(host->dev, "list empty\n"); 958f95f3850SWill Newton host->state = STATE_IDLE; 959f95f3850SWill Newton } 960f95f3850SWill Newton 961f95f3850SWill Newton spin_unlock(&host->lock); 962f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 963f95f3850SWill Newton spin_lock(&host->lock); 964f95f3850SWill Newton } 965f95f3850SWill Newton 966f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 967f95f3850SWill Newton { 968f95f3850SWill Newton u32 status = host->cmd_status; 969f95f3850SWill Newton 970f95f3850SWill Newton host->cmd_status = 0; 971f95f3850SWill Newton 972f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 973f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 974f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 975f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 976f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 977f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 978f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 979f95f3850SWill Newton } else { 980f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 981f95f3850SWill Newton cmd->resp[1] = 0; 982f95f3850SWill Newton cmd->resp[2] = 0; 983f95f3850SWill Newton cmd->resp[3] = 0; 984f95f3850SWill Newton } 985f95f3850SWill Newton } 986f95f3850SWill Newton 987f95f3850SWill Newton if (status & SDMMC_INT_RTO) 988f95f3850SWill Newton cmd->error = -ETIMEDOUT; 989f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 990f95f3850SWill Newton cmd->error = -EILSEQ; 991f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 992f95f3850SWill Newton cmd->error = -EIO; 993f95f3850SWill Newton else 994f95f3850SWill Newton cmd->error = 0; 995f95f3850SWill Newton 996f95f3850SWill Newton if (cmd->error) { 997f95f3850SWill Newton /* newer ip versions need a delay between retries */ 998f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 999f95f3850SWill Newton mdelay(20); 1000f95f3850SWill Newton 1001f95f3850SWill Newton if (cmd->data) { 1002f95f3850SWill Newton dw_mci_stop_dma(host); 1003fda5f736SSeungwon Jeon host->data = NULL; 1004f95f3850SWill Newton } 1005f95f3850SWill Newton } 1006f95f3850SWill Newton } 1007f95f3850SWill Newton 1008f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 1009f95f3850SWill Newton { 1010f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 1011f95f3850SWill Newton struct mmc_data *data; 1012f95f3850SWill Newton struct mmc_command *cmd; 1013f95f3850SWill Newton enum dw_mci_state state; 1014f95f3850SWill Newton enum dw_mci_state prev_state; 101594dd5b33SJames Hogan u32 status, ctrl; 1016f95f3850SWill Newton 1017f95f3850SWill Newton spin_lock(&host->lock); 1018f95f3850SWill Newton 1019f95f3850SWill Newton state = host->state; 1020f95f3850SWill Newton data = host->data; 1021f95f3850SWill Newton 1022f95f3850SWill Newton do { 1023f95f3850SWill Newton prev_state = state; 1024f95f3850SWill Newton 1025f95f3850SWill Newton switch (state) { 1026f95f3850SWill Newton case STATE_IDLE: 1027f95f3850SWill Newton break; 1028f95f3850SWill Newton 1029f95f3850SWill Newton case STATE_SENDING_CMD: 1030f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1031f95f3850SWill Newton &host->pending_events)) 1032f95f3850SWill Newton break; 1033f95f3850SWill Newton 1034f95f3850SWill Newton cmd = host->cmd; 1035f95f3850SWill Newton host->cmd = NULL; 1036f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 1037053b3ce6SSeungwon Jeon dw_mci_command_complete(host, cmd); 1038053b3ce6SSeungwon Jeon if (cmd == host->mrq->sbc && !cmd->error) { 1039053b3ce6SSeungwon Jeon prev_state = state = STATE_SENDING_CMD; 1040053b3ce6SSeungwon Jeon __dw_mci_start_request(host, host->cur_slot, 1041053b3ce6SSeungwon Jeon host->mrq->cmd); 1042053b3ce6SSeungwon Jeon goto unlock; 1043053b3ce6SSeungwon Jeon } 1044053b3ce6SSeungwon Jeon 1045f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 1046f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1047f95f3850SWill Newton goto unlock; 1048f95f3850SWill Newton } 1049f95f3850SWill Newton 1050f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 1051f95f3850SWill Newton /* fall through */ 1052f95f3850SWill Newton 1053f95f3850SWill Newton case STATE_SENDING_DATA: 1054f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 1055f95f3850SWill Newton &host->pending_events)) { 1056f95f3850SWill Newton dw_mci_stop_dma(host); 1057f95f3850SWill Newton if (data->stop) 1058f95f3850SWill Newton send_stop_cmd(host, data); 1059f95f3850SWill Newton state = STATE_DATA_ERROR; 1060f95f3850SWill Newton break; 1061f95f3850SWill Newton } 1062f95f3850SWill Newton 1063f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1064f95f3850SWill Newton &host->pending_events)) 1065f95f3850SWill Newton break; 1066f95f3850SWill Newton 1067f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 1068f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 1069f95f3850SWill Newton /* fall through */ 1070f95f3850SWill Newton 1071f95f3850SWill Newton case STATE_DATA_BUSY: 1072f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 1073f95f3850SWill Newton &host->pending_events)) 1074f95f3850SWill Newton break; 1075f95f3850SWill Newton 1076f95f3850SWill Newton host->data = NULL; 1077f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 1078f95f3850SWill Newton status = host->data_status; 1079f95f3850SWill Newton 1080f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1081f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 1082f95f3850SWill Newton data->error = -ETIMEDOUT; 1083f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 1084f95f3850SWill Newton data->error = -EILSEQ; 108555c5efbcSJames Hogan } else if (status & SDMMC_INT_EBE && 108655c5efbcSJames Hogan host->dir_status == 108755c5efbcSJames Hogan DW_MCI_SEND_STATUS) { 108855c5efbcSJames Hogan /* 108955c5efbcSJames Hogan * No data CRC status was returned. 109055c5efbcSJames Hogan * The number of bytes transferred will 109155c5efbcSJames Hogan * be exaggerated in PIO mode. 109255c5efbcSJames Hogan */ 109355c5efbcSJames Hogan data->bytes_xfered = 0; 109455c5efbcSJames Hogan data->error = -ETIMEDOUT; 1095f95f3850SWill Newton } else { 10964a90920cSThomas Abraham dev_err(host->dev, 1097f95f3850SWill Newton "data FIFO error " 1098f95f3850SWill Newton "(status=%08x)\n", 1099f95f3850SWill Newton status); 1100f95f3850SWill Newton data->error = -EIO; 1101f95f3850SWill Newton } 110294dd5b33SJames Hogan /* 110394dd5b33SJames Hogan * After an error, there may be data lingering 110494dd5b33SJames Hogan * in the FIFO, so reset it - doing so 110594dd5b33SJames Hogan * generates a block interrupt, hence setting 110694dd5b33SJames Hogan * the scatter-gather pointer to NULL. 110794dd5b33SJames Hogan */ 1108f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 110994dd5b33SJames Hogan host->sg = NULL; 111094dd5b33SJames Hogan ctrl = mci_readl(host, CTRL); 111194dd5b33SJames Hogan ctrl |= SDMMC_CTRL_FIFO_RESET; 111294dd5b33SJames Hogan mci_writel(host, CTRL, ctrl); 1113f95f3850SWill Newton } else { 1114f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 1115f95f3850SWill Newton data->error = 0; 1116f95f3850SWill Newton } 1117f95f3850SWill Newton 1118f95f3850SWill Newton if (!data->stop) { 1119f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1120f95f3850SWill Newton goto unlock; 1121f95f3850SWill Newton } 1122f95f3850SWill Newton 1123053b3ce6SSeungwon Jeon if (host->mrq->sbc && !data->error) { 1124053b3ce6SSeungwon Jeon data->stop->error = 0; 1125053b3ce6SSeungwon Jeon dw_mci_request_end(host, host->mrq); 1126053b3ce6SSeungwon Jeon goto unlock; 1127053b3ce6SSeungwon Jeon } 1128053b3ce6SSeungwon Jeon 1129f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 1130f95f3850SWill Newton if (!data->error) 1131f95f3850SWill Newton send_stop_cmd(host, data); 1132f95f3850SWill Newton /* fall through */ 1133f95f3850SWill Newton 1134f95f3850SWill Newton case STATE_SENDING_STOP: 1135f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1136f95f3850SWill Newton &host->pending_events)) 1137f95f3850SWill Newton break; 1138f95f3850SWill Newton 1139f95f3850SWill Newton host->cmd = NULL; 1140f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 1141f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1142f95f3850SWill Newton goto unlock; 1143f95f3850SWill Newton 1144f95f3850SWill Newton case STATE_DATA_ERROR: 1145f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1146f95f3850SWill Newton &host->pending_events)) 1147f95f3850SWill Newton break; 1148f95f3850SWill Newton 1149f95f3850SWill Newton state = STATE_DATA_BUSY; 1150f95f3850SWill Newton break; 1151f95f3850SWill Newton } 1152f95f3850SWill Newton } while (state != prev_state); 1153f95f3850SWill Newton 1154f95f3850SWill Newton host->state = state; 1155f95f3850SWill Newton unlock: 1156f95f3850SWill Newton spin_unlock(&host->lock); 1157f95f3850SWill Newton 1158f95f3850SWill Newton } 1159f95f3850SWill Newton 116034b664a2SJames Hogan /* push final bytes to part_buf, only use during push */ 116134b664a2SJames Hogan static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) 116234b664a2SJames Hogan { 116334b664a2SJames Hogan memcpy((void *)&host->part_buf, buf, cnt); 116434b664a2SJames Hogan host->part_buf_count = cnt; 116534b664a2SJames Hogan } 116634b664a2SJames Hogan 116734b664a2SJames Hogan /* append bytes to part_buf, only use during push */ 116834b664a2SJames Hogan static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) 116934b664a2SJames Hogan { 117034b664a2SJames Hogan cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); 117134b664a2SJames Hogan memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); 117234b664a2SJames Hogan host->part_buf_count += cnt; 117334b664a2SJames Hogan return cnt; 117434b664a2SJames Hogan } 117534b664a2SJames Hogan 117634b664a2SJames Hogan /* pull first bytes from part_buf, only use during pull */ 117734b664a2SJames Hogan static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) 117834b664a2SJames Hogan { 117934b664a2SJames Hogan cnt = min(cnt, (int)host->part_buf_count); 118034b664a2SJames Hogan if (cnt) { 118134b664a2SJames Hogan memcpy(buf, (void *)&host->part_buf + host->part_buf_start, 118234b664a2SJames Hogan cnt); 118334b664a2SJames Hogan host->part_buf_count -= cnt; 118434b664a2SJames Hogan host->part_buf_start += cnt; 118534b664a2SJames Hogan } 118634b664a2SJames Hogan return cnt; 118734b664a2SJames Hogan } 118834b664a2SJames Hogan 118934b664a2SJames Hogan /* pull final bytes from the part_buf, assuming it's just been filled */ 119034b664a2SJames Hogan static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) 119134b664a2SJames Hogan { 119234b664a2SJames Hogan memcpy(buf, &host->part_buf, cnt); 119334b664a2SJames Hogan host->part_buf_start = cnt; 119434b664a2SJames Hogan host->part_buf_count = (1 << host->data_shift) - cnt; 119534b664a2SJames Hogan } 119634b664a2SJames Hogan 1197f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 1198f95f3850SWill Newton { 119934b664a2SJames Hogan /* try and push anything in the part_buf */ 120034b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 120134b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 120234b664a2SJames Hogan buf += len; 120334b664a2SJames Hogan cnt -= len; 120434b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 2) { 12054e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12064e0a5adfSJaehoon Chung host->part_buf16); 120734b664a2SJames Hogan host->part_buf_count = 0; 120834b664a2SJames Hogan } 120934b664a2SJames Hogan } 121034b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 121134b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 121234b664a2SJames Hogan while (cnt >= 2) { 121334b664a2SJames Hogan u16 aligned_buf[64]; 121434b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 121534b664a2SJames Hogan int items = len >> 1; 121634b664a2SJames Hogan int i; 121734b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 121834b664a2SJames Hogan memcpy(aligned_buf, buf, len); 121934b664a2SJames Hogan buf += len; 122034b664a2SJames Hogan cnt -= len; 122134b664a2SJames Hogan /* push data from aligned buffer into fifo */ 122234b664a2SJames Hogan for (i = 0; i < items; ++i) 12234e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12244e0a5adfSJaehoon Chung aligned_buf[i]); 122534b664a2SJames Hogan } 122634b664a2SJames Hogan } else 122734b664a2SJames Hogan #endif 122834b664a2SJames Hogan { 122934b664a2SJames Hogan u16 *pdata = buf; 123034b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 12314e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), *pdata++); 123234b664a2SJames Hogan buf = pdata; 123334b664a2SJames Hogan } 123434b664a2SJames Hogan /* put anything remaining in the part_buf */ 123534b664a2SJames Hogan if (cnt) { 123634b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 123734b664a2SJames Hogan if (!sg_next(host->sg)) 12384e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12394e0a5adfSJaehoon Chung host->part_buf16); 1240f95f3850SWill Newton } 1241f95f3850SWill Newton } 1242f95f3850SWill Newton 1243f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 1244f95f3850SWill Newton { 124534b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 124634b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 124734b664a2SJames Hogan while (cnt >= 2) { 124834b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 124934b664a2SJames Hogan u16 aligned_buf[64]; 125034b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 125134b664a2SJames Hogan int items = len >> 1; 125234b664a2SJames Hogan int i; 125334b664a2SJames Hogan for (i = 0; i < items; ++i) 12544e0a5adfSJaehoon Chung aligned_buf[i] = mci_readw(host, 12554e0a5adfSJaehoon Chung DATA(host->data_offset)); 125634b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 125734b664a2SJames Hogan memcpy(buf, aligned_buf, len); 125834b664a2SJames Hogan buf += len; 125934b664a2SJames Hogan cnt -= len; 126034b664a2SJames Hogan } 126134b664a2SJames Hogan } else 126234b664a2SJames Hogan #endif 126334b664a2SJames Hogan { 126434b664a2SJames Hogan u16 *pdata = buf; 126534b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 12664e0a5adfSJaehoon Chung *pdata++ = mci_readw(host, DATA(host->data_offset)); 126734b664a2SJames Hogan buf = pdata; 126834b664a2SJames Hogan } 126934b664a2SJames Hogan if (cnt) { 12704e0a5adfSJaehoon Chung host->part_buf16 = mci_readw(host, DATA(host->data_offset)); 127134b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1272f95f3850SWill Newton } 1273f95f3850SWill Newton } 1274f95f3850SWill Newton 1275f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 1276f95f3850SWill Newton { 127734b664a2SJames Hogan /* try and push anything in the part_buf */ 127834b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 127934b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 128034b664a2SJames Hogan buf += len; 128134b664a2SJames Hogan cnt -= len; 128234b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 4) { 12834e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12844e0a5adfSJaehoon Chung host->part_buf32); 128534b664a2SJames Hogan host->part_buf_count = 0; 128634b664a2SJames Hogan } 128734b664a2SJames Hogan } 128834b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 128934b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 129034b664a2SJames Hogan while (cnt >= 4) { 129134b664a2SJames Hogan u32 aligned_buf[32]; 129234b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 129334b664a2SJames Hogan int items = len >> 2; 129434b664a2SJames Hogan int i; 129534b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 129634b664a2SJames Hogan memcpy(aligned_buf, buf, len); 129734b664a2SJames Hogan buf += len; 129834b664a2SJames Hogan cnt -= len; 129934b664a2SJames Hogan /* push data from aligned buffer into fifo */ 130034b664a2SJames Hogan for (i = 0; i < items; ++i) 13014e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 13024e0a5adfSJaehoon Chung aligned_buf[i]); 130334b664a2SJames Hogan } 130434b664a2SJames Hogan } else 130534b664a2SJames Hogan #endif 130634b664a2SJames Hogan { 130734b664a2SJames Hogan u32 *pdata = buf; 130834b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 13094e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), *pdata++); 131034b664a2SJames Hogan buf = pdata; 131134b664a2SJames Hogan } 131234b664a2SJames Hogan /* put anything remaining in the part_buf */ 131334b664a2SJames Hogan if (cnt) { 131434b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 131534b664a2SJames Hogan if (!sg_next(host->sg)) 13164e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 13174e0a5adfSJaehoon Chung host->part_buf32); 1318f95f3850SWill Newton } 1319f95f3850SWill Newton } 1320f95f3850SWill Newton 1321f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 1322f95f3850SWill Newton { 132334b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 132434b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 132534b664a2SJames Hogan while (cnt >= 4) { 132634b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 132734b664a2SJames Hogan u32 aligned_buf[32]; 132834b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 132934b664a2SJames Hogan int items = len >> 2; 133034b664a2SJames Hogan int i; 133134b664a2SJames Hogan for (i = 0; i < items; ++i) 13324e0a5adfSJaehoon Chung aligned_buf[i] = mci_readl(host, 13334e0a5adfSJaehoon Chung DATA(host->data_offset)); 133434b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 133534b664a2SJames Hogan memcpy(buf, aligned_buf, len); 133634b664a2SJames Hogan buf += len; 133734b664a2SJames Hogan cnt -= len; 133834b664a2SJames Hogan } 133934b664a2SJames Hogan } else 134034b664a2SJames Hogan #endif 134134b664a2SJames Hogan { 134234b664a2SJames Hogan u32 *pdata = buf; 134334b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 13444e0a5adfSJaehoon Chung *pdata++ = mci_readl(host, DATA(host->data_offset)); 134534b664a2SJames Hogan buf = pdata; 134634b664a2SJames Hogan } 134734b664a2SJames Hogan if (cnt) { 13484e0a5adfSJaehoon Chung host->part_buf32 = mci_readl(host, DATA(host->data_offset)); 134934b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1350f95f3850SWill Newton } 1351f95f3850SWill Newton } 1352f95f3850SWill Newton 1353f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1354f95f3850SWill Newton { 135534b664a2SJames Hogan /* try and push anything in the part_buf */ 135634b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 135734b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 135834b664a2SJames Hogan buf += len; 135934b664a2SJames Hogan cnt -= len; 136034b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 8) { 13614e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 13624e0a5adfSJaehoon Chung host->part_buf); 136334b664a2SJames Hogan host->part_buf_count = 0; 136434b664a2SJames Hogan } 136534b664a2SJames Hogan } 136634b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 136734b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 136834b664a2SJames Hogan while (cnt >= 8) { 136934b664a2SJames Hogan u64 aligned_buf[16]; 137034b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 137134b664a2SJames Hogan int items = len >> 3; 137234b664a2SJames Hogan int i; 137334b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 137434b664a2SJames Hogan memcpy(aligned_buf, buf, len); 137534b664a2SJames Hogan buf += len; 137634b664a2SJames Hogan cnt -= len; 137734b664a2SJames Hogan /* push data from aligned buffer into fifo */ 137834b664a2SJames Hogan for (i = 0; i < items; ++i) 13794e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13804e0a5adfSJaehoon Chung aligned_buf[i]); 138134b664a2SJames Hogan } 138234b664a2SJames Hogan } else 138334b664a2SJames Hogan #endif 138434b664a2SJames Hogan { 138534b664a2SJames Hogan u64 *pdata = buf; 138634b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 13874e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), *pdata++); 138834b664a2SJames Hogan buf = pdata; 138934b664a2SJames Hogan } 139034b664a2SJames Hogan /* put anything remaining in the part_buf */ 139134b664a2SJames Hogan if (cnt) { 139234b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 139334b664a2SJames Hogan if (!sg_next(host->sg)) 13944e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13954e0a5adfSJaehoon Chung host->part_buf); 1396f95f3850SWill Newton } 1397f95f3850SWill Newton } 1398f95f3850SWill Newton 1399f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1400f95f3850SWill Newton { 140134b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 140234b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 140334b664a2SJames Hogan while (cnt >= 8) { 140434b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 140534b664a2SJames Hogan u64 aligned_buf[16]; 140634b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 140734b664a2SJames Hogan int items = len >> 3; 140834b664a2SJames Hogan int i; 140934b664a2SJames Hogan for (i = 0; i < items; ++i) 14104e0a5adfSJaehoon Chung aligned_buf[i] = mci_readq(host, 14114e0a5adfSJaehoon Chung DATA(host->data_offset)); 141234b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 141334b664a2SJames Hogan memcpy(buf, aligned_buf, len); 141434b664a2SJames Hogan buf += len; 141534b664a2SJames Hogan cnt -= len; 1416f95f3850SWill Newton } 141734b664a2SJames Hogan } else 141834b664a2SJames Hogan #endif 141934b664a2SJames Hogan { 142034b664a2SJames Hogan u64 *pdata = buf; 142134b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 14224e0a5adfSJaehoon Chung *pdata++ = mci_readq(host, DATA(host->data_offset)); 142334b664a2SJames Hogan buf = pdata; 142434b664a2SJames Hogan } 142534b664a2SJames Hogan if (cnt) { 14264e0a5adfSJaehoon Chung host->part_buf = mci_readq(host, DATA(host->data_offset)); 142734b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 142834b664a2SJames Hogan } 142934b664a2SJames Hogan } 143034b664a2SJames Hogan 143134b664a2SJames Hogan static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) 143234b664a2SJames Hogan { 143334b664a2SJames Hogan int len; 143434b664a2SJames Hogan 143534b664a2SJames Hogan /* get remaining partial bytes */ 143634b664a2SJames Hogan len = dw_mci_pull_part_bytes(host, buf, cnt); 143734b664a2SJames Hogan if (unlikely(len == cnt)) 143834b664a2SJames Hogan return; 143934b664a2SJames Hogan buf += len; 144034b664a2SJames Hogan cnt -= len; 144134b664a2SJames Hogan 144234b664a2SJames Hogan /* get the rest of the data */ 144334b664a2SJames Hogan host->pull_data(host, buf, cnt); 1444f95f3850SWill Newton } 1445f95f3850SWill Newton 1446f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1447f95f3850SWill Newton { 1448f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1449f9c2a0dcSSeungwon Jeon void *buf; 1450f9c2a0dcSSeungwon Jeon unsigned int offset; 1451f95f3850SWill Newton struct mmc_data *data = host->data; 1452f95f3850SWill Newton int shift = host->data_shift; 1453f95f3850SWill Newton u32 status; 1454ba6a902dSChris Ball unsigned int nbytes = 0, len; 1455f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1456f95f3850SWill Newton 1457f95f3850SWill Newton do { 1458f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1459f9c2a0dcSSeungwon Jeon goto done; 1460f95f3850SWill Newton 1461f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1462f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1463f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1464f9c2a0dcSSeungwon Jeon offset = 0; 1465f9c2a0dcSSeungwon Jeon 1466f9c2a0dcSSeungwon Jeon do { 1467f9c2a0dcSSeungwon Jeon fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) 1468f9c2a0dcSSeungwon Jeon << shift) + host->part_buf_count; 1469f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1470f9c2a0dcSSeungwon Jeon if (!len) 1471f9c2a0dcSSeungwon Jeon break; 1472f9c2a0dcSSeungwon Jeon dw_mci_pull_data(host, (void *)(buf + offset), len); 1473f95f3850SWill Newton offset += len; 1474f95f3850SWill Newton nbytes += len; 1475f9c2a0dcSSeungwon Jeon remain -= len; 1476f9c2a0dcSSeungwon Jeon } while (remain); 1477f95f3850SWill Newton 1478e74f3a9cSSeungwon Jeon sg_miter->consumed = offset; 1479f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1480f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1481f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1482f95f3850SWill Newton data->bytes_xfered += nbytes; 1483f9c2a0dcSSeungwon Jeon 1484f9c2a0dcSSeungwon Jeon if (!remain) { 1485f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1486f9c2a0dcSSeungwon Jeon goto done; 1487f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1488f9c2a0dcSSeungwon Jeon } 1489f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1490f95f3850SWill Newton return; 1491f95f3850SWill Newton 1492f95f3850SWill Newton done: 1493f95f3850SWill Newton data->bytes_xfered += nbytes; 1494f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1495f9c2a0dcSSeungwon Jeon host->sg = NULL; 1496f95f3850SWill Newton smp_wmb(); 1497f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1498f95f3850SWill Newton } 1499f95f3850SWill Newton 1500f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1501f95f3850SWill Newton { 1502f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1503f9c2a0dcSSeungwon Jeon void *buf; 1504f9c2a0dcSSeungwon Jeon unsigned int offset; 1505f95f3850SWill Newton struct mmc_data *data = host->data; 1506f95f3850SWill Newton int shift = host->data_shift; 1507f95f3850SWill Newton u32 status; 1508f95f3850SWill Newton unsigned int nbytes = 0, len; 1509f9c2a0dcSSeungwon Jeon unsigned int fifo_depth = host->fifo_depth; 1510f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1511f95f3850SWill Newton 1512f95f3850SWill Newton do { 1513f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1514f9c2a0dcSSeungwon Jeon goto done; 1515f95f3850SWill Newton 1516f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1517f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1518f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1519f9c2a0dcSSeungwon Jeon offset = 0; 1520f9c2a0dcSSeungwon Jeon 1521f9c2a0dcSSeungwon Jeon do { 1522f9c2a0dcSSeungwon Jeon fcnt = ((fifo_depth - 1523f9c2a0dcSSeungwon Jeon SDMMC_GET_FCNT(mci_readl(host, STATUS))) 1524f9c2a0dcSSeungwon Jeon << shift) - host->part_buf_count; 1525f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1526f9c2a0dcSSeungwon Jeon if (!len) 1527f9c2a0dcSSeungwon Jeon break; 1528f9c2a0dcSSeungwon Jeon host->push_data(host, (void *)(buf + offset), len); 1529f95f3850SWill Newton offset += len; 1530f95f3850SWill Newton nbytes += len; 1531f9c2a0dcSSeungwon Jeon remain -= len; 1532f9c2a0dcSSeungwon Jeon } while (remain); 1533f95f3850SWill Newton 1534e74f3a9cSSeungwon Jeon sg_miter->consumed = offset; 1535f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1536f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1537f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1538f95f3850SWill Newton data->bytes_xfered += nbytes; 1539f9c2a0dcSSeungwon Jeon 1540f9c2a0dcSSeungwon Jeon if (!remain) { 1541f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1542f9c2a0dcSSeungwon Jeon goto done; 1543f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1544f9c2a0dcSSeungwon Jeon } 1545f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1546f95f3850SWill Newton return; 1547f95f3850SWill Newton 1548f95f3850SWill Newton done: 1549f95f3850SWill Newton data->bytes_xfered += nbytes; 1550f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1551f9c2a0dcSSeungwon Jeon host->sg = NULL; 1552f95f3850SWill Newton smp_wmb(); 1553f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1554f95f3850SWill Newton } 1555f95f3850SWill Newton 1556f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1557f95f3850SWill Newton { 1558f95f3850SWill Newton if (!host->cmd_status) 1559f95f3850SWill Newton host->cmd_status = status; 1560f95f3850SWill Newton 1561f95f3850SWill Newton smp_wmb(); 1562f95f3850SWill Newton 1563f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1564f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1565f95f3850SWill Newton } 1566f95f3850SWill Newton 1567f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1568f95f3850SWill Newton { 1569f95f3850SWill Newton struct dw_mci *host = dev_id; 1570182c9081SSeungwon Jeon u32 pending; 1571f95f3850SWill Newton unsigned int pass_count = 0; 15721a5c8e1fSShashidhar Hiremath int i; 1573f95f3850SWill Newton 1574f95f3850SWill Newton do { 1575f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1576f95f3850SWill Newton 1577f95f3850SWill Newton /* 1578f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1579f95f3850SWill Newton * is configured. 1580f95f3850SWill Newton */ 1581f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1582f95f3850SWill Newton if (!pending && 1583f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1584f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1585f95f3850SWill Newton } 1586f95f3850SWill Newton 1587f95f3850SWill Newton if (!pending) 1588f95f3850SWill Newton break; 1589f95f3850SWill Newton 1590f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1591f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1592182c9081SSeungwon Jeon host->cmd_status = pending; 1593f95f3850SWill Newton smp_wmb(); 1594f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1595f95f3850SWill Newton } 1596f95f3850SWill Newton 1597f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1598f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1599f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1600182c9081SSeungwon Jeon host->data_status = pending; 1601f95f3850SWill Newton smp_wmb(); 1602f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1603f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1604f95f3850SWill Newton } 1605f95f3850SWill Newton 1606f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1607f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1608f95f3850SWill Newton if (!host->data_status) 1609182c9081SSeungwon Jeon host->data_status = pending; 1610f95f3850SWill Newton smp_wmb(); 1611f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1612f95f3850SWill Newton if (host->sg != NULL) 1613f95f3850SWill Newton dw_mci_read_data_pio(host); 1614f95f3850SWill Newton } 1615f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1616f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1617f95f3850SWill Newton } 1618f95f3850SWill Newton 1619f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1620f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1621b40af3aaSJames Hogan if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) 1622f95f3850SWill Newton dw_mci_read_data_pio(host); 1623f95f3850SWill Newton } 1624f95f3850SWill Newton 1625f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1626f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1627b40af3aaSJames Hogan if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) 1628f95f3850SWill Newton dw_mci_write_data_pio(host); 1629f95f3850SWill Newton } 1630f95f3850SWill Newton 1631f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1632f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1633182c9081SSeungwon Jeon dw_mci_cmd_interrupt(host, pending); 1634f95f3850SWill Newton } 1635f95f3850SWill Newton 1636f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1637f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 163895dcc2cbSThomas Abraham queue_work(host->card_workqueue, &host->card_work); 1639f95f3850SWill Newton } 1640f95f3850SWill Newton 16411a5c8e1fSShashidhar Hiremath /* Handle SDIO Interrupts */ 16421a5c8e1fSShashidhar Hiremath for (i = 0; i < host->num_slots; i++) { 16431a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = host->slot[i]; 16441a5c8e1fSShashidhar Hiremath if (pending & SDMMC_INT_SDIO(i)) { 16451a5c8e1fSShashidhar Hiremath mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i)); 16461a5c8e1fSShashidhar Hiremath mmc_signal_sdio_irq(slot->mmc); 16471a5c8e1fSShashidhar Hiremath } 16481a5c8e1fSShashidhar Hiremath } 16491a5c8e1fSShashidhar Hiremath 1650f95f3850SWill Newton } while (pass_count++ < 5); 1651f95f3850SWill Newton 1652f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1653f95f3850SWill Newton /* Handle DMA interrupts */ 1654f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1655f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1656f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1657f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1658f95f3850SWill Newton host->dma_ops->complete(host); 1659f95f3850SWill Newton } 1660f95f3850SWill Newton #endif 1661f95f3850SWill Newton 1662f95f3850SWill Newton return IRQ_HANDLED; 1663f95f3850SWill Newton } 1664f95f3850SWill Newton 16651791b13eSJames Hogan static void dw_mci_work_routine_card(struct work_struct *work) 1666f95f3850SWill Newton { 16671791b13eSJames Hogan struct dw_mci *host = container_of(work, struct dw_mci, card_work); 1668f95f3850SWill Newton int i; 1669f95f3850SWill Newton 1670f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1671f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1672f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1673f95f3850SWill Newton struct mmc_request *mrq; 1674f95f3850SWill Newton int present; 1675f95f3850SWill Newton u32 ctrl; 1676f95f3850SWill Newton 1677f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1678f95f3850SWill Newton while (present != slot->last_detect_state) { 1679f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1680f95f3850SWill Newton present ? "inserted" : "removed"); 1681f95f3850SWill Newton 16821791b13eSJames Hogan /* Power up slot (before spin_lock, may sleep) */ 16831791b13eSJames Hogan if (present != 0 && host->pdata->setpower) 16841791b13eSJames Hogan host->pdata->setpower(slot->id, mmc->ocr_avail); 16851791b13eSJames Hogan 16861791b13eSJames Hogan spin_lock_bh(&host->lock); 16871791b13eSJames Hogan 1688f95f3850SWill Newton /* Card change detected */ 1689f95f3850SWill Newton slot->last_detect_state = present; 1690f95f3850SWill Newton 16911791b13eSJames Hogan /* Mark card as present if applicable */ 16921791b13eSJames Hogan if (present != 0) 1693f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1694f95f3850SWill Newton 1695f95f3850SWill Newton /* Clean up queue if present */ 1696f95f3850SWill Newton mrq = slot->mrq; 1697f95f3850SWill Newton if (mrq) { 1698f95f3850SWill Newton if (mrq == host->mrq) { 1699f95f3850SWill Newton host->data = NULL; 1700f95f3850SWill Newton host->cmd = NULL; 1701f95f3850SWill Newton 1702f95f3850SWill Newton switch (host->state) { 1703f95f3850SWill Newton case STATE_IDLE: 1704f95f3850SWill Newton break; 1705f95f3850SWill Newton case STATE_SENDING_CMD: 1706f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1707f95f3850SWill Newton if (!mrq->data) 1708f95f3850SWill Newton break; 1709f95f3850SWill Newton /* fall through */ 1710f95f3850SWill Newton case STATE_SENDING_DATA: 1711f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1712f95f3850SWill Newton dw_mci_stop_dma(host); 1713f95f3850SWill Newton break; 1714f95f3850SWill Newton case STATE_DATA_BUSY: 1715f95f3850SWill Newton case STATE_DATA_ERROR: 1716f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1717f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1718f95f3850SWill Newton if (!mrq->stop) 1719f95f3850SWill Newton break; 1720f95f3850SWill Newton /* fall through */ 1721f95f3850SWill Newton case STATE_SENDING_STOP: 1722f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1723f95f3850SWill Newton break; 1724f95f3850SWill Newton } 1725f95f3850SWill Newton 1726f95f3850SWill Newton dw_mci_request_end(host, mrq); 1727f95f3850SWill Newton } else { 1728f95f3850SWill Newton list_del(&slot->queue_node); 1729f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1730f95f3850SWill Newton if (mrq->data) 1731f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1732f95f3850SWill Newton if (mrq->stop) 1733f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1734f95f3850SWill Newton 1735f95f3850SWill Newton spin_unlock(&host->lock); 1736f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1737f95f3850SWill Newton spin_lock(&host->lock); 1738f95f3850SWill Newton } 1739f95f3850SWill Newton } 1740f95f3850SWill Newton 1741f95f3850SWill Newton /* Power down slot */ 1742f95f3850SWill Newton if (present == 0) { 1743f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1744f95f3850SWill Newton 1745f95f3850SWill Newton /* 1746f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1747f95f3850SWill Newton * block interrupt, hence setting the 1748f95f3850SWill Newton * scatter-gather pointer to NULL. 1749f95f3850SWill Newton */ 1750f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 1751f95f3850SWill Newton host->sg = NULL; 1752f95f3850SWill Newton 1753f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1754f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1755f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1756f95f3850SWill Newton 1757f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1758f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1759141a712aSSeungwon Jeon /* Software reset of DMA */ 1760141a712aSSeungwon Jeon ctrl |= SDMMC_IDMAC_SWRESET; 1761f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1762f95f3850SWill Newton #endif 1763f95f3850SWill Newton 1764f95f3850SWill Newton } 1765f95f3850SWill Newton 17661791b13eSJames Hogan spin_unlock_bh(&host->lock); 17671791b13eSJames Hogan 17681791b13eSJames Hogan /* Power down slot (after spin_unlock, may sleep) */ 17691791b13eSJames Hogan if (present == 0 && host->pdata->setpower) 17701791b13eSJames Hogan host->pdata->setpower(slot->id, 0); 17711791b13eSJames Hogan 1772f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1773f95f3850SWill Newton } 1774f95f3850SWill Newton 1775f95f3850SWill Newton mmc_detect_change(slot->mmc, 1776f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1777f95f3850SWill Newton } 1778f95f3850SWill Newton } 1779f95f3850SWill Newton 1780c91eab4bSThomas Abraham #ifdef CONFIG_OF 1781c91eab4bSThomas Abraham /* given a slot id, find out the device node representing that slot */ 1782c91eab4bSThomas Abraham static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) 1783c91eab4bSThomas Abraham { 1784c91eab4bSThomas Abraham struct device_node *np; 1785c91eab4bSThomas Abraham const __be32 *addr; 1786c91eab4bSThomas Abraham int len; 1787c91eab4bSThomas Abraham 1788c91eab4bSThomas Abraham if (!dev || !dev->of_node) 1789c91eab4bSThomas Abraham return NULL; 1790c91eab4bSThomas Abraham 1791c91eab4bSThomas Abraham for_each_child_of_node(dev->of_node, np) { 1792c91eab4bSThomas Abraham addr = of_get_property(np, "reg", &len); 1793c91eab4bSThomas Abraham if (!addr || (len < sizeof(int))) 1794c91eab4bSThomas Abraham continue; 1795c91eab4bSThomas Abraham if (be32_to_cpup(addr) == slot) 1796c91eab4bSThomas Abraham return np; 1797c91eab4bSThomas Abraham } 1798c91eab4bSThomas Abraham return NULL; 1799c91eab4bSThomas Abraham } 1800c91eab4bSThomas Abraham 1801c91eab4bSThomas Abraham /* find out bus-width for a given slot */ 1802c91eab4bSThomas Abraham static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot) 1803c91eab4bSThomas Abraham { 1804c91eab4bSThomas Abraham struct device_node *np = dw_mci_of_find_slot_node(dev, slot); 1805c91eab4bSThomas Abraham u32 bus_wd = 1; 1806c91eab4bSThomas Abraham 1807c91eab4bSThomas Abraham if (!np) 1808c91eab4bSThomas Abraham return 1; 1809c91eab4bSThomas Abraham 1810c91eab4bSThomas Abraham if (of_property_read_u32(np, "bus-width", &bus_wd)) 1811c91eab4bSThomas Abraham dev_err(dev, "bus-width property not found, assuming width" 1812c91eab4bSThomas Abraham " as 1\n"); 1813c91eab4bSThomas Abraham return bus_wd; 1814c91eab4bSThomas Abraham } 1815c91eab4bSThomas Abraham #else /* CONFIG_OF */ 1816c91eab4bSThomas Abraham static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot) 1817c91eab4bSThomas Abraham { 1818c91eab4bSThomas Abraham return 1; 1819c91eab4bSThomas Abraham } 1820c91eab4bSThomas Abraham static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) 1821c91eab4bSThomas Abraham { 1822c91eab4bSThomas Abraham return NULL; 1823c91eab4bSThomas Abraham } 1824c91eab4bSThomas Abraham #endif /* CONFIG_OF */ 1825c91eab4bSThomas Abraham 182636c179a9SJaehoon Chung static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1827f95f3850SWill Newton { 1828f95f3850SWill Newton struct mmc_host *mmc; 1829f95f3850SWill Newton struct dw_mci_slot *slot; 1830*800d78bfSThomas Abraham int ctrl_id, ret; 1831c91eab4bSThomas Abraham u8 bus_width; 1832f95f3850SWill Newton 18334a90920cSThomas Abraham mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); 1834f95f3850SWill Newton if (!mmc) 1835f95f3850SWill Newton return -ENOMEM; 1836f95f3850SWill Newton 1837f95f3850SWill Newton slot = mmc_priv(mmc); 1838f95f3850SWill Newton slot->id = id; 1839f95f3850SWill Newton slot->mmc = mmc; 1840f95f3850SWill Newton slot->host = host; 1841c91eab4bSThomas Abraham host->slot[id] = slot; 1842f95f3850SWill Newton 1843f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1844f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1845f95f3850SWill Newton mmc->f_max = host->bus_hz; 1846f95f3850SWill Newton 1847f95f3850SWill Newton if (host->pdata->get_ocr) 1848f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1849f95f3850SWill Newton else 1850f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1851f95f3850SWill Newton 1852f95f3850SWill Newton /* 1853f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1854f95f3850SWill Newton * is detected. 1855f95f3850SWill Newton */ 1856f95f3850SWill Newton if (host->pdata->setpower) 1857f95f3850SWill Newton host->pdata->setpower(id, 0); 1858f95f3850SWill Newton 1859fc3d7720SJaehoon Chung if (host->pdata->caps) 1860fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1861fc3d7720SJaehoon Chung 1862*800d78bfSThomas Abraham if (host->dev->of_node) { 1863*800d78bfSThomas Abraham ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); 1864*800d78bfSThomas Abraham if (ctrl_id < 0) 1865*800d78bfSThomas Abraham ctrl_id = 0; 1866*800d78bfSThomas Abraham } else { 1867*800d78bfSThomas Abraham ctrl_id = to_platform_device(host->dev)->id; 1868*800d78bfSThomas Abraham } 1869*800d78bfSThomas Abraham if (host->drv_data && host->drv_data->caps) 1870*800d78bfSThomas Abraham mmc->caps |= host->drv_data->caps[ctrl_id]; 1871*800d78bfSThomas Abraham 18724f408cc6SSeungwon Jeon if (host->pdata->caps2) 18734f408cc6SSeungwon Jeon mmc->caps2 = host->pdata->caps2; 18744f408cc6SSeungwon Jeon 1875f95f3850SWill Newton if (host->pdata->get_bus_wd) 1876c91eab4bSThomas Abraham bus_width = host->pdata->get_bus_wd(slot->id); 1877c91eab4bSThomas Abraham else if (host->dev->of_node) 1878c91eab4bSThomas Abraham bus_width = dw_mci_of_get_bus_wd(host->dev, slot->id); 1879c91eab4bSThomas Abraham else 1880c91eab4bSThomas Abraham bus_width = 1; 1881c91eab4bSThomas Abraham 1882*800d78bfSThomas Abraham if (host->drv_data->setup_bus) { 1883*800d78bfSThomas Abraham struct device_node *slot_np; 1884*800d78bfSThomas Abraham slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); 1885*800d78bfSThomas Abraham ret = host->drv_data->setup_bus(host, slot_np, bus_width); 1886*800d78bfSThomas Abraham if (ret) 1887*800d78bfSThomas Abraham goto err_setup_bus; 1888*800d78bfSThomas Abraham } 1889*800d78bfSThomas Abraham 1890c91eab4bSThomas Abraham switch (bus_width) { 1891c91eab4bSThomas Abraham case 8: 1892c91eab4bSThomas Abraham mmc->caps |= MMC_CAP_8_BIT_DATA; 1893c91eab4bSThomas Abraham case 4: 1894f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1895c91eab4bSThomas Abraham } 1896f95f3850SWill Newton 1897f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 18986daa7778SSeungwon Jeon mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 1899f95f3850SWill Newton 1900356ac2cfSJaehoon Chung if (mmc->caps2 & MMC_CAP2_POWEROFF_NOTIFY) 1901356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_SHORT; 1902356ac2cfSJaehoon Chung else 1903356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_NONE; 1904356ac2cfSJaehoon Chung 1905f95f3850SWill Newton if (host->pdata->blk_settings) { 1906f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1907f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1908f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1909f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1910f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1911f95f3850SWill Newton } else { 1912f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1913a39e5746SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 1914a39e5746SJaehoon Chung mmc->max_segs = host->ring_size; 1915a39e5746SJaehoon Chung mmc->max_blk_size = 65536; 1916a39e5746SJaehoon Chung mmc->max_blk_count = host->ring_size; 1917a39e5746SJaehoon Chung mmc->max_seg_size = 0x1000; 1918a39e5746SJaehoon Chung mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1919a39e5746SJaehoon Chung #else 1920f95f3850SWill Newton mmc->max_segs = 64; 1921f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1922f95f3850SWill Newton mmc->max_blk_count = 512; 1923f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1924f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1925f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1926a39e5746SJaehoon Chung } 1927f95f3850SWill Newton 1928c07946a3SJaehoon Chung host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 1929c07946a3SJaehoon Chung if (IS_ERR(host->vmmc)) { 1930a3c76eb9SGirish K S pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1931c07946a3SJaehoon Chung host->vmmc = NULL; 1932c07946a3SJaehoon Chung } else 1933c07946a3SJaehoon Chung regulator_enable(host->vmmc); 1934c07946a3SJaehoon Chung 1935f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1936f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1937f95f3850SWill Newton else 1938f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1939f95f3850SWill Newton 1940f95f3850SWill Newton mmc_add_host(mmc); 1941f95f3850SWill Newton 1942f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1943f95f3850SWill Newton dw_mci_init_debugfs(slot); 1944f95f3850SWill Newton #endif 1945f95f3850SWill Newton 1946f95f3850SWill Newton /* Card initially undetected */ 1947f95f3850SWill Newton slot->last_detect_state = 0; 1948f95f3850SWill Newton 1949dd6c4b98SWill Newton /* 1950dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 1951dd6c4b98SWill Newton * need to run the detect tasklet 1952dd6c4b98SWill Newton */ 195395dcc2cbSThomas Abraham queue_work(host->card_workqueue, &host->card_work); 1954dd6c4b98SWill Newton 1955f95f3850SWill Newton return 0; 1956*800d78bfSThomas Abraham 1957*800d78bfSThomas Abraham err_setup_bus: 1958*800d78bfSThomas Abraham mmc_free_host(mmc); 1959*800d78bfSThomas Abraham return -EINVAL; 1960f95f3850SWill Newton } 1961f95f3850SWill Newton 1962f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 1963f95f3850SWill Newton { 1964f95f3850SWill Newton /* Shutdown detect IRQ */ 1965f95f3850SWill Newton if (slot->host->pdata->exit) 1966f95f3850SWill Newton slot->host->pdata->exit(id); 1967f95f3850SWill Newton 1968f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 1969f95f3850SWill Newton mmc_remove_host(slot->mmc); 1970f95f3850SWill Newton slot->host->slot[id] = NULL; 1971f95f3850SWill Newton mmc_free_host(slot->mmc); 1972f95f3850SWill Newton } 1973f95f3850SWill Newton 1974f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 1975f95f3850SWill Newton { 1976f95f3850SWill Newton /* Alloc memory for sg translation */ 19774a90920cSThomas Abraham host->sg_cpu = dma_alloc_coherent(host->dev, PAGE_SIZE, 1978f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 1979f95f3850SWill Newton if (!host->sg_cpu) { 19804a90920cSThomas Abraham dev_err(host->dev, "%s: could not alloc DMA memory\n", 1981f95f3850SWill Newton __func__); 1982f95f3850SWill Newton goto no_dma; 1983f95f3850SWill Newton } 1984f95f3850SWill Newton 1985f95f3850SWill Newton /* Determine which DMA interface to use */ 1986f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1987f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 1988f95f3850SWill Newton #endif 1989f95f3850SWill Newton 1990f95f3850SWill Newton if (!host->dma_ops) 1991f95f3850SWill Newton goto no_dma; 1992f95f3850SWill Newton 1993e1631f98SJaehoon Chung if (host->dma_ops->init && host->dma_ops->start && 1994e1631f98SJaehoon Chung host->dma_ops->stop && host->dma_ops->cleanup) { 1995f95f3850SWill Newton if (host->dma_ops->init(host)) { 19964a90920cSThomas Abraham dev_err(host->dev, "%s: Unable to initialize " 1997f95f3850SWill Newton "DMA Controller.\n", __func__); 1998f95f3850SWill Newton goto no_dma; 1999f95f3850SWill Newton } 2000f95f3850SWill Newton } else { 20014a90920cSThomas Abraham dev_err(host->dev, "DMA initialization not found.\n"); 2002f95f3850SWill Newton goto no_dma; 2003f95f3850SWill Newton } 2004f95f3850SWill Newton 2005f95f3850SWill Newton host->use_dma = 1; 2006f95f3850SWill Newton return; 2007f95f3850SWill Newton 2008f95f3850SWill Newton no_dma: 20094a90920cSThomas Abraham dev_info(host->dev, "Using PIO mode.\n"); 2010f95f3850SWill Newton host->use_dma = 0; 2011f95f3850SWill Newton return; 2012f95f3850SWill Newton } 2013f95f3850SWill Newton 2014f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 2015f95f3850SWill Newton { 2016f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 2017f95f3850SWill Newton unsigned int ctrl; 2018f95f3850SWill Newton 2019f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 2020f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 2021f95f3850SWill Newton 2022f95f3850SWill Newton /* wait till resets clear */ 2023f95f3850SWill Newton do { 2024f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 2025f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 2026f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 2027f95f3850SWill Newton return true; 2028f95f3850SWill Newton } while (time_before(jiffies, timeout)); 2029f95f3850SWill Newton 2030f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 2031f95f3850SWill Newton 2032f95f3850SWill Newton return false; 2033f95f3850SWill Newton } 2034f95f3850SWill Newton 2035c91eab4bSThomas Abraham #ifdef CONFIG_OF 2036c91eab4bSThomas Abraham static struct dw_mci_of_quirks { 2037c91eab4bSThomas Abraham char *quirk; 2038c91eab4bSThomas Abraham int id; 2039c91eab4bSThomas Abraham } of_quirks[] = { 2040c91eab4bSThomas Abraham { 2041c91eab4bSThomas Abraham .quirk = "supports-highspeed", 2042c91eab4bSThomas Abraham .id = DW_MCI_QUIRK_HIGHSPEED, 2043c91eab4bSThomas Abraham }, { 2044c91eab4bSThomas Abraham .quirk = "broken-cd", 2045c91eab4bSThomas Abraham .id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION, 2046c91eab4bSThomas Abraham }, 2047c91eab4bSThomas Abraham }; 2048c91eab4bSThomas Abraham 2049c91eab4bSThomas Abraham static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) 2050c91eab4bSThomas Abraham { 2051c91eab4bSThomas Abraham struct dw_mci_board *pdata; 2052c91eab4bSThomas Abraham struct device *dev = host->dev; 2053c91eab4bSThomas Abraham struct device_node *np = dev->of_node; 2054*800d78bfSThomas Abraham int idx, ret; 2055c91eab4bSThomas Abraham 2056c91eab4bSThomas Abraham pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 2057c91eab4bSThomas Abraham if (!pdata) { 2058c91eab4bSThomas Abraham dev_err(dev, "could not allocate memory for pdata\n"); 2059c91eab4bSThomas Abraham return ERR_PTR(-ENOMEM); 2060c91eab4bSThomas Abraham } 2061c91eab4bSThomas Abraham 2062c91eab4bSThomas Abraham /* find out number of slots supported */ 2063c91eab4bSThomas Abraham if (of_property_read_u32(dev->of_node, "num-slots", 2064c91eab4bSThomas Abraham &pdata->num_slots)) { 2065c91eab4bSThomas Abraham dev_info(dev, "num-slots property not found, " 2066c91eab4bSThomas Abraham "assuming 1 slot is available\n"); 2067c91eab4bSThomas Abraham pdata->num_slots = 1; 2068c91eab4bSThomas Abraham } 2069c91eab4bSThomas Abraham 2070c91eab4bSThomas Abraham /* get quirks */ 2071c91eab4bSThomas Abraham for (idx = 0; idx < ARRAY_SIZE(of_quirks); idx++) 2072c91eab4bSThomas Abraham if (of_get_property(np, of_quirks[idx].quirk, NULL)) 2073c91eab4bSThomas Abraham pdata->quirks |= of_quirks[idx].id; 2074c91eab4bSThomas Abraham 2075c91eab4bSThomas Abraham if (of_property_read_u32(np, "fifo-depth", &pdata->fifo_depth)) 2076c91eab4bSThomas Abraham dev_info(dev, "fifo-depth property not found, using " 2077c91eab4bSThomas Abraham "value of FIFOTH register as default\n"); 2078c91eab4bSThomas Abraham 2079c91eab4bSThomas Abraham of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); 2080c91eab4bSThomas Abraham 2081*800d78bfSThomas Abraham if (host->drv_data->parse_dt) { 2082*800d78bfSThomas Abraham ret = host->drv_data->parse_dt(host); 2083*800d78bfSThomas Abraham if (ret) 2084*800d78bfSThomas Abraham return ERR_PTR(ret); 2085*800d78bfSThomas Abraham } 2086*800d78bfSThomas Abraham 2087c91eab4bSThomas Abraham return pdata; 2088c91eab4bSThomas Abraham } 2089c91eab4bSThomas Abraham 2090c91eab4bSThomas Abraham #else /* CONFIG_OF */ 2091c91eab4bSThomas Abraham static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) 2092c91eab4bSThomas Abraham { 2093c91eab4bSThomas Abraham return ERR_PTR(-EINVAL); 2094c91eab4bSThomas Abraham } 2095c91eab4bSThomas Abraham #endif /* CONFIG_OF */ 2096c91eab4bSThomas Abraham 209762ca8034SShashidhar Hiremath int dw_mci_probe(struct dw_mci *host) 2098f95f3850SWill Newton { 209962ca8034SShashidhar Hiremath int width, i, ret = 0; 2100f95f3850SWill Newton u32 fifo_size; 21011c2215b7SThomas Abraham int init_slots = 0; 2102f95f3850SWill Newton 2103c91eab4bSThomas Abraham if (!host->pdata) { 2104c91eab4bSThomas Abraham host->pdata = dw_mci_parse_dt(host); 2105c91eab4bSThomas Abraham if (IS_ERR(host->pdata)) { 2106c91eab4bSThomas Abraham dev_err(host->dev, "platform data not available\n"); 2107c91eab4bSThomas Abraham return -EINVAL; 2108c91eab4bSThomas Abraham } 2109f95f3850SWill Newton } 2110f95f3850SWill Newton 211162ca8034SShashidhar Hiremath if (!host->pdata->select_slot && host->pdata->num_slots > 1) { 21124a90920cSThomas Abraham dev_err(host->dev, 2113f95f3850SWill Newton "Platform data must supply select_slot function\n"); 211462ca8034SShashidhar Hiremath return -ENODEV; 2115f95f3850SWill Newton } 2116f95f3850SWill Newton 2117f90a0612SThomas Abraham host->biu_clk = clk_get(host->dev, "biu"); 2118f90a0612SThomas Abraham if (IS_ERR(host->biu_clk)) { 2119f90a0612SThomas Abraham dev_dbg(host->dev, "biu clock not available\n"); 2120f90a0612SThomas Abraham } else { 2121f90a0612SThomas Abraham ret = clk_prepare_enable(host->biu_clk); 2122f90a0612SThomas Abraham if (ret) { 2123f90a0612SThomas Abraham dev_err(host->dev, "failed to enable biu clock\n"); 2124f90a0612SThomas Abraham clk_put(host->biu_clk); 2125f90a0612SThomas Abraham return ret; 2126f90a0612SThomas Abraham } 2127f95f3850SWill Newton } 2128f95f3850SWill Newton 2129f90a0612SThomas Abraham host->ciu_clk = clk_get(host->dev, "ciu"); 2130f90a0612SThomas Abraham if (IS_ERR(host->ciu_clk)) { 2131f90a0612SThomas Abraham dev_dbg(host->dev, "ciu clock not available\n"); 2132f90a0612SThomas Abraham } else { 2133f90a0612SThomas Abraham ret = clk_prepare_enable(host->ciu_clk); 2134f90a0612SThomas Abraham if (ret) { 2135f90a0612SThomas Abraham dev_err(host->dev, "failed to enable ciu clock\n"); 2136f90a0612SThomas Abraham clk_put(host->ciu_clk); 2137f90a0612SThomas Abraham goto err_clk_biu; 2138f90a0612SThomas Abraham } 2139f90a0612SThomas Abraham } 2140f90a0612SThomas Abraham 2141f90a0612SThomas Abraham if (IS_ERR(host->ciu_clk)) 214262ca8034SShashidhar Hiremath host->bus_hz = host->pdata->bus_hz; 2143f90a0612SThomas Abraham else 2144f90a0612SThomas Abraham host->bus_hz = clk_get_rate(host->ciu_clk); 2145f90a0612SThomas Abraham 2146*800d78bfSThomas Abraham if (host->drv_data->setup_clock) { 2147*800d78bfSThomas Abraham ret = host->drv_data->setup_clock(host); 2148*800d78bfSThomas Abraham if (ret) { 2149*800d78bfSThomas Abraham dev_err(host->dev, 2150*800d78bfSThomas Abraham "implementation specific clock setup failed\n"); 2151*800d78bfSThomas Abraham goto err_clk_ciu; 2152*800d78bfSThomas Abraham } 2153*800d78bfSThomas Abraham } 2154*800d78bfSThomas Abraham 2155f90a0612SThomas Abraham if (!host->bus_hz) { 2156f90a0612SThomas Abraham dev_err(host->dev, 2157f90a0612SThomas Abraham "Platform data must supply bus speed\n"); 2158f90a0612SThomas Abraham ret = -ENODEV; 2159f90a0612SThomas Abraham goto err_clk_ciu; 2160f90a0612SThomas Abraham } 2161f90a0612SThomas Abraham 216262ca8034SShashidhar Hiremath host->quirks = host->pdata->quirks; 2163f95f3850SWill Newton 2164f95f3850SWill Newton spin_lock_init(&host->lock); 2165f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 2166f95f3850SWill Newton 2167f95f3850SWill Newton /* 2168f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 2169f95f3850SWill Newton * the correct values. 2170f95f3850SWill Newton */ 2171f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 2172f95f3850SWill Newton if (!i) { 2173f95f3850SWill Newton host->push_data = dw_mci_push_data16; 2174f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 2175f95f3850SWill Newton width = 16; 2176f95f3850SWill Newton host->data_shift = 1; 2177f95f3850SWill Newton } else if (i == 2) { 2178f95f3850SWill Newton host->push_data = dw_mci_push_data64; 2179f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 2180f95f3850SWill Newton width = 64; 2181f95f3850SWill Newton host->data_shift = 3; 2182f95f3850SWill Newton } else { 2183f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 2184f95f3850SWill Newton WARN((i != 1), 2185f95f3850SWill Newton "HCON reports a reserved host data width!\n" 2186f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 2187f95f3850SWill Newton host->push_data = dw_mci_push_data32; 2188f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 2189f95f3850SWill Newton width = 32; 2190f95f3850SWill Newton host->data_shift = 2; 2191f95f3850SWill Newton } 2192f95f3850SWill Newton 2193f95f3850SWill Newton /* Reset all blocks */ 21944a90920cSThomas Abraham if (!mci_wait_reset(host->dev, host)) 2195141a712aSSeungwon Jeon return -ENODEV; 2196141a712aSSeungwon Jeon 2197141a712aSSeungwon Jeon host->dma_ops = host->pdata->dma_ops; 2198141a712aSSeungwon Jeon dw_mci_init_dma(host); 2199f95f3850SWill Newton 2200f95f3850SWill Newton /* Clear the interrupts for the host controller */ 2201f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2202f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2203f95f3850SWill Newton 2204f95f3850SWill Newton /* Put in max timeout */ 2205f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 2206f95f3850SWill Newton 2207f95f3850SWill Newton /* 2208f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 2209f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 2210f95f3850SWill Newton */ 2211b86d8253SJames Hogan if (!host->pdata->fifo_depth) { 2212b86d8253SJames Hogan /* 2213b86d8253SJames Hogan * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may 2214b86d8253SJames Hogan * have been overwritten by the bootloader, just like we're 2215b86d8253SJames Hogan * about to do, so if you know the value for your hardware, you 2216b86d8253SJames Hogan * should put it in the platform data. 2217b86d8253SJames Hogan */ 2218f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 22198234e869SJaehoon Chung fifo_size = 1 + ((fifo_size >> 16) & 0xfff); 2220b86d8253SJames Hogan } else { 2221b86d8253SJames Hogan fifo_size = host->pdata->fifo_depth; 2222b86d8253SJames Hogan } 2223b86d8253SJames Hogan host->fifo_depth = fifo_size; 2224e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 2225e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 2226e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2227f95f3850SWill Newton 2228f95f3850SWill Newton /* disable clock to CIU */ 2229f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2230f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2231f95f3850SWill Newton 2232f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 223395dcc2cbSThomas Abraham host->card_workqueue = alloc_workqueue("dw-mci-card", 22341791b13eSJames Hogan WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); 223595dcc2cbSThomas Abraham if (!host->card_workqueue) 22361791b13eSJames Hogan goto err_dmaunmap; 22371791b13eSJames Hogan INIT_WORK(&host->card_work, dw_mci_work_routine_card); 223862ca8034SShashidhar Hiremath ret = request_irq(host->irq, dw_mci_interrupt, host->irq_flags, "dw-mci", host); 2239f95f3850SWill Newton if (ret) 22401791b13eSJames Hogan goto err_workqueue; 2241f95f3850SWill Newton 2242f95f3850SWill Newton if (host->pdata->num_slots) 2243f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 2244f95f3850SWill Newton else 2245f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 2246f95f3850SWill Newton 2247f95f3850SWill Newton /* We need at least one slot to succeed */ 2248f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2249f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 22501c2215b7SThomas Abraham if (ret) 22511c2215b7SThomas Abraham dev_dbg(host->dev, "slot %d init failed\n", i); 22521c2215b7SThomas Abraham else 22531c2215b7SThomas Abraham init_slots++; 2254f95f3850SWill Newton } 22551c2215b7SThomas Abraham 22561c2215b7SThomas Abraham if (init_slots) { 22571c2215b7SThomas Abraham dev_info(host->dev, "%d slots initialized\n", init_slots); 22581c2215b7SThomas Abraham } else { 22591c2215b7SThomas Abraham dev_dbg(host->dev, "attempted to initialize %d slots, " 22601c2215b7SThomas Abraham "but failed on all\n", host->num_slots); 22611c2215b7SThomas Abraham goto err_init_slot; 2262f95f3850SWill Newton } 2263f95f3850SWill Newton 2264f95f3850SWill Newton /* 22654e0a5adfSJaehoon Chung * In 2.40a spec, Data offset is changed. 22664e0a5adfSJaehoon Chung * Need to check the version-id and set data-offset for DATA register. 22674e0a5adfSJaehoon Chung */ 22684e0a5adfSJaehoon Chung host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); 22694a90920cSThomas Abraham dev_info(host->dev, "Version ID is %04x\n", host->verid); 22704e0a5adfSJaehoon Chung 22714e0a5adfSJaehoon Chung if (host->verid < DW_MMC_240A) 22724e0a5adfSJaehoon Chung host->data_offset = DATA_OFFSET; 22734e0a5adfSJaehoon Chung else 22744e0a5adfSJaehoon Chung host->data_offset = DATA_240A_OFFSET; 22754e0a5adfSJaehoon Chung 22764e0a5adfSJaehoon Chung /* 2277f95f3850SWill Newton * Enable interrupts for command done, data over, data empty, card det, 2278f95f3850SWill Newton * receive ready and error such as transmit, receive timeout, crc error 2279f95f3850SWill Newton */ 2280f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2281f95f3850SWill Newton mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2282f95f3850SWill Newton SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2283f95f3850SWill Newton DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2284f95f3850SWill Newton mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 2285f95f3850SWill Newton 22864a90920cSThomas Abraham dev_info(host->dev, "DW MMC controller at irq %d, " 2287b86d8253SJames Hogan "%d bit host data width, " 2288b86d8253SJames Hogan "%u deep fifo\n", 228962ca8034SShashidhar Hiremath host->irq, width, fifo_size); 2290f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 22914a90920cSThomas Abraham dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); 2292f95f3850SWill Newton 2293f95f3850SWill Newton return 0; 2294f95f3850SWill Newton 2295f95f3850SWill Newton err_init_slot: 229662ca8034SShashidhar Hiremath free_irq(host->irq, host); 2297f95f3850SWill Newton 22981791b13eSJames Hogan err_workqueue: 229995dcc2cbSThomas Abraham destroy_workqueue(host->card_workqueue); 23001791b13eSJames Hogan 2301f95f3850SWill Newton err_dmaunmap: 2302f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2303f95f3850SWill Newton host->dma_ops->exit(host); 23044a90920cSThomas Abraham dma_free_coherent(host->dev, PAGE_SIZE, 2305f95f3850SWill Newton host->sg_cpu, host->sg_dma); 2306f95f3850SWill Newton 2307c07946a3SJaehoon Chung if (host->vmmc) { 2308c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2309c07946a3SJaehoon Chung regulator_put(host->vmmc); 2310c07946a3SJaehoon Chung } 2311f90a0612SThomas Abraham 2312f90a0612SThomas Abraham err_clk_ciu: 2313f90a0612SThomas Abraham if (!IS_ERR(host->ciu_clk)) { 2314f90a0612SThomas Abraham clk_disable_unprepare(host->ciu_clk); 2315f90a0612SThomas Abraham clk_put(host->ciu_clk); 2316f90a0612SThomas Abraham } 2317f90a0612SThomas Abraham err_clk_biu: 2318f90a0612SThomas Abraham if (!IS_ERR(host->biu_clk)) { 2319f90a0612SThomas Abraham clk_disable_unprepare(host->biu_clk); 2320f90a0612SThomas Abraham clk_put(host->biu_clk); 2321f90a0612SThomas Abraham } 2322f95f3850SWill Newton return ret; 2323f95f3850SWill Newton } 232462ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_probe); 2325f95f3850SWill Newton 232662ca8034SShashidhar Hiremath void dw_mci_remove(struct dw_mci *host) 2327f95f3850SWill Newton { 2328f95f3850SWill Newton int i; 2329f95f3850SWill Newton 2330f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2331f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2332f95f3850SWill Newton 2333f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 23344a90920cSThomas Abraham dev_dbg(host->dev, "remove slot %d\n", i); 2335f95f3850SWill Newton if (host->slot[i]) 2336f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2337f95f3850SWill Newton } 2338f95f3850SWill Newton 2339f95f3850SWill Newton /* disable clock to CIU */ 2340f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2341f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2342f95f3850SWill Newton 234362ca8034SShashidhar Hiremath free_irq(host->irq, host); 234495dcc2cbSThomas Abraham destroy_workqueue(host->card_workqueue); 23454a90920cSThomas Abraham dma_free_coherent(host->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); 2346f95f3850SWill Newton 2347f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2348f95f3850SWill Newton host->dma_ops->exit(host); 2349f95f3850SWill Newton 2350c07946a3SJaehoon Chung if (host->vmmc) { 2351c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2352c07946a3SJaehoon Chung regulator_put(host->vmmc); 2353c07946a3SJaehoon Chung } 2354c07946a3SJaehoon Chung 2355f90a0612SThomas Abraham if (!IS_ERR(host->ciu_clk)) 2356f90a0612SThomas Abraham clk_disable_unprepare(host->ciu_clk); 2357f90a0612SThomas Abraham if (!IS_ERR(host->biu_clk)) 2358f90a0612SThomas Abraham clk_disable_unprepare(host->biu_clk); 2359f90a0612SThomas Abraham clk_put(host->ciu_clk); 2360f90a0612SThomas Abraham clk_put(host->biu_clk); 2361f95f3850SWill Newton } 236262ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_remove); 236362ca8034SShashidhar Hiremath 236462ca8034SShashidhar Hiremath 2365f95f3850SWill Newton 23666fe8890dSJaehoon Chung #ifdef CONFIG_PM_SLEEP 2367f95f3850SWill Newton /* 2368f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 2369f95f3850SWill Newton */ 237062ca8034SShashidhar Hiremath int dw_mci_suspend(struct dw_mci *host) 2371f95f3850SWill Newton { 237262ca8034SShashidhar Hiremath int i, ret = 0; 2373f95f3850SWill Newton 2374f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2375f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2376f95f3850SWill Newton if (!slot) 2377f95f3850SWill Newton continue; 2378f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 2379f95f3850SWill Newton if (ret < 0) { 2380f95f3850SWill Newton while (--i >= 0) { 2381f95f3850SWill Newton slot = host->slot[i]; 2382f95f3850SWill Newton if (slot) 2383f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 2384f95f3850SWill Newton } 2385f95f3850SWill Newton return ret; 2386f95f3850SWill Newton } 2387f95f3850SWill Newton } 2388f95f3850SWill Newton 2389c07946a3SJaehoon Chung if (host->vmmc) 2390c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2391c07946a3SJaehoon Chung 2392f95f3850SWill Newton return 0; 2393f95f3850SWill Newton } 239462ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_suspend); 2395f95f3850SWill Newton 239662ca8034SShashidhar Hiremath int dw_mci_resume(struct dw_mci *host) 2397f95f3850SWill Newton { 2398f95f3850SWill Newton int i, ret; 2399f95f3850SWill Newton 24001d6c4e0aSJaehoon Chung if (host->vmmc) 24011d6c4e0aSJaehoon Chung regulator_enable(host->vmmc); 24021d6c4e0aSJaehoon Chung 24034a90920cSThomas Abraham if (!mci_wait_reset(host->dev, host)) { 2404e61cf118SJaehoon Chung ret = -ENODEV; 2405e61cf118SJaehoon Chung return ret; 2406e61cf118SJaehoon Chung } 2407e61cf118SJaehoon Chung 24083bfe619dSJonathan Kliegman if (host->use_dma && host->dma_ops->init) 2409141a712aSSeungwon Jeon host->dma_ops->init(host); 2410141a712aSSeungwon Jeon 2411e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 2412e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2413e61cf118SJaehoon Chung 2414e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 2415e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2416e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2417e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2418e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 2419e61cf118SJaehoon Chung 2420f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2421f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2422f95f3850SWill Newton if (!slot) 2423f95f3850SWill Newton continue; 2424f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 2425f95f3850SWill Newton if (ret < 0) 2426f95f3850SWill Newton return ret; 2427f95f3850SWill Newton } 2428f95f3850SWill Newton return 0; 2429f95f3850SWill Newton } 243062ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_resume); 24316fe8890dSJaehoon Chung #endif /* CONFIG_PM_SLEEP */ 24326fe8890dSJaehoon Chung 2433f95f3850SWill Newton static int __init dw_mci_init(void) 2434f95f3850SWill Newton { 243562ca8034SShashidhar Hiremath printk(KERN_INFO "Synopsys Designware Multimedia Card Interface Driver"); 243662ca8034SShashidhar Hiremath return 0; 2437f95f3850SWill Newton } 2438f95f3850SWill Newton 2439f95f3850SWill Newton static void __exit dw_mci_exit(void) 2440f95f3850SWill Newton { 2441f95f3850SWill Newton } 2442f95f3850SWill Newton 2443f95f3850SWill Newton module_init(dw_mci_init); 2444f95f3850SWill Newton module_exit(dw_mci_exit); 2445f95f3850SWill Newton 2446f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 2447f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 2448f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 2449f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 2450