1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/scatterlist.h> 26f95f3850SWill Newton #include <linux/seq_file.h> 27f95f3850SWill Newton #include <linux/slab.h> 28f95f3850SWill Newton #include <linux/stat.h> 29f95f3850SWill Newton #include <linux/delay.h> 30f95f3850SWill Newton #include <linux/irq.h> 31f95f3850SWill Newton #include <linux/mmc/host.h> 32f95f3850SWill Newton #include <linux/mmc/mmc.h> 33f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 34f95f3850SWill Newton #include <linux/bitops.h> 35c07946a3SJaehoon Chung #include <linux/regulator/consumer.h> 361791b13eSJames Hogan #include <linux/workqueue.h> 37f95f3850SWill Newton 38f95f3850SWill Newton #include "dw_mmc.h" 39f95f3850SWill Newton 40f95f3850SWill Newton /* Common flag combinations */ 41f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 42f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 43f95f3850SWill Newton SDMMC_INT_EBE) 44f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 45f95f3850SWill Newton SDMMC_INT_RESP_ERR) 46f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 47f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 48f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 49f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 50f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 51f95f3850SWill Newton 52f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 53f95f3850SWill Newton struct idmac_desc { 54f95f3850SWill Newton u32 des0; /* Control Descriptor */ 55f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 56f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 57f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 58f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 59f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 60f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 61f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 62f95f3850SWill Newton 63f95f3850SWill Newton u32 des1; /* Buffer sizes */ 64f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 659b7bbe10SShashidhar Hiremath ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) 66f95f3850SWill Newton 67f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 68f95f3850SWill Newton 69f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 70f95f3850SWill Newton }; 71f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 72f95f3850SWill Newton 73f95f3850SWill Newton /** 74f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 75f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 76f95f3850SWill Newton * @host: The MMC controller this slot is using. 77f95f3850SWill Newton * @ctype: Card type for this slot. 78f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 79f95f3850SWill Newton * processed, or NULL when the slot is idle. 80f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 81f95f3850SWill Newton * &struct dw_mci. 82f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 83f95f3850SWill Newton * @flags: Random state bits associated with the slot. 84f95f3850SWill Newton * @id: Number of this slot. 85f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 86f95f3850SWill Newton */ 87f95f3850SWill Newton struct dw_mci_slot { 88f95f3850SWill Newton struct mmc_host *mmc; 89f95f3850SWill Newton struct dw_mci *host; 90f95f3850SWill Newton 91f95f3850SWill Newton u32 ctype; 92f95f3850SWill Newton 93f95f3850SWill Newton struct mmc_request *mrq; 94f95f3850SWill Newton struct list_head queue_node; 95f95f3850SWill Newton 96f95f3850SWill Newton unsigned int clock; 97f95f3850SWill Newton unsigned long flags; 98f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 99f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 100f95f3850SWill Newton int id; 101f95f3850SWill Newton int last_detect_state; 102f95f3850SWill Newton }; 103f95f3850SWill Newton 1041791b13eSJames Hogan static struct workqueue_struct *dw_mci_card_workqueue; 1051791b13eSJames Hogan 106f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 107f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 108f95f3850SWill Newton { 109f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 110f95f3850SWill Newton struct mmc_request *mrq; 111f95f3850SWill Newton struct mmc_command *cmd; 112f95f3850SWill Newton struct mmc_command *stop; 113f95f3850SWill Newton struct mmc_data *data; 114f95f3850SWill Newton 115f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 116f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 117f95f3850SWill Newton mrq = slot->mrq; 118f95f3850SWill Newton 119f95f3850SWill Newton if (mrq) { 120f95f3850SWill Newton cmd = mrq->cmd; 121f95f3850SWill Newton data = mrq->data; 122f95f3850SWill Newton stop = mrq->stop; 123f95f3850SWill Newton 124f95f3850SWill Newton if (cmd) 125f95f3850SWill Newton seq_printf(s, 126f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 127f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 128f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 129f95f3850SWill Newton cmd->resp[2], cmd->error); 130f95f3850SWill Newton if (data) 131f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 132f95f3850SWill Newton data->bytes_xfered, data->blocks, 133f95f3850SWill Newton data->blksz, data->flags, data->error); 134f95f3850SWill Newton if (stop) 135f95f3850SWill Newton seq_printf(s, 136f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 137f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 138f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 139f95f3850SWill Newton stop->resp[2], stop->error); 140f95f3850SWill Newton } 141f95f3850SWill Newton 142f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 143f95f3850SWill Newton 144f95f3850SWill Newton return 0; 145f95f3850SWill Newton } 146f95f3850SWill Newton 147f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 148f95f3850SWill Newton { 149f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 150f95f3850SWill Newton } 151f95f3850SWill Newton 152f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 153f95f3850SWill Newton .owner = THIS_MODULE, 154f95f3850SWill Newton .open = dw_mci_req_open, 155f95f3850SWill Newton .read = seq_read, 156f95f3850SWill Newton .llseek = seq_lseek, 157f95f3850SWill Newton .release = single_release, 158f95f3850SWill Newton }; 159f95f3850SWill Newton 160f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 161f95f3850SWill Newton { 162f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 163f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 164f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 165f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 166f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 167f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 168f95f3850SWill Newton 169f95f3850SWill Newton return 0; 170f95f3850SWill Newton } 171f95f3850SWill Newton 172f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 173f95f3850SWill Newton { 174f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 175f95f3850SWill Newton } 176f95f3850SWill Newton 177f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 178f95f3850SWill Newton .owner = THIS_MODULE, 179f95f3850SWill Newton .open = dw_mci_regs_open, 180f95f3850SWill Newton .read = seq_read, 181f95f3850SWill Newton .llseek = seq_lseek, 182f95f3850SWill Newton .release = single_release, 183f95f3850SWill Newton }; 184f95f3850SWill Newton 185f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 186f95f3850SWill Newton { 187f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 188f95f3850SWill Newton struct dw_mci *host = slot->host; 189f95f3850SWill Newton struct dentry *root; 190f95f3850SWill Newton struct dentry *node; 191f95f3850SWill Newton 192f95f3850SWill Newton root = mmc->debugfs_root; 193f95f3850SWill Newton if (!root) 194f95f3850SWill Newton return; 195f95f3850SWill Newton 196f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 197f95f3850SWill Newton &dw_mci_regs_fops); 198f95f3850SWill Newton if (!node) 199f95f3850SWill Newton goto err; 200f95f3850SWill Newton 201f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 202f95f3850SWill Newton &dw_mci_req_fops); 203f95f3850SWill Newton if (!node) 204f95f3850SWill Newton goto err; 205f95f3850SWill Newton 206f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 207f95f3850SWill Newton if (!node) 208f95f3850SWill Newton goto err; 209f95f3850SWill Newton 210f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 211f95f3850SWill Newton (u32 *)&host->pending_events); 212f95f3850SWill Newton if (!node) 213f95f3850SWill Newton goto err; 214f95f3850SWill Newton 215f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 216f95f3850SWill Newton (u32 *)&host->completed_events); 217f95f3850SWill Newton if (!node) 218f95f3850SWill Newton goto err; 219f95f3850SWill Newton 220f95f3850SWill Newton return; 221f95f3850SWill Newton 222f95f3850SWill Newton err: 223f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 224f95f3850SWill Newton } 225f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 226f95f3850SWill Newton 227f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 228f95f3850SWill Newton { 229f95f3850SWill Newton /* timeout (maximum) */ 230f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 231f95f3850SWill Newton } 232f95f3850SWill Newton 233f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 234f95f3850SWill Newton { 235f95f3850SWill Newton struct mmc_data *data; 236f95f3850SWill Newton u32 cmdr; 237f95f3850SWill Newton cmd->error = -EINPROGRESS; 238f95f3850SWill Newton 239f95f3850SWill Newton cmdr = cmd->opcode; 240f95f3850SWill Newton 241f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 242f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 243f95f3850SWill Newton else 244f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 245f95f3850SWill Newton 246f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 247f95f3850SWill Newton /* We expect a response, so set this bit */ 248f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 249f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 250f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 251f95f3850SWill Newton } 252f95f3850SWill Newton 253f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 254f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 255f95f3850SWill Newton 256f95f3850SWill Newton data = cmd->data; 257f95f3850SWill Newton if (data) { 258f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 259f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 260f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 261f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 262f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 263f95f3850SWill Newton } 264f95f3850SWill Newton 265f95f3850SWill Newton return cmdr; 266f95f3850SWill Newton } 267f95f3850SWill Newton 268f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 269f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 270f95f3850SWill Newton { 271f95f3850SWill Newton host->cmd = cmd; 272f95f3850SWill Newton dev_vdbg(&host->pdev->dev, 273f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 274f95f3850SWill Newton cmd->arg, cmd_flags); 275f95f3850SWill Newton 276f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 277f95f3850SWill Newton wmb(); 278f95f3850SWill Newton 279f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 280f95f3850SWill Newton } 281f95f3850SWill Newton 282f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 283f95f3850SWill Newton { 284f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 285f95f3850SWill Newton } 286f95f3850SWill Newton 287f95f3850SWill Newton /* DMA interface functions */ 288f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 289f95f3850SWill Newton { 29003e8cb53SJames Hogan if (host->using_dma) { 291f95f3850SWill Newton host->dma_ops->stop(host); 292f95f3850SWill Newton host->dma_ops->cleanup(host); 293f95f3850SWill Newton } else { 294f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 295f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 296f95f3850SWill Newton } 297f95f3850SWill Newton } 298f95f3850SWill Newton 299f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 300f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 301f95f3850SWill Newton { 302f95f3850SWill Newton struct mmc_data *data = host->data; 303f95f3850SWill Newton 304f95f3850SWill Newton if (data) 305f95f3850SWill Newton dma_unmap_sg(&host->pdev->dev, data->sg, data->sg_len, 306f95f3850SWill Newton ((data->flags & MMC_DATA_WRITE) 307f95f3850SWill Newton ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 308f95f3850SWill Newton } 309f95f3850SWill Newton 310f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 311f95f3850SWill Newton { 312f95f3850SWill Newton u32 temp; 313f95f3850SWill Newton 314f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 315f95f3850SWill Newton temp = mci_readl(host, CTRL); 316f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 317f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 318f95f3850SWill Newton mci_writel(host, CTRL, temp); 319f95f3850SWill Newton 320f95f3850SWill Newton /* Stop the IDMAC running */ 321f95f3850SWill Newton temp = mci_readl(host, BMOD); 322a5289a43SJaehoon Chung temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB); 323f95f3850SWill Newton mci_writel(host, BMOD, temp); 324f95f3850SWill Newton } 325f95f3850SWill Newton 326f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 327f95f3850SWill Newton { 328f95f3850SWill Newton struct mmc_data *data = host->data; 329f95f3850SWill Newton 330f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "DMA complete\n"); 331f95f3850SWill Newton 332f95f3850SWill Newton host->dma_ops->cleanup(host); 333f95f3850SWill Newton 334f95f3850SWill Newton /* 335f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 336f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 337f95f3850SWill Newton */ 338f95f3850SWill Newton if (data) { 339f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 340f95f3850SWill Newton tasklet_schedule(&host->tasklet); 341f95f3850SWill Newton } 342f95f3850SWill Newton } 343f95f3850SWill Newton 344f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 345f95f3850SWill Newton unsigned int sg_len) 346f95f3850SWill Newton { 347f95f3850SWill Newton int i; 348f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 349f95f3850SWill Newton 350f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 351f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 352f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 353f95f3850SWill Newton 354f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 355f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 356f95f3850SWill Newton 357f95f3850SWill Newton /* Buffer length */ 358f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 359f95f3850SWill Newton 360f95f3850SWill Newton /* Physical address to DMA to/from */ 361f95f3850SWill Newton desc->des2 = mem_addr; 362f95f3850SWill Newton } 363f95f3850SWill Newton 364f95f3850SWill Newton /* Set first descriptor */ 365f95f3850SWill Newton desc = host->sg_cpu; 366f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 367f95f3850SWill Newton 368f95f3850SWill Newton /* Set last descriptor */ 369f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 370f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 371f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 372f95f3850SWill Newton 373f95f3850SWill Newton wmb(); 374f95f3850SWill Newton } 375f95f3850SWill Newton 376f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 377f95f3850SWill Newton { 378f95f3850SWill Newton u32 temp; 379f95f3850SWill Newton 380f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 381f95f3850SWill Newton 382f95f3850SWill Newton /* Select IDMAC interface */ 383f95f3850SWill Newton temp = mci_readl(host, CTRL); 384f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 385f95f3850SWill Newton mci_writel(host, CTRL, temp); 386f95f3850SWill Newton 387f95f3850SWill Newton wmb(); 388f95f3850SWill Newton 389f95f3850SWill Newton /* Enable the IDMAC */ 390f95f3850SWill Newton temp = mci_readl(host, BMOD); 391a5289a43SJaehoon Chung temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB; 392f95f3850SWill Newton mci_writel(host, BMOD, temp); 393f95f3850SWill Newton 394f95f3850SWill Newton /* Start it running */ 395f95f3850SWill Newton mci_writel(host, PLDMND, 1); 396f95f3850SWill Newton } 397f95f3850SWill Newton 398f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 399f95f3850SWill Newton { 400f95f3850SWill Newton struct idmac_desc *p; 401f95f3850SWill Newton int i; 402f95f3850SWill Newton 403f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 404f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 405f95f3850SWill Newton 406f95f3850SWill Newton /* Forward link the descriptor list */ 407f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 408f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 409f95f3850SWill Newton 410f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 411f95f3850SWill Newton p->des3 = host->sg_dma; 412f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 413f95f3850SWill Newton 414f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 415f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 416f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 417f95f3850SWill Newton 418f95f3850SWill Newton /* Set the descriptor base address */ 419f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 420f95f3850SWill Newton return 0; 421f95f3850SWill Newton } 422f95f3850SWill Newton 423f95f3850SWill Newton static struct dw_mci_dma_ops dw_mci_idmac_ops = { 424f95f3850SWill Newton .init = dw_mci_idmac_init, 425f95f3850SWill Newton .start = dw_mci_idmac_start_dma, 426f95f3850SWill Newton .stop = dw_mci_idmac_stop_dma, 427f95f3850SWill Newton .complete = dw_mci_idmac_complete_dma, 428f95f3850SWill Newton .cleanup = dw_mci_dma_cleanup, 429f95f3850SWill Newton }; 430f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 431f95f3850SWill Newton 432f95f3850SWill Newton static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 433f95f3850SWill Newton { 434f95f3850SWill Newton struct scatterlist *sg; 435f95f3850SWill Newton unsigned int i, direction, sg_len; 436f95f3850SWill Newton u32 temp; 437f95f3850SWill Newton 43803e8cb53SJames Hogan host->using_dma = 0; 43903e8cb53SJames Hogan 440f95f3850SWill Newton /* If we don't have a channel, we can't do DMA */ 441f95f3850SWill Newton if (!host->use_dma) 442f95f3850SWill Newton return -ENODEV; 443f95f3850SWill Newton 444f95f3850SWill Newton /* 445f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 446f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 447f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 448f95f3850SWill Newton */ 449f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 450f95f3850SWill Newton return -EINVAL; 451f95f3850SWill Newton if (data->blksz & 3) 452f95f3850SWill Newton return -EINVAL; 453f95f3850SWill Newton 454f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 455f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 456f95f3850SWill Newton return -EINVAL; 457f95f3850SWill Newton } 458f95f3850SWill Newton 45903e8cb53SJames Hogan host->using_dma = 1; 46003e8cb53SJames Hogan 461f95f3850SWill Newton if (data->flags & MMC_DATA_READ) 462f95f3850SWill Newton direction = DMA_FROM_DEVICE; 463f95f3850SWill Newton else 464f95f3850SWill Newton direction = DMA_TO_DEVICE; 465f95f3850SWill Newton 466f95f3850SWill Newton sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, 467f95f3850SWill Newton direction); 468f95f3850SWill Newton 469f95f3850SWill Newton dev_vdbg(&host->pdev->dev, 470f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 471f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 472f95f3850SWill Newton sg_len); 473f95f3850SWill Newton 474f95f3850SWill Newton /* Enable the DMA interface */ 475f95f3850SWill Newton temp = mci_readl(host, CTRL); 476f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 477f95f3850SWill Newton mci_writel(host, CTRL, temp); 478f95f3850SWill Newton 479f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 480f95f3850SWill Newton temp = mci_readl(host, INTMASK); 481f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 482f95f3850SWill Newton mci_writel(host, INTMASK, temp); 483f95f3850SWill Newton 484f95f3850SWill Newton host->dma_ops->start(host, sg_len); 485f95f3850SWill Newton 486f95f3850SWill Newton return 0; 487f95f3850SWill Newton } 488f95f3850SWill Newton 489f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 490f95f3850SWill Newton { 491f95f3850SWill Newton u32 temp; 492f95f3850SWill Newton 493f95f3850SWill Newton data->error = -EINPROGRESS; 494f95f3850SWill Newton 495f95f3850SWill Newton WARN_ON(host->data); 496f95f3850SWill Newton host->sg = NULL; 497f95f3850SWill Newton host->data = data; 498f95f3850SWill Newton 49955c5efbcSJames Hogan if (data->flags & MMC_DATA_READ) 50055c5efbcSJames Hogan host->dir_status = DW_MCI_RECV_STATUS; 50155c5efbcSJames Hogan else 50255c5efbcSJames Hogan host->dir_status = DW_MCI_SEND_STATUS; 50355c5efbcSJames Hogan 504f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 505f95f3850SWill Newton host->sg = data->sg; 506f95f3850SWill Newton host->pio_offset = 0; 50734b664a2SJames Hogan host->part_buf_start = 0; 50834b664a2SJames Hogan host->part_buf_count = 0; 509f95f3850SWill Newton 510b40af3aaSJames Hogan mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); 511f95f3850SWill Newton temp = mci_readl(host, INTMASK); 512f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 513f95f3850SWill Newton mci_writel(host, INTMASK, temp); 514f95f3850SWill Newton 515f95f3850SWill Newton temp = mci_readl(host, CTRL); 516f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 517f95f3850SWill Newton mci_writel(host, CTRL, temp); 518f95f3850SWill Newton } 519f95f3850SWill Newton } 520f95f3850SWill Newton 521f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 522f95f3850SWill Newton { 523f95f3850SWill Newton struct dw_mci *host = slot->host; 524f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 525f95f3850SWill Newton unsigned int cmd_status = 0; 526f95f3850SWill Newton 527f95f3850SWill Newton mci_writel(host, CMDARG, arg); 528f95f3850SWill Newton wmb(); 529f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 530f95f3850SWill Newton 531f95f3850SWill Newton while (time_before(jiffies, timeout)) { 532f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 533f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 534f95f3850SWill Newton return; 535f95f3850SWill Newton } 536f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 537f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 538f95f3850SWill Newton cmd, arg, cmd_status); 539f95f3850SWill Newton } 540f95f3850SWill Newton 541f95f3850SWill Newton static void dw_mci_setup_bus(struct dw_mci_slot *slot) 542f95f3850SWill Newton { 543f95f3850SWill Newton struct dw_mci *host = slot->host; 544f95f3850SWill Newton u32 div; 545f95f3850SWill Newton 546f95f3850SWill Newton if (slot->clock != host->current_speed) { 547f95f3850SWill Newton if (host->bus_hz % slot->clock) 548f95f3850SWill Newton /* 549f95f3850SWill Newton * move the + 1 after the divide to prevent 550f95f3850SWill Newton * over-clocking the card. 551f95f3850SWill Newton */ 552f95f3850SWill Newton div = ((host->bus_hz / slot->clock) >> 1) + 1; 553f95f3850SWill Newton else 554f95f3850SWill Newton div = (host->bus_hz / slot->clock) >> 1; 555f95f3850SWill Newton 556f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 557f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 558f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 559f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 560f95f3850SWill Newton 561f95f3850SWill Newton /* disable clock */ 562f95f3850SWill Newton mci_writel(host, CLKENA, 0); 563f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 564f95f3850SWill Newton 565f95f3850SWill Newton /* inform CIU */ 566f95f3850SWill Newton mci_send_cmd(slot, 567f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 568f95f3850SWill Newton 569f95f3850SWill Newton /* set clock to desired speed */ 570f95f3850SWill Newton mci_writel(host, CLKDIV, div); 571f95f3850SWill Newton 572f95f3850SWill Newton /* inform CIU */ 573f95f3850SWill Newton mci_send_cmd(slot, 574f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 575f95f3850SWill Newton 576f95f3850SWill Newton /* enable clock */ 577aadb9f41SWill Newton mci_writel(host, CLKENA, SDMMC_CLKEN_ENABLE | 578aadb9f41SWill Newton SDMMC_CLKEN_LOW_PWR); 579f95f3850SWill Newton 580f95f3850SWill Newton /* inform CIU */ 581f95f3850SWill Newton mci_send_cmd(slot, 582f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 583f95f3850SWill Newton 584f95f3850SWill Newton host->current_speed = slot->clock; 585f95f3850SWill Newton } 586f95f3850SWill Newton 587f95f3850SWill Newton /* Set the current slot bus width */ 5881d56c453SSeungwon Jeon mci_writel(host, CTYPE, (slot->ctype << slot->id)); 589f95f3850SWill Newton } 590f95f3850SWill Newton 591f95f3850SWill Newton static void dw_mci_start_request(struct dw_mci *host, 592f95f3850SWill Newton struct dw_mci_slot *slot) 593f95f3850SWill Newton { 594f95f3850SWill Newton struct mmc_request *mrq; 595f95f3850SWill Newton struct mmc_command *cmd; 596f95f3850SWill Newton struct mmc_data *data; 597f95f3850SWill Newton u32 cmdflags; 598f95f3850SWill Newton 599f95f3850SWill Newton mrq = slot->mrq; 600f95f3850SWill Newton if (host->pdata->select_slot) 601f95f3850SWill Newton host->pdata->select_slot(slot->id); 602f95f3850SWill Newton 603f95f3850SWill Newton /* Slot specific timing and width adjustment */ 604f95f3850SWill Newton dw_mci_setup_bus(slot); 605f95f3850SWill Newton 606f95f3850SWill Newton host->cur_slot = slot; 607f95f3850SWill Newton host->mrq = mrq; 608f95f3850SWill Newton 609f95f3850SWill Newton host->pending_events = 0; 610f95f3850SWill Newton host->completed_events = 0; 611f95f3850SWill Newton host->data_status = 0; 612f95f3850SWill Newton 613f95f3850SWill Newton data = mrq->data; 614f95f3850SWill Newton if (data) { 615f95f3850SWill Newton dw_mci_set_timeout(host); 616f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 617f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 618f95f3850SWill Newton } 619f95f3850SWill Newton 620f95f3850SWill Newton cmd = mrq->cmd; 621f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 622f95f3850SWill Newton 623f95f3850SWill Newton /* this is the first command, send the initialization clock */ 624f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 625f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 626f95f3850SWill Newton 627f95f3850SWill Newton if (data) { 628f95f3850SWill Newton dw_mci_submit_data(host, data); 629f95f3850SWill Newton wmb(); 630f95f3850SWill Newton } 631f95f3850SWill Newton 632f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 633f95f3850SWill Newton 634f95f3850SWill Newton if (mrq->stop) 635f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 636f95f3850SWill Newton } 637f95f3850SWill Newton 6387456caaeSJames Hogan /* must be called with host->lock held */ 639f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 640f95f3850SWill Newton struct mmc_request *mrq) 641f95f3850SWill Newton { 642f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 643f95f3850SWill Newton host->state); 644f95f3850SWill Newton 645f95f3850SWill Newton slot->mrq = mrq; 646f95f3850SWill Newton 647f95f3850SWill Newton if (host->state == STATE_IDLE) { 648f95f3850SWill Newton host->state = STATE_SENDING_CMD; 649f95f3850SWill Newton dw_mci_start_request(host, slot); 650f95f3850SWill Newton } else { 651f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 652f95f3850SWill Newton } 653f95f3850SWill Newton } 654f95f3850SWill Newton 655f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 656f95f3850SWill Newton { 657f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 658f95f3850SWill Newton struct dw_mci *host = slot->host; 659f95f3850SWill Newton 660f95f3850SWill Newton WARN_ON(slot->mrq); 661f95f3850SWill Newton 6627456caaeSJames Hogan /* 6637456caaeSJames Hogan * The check for card presence and queueing of the request must be 6647456caaeSJames Hogan * atomic, otherwise the card could be removed in between and the 6657456caaeSJames Hogan * request wouldn't fail until another card was inserted. 6667456caaeSJames Hogan */ 6677456caaeSJames Hogan spin_lock_bh(&host->lock); 6687456caaeSJames Hogan 669f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 6707456caaeSJames Hogan spin_unlock_bh(&host->lock); 671f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 672f95f3850SWill Newton mmc_request_done(mmc, mrq); 673f95f3850SWill Newton return; 674f95f3850SWill Newton } 675f95f3850SWill Newton 676f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 6777456caaeSJames Hogan 6787456caaeSJames Hogan spin_unlock_bh(&host->lock); 679f95f3850SWill Newton } 680f95f3850SWill Newton 681f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 682f95f3850SWill Newton { 683f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 68441babf75SJaehoon Chung u32 regs; 685f95f3850SWill Newton 686f95f3850SWill Newton /* set default 1 bit mode */ 687f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 688f95f3850SWill Newton 689f95f3850SWill Newton switch (ios->bus_width) { 690f95f3850SWill Newton case MMC_BUS_WIDTH_1: 691f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 692f95f3850SWill Newton break; 693f95f3850SWill Newton case MMC_BUS_WIDTH_4: 694f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 695f95f3850SWill Newton break; 696c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 697c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 698c9b2a06fSJaehoon Chung break; 699f95f3850SWill Newton } 700f95f3850SWill Newton 70141babf75SJaehoon Chung /* DDR mode set */ 7026daa7778SSeungwon Jeon if (ios->timing == MMC_TIMING_UHS_DDR50) { 70341babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 70441babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 70541babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 70641babf75SJaehoon Chung } 70741babf75SJaehoon Chung 708f95f3850SWill Newton if (ios->clock) { 709f95f3850SWill Newton /* 710f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 711f95f3850SWill Newton * core ios update when finding the minimum. 712f95f3850SWill Newton */ 713f95f3850SWill Newton slot->clock = ios->clock; 714f95f3850SWill Newton } 715f95f3850SWill Newton 716f95f3850SWill Newton switch (ios->power_mode) { 717f95f3850SWill Newton case MMC_POWER_UP: 718f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 719f95f3850SWill Newton break; 720f95f3850SWill Newton default: 721f95f3850SWill Newton break; 722f95f3850SWill Newton } 723f95f3850SWill Newton } 724f95f3850SWill Newton 725f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 726f95f3850SWill Newton { 727f95f3850SWill Newton int read_only; 728f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 729f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 730f95f3850SWill Newton 731f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 732f95f3850SWill Newton if (brd->get_ro) 733f95f3850SWill Newton read_only = brd->get_ro(slot->id); 734f95f3850SWill Newton else 735f95f3850SWill Newton read_only = 736f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 737f95f3850SWill Newton 738f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 739f95f3850SWill Newton read_only ? "read-only" : "read-write"); 740f95f3850SWill Newton 741f95f3850SWill Newton return read_only; 742f95f3850SWill Newton } 743f95f3850SWill Newton 744f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 745f95f3850SWill Newton { 746f95f3850SWill Newton int present; 747f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 748f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 749f95f3850SWill Newton 750f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 751fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 752fc3d7720SJaehoon Chung present = 1; 753fc3d7720SJaehoon Chung else if (brd->get_cd) 754f95f3850SWill Newton present = !brd->get_cd(slot->id); 755f95f3850SWill Newton else 756f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 757f95f3850SWill Newton == 0 ? 1 : 0; 758f95f3850SWill Newton 759f95f3850SWill Newton if (present) 760f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 761f95f3850SWill Newton else 762f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 763f95f3850SWill Newton 764f95f3850SWill Newton return present; 765f95f3850SWill Newton } 766f95f3850SWill Newton 7671a5c8e1fSShashidhar Hiremath static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) 7681a5c8e1fSShashidhar Hiremath { 7691a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = mmc_priv(mmc); 7701a5c8e1fSShashidhar Hiremath struct dw_mci *host = slot->host; 7711a5c8e1fSShashidhar Hiremath u32 int_mask; 7721a5c8e1fSShashidhar Hiremath 7731a5c8e1fSShashidhar Hiremath /* Enable/disable Slot Specific SDIO interrupt */ 7741a5c8e1fSShashidhar Hiremath int_mask = mci_readl(host, INTMASK); 7751a5c8e1fSShashidhar Hiremath if (enb) { 7761a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 7771a5c8e1fSShashidhar Hiremath (int_mask | (1 << SDMMC_INT_SDIO(slot->id)))); 7781a5c8e1fSShashidhar Hiremath } else { 7791a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 7801a5c8e1fSShashidhar Hiremath (int_mask & ~(1 << SDMMC_INT_SDIO(slot->id)))); 7811a5c8e1fSShashidhar Hiremath } 7821a5c8e1fSShashidhar Hiremath } 7831a5c8e1fSShashidhar Hiremath 784f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 785f95f3850SWill Newton .request = dw_mci_request, 786f95f3850SWill Newton .set_ios = dw_mci_set_ios, 787f95f3850SWill Newton .get_ro = dw_mci_get_ro, 788f95f3850SWill Newton .get_cd = dw_mci_get_cd, 7891a5c8e1fSShashidhar Hiremath .enable_sdio_irq = dw_mci_enable_sdio_irq, 790f95f3850SWill Newton }; 791f95f3850SWill Newton 792f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 793f95f3850SWill Newton __releases(&host->lock) 794f95f3850SWill Newton __acquires(&host->lock) 795f95f3850SWill Newton { 796f95f3850SWill Newton struct dw_mci_slot *slot; 797f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 798f95f3850SWill Newton 799f95f3850SWill Newton WARN_ON(host->cmd || host->data); 800f95f3850SWill Newton 801f95f3850SWill Newton host->cur_slot->mrq = NULL; 802f95f3850SWill Newton host->mrq = NULL; 803f95f3850SWill Newton if (!list_empty(&host->queue)) { 804f95f3850SWill Newton slot = list_entry(host->queue.next, 805f95f3850SWill Newton struct dw_mci_slot, queue_node); 806f95f3850SWill Newton list_del(&slot->queue_node); 807f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n", 808f95f3850SWill Newton mmc_hostname(slot->mmc)); 809f95f3850SWill Newton host->state = STATE_SENDING_CMD; 810f95f3850SWill Newton dw_mci_start_request(host, slot); 811f95f3850SWill Newton } else { 812f95f3850SWill Newton dev_vdbg(&host->pdev->dev, "list empty\n"); 813f95f3850SWill Newton host->state = STATE_IDLE; 814f95f3850SWill Newton } 815f95f3850SWill Newton 816f95f3850SWill Newton spin_unlock(&host->lock); 817f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 818f95f3850SWill Newton spin_lock(&host->lock); 819f95f3850SWill Newton } 820f95f3850SWill Newton 821f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 822f95f3850SWill Newton { 823f95f3850SWill Newton u32 status = host->cmd_status; 824f95f3850SWill Newton 825f95f3850SWill Newton host->cmd_status = 0; 826f95f3850SWill Newton 827f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 828f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 829f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 830f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 831f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 832f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 833f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 834f95f3850SWill Newton } else { 835f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 836f95f3850SWill Newton cmd->resp[1] = 0; 837f95f3850SWill Newton cmd->resp[2] = 0; 838f95f3850SWill Newton cmd->resp[3] = 0; 839f95f3850SWill Newton } 840f95f3850SWill Newton } 841f95f3850SWill Newton 842f95f3850SWill Newton if (status & SDMMC_INT_RTO) 843f95f3850SWill Newton cmd->error = -ETIMEDOUT; 844f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 845f95f3850SWill Newton cmd->error = -EILSEQ; 846f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 847f95f3850SWill Newton cmd->error = -EIO; 848f95f3850SWill Newton else 849f95f3850SWill Newton cmd->error = 0; 850f95f3850SWill Newton 851f95f3850SWill Newton if (cmd->error) { 852f95f3850SWill Newton /* newer ip versions need a delay between retries */ 853f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 854f95f3850SWill Newton mdelay(20); 855f95f3850SWill Newton 856f95f3850SWill Newton if (cmd->data) { 857f95f3850SWill Newton host->data = NULL; 858f95f3850SWill Newton dw_mci_stop_dma(host); 859f95f3850SWill Newton } 860f95f3850SWill Newton } 861f95f3850SWill Newton } 862f95f3850SWill Newton 863f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 864f95f3850SWill Newton { 865f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 866f95f3850SWill Newton struct mmc_data *data; 867f95f3850SWill Newton struct mmc_command *cmd; 868f95f3850SWill Newton enum dw_mci_state state; 869f95f3850SWill Newton enum dw_mci_state prev_state; 87094dd5b33SJames Hogan u32 status, ctrl; 871f95f3850SWill Newton 872f95f3850SWill Newton spin_lock(&host->lock); 873f95f3850SWill Newton 874f95f3850SWill Newton state = host->state; 875f95f3850SWill Newton data = host->data; 876f95f3850SWill Newton 877f95f3850SWill Newton do { 878f95f3850SWill Newton prev_state = state; 879f95f3850SWill Newton 880f95f3850SWill Newton switch (state) { 881f95f3850SWill Newton case STATE_IDLE: 882f95f3850SWill Newton break; 883f95f3850SWill Newton 884f95f3850SWill Newton case STATE_SENDING_CMD: 885f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 886f95f3850SWill Newton &host->pending_events)) 887f95f3850SWill Newton break; 888f95f3850SWill Newton 889f95f3850SWill Newton cmd = host->cmd; 890f95f3850SWill Newton host->cmd = NULL; 891f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 892f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->cmd); 893f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 894f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 895f95f3850SWill Newton goto unlock; 896f95f3850SWill Newton } 897f95f3850SWill Newton 898f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 899f95f3850SWill Newton /* fall through */ 900f95f3850SWill Newton 901f95f3850SWill Newton case STATE_SENDING_DATA: 902f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 903f95f3850SWill Newton &host->pending_events)) { 904f95f3850SWill Newton dw_mci_stop_dma(host); 905f95f3850SWill Newton if (data->stop) 906f95f3850SWill Newton send_stop_cmd(host, data); 907f95f3850SWill Newton state = STATE_DATA_ERROR; 908f95f3850SWill Newton break; 909f95f3850SWill Newton } 910f95f3850SWill Newton 911f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 912f95f3850SWill Newton &host->pending_events)) 913f95f3850SWill Newton break; 914f95f3850SWill Newton 915f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 916f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 917f95f3850SWill Newton /* fall through */ 918f95f3850SWill Newton 919f95f3850SWill Newton case STATE_DATA_BUSY: 920f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 921f95f3850SWill Newton &host->pending_events)) 922f95f3850SWill Newton break; 923f95f3850SWill Newton 924f95f3850SWill Newton host->data = NULL; 925f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 926f95f3850SWill Newton status = host->data_status; 927f95f3850SWill Newton 928f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 929f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 930f95f3850SWill Newton data->error = -ETIMEDOUT; 931f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 932f95f3850SWill Newton data->error = -EILSEQ; 93355c5efbcSJames Hogan } else if (status & SDMMC_INT_EBE && 93455c5efbcSJames Hogan host->dir_status == 93555c5efbcSJames Hogan DW_MCI_SEND_STATUS) { 93655c5efbcSJames Hogan /* 93755c5efbcSJames Hogan * No data CRC status was returned. 93855c5efbcSJames Hogan * The number of bytes transferred will 93955c5efbcSJames Hogan * be exaggerated in PIO mode. 94055c5efbcSJames Hogan */ 94155c5efbcSJames Hogan data->bytes_xfered = 0; 94255c5efbcSJames Hogan data->error = -ETIMEDOUT; 943f95f3850SWill Newton } else { 944f95f3850SWill Newton dev_err(&host->pdev->dev, 945f95f3850SWill Newton "data FIFO error " 946f95f3850SWill Newton "(status=%08x)\n", 947f95f3850SWill Newton status); 948f95f3850SWill Newton data->error = -EIO; 949f95f3850SWill Newton } 95094dd5b33SJames Hogan /* 95194dd5b33SJames Hogan * After an error, there may be data lingering 95294dd5b33SJames Hogan * in the FIFO, so reset it - doing so 95394dd5b33SJames Hogan * generates a block interrupt, hence setting 95494dd5b33SJames Hogan * the scatter-gather pointer to NULL. 95594dd5b33SJames Hogan */ 95694dd5b33SJames Hogan host->sg = NULL; 95794dd5b33SJames Hogan ctrl = mci_readl(host, CTRL); 95894dd5b33SJames Hogan ctrl |= SDMMC_CTRL_FIFO_RESET; 95994dd5b33SJames Hogan mci_writel(host, CTRL, ctrl); 960f95f3850SWill Newton } else { 961f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 962f95f3850SWill Newton data->error = 0; 963f95f3850SWill Newton } 964f95f3850SWill Newton 965f95f3850SWill Newton if (!data->stop) { 966f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 967f95f3850SWill Newton goto unlock; 968f95f3850SWill Newton } 969f95f3850SWill Newton 970f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 971f95f3850SWill Newton if (!data->error) 972f95f3850SWill Newton send_stop_cmd(host, data); 973f95f3850SWill Newton /* fall through */ 974f95f3850SWill Newton 975f95f3850SWill Newton case STATE_SENDING_STOP: 976f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 977f95f3850SWill Newton &host->pending_events)) 978f95f3850SWill Newton break; 979f95f3850SWill Newton 980f95f3850SWill Newton host->cmd = NULL; 981f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 982f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 983f95f3850SWill Newton goto unlock; 984f95f3850SWill Newton 985f95f3850SWill Newton case STATE_DATA_ERROR: 986f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 987f95f3850SWill Newton &host->pending_events)) 988f95f3850SWill Newton break; 989f95f3850SWill Newton 990f95f3850SWill Newton state = STATE_DATA_BUSY; 991f95f3850SWill Newton break; 992f95f3850SWill Newton } 993f95f3850SWill Newton } while (state != prev_state); 994f95f3850SWill Newton 995f95f3850SWill Newton host->state = state; 996f95f3850SWill Newton unlock: 997f95f3850SWill Newton spin_unlock(&host->lock); 998f95f3850SWill Newton 999f95f3850SWill Newton } 1000f95f3850SWill Newton 100134b664a2SJames Hogan /* push final bytes to part_buf, only use during push */ 100234b664a2SJames Hogan static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) 100334b664a2SJames Hogan { 100434b664a2SJames Hogan memcpy((void *)&host->part_buf, buf, cnt); 100534b664a2SJames Hogan host->part_buf_count = cnt; 100634b664a2SJames Hogan } 100734b664a2SJames Hogan 100834b664a2SJames Hogan /* append bytes to part_buf, only use during push */ 100934b664a2SJames Hogan static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) 101034b664a2SJames Hogan { 101134b664a2SJames Hogan cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); 101234b664a2SJames Hogan memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); 101334b664a2SJames Hogan host->part_buf_count += cnt; 101434b664a2SJames Hogan return cnt; 101534b664a2SJames Hogan } 101634b664a2SJames Hogan 101734b664a2SJames Hogan /* pull first bytes from part_buf, only use during pull */ 101834b664a2SJames Hogan static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) 101934b664a2SJames Hogan { 102034b664a2SJames Hogan cnt = min(cnt, (int)host->part_buf_count); 102134b664a2SJames Hogan if (cnt) { 102234b664a2SJames Hogan memcpy(buf, (void *)&host->part_buf + host->part_buf_start, 102334b664a2SJames Hogan cnt); 102434b664a2SJames Hogan host->part_buf_count -= cnt; 102534b664a2SJames Hogan host->part_buf_start += cnt; 102634b664a2SJames Hogan } 102734b664a2SJames Hogan return cnt; 102834b664a2SJames Hogan } 102934b664a2SJames Hogan 103034b664a2SJames Hogan /* pull final bytes from the part_buf, assuming it's just been filled */ 103134b664a2SJames Hogan static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) 103234b664a2SJames Hogan { 103334b664a2SJames Hogan memcpy(buf, &host->part_buf, cnt); 103434b664a2SJames Hogan host->part_buf_start = cnt; 103534b664a2SJames Hogan host->part_buf_count = (1 << host->data_shift) - cnt; 103634b664a2SJames Hogan } 103734b664a2SJames Hogan 1038f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 1039f95f3850SWill Newton { 104034b664a2SJames Hogan /* try and push anything in the part_buf */ 104134b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 104234b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 104334b664a2SJames Hogan buf += len; 104434b664a2SJames Hogan cnt -= len; 104534b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 2) { 10464e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 10474e0a5adfSJaehoon Chung host->part_buf16); 104834b664a2SJames Hogan host->part_buf_count = 0; 104934b664a2SJames Hogan } 105034b664a2SJames Hogan } 105134b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 105234b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 105334b664a2SJames Hogan while (cnt >= 2) { 105434b664a2SJames Hogan u16 aligned_buf[64]; 105534b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 105634b664a2SJames Hogan int items = len >> 1; 105734b664a2SJames Hogan int i; 105834b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 105934b664a2SJames Hogan memcpy(aligned_buf, buf, len); 106034b664a2SJames Hogan buf += len; 106134b664a2SJames Hogan cnt -= len; 106234b664a2SJames Hogan /* push data from aligned buffer into fifo */ 106334b664a2SJames Hogan for (i = 0; i < items; ++i) 10644e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 10654e0a5adfSJaehoon Chung aligned_buf[i]); 106634b664a2SJames Hogan } 106734b664a2SJames Hogan } else 106834b664a2SJames Hogan #endif 106934b664a2SJames Hogan { 107034b664a2SJames Hogan u16 *pdata = buf; 107134b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 10724e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), *pdata++); 107334b664a2SJames Hogan buf = pdata; 107434b664a2SJames Hogan } 107534b664a2SJames Hogan /* put anything remaining in the part_buf */ 107634b664a2SJames Hogan if (cnt) { 107734b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 107834b664a2SJames Hogan if (!sg_next(host->sg)) 10794e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 10804e0a5adfSJaehoon Chung host->part_buf16); 1081f95f3850SWill Newton } 1082f95f3850SWill Newton } 1083f95f3850SWill Newton 1084f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 1085f95f3850SWill Newton { 108634b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 108734b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 108834b664a2SJames Hogan while (cnt >= 2) { 108934b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 109034b664a2SJames Hogan u16 aligned_buf[64]; 109134b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 109234b664a2SJames Hogan int items = len >> 1; 109334b664a2SJames Hogan int i; 109434b664a2SJames Hogan for (i = 0; i < items; ++i) 10954e0a5adfSJaehoon Chung aligned_buf[i] = mci_readw(host, 10964e0a5adfSJaehoon Chung DATA(host->data_offset)); 109734b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 109834b664a2SJames Hogan memcpy(buf, aligned_buf, len); 109934b664a2SJames Hogan buf += len; 110034b664a2SJames Hogan cnt -= len; 110134b664a2SJames Hogan } 110234b664a2SJames Hogan } else 110334b664a2SJames Hogan #endif 110434b664a2SJames Hogan { 110534b664a2SJames Hogan u16 *pdata = buf; 110634b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 11074e0a5adfSJaehoon Chung *pdata++ = mci_readw(host, DATA(host->data_offset)); 110834b664a2SJames Hogan buf = pdata; 110934b664a2SJames Hogan } 111034b664a2SJames Hogan if (cnt) { 11114e0a5adfSJaehoon Chung host->part_buf16 = mci_readw(host, DATA(host->data_offset)); 111234b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1113f95f3850SWill Newton } 1114f95f3850SWill Newton } 1115f95f3850SWill Newton 1116f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 1117f95f3850SWill Newton { 111834b664a2SJames Hogan /* try and push anything in the part_buf */ 111934b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 112034b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 112134b664a2SJames Hogan buf += len; 112234b664a2SJames Hogan cnt -= len; 112334b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 4) { 11244e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 11254e0a5adfSJaehoon Chung host->part_buf32); 112634b664a2SJames Hogan host->part_buf_count = 0; 112734b664a2SJames Hogan } 112834b664a2SJames Hogan } 112934b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 113034b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 113134b664a2SJames Hogan while (cnt >= 4) { 113234b664a2SJames Hogan u32 aligned_buf[32]; 113334b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 113434b664a2SJames Hogan int items = len >> 2; 113534b664a2SJames Hogan int i; 113634b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 113734b664a2SJames Hogan memcpy(aligned_buf, buf, len); 113834b664a2SJames Hogan buf += len; 113934b664a2SJames Hogan cnt -= len; 114034b664a2SJames Hogan /* push data from aligned buffer into fifo */ 114134b664a2SJames Hogan for (i = 0; i < items; ++i) 11424e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 11434e0a5adfSJaehoon Chung aligned_buf[i]); 114434b664a2SJames Hogan } 114534b664a2SJames Hogan } else 114634b664a2SJames Hogan #endif 114734b664a2SJames Hogan { 114834b664a2SJames Hogan u32 *pdata = buf; 114934b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 11504e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), *pdata++); 115134b664a2SJames Hogan buf = pdata; 115234b664a2SJames Hogan } 115334b664a2SJames Hogan /* put anything remaining in the part_buf */ 115434b664a2SJames Hogan if (cnt) { 115534b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 115634b664a2SJames Hogan if (!sg_next(host->sg)) 11574e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 11584e0a5adfSJaehoon Chung host->part_buf32); 1159f95f3850SWill Newton } 1160f95f3850SWill Newton } 1161f95f3850SWill Newton 1162f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 1163f95f3850SWill Newton { 116434b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 116534b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 116634b664a2SJames Hogan while (cnt >= 4) { 116734b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 116834b664a2SJames Hogan u32 aligned_buf[32]; 116934b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 117034b664a2SJames Hogan int items = len >> 2; 117134b664a2SJames Hogan int i; 117234b664a2SJames Hogan for (i = 0; i < items; ++i) 11734e0a5adfSJaehoon Chung aligned_buf[i] = mci_readl(host, 11744e0a5adfSJaehoon Chung DATA(host->data_offset)); 117534b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 117634b664a2SJames Hogan memcpy(buf, aligned_buf, len); 117734b664a2SJames Hogan buf += len; 117834b664a2SJames Hogan cnt -= len; 117934b664a2SJames Hogan } 118034b664a2SJames Hogan } else 118134b664a2SJames Hogan #endif 118234b664a2SJames Hogan { 118334b664a2SJames Hogan u32 *pdata = buf; 118434b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 11854e0a5adfSJaehoon Chung *pdata++ = mci_readl(host, DATA(host->data_offset)); 118634b664a2SJames Hogan buf = pdata; 118734b664a2SJames Hogan } 118834b664a2SJames Hogan if (cnt) { 11894e0a5adfSJaehoon Chung host->part_buf32 = mci_readl(host, DATA(host->data_offset)); 119034b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1191f95f3850SWill Newton } 1192f95f3850SWill Newton } 1193f95f3850SWill Newton 1194f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1195f95f3850SWill Newton { 119634b664a2SJames Hogan /* try and push anything in the part_buf */ 119734b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 119834b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 119934b664a2SJames Hogan buf += len; 120034b664a2SJames Hogan cnt -= len; 120134b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 8) { 12024e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12034e0a5adfSJaehoon Chung host->part_buf); 120434b664a2SJames Hogan host->part_buf_count = 0; 120534b664a2SJames Hogan } 120634b664a2SJames Hogan } 120734b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 120834b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 120934b664a2SJames Hogan while (cnt >= 8) { 121034b664a2SJames Hogan u64 aligned_buf[16]; 121134b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 121234b664a2SJames Hogan int items = len >> 3; 121334b664a2SJames Hogan int i; 121434b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 121534b664a2SJames Hogan memcpy(aligned_buf, buf, len); 121634b664a2SJames Hogan buf += len; 121734b664a2SJames Hogan cnt -= len; 121834b664a2SJames Hogan /* push data from aligned buffer into fifo */ 121934b664a2SJames Hogan for (i = 0; i < items; ++i) 12204e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 12214e0a5adfSJaehoon Chung aligned_buf[i]); 122234b664a2SJames Hogan } 122334b664a2SJames Hogan } else 122434b664a2SJames Hogan #endif 122534b664a2SJames Hogan { 122634b664a2SJames Hogan u64 *pdata = buf; 122734b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 12284e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), *pdata++); 122934b664a2SJames Hogan buf = pdata; 123034b664a2SJames Hogan } 123134b664a2SJames Hogan /* put anything remaining in the part_buf */ 123234b664a2SJames Hogan if (cnt) { 123334b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 123434b664a2SJames Hogan if (!sg_next(host->sg)) 12354e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 12364e0a5adfSJaehoon Chung host->part_buf); 1237f95f3850SWill Newton } 1238f95f3850SWill Newton } 1239f95f3850SWill Newton 1240f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1241f95f3850SWill Newton { 124234b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 124334b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 124434b664a2SJames Hogan while (cnt >= 8) { 124534b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 124634b664a2SJames Hogan u64 aligned_buf[16]; 124734b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 124834b664a2SJames Hogan int items = len >> 3; 124934b664a2SJames Hogan int i; 125034b664a2SJames Hogan for (i = 0; i < items; ++i) 12514e0a5adfSJaehoon Chung aligned_buf[i] = mci_readq(host, 12524e0a5adfSJaehoon Chung DATA(host->data_offset)); 125334b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 125434b664a2SJames Hogan memcpy(buf, aligned_buf, len); 125534b664a2SJames Hogan buf += len; 125634b664a2SJames Hogan cnt -= len; 1257f95f3850SWill Newton } 125834b664a2SJames Hogan } else 125934b664a2SJames Hogan #endif 126034b664a2SJames Hogan { 126134b664a2SJames Hogan u64 *pdata = buf; 126234b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 12634e0a5adfSJaehoon Chung *pdata++ = mci_readq(host, DATA(host->data_offset)); 126434b664a2SJames Hogan buf = pdata; 126534b664a2SJames Hogan } 126634b664a2SJames Hogan if (cnt) { 12674e0a5adfSJaehoon Chung host->part_buf = mci_readq(host, DATA(host->data_offset)); 126834b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 126934b664a2SJames Hogan } 127034b664a2SJames Hogan } 127134b664a2SJames Hogan 127234b664a2SJames Hogan static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) 127334b664a2SJames Hogan { 127434b664a2SJames Hogan int len; 127534b664a2SJames Hogan 127634b664a2SJames Hogan /* get remaining partial bytes */ 127734b664a2SJames Hogan len = dw_mci_pull_part_bytes(host, buf, cnt); 127834b664a2SJames Hogan if (unlikely(len == cnt)) 127934b664a2SJames Hogan return; 128034b664a2SJames Hogan buf += len; 128134b664a2SJames Hogan cnt -= len; 128234b664a2SJames Hogan 128334b664a2SJames Hogan /* get the rest of the data */ 128434b664a2SJames Hogan host->pull_data(host, buf, cnt); 1285f95f3850SWill Newton } 1286f95f3850SWill Newton 1287f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1288f95f3850SWill Newton { 1289f95f3850SWill Newton struct scatterlist *sg = host->sg; 1290f95f3850SWill Newton void *buf = sg_virt(sg); 1291f95f3850SWill Newton unsigned int offset = host->pio_offset; 1292f95f3850SWill Newton struct mmc_data *data = host->data; 1293f95f3850SWill Newton int shift = host->data_shift; 1294f95f3850SWill Newton u32 status; 1295ba6a902dSChris Ball unsigned int nbytes = 0, len; 1296f95f3850SWill Newton 1297f95f3850SWill Newton do { 129834b664a2SJames Hogan len = host->part_buf_count + 129934b664a2SJames Hogan (SDMMC_GET_FCNT(mci_readl(host, STATUS)) << shift); 1300f95f3850SWill Newton if (offset + len <= sg->length) { 130134b664a2SJames Hogan dw_mci_pull_data(host, (void *)(buf + offset), len); 1302f95f3850SWill Newton 1303f95f3850SWill Newton offset += len; 1304f95f3850SWill Newton nbytes += len; 1305f95f3850SWill Newton 1306f95f3850SWill Newton if (offset == sg->length) { 1307f95f3850SWill Newton flush_dcache_page(sg_page(sg)); 1308f95f3850SWill Newton host->sg = sg = sg_next(sg); 1309f95f3850SWill Newton if (!sg) 1310f95f3850SWill Newton goto done; 1311f95f3850SWill Newton 1312f95f3850SWill Newton offset = 0; 1313f95f3850SWill Newton buf = sg_virt(sg); 1314f95f3850SWill Newton } 1315f95f3850SWill Newton } else { 1316f95f3850SWill Newton unsigned int remaining = sg->length - offset; 131734b664a2SJames Hogan dw_mci_pull_data(host, (void *)(buf + offset), 1318f95f3850SWill Newton remaining); 1319f95f3850SWill Newton nbytes += remaining; 1320f95f3850SWill Newton 1321f95f3850SWill Newton flush_dcache_page(sg_page(sg)); 1322f95f3850SWill Newton host->sg = sg = sg_next(sg); 1323f95f3850SWill Newton if (!sg) 1324f95f3850SWill Newton goto done; 1325f95f3850SWill Newton 1326f95f3850SWill Newton offset = len - remaining; 1327f95f3850SWill Newton buf = sg_virt(sg); 132834b664a2SJames Hogan dw_mci_pull_data(host, buf, offset); 1329f95f3850SWill Newton nbytes += offset; 1330f95f3850SWill Newton } 1331f95f3850SWill Newton 1332f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1333f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1334f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1335f95f3850SWill Newton host->data_status = status; 1336f95f3850SWill Newton data->bytes_xfered += nbytes; 1337f95f3850SWill Newton smp_wmb(); 1338f95f3850SWill Newton 1339f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1340f95f3850SWill Newton 1341f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1342f95f3850SWill Newton return; 1343f95f3850SWill Newton } 1344f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1345f95f3850SWill Newton host->pio_offset = offset; 1346f95f3850SWill Newton data->bytes_xfered += nbytes; 1347f95f3850SWill Newton return; 1348f95f3850SWill Newton 1349f95f3850SWill Newton done: 1350f95f3850SWill Newton data->bytes_xfered += nbytes; 1351f95f3850SWill Newton smp_wmb(); 1352f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1353f95f3850SWill Newton } 1354f95f3850SWill Newton 1355f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1356f95f3850SWill Newton { 1357f95f3850SWill Newton struct scatterlist *sg = host->sg; 1358f95f3850SWill Newton void *buf = sg_virt(sg); 1359f95f3850SWill Newton unsigned int offset = host->pio_offset; 1360f95f3850SWill Newton struct mmc_data *data = host->data; 1361f95f3850SWill Newton int shift = host->data_shift; 1362f95f3850SWill Newton u32 status; 1363f95f3850SWill Newton unsigned int nbytes = 0, len; 1364f95f3850SWill Newton 1365f95f3850SWill Newton do { 136634b664a2SJames Hogan len = ((host->fifo_depth - 136734b664a2SJames Hogan SDMMC_GET_FCNT(mci_readl(host, STATUS))) << shift) 136834b664a2SJames Hogan - host->part_buf_count; 1369f95f3850SWill Newton if (offset + len <= sg->length) { 1370f95f3850SWill Newton host->push_data(host, (void *)(buf + offset), len); 1371f95f3850SWill Newton 1372f95f3850SWill Newton offset += len; 1373f95f3850SWill Newton nbytes += len; 1374f95f3850SWill Newton if (offset == sg->length) { 1375f95f3850SWill Newton host->sg = sg = sg_next(sg); 1376f95f3850SWill Newton if (!sg) 1377f95f3850SWill Newton goto done; 1378f95f3850SWill Newton 1379f95f3850SWill Newton offset = 0; 1380f95f3850SWill Newton buf = sg_virt(sg); 1381f95f3850SWill Newton } 1382f95f3850SWill Newton } else { 1383f95f3850SWill Newton unsigned int remaining = sg->length - offset; 1384f95f3850SWill Newton 1385f95f3850SWill Newton host->push_data(host, (void *)(buf + offset), 1386f95f3850SWill Newton remaining); 1387f95f3850SWill Newton nbytes += remaining; 1388f95f3850SWill Newton 1389f95f3850SWill Newton host->sg = sg = sg_next(sg); 1390f95f3850SWill Newton if (!sg) 1391f95f3850SWill Newton goto done; 1392f95f3850SWill Newton 1393f95f3850SWill Newton offset = len - remaining; 1394f95f3850SWill Newton buf = sg_virt(sg); 1395f95f3850SWill Newton host->push_data(host, (void *)buf, offset); 1396f95f3850SWill Newton nbytes += offset; 1397f95f3850SWill Newton } 1398f95f3850SWill Newton 1399f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1400f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1401f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1402f95f3850SWill Newton host->data_status = status; 1403f95f3850SWill Newton data->bytes_xfered += nbytes; 1404f95f3850SWill Newton 1405f95f3850SWill Newton smp_wmb(); 1406f95f3850SWill Newton 1407f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1408f95f3850SWill Newton 1409f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1410f95f3850SWill Newton return; 1411f95f3850SWill Newton } 1412f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1413f95f3850SWill Newton host->pio_offset = offset; 1414f95f3850SWill Newton data->bytes_xfered += nbytes; 1415f95f3850SWill Newton return; 1416f95f3850SWill Newton 1417f95f3850SWill Newton done: 1418f95f3850SWill Newton data->bytes_xfered += nbytes; 1419f95f3850SWill Newton smp_wmb(); 1420f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1421f95f3850SWill Newton } 1422f95f3850SWill Newton 1423f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1424f95f3850SWill Newton { 1425f95f3850SWill Newton if (!host->cmd_status) 1426f95f3850SWill Newton host->cmd_status = status; 1427f95f3850SWill Newton 1428f95f3850SWill Newton smp_wmb(); 1429f95f3850SWill Newton 1430f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1431f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1432f95f3850SWill Newton } 1433f95f3850SWill Newton 1434f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1435f95f3850SWill Newton { 1436f95f3850SWill Newton struct dw_mci *host = dev_id; 1437f95f3850SWill Newton u32 status, pending; 1438f95f3850SWill Newton unsigned int pass_count = 0; 14391a5c8e1fSShashidhar Hiremath int i; 1440f95f3850SWill Newton 1441f95f3850SWill Newton do { 1442f95f3850SWill Newton status = mci_readl(host, RINTSTS); 1443f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1444f95f3850SWill Newton 1445f95f3850SWill Newton /* 1446f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1447f95f3850SWill Newton * is configured. 1448f95f3850SWill Newton */ 1449f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1450f95f3850SWill Newton if (!pending && 1451f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1452f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1453f95f3850SWill Newton } 1454f95f3850SWill Newton 1455f95f3850SWill Newton if (!pending) 1456f95f3850SWill Newton break; 1457f95f3850SWill Newton 1458f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1459f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1460f95f3850SWill Newton host->cmd_status = status; 1461f95f3850SWill Newton smp_wmb(); 1462f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1463f95f3850SWill Newton } 1464f95f3850SWill Newton 1465f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1466f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1467f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1468f95f3850SWill Newton host->data_status = status; 1469f95f3850SWill Newton smp_wmb(); 1470f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 14716e83e10dSSeungwon Jeon if (!(pending & (SDMMC_INT_DTO | SDMMC_INT_DCRC | 14726e83e10dSSeungwon Jeon SDMMC_INT_SBE | SDMMC_INT_EBE))) 1473f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1474f95f3850SWill Newton } 1475f95f3850SWill Newton 1476f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1477f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1478f95f3850SWill Newton if (!host->data_status) 1479f95f3850SWill Newton host->data_status = status; 1480f95f3850SWill Newton smp_wmb(); 1481f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1482f95f3850SWill Newton if (host->sg != NULL) 1483f95f3850SWill Newton dw_mci_read_data_pio(host); 1484f95f3850SWill Newton } 1485f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1486f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1487f95f3850SWill Newton } 1488f95f3850SWill Newton 1489f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1490f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1491b40af3aaSJames Hogan if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) 1492f95f3850SWill Newton dw_mci_read_data_pio(host); 1493f95f3850SWill Newton } 1494f95f3850SWill Newton 1495f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1496f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1497b40af3aaSJames Hogan if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) 1498f95f3850SWill Newton dw_mci_write_data_pio(host); 1499f95f3850SWill Newton } 1500f95f3850SWill Newton 1501f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1502f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1503f95f3850SWill Newton dw_mci_cmd_interrupt(host, status); 1504f95f3850SWill Newton } 1505f95f3850SWill Newton 1506f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1507f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 15081791b13eSJames Hogan queue_work(dw_mci_card_workqueue, &host->card_work); 1509f95f3850SWill Newton } 1510f95f3850SWill Newton 15111a5c8e1fSShashidhar Hiremath /* Handle SDIO Interrupts */ 15121a5c8e1fSShashidhar Hiremath for (i = 0; i < host->num_slots; i++) { 15131a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = host->slot[i]; 15141a5c8e1fSShashidhar Hiremath if (pending & SDMMC_INT_SDIO(i)) { 15151a5c8e1fSShashidhar Hiremath mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i)); 15161a5c8e1fSShashidhar Hiremath mmc_signal_sdio_irq(slot->mmc); 15171a5c8e1fSShashidhar Hiremath } 15181a5c8e1fSShashidhar Hiremath } 15191a5c8e1fSShashidhar Hiremath 1520f95f3850SWill Newton } while (pass_count++ < 5); 1521f95f3850SWill Newton 1522f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1523f95f3850SWill Newton /* Handle DMA interrupts */ 1524f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1525f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1526f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1527f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1528f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1529f95f3850SWill Newton host->dma_ops->complete(host); 1530f95f3850SWill Newton } 1531f95f3850SWill Newton #endif 1532f95f3850SWill Newton 1533f95f3850SWill Newton return IRQ_HANDLED; 1534f95f3850SWill Newton } 1535f95f3850SWill Newton 15361791b13eSJames Hogan static void dw_mci_work_routine_card(struct work_struct *work) 1537f95f3850SWill Newton { 15381791b13eSJames Hogan struct dw_mci *host = container_of(work, struct dw_mci, card_work); 1539f95f3850SWill Newton int i; 1540f95f3850SWill Newton 1541f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1542f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1543f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1544f95f3850SWill Newton struct mmc_request *mrq; 1545f95f3850SWill Newton int present; 1546f95f3850SWill Newton u32 ctrl; 1547f95f3850SWill Newton 1548f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1549f95f3850SWill Newton while (present != slot->last_detect_state) { 1550f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1551f95f3850SWill Newton present ? "inserted" : "removed"); 1552f95f3850SWill Newton 15531791b13eSJames Hogan /* Power up slot (before spin_lock, may sleep) */ 15541791b13eSJames Hogan if (present != 0 && host->pdata->setpower) 15551791b13eSJames Hogan host->pdata->setpower(slot->id, mmc->ocr_avail); 15561791b13eSJames Hogan 15571791b13eSJames Hogan spin_lock_bh(&host->lock); 15581791b13eSJames Hogan 1559f95f3850SWill Newton /* Card change detected */ 1560f95f3850SWill Newton slot->last_detect_state = present; 1561f95f3850SWill Newton 15621791b13eSJames Hogan /* Mark card as present if applicable */ 15631791b13eSJames Hogan if (present != 0) 1564f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1565f95f3850SWill Newton 1566f95f3850SWill Newton /* Clean up queue if present */ 1567f95f3850SWill Newton mrq = slot->mrq; 1568f95f3850SWill Newton if (mrq) { 1569f95f3850SWill Newton if (mrq == host->mrq) { 1570f95f3850SWill Newton host->data = NULL; 1571f95f3850SWill Newton host->cmd = NULL; 1572f95f3850SWill Newton 1573f95f3850SWill Newton switch (host->state) { 1574f95f3850SWill Newton case STATE_IDLE: 1575f95f3850SWill Newton break; 1576f95f3850SWill Newton case STATE_SENDING_CMD: 1577f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1578f95f3850SWill Newton if (!mrq->data) 1579f95f3850SWill Newton break; 1580f95f3850SWill Newton /* fall through */ 1581f95f3850SWill Newton case STATE_SENDING_DATA: 1582f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1583f95f3850SWill Newton dw_mci_stop_dma(host); 1584f95f3850SWill Newton break; 1585f95f3850SWill Newton case STATE_DATA_BUSY: 1586f95f3850SWill Newton case STATE_DATA_ERROR: 1587f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1588f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1589f95f3850SWill Newton if (!mrq->stop) 1590f95f3850SWill Newton break; 1591f95f3850SWill Newton /* fall through */ 1592f95f3850SWill Newton case STATE_SENDING_STOP: 1593f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1594f95f3850SWill Newton break; 1595f95f3850SWill Newton } 1596f95f3850SWill Newton 1597f95f3850SWill Newton dw_mci_request_end(host, mrq); 1598f95f3850SWill Newton } else { 1599f95f3850SWill Newton list_del(&slot->queue_node); 1600f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1601f95f3850SWill Newton if (mrq->data) 1602f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1603f95f3850SWill Newton if (mrq->stop) 1604f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1605f95f3850SWill Newton 1606f95f3850SWill Newton spin_unlock(&host->lock); 1607f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1608f95f3850SWill Newton spin_lock(&host->lock); 1609f95f3850SWill Newton } 1610f95f3850SWill Newton } 1611f95f3850SWill Newton 1612f95f3850SWill Newton /* Power down slot */ 1613f95f3850SWill Newton if (present == 0) { 1614f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1615f95f3850SWill Newton 1616f95f3850SWill Newton /* 1617f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1618f95f3850SWill Newton * block interrupt, hence setting the 1619f95f3850SWill Newton * scatter-gather pointer to NULL. 1620f95f3850SWill Newton */ 1621f95f3850SWill Newton host->sg = NULL; 1622f95f3850SWill Newton 1623f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1624f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1625f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1626f95f3850SWill Newton 1627f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1628f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1629f95f3850SWill Newton ctrl |= 0x01; /* Software reset of DMA */ 1630f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1631f95f3850SWill Newton #endif 1632f95f3850SWill Newton 1633f95f3850SWill Newton } 1634f95f3850SWill Newton 16351791b13eSJames Hogan spin_unlock_bh(&host->lock); 16361791b13eSJames Hogan 16371791b13eSJames Hogan /* Power down slot (after spin_unlock, may sleep) */ 16381791b13eSJames Hogan if (present == 0 && host->pdata->setpower) 16391791b13eSJames Hogan host->pdata->setpower(slot->id, 0); 16401791b13eSJames Hogan 1641f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1642f95f3850SWill Newton } 1643f95f3850SWill Newton 1644f95f3850SWill Newton mmc_detect_change(slot->mmc, 1645f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1646f95f3850SWill Newton } 1647f95f3850SWill Newton } 1648f95f3850SWill Newton 1649f95f3850SWill Newton static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1650f95f3850SWill Newton { 1651f95f3850SWill Newton struct mmc_host *mmc; 1652f95f3850SWill Newton struct dw_mci_slot *slot; 1653f95f3850SWill Newton 1654f95f3850SWill Newton mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), &host->pdev->dev); 1655f95f3850SWill Newton if (!mmc) 1656f95f3850SWill Newton return -ENOMEM; 1657f95f3850SWill Newton 1658f95f3850SWill Newton slot = mmc_priv(mmc); 1659f95f3850SWill Newton slot->id = id; 1660f95f3850SWill Newton slot->mmc = mmc; 1661f95f3850SWill Newton slot->host = host; 1662f95f3850SWill Newton 1663f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1664f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1665f95f3850SWill Newton mmc->f_max = host->bus_hz; 1666f95f3850SWill Newton 1667f95f3850SWill Newton if (host->pdata->get_ocr) 1668f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1669f95f3850SWill Newton else 1670f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1671f95f3850SWill Newton 1672f95f3850SWill Newton /* 1673f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1674f95f3850SWill Newton * is detected. 1675f95f3850SWill Newton */ 1676f95f3850SWill Newton if (host->pdata->setpower) 1677f95f3850SWill Newton host->pdata->setpower(id, 0); 1678f95f3850SWill Newton 1679fc3d7720SJaehoon Chung if (host->pdata->caps) 1680fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1681fc3d7720SJaehoon Chung else 1682f95f3850SWill Newton mmc->caps = 0; 1683fc3d7720SJaehoon Chung 1684f95f3850SWill Newton if (host->pdata->get_bus_wd) 1685f95f3850SWill Newton if (host->pdata->get_bus_wd(slot->id) >= 4) 1686f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1687f95f3850SWill Newton 1688f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 16896daa7778SSeungwon Jeon mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 1690f95f3850SWill Newton 1691f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1692f95f3850SWill Newton mmc->max_segs = host->ring_size; 1693f95f3850SWill Newton mmc->max_blk_size = 65536; 1694f95f3850SWill Newton mmc->max_blk_count = host->ring_size; 1695f95f3850SWill Newton mmc->max_seg_size = 0x1000; 1696f95f3850SWill Newton mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1697f95f3850SWill Newton #else 1698f95f3850SWill Newton if (host->pdata->blk_settings) { 1699f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1700f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1701f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1702f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1703f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1704f95f3850SWill Newton } else { 1705f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1706f95f3850SWill Newton mmc->max_segs = 64; 1707f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1708f95f3850SWill Newton mmc->max_blk_count = 512; 1709f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1710f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1711f95f3850SWill Newton } 1712f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1713f95f3850SWill Newton 1714c07946a3SJaehoon Chung host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 1715c07946a3SJaehoon Chung if (IS_ERR(host->vmmc)) { 1716a3c76eb9SGirish K S pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1717c07946a3SJaehoon Chung host->vmmc = NULL; 1718c07946a3SJaehoon Chung } else 1719c07946a3SJaehoon Chung regulator_enable(host->vmmc); 1720c07946a3SJaehoon Chung 1721f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1722f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1723f95f3850SWill Newton else 1724f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1725f95f3850SWill Newton 1726f95f3850SWill Newton host->slot[id] = slot; 1727f95f3850SWill Newton mmc_add_host(mmc); 1728f95f3850SWill Newton 1729f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1730f95f3850SWill Newton dw_mci_init_debugfs(slot); 1731f95f3850SWill Newton #endif 1732f95f3850SWill Newton 1733f95f3850SWill Newton /* Card initially undetected */ 1734f95f3850SWill Newton slot->last_detect_state = 0; 1735f95f3850SWill Newton 1736dd6c4b98SWill Newton /* 1737dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 1738dd6c4b98SWill Newton * need to run the detect tasklet 1739dd6c4b98SWill Newton */ 17401791b13eSJames Hogan queue_work(dw_mci_card_workqueue, &host->card_work); 1741dd6c4b98SWill Newton 1742f95f3850SWill Newton return 0; 1743f95f3850SWill Newton } 1744f95f3850SWill Newton 1745f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 1746f95f3850SWill Newton { 1747f95f3850SWill Newton /* Shutdown detect IRQ */ 1748f95f3850SWill Newton if (slot->host->pdata->exit) 1749f95f3850SWill Newton slot->host->pdata->exit(id); 1750f95f3850SWill Newton 1751f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 1752f95f3850SWill Newton mmc_remove_host(slot->mmc); 1753f95f3850SWill Newton slot->host->slot[id] = NULL; 1754f95f3850SWill Newton mmc_free_host(slot->mmc); 1755f95f3850SWill Newton } 1756f95f3850SWill Newton 1757f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 1758f95f3850SWill Newton { 1759f95f3850SWill Newton /* Alloc memory for sg translation */ 1760f95f3850SWill Newton host->sg_cpu = dma_alloc_coherent(&host->pdev->dev, PAGE_SIZE, 1761f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 1762f95f3850SWill Newton if (!host->sg_cpu) { 1763f95f3850SWill Newton dev_err(&host->pdev->dev, "%s: could not alloc DMA memory\n", 1764f95f3850SWill Newton __func__); 1765f95f3850SWill Newton goto no_dma; 1766f95f3850SWill Newton } 1767f95f3850SWill Newton 1768f95f3850SWill Newton /* Determine which DMA interface to use */ 1769f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1770f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 1771f95f3850SWill Newton dev_info(&host->pdev->dev, "Using internal DMA controller.\n"); 1772f95f3850SWill Newton #endif 1773f95f3850SWill Newton 1774f95f3850SWill Newton if (!host->dma_ops) 1775f95f3850SWill Newton goto no_dma; 1776f95f3850SWill Newton 1777f95f3850SWill Newton if (host->dma_ops->init) { 1778f95f3850SWill Newton if (host->dma_ops->init(host)) { 1779f95f3850SWill Newton dev_err(&host->pdev->dev, "%s: Unable to initialize " 1780f95f3850SWill Newton "DMA Controller.\n", __func__); 1781f95f3850SWill Newton goto no_dma; 1782f95f3850SWill Newton } 1783f95f3850SWill Newton } else { 1784f95f3850SWill Newton dev_err(&host->pdev->dev, "DMA initialization not found.\n"); 1785f95f3850SWill Newton goto no_dma; 1786f95f3850SWill Newton } 1787f95f3850SWill Newton 1788f95f3850SWill Newton host->use_dma = 1; 1789f95f3850SWill Newton return; 1790f95f3850SWill Newton 1791f95f3850SWill Newton no_dma: 1792f95f3850SWill Newton dev_info(&host->pdev->dev, "Using PIO mode.\n"); 1793f95f3850SWill Newton host->use_dma = 0; 1794f95f3850SWill Newton return; 1795f95f3850SWill Newton } 1796f95f3850SWill Newton 1797f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 1798f95f3850SWill Newton { 1799f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 1800f95f3850SWill Newton unsigned int ctrl; 1801f95f3850SWill Newton 1802f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1803f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 1804f95f3850SWill Newton 1805f95f3850SWill Newton /* wait till resets clear */ 1806f95f3850SWill Newton do { 1807f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1808f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1809f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 1810f95f3850SWill Newton return true; 1811f95f3850SWill Newton } while (time_before(jiffies, timeout)); 1812f95f3850SWill Newton 1813f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 1814f95f3850SWill Newton 1815f95f3850SWill Newton return false; 1816f95f3850SWill Newton } 1817f95f3850SWill Newton 1818f95f3850SWill Newton static int dw_mci_probe(struct platform_device *pdev) 1819f95f3850SWill Newton { 1820f95f3850SWill Newton struct dw_mci *host; 1821f95f3850SWill Newton struct resource *regs; 1822f95f3850SWill Newton struct dw_mci_board *pdata; 1823f95f3850SWill Newton int irq, ret, i, width; 1824f95f3850SWill Newton u32 fifo_size; 1825f95f3850SWill Newton 1826f95f3850SWill Newton regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1827f95f3850SWill Newton if (!regs) 1828f95f3850SWill Newton return -ENXIO; 1829f95f3850SWill Newton 1830f95f3850SWill Newton irq = platform_get_irq(pdev, 0); 1831f95f3850SWill Newton if (irq < 0) 1832f95f3850SWill Newton return irq; 1833f95f3850SWill Newton 1834f95f3850SWill Newton host = kzalloc(sizeof(struct dw_mci), GFP_KERNEL); 1835f95f3850SWill Newton if (!host) 1836f95f3850SWill Newton return -ENOMEM; 1837f95f3850SWill Newton 1838f95f3850SWill Newton host->pdev = pdev; 1839f95f3850SWill Newton host->pdata = pdata = pdev->dev.platform_data; 1840f95f3850SWill Newton if (!pdata || !pdata->init) { 1841f95f3850SWill Newton dev_err(&pdev->dev, 1842f95f3850SWill Newton "Platform data must supply init function\n"); 1843f95f3850SWill Newton ret = -ENODEV; 1844f95f3850SWill Newton goto err_freehost; 1845f95f3850SWill Newton } 1846f95f3850SWill Newton 1847f95f3850SWill Newton if (!pdata->select_slot && pdata->num_slots > 1) { 1848f95f3850SWill Newton dev_err(&pdev->dev, 1849f95f3850SWill Newton "Platform data must supply select_slot function\n"); 1850f95f3850SWill Newton ret = -ENODEV; 1851f95f3850SWill Newton goto err_freehost; 1852f95f3850SWill Newton } 1853f95f3850SWill Newton 1854f95f3850SWill Newton if (!pdata->bus_hz) { 1855f95f3850SWill Newton dev_err(&pdev->dev, 1856f95f3850SWill Newton "Platform data must supply bus speed\n"); 1857f95f3850SWill Newton ret = -ENODEV; 1858f95f3850SWill Newton goto err_freehost; 1859f95f3850SWill Newton } 1860f95f3850SWill Newton 1861f95f3850SWill Newton host->bus_hz = pdata->bus_hz; 1862f95f3850SWill Newton host->quirks = pdata->quirks; 1863f95f3850SWill Newton 1864f95f3850SWill Newton spin_lock_init(&host->lock); 1865f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 1866f95f3850SWill Newton 1867f95f3850SWill Newton ret = -ENOMEM; 186828f65c11SJoe Perches host->regs = ioremap(regs->start, resource_size(regs)); 1869f95f3850SWill Newton if (!host->regs) 1870f95f3850SWill Newton goto err_freehost; 1871f95f3850SWill Newton 1872f95f3850SWill Newton host->dma_ops = pdata->dma_ops; 1873f95f3850SWill Newton dw_mci_init_dma(host); 1874f95f3850SWill Newton 1875f95f3850SWill Newton /* 1876f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 1877f95f3850SWill Newton * the correct values. 1878f95f3850SWill Newton */ 1879f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 1880f95f3850SWill Newton if (!i) { 1881f95f3850SWill Newton host->push_data = dw_mci_push_data16; 1882f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 1883f95f3850SWill Newton width = 16; 1884f95f3850SWill Newton host->data_shift = 1; 1885f95f3850SWill Newton } else if (i == 2) { 1886f95f3850SWill Newton host->push_data = dw_mci_push_data64; 1887f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 1888f95f3850SWill Newton width = 64; 1889f95f3850SWill Newton host->data_shift = 3; 1890f95f3850SWill Newton } else { 1891f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 1892f95f3850SWill Newton WARN((i != 1), 1893f95f3850SWill Newton "HCON reports a reserved host data width!\n" 1894f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 1895f95f3850SWill Newton host->push_data = dw_mci_push_data32; 1896f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 1897f95f3850SWill Newton width = 32; 1898f95f3850SWill Newton host->data_shift = 2; 1899f95f3850SWill Newton } 1900f95f3850SWill Newton 1901f95f3850SWill Newton /* Reset all blocks */ 1902f95f3850SWill Newton if (!mci_wait_reset(&pdev->dev, host)) { 1903f95f3850SWill Newton ret = -ENODEV; 1904f95f3850SWill Newton goto err_dmaunmap; 1905f95f3850SWill Newton } 1906f95f3850SWill Newton 1907f95f3850SWill Newton /* Clear the interrupts for the host controller */ 1908f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1909f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 1910f95f3850SWill Newton 1911f95f3850SWill Newton /* Put in max timeout */ 1912f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 1913f95f3850SWill Newton 1914f95f3850SWill Newton /* 1915f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 1916f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 1917f95f3850SWill Newton */ 1918b86d8253SJames Hogan if (!host->pdata->fifo_depth) { 1919b86d8253SJames Hogan /* 1920b86d8253SJames Hogan * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may 1921b86d8253SJames Hogan * have been overwritten by the bootloader, just like we're 1922b86d8253SJames Hogan * about to do, so if you know the value for your hardware, you 1923b86d8253SJames Hogan * should put it in the platform data. 1924b86d8253SJames Hogan */ 1925f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 1926b86d8253SJames Hogan fifo_size = 1 + ((fifo_size >> 16) & 0x7ff); 1927b86d8253SJames Hogan } else { 1928b86d8253SJames Hogan fifo_size = host->pdata->fifo_depth; 1929b86d8253SJames Hogan } 1930b86d8253SJames Hogan host->fifo_depth = fifo_size; 1931e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 1932e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 1933e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 1934f95f3850SWill Newton 1935f95f3850SWill Newton /* disable clock to CIU */ 1936f95f3850SWill Newton mci_writel(host, CLKENA, 0); 1937f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 1938f95f3850SWill Newton 1939f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 19401791b13eSJames Hogan dw_mci_card_workqueue = alloc_workqueue("dw-mci-card", 19411791b13eSJames Hogan WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); 19421791b13eSJames Hogan if (!dw_mci_card_workqueue) 19431791b13eSJames Hogan goto err_dmaunmap; 19441791b13eSJames Hogan INIT_WORK(&host->card_work, dw_mci_work_routine_card); 1945f95f3850SWill Newton 1946f95f3850SWill Newton ret = request_irq(irq, dw_mci_interrupt, 0, "dw-mci", host); 1947f95f3850SWill Newton if (ret) 19481791b13eSJames Hogan goto err_workqueue; 1949f95f3850SWill Newton 1950f95f3850SWill Newton platform_set_drvdata(pdev, host); 1951f95f3850SWill Newton 1952f95f3850SWill Newton if (host->pdata->num_slots) 1953f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 1954f95f3850SWill Newton else 1955f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 1956f95f3850SWill Newton 1957f95f3850SWill Newton /* We need at least one slot to succeed */ 1958f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1959f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 1960f95f3850SWill Newton if (ret) { 1961f95f3850SWill Newton ret = -ENODEV; 1962f95f3850SWill Newton goto err_init_slot; 1963f95f3850SWill Newton } 1964f95f3850SWill Newton } 1965f95f3850SWill Newton 1966f95f3850SWill Newton /* 19674e0a5adfSJaehoon Chung * In 2.40a spec, Data offset is changed. 19684e0a5adfSJaehoon Chung * Need to check the version-id and set data-offset for DATA register. 19694e0a5adfSJaehoon Chung */ 19704e0a5adfSJaehoon Chung host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); 19714e0a5adfSJaehoon Chung dev_info(&pdev->dev, "Version ID is %04x\n", host->verid); 19724e0a5adfSJaehoon Chung 19734e0a5adfSJaehoon Chung if (host->verid < DW_MMC_240A) 19744e0a5adfSJaehoon Chung host->data_offset = DATA_OFFSET; 19754e0a5adfSJaehoon Chung else 19764e0a5adfSJaehoon Chung host->data_offset = DATA_240A_OFFSET; 19774e0a5adfSJaehoon Chung 19784e0a5adfSJaehoon Chung /* 1979f95f3850SWill Newton * Enable interrupts for command done, data over, data empty, card det, 1980f95f3850SWill Newton * receive ready and error such as transmit, receive timeout, crc error 1981f95f3850SWill Newton */ 1982f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1983f95f3850SWill Newton mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 1984f95f3850SWill Newton SDMMC_INT_TXDR | SDMMC_INT_RXDR | 1985f95f3850SWill Newton DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 1986f95f3850SWill Newton mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 1987f95f3850SWill Newton 1988f95f3850SWill Newton dev_info(&pdev->dev, "DW MMC controller at irq %d, " 1989b86d8253SJames Hogan "%d bit host data width, " 1990b86d8253SJames Hogan "%u deep fifo\n", 1991b86d8253SJames Hogan irq, width, fifo_size); 1992f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 1993f95f3850SWill Newton dev_info(&pdev->dev, "Internal DMAC interrupt fix enabled.\n"); 1994f95f3850SWill Newton 1995f95f3850SWill Newton return 0; 1996f95f3850SWill Newton 1997f95f3850SWill Newton err_init_slot: 1998f95f3850SWill Newton /* De-init any initialized slots */ 1999f95f3850SWill Newton while (i > 0) { 2000f95f3850SWill Newton if (host->slot[i]) 2001f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2002f95f3850SWill Newton i--; 2003f95f3850SWill Newton } 2004f95f3850SWill Newton free_irq(irq, host); 2005f95f3850SWill Newton 20061791b13eSJames Hogan err_workqueue: 20071791b13eSJames Hogan destroy_workqueue(dw_mci_card_workqueue); 20081791b13eSJames Hogan 2009f95f3850SWill Newton err_dmaunmap: 2010f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2011f95f3850SWill Newton host->dma_ops->exit(host); 2012f95f3850SWill Newton dma_free_coherent(&host->pdev->dev, PAGE_SIZE, 2013f95f3850SWill Newton host->sg_cpu, host->sg_dma); 2014f95f3850SWill Newton iounmap(host->regs); 2015f95f3850SWill Newton 2016c07946a3SJaehoon Chung if (host->vmmc) { 2017c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2018c07946a3SJaehoon Chung regulator_put(host->vmmc); 2019c07946a3SJaehoon Chung } 2020c07946a3SJaehoon Chung 2021c07946a3SJaehoon Chung 2022f95f3850SWill Newton err_freehost: 2023f95f3850SWill Newton kfree(host); 2024f95f3850SWill Newton return ret; 2025f95f3850SWill Newton } 2026f95f3850SWill Newton 2027f95f3850SWill Newton static int __exit dw_mci_remove(struct platform_device *pdev) 2028f95f3850SWill Newton { 2029f95f3850SWill Newton struct dw_mci *host = platform_get_drvdata(pdev); 2030f95f3850SWill Newton int i; 2031f95f3850SWill Newton 2032f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2033f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2034f95f3850SWill Newton 2035f95f3850SWill Newton platform_set_drvdata(pdev, NULL); 2036f95f3850SWill Newton 2037f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2038f95f3850SWill Newton dev_dbg(&pdev->dev, "remove slot %d\n", i); 2039f95f3850SWill Newton if (host->slot[i]) 2040f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2041f95f3850SWill Newton } 2042f95f3850SWill Newton 2043f95f3850SWill Newton /* disable clock to CIU */ 2044f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2045f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2046f95f3850SWill Newton 2047f95f3850SWill Newton free_irq(platform_get_irq(pdev, 0), host); 20481791b13eSJames Hogan destroy_workqueue(dw_mci_card_workqueue); 2049f95f3850SWill Newton dma_free_coherent(&pdev->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); 2050f95f3850SWill Newton 2051f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2052f95f3850SWill Newton host->dma_ops->exit(host); 2053f95f3850SWill Newton 2054c07946a3SJaehoon Chung if (host->vmmc) { 2055c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2056c07946a3SJaehoon Chung regulator_put(host->vmmc); 2057c07946a3SJaehoon Chung } 2058c07946a3SJaehoon Chung 2059f95f3850SWill Newton iounmap(host->regs); 2060f95f3850SWill Newton 2061f95f3850SWill Newton kfree(host); 2062f95f3850SWill Newton return 0; 2063f95f3850SWill Newton } 2064f95f3850SWill Newton 2065*6fe8890dSJaehoon Chung #ifdef CONFIG_PM_SLEEP 2066f95f3850SWill Newton /* 2067f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 2068f95f3850SWill Newton */ 2069*6fe8890dSJaehoon Chung static int dw_mci_suspend(struct device *dev) 2070f95f3850SWill Newton { 2071f95f3850SWill Newton int i, ret; 2072*6fe8890dSJaehoon Chung struct dw_mci *host = dev_get_drvdata(dev); 2073f95f3850SWill Newton 2074f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2075f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2076f95f3850SWill Newton if (!slot) 2077f95f3850SWill Newton continue; 2078f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 2079f95f3850SWill Newton if (ret < 0) { 2080f95f3850SWill Newton while (--i >= 0) { 2081f95f3850SWill Newton slot = host->slot[i]; 2082f95f3850SWill Newton if (slot) 2083f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 2084f95f3850SWill Newton } 2085f95f3850SWill Newton return ret; 2086f95f3850SWill Newton } 2087f95f3850SWill Newton } 2088f95f3850SWill Newton 2089c07946a3SJaehoon Chung if (host->vmmc) 2090c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2091c07946a3SJaehoon Chung 2092f95f3850SWill Newton return 0; 2093f95f3850SWill Newton } 2094f95f3850SWill Newton 2095*6fe8890dSJaehoon Chung static int dw_mci_resume(struct device *dev) 2096f95f3850SWill Newton { 2097f95f3850SWill Newton int i, ret; 2098*6fe8890dSJaehoon Chung struct dw_mci *host = dev_get_drvdata(dev); 2099f95f3850SWill Newton 21001d6c4e0aSJaehoon Chung if (host->vmmc) 21011d6c4e0aSJaehoon Chung regulator_enable(host->vmmc); 21021d6c4e0aSJaehoon Chung 2103e61cf118SJaehoon Chung if (host->dma_ops->init) 2104e61cf118SJaehoon Chung host->dma_ops->init(host); 2105e61cf118SJaehoon Chung 2106*6fe8890dSJaehoon Chung if (!mci_wait_reset(dev, host)) { 2107e61cf118SJaehoon Chung ret = -ENODEV; 2108e61cf118SJaehoon Chung return ret; 2109e61cf118SJaehoon Chung } 2110e61cf118SJaehoon Chung 2111e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 2112e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2113e61cf118SJaehoon Chung 2114e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 2115e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2116e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2117e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2118e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 2119e61cf118SJaehoon Chung 2120f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2121f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2122f95f3850SWill Newton if (!slot) 2123f95f3850SWill Newton continue; 2124f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 2125f95f3850SWill Newton if (ret < 0) 2126f95f3850SWill Newton return ret; 2127f95f3850SWill Newton } 2128f95f3850SWill Newton 2129f95f3850SWill Newton return 0; 2130f95f3850SWill Newton } 2131f95f3850SWill Newton #else 2132f95f3850SWill Newton #define dw_mci_suspend NULL 2133f95f3850SWill Newton #define dw_mci_resume NULL 2134*6fe8890dSJaehoon Chung #endif /* CONFIG_PM_SLEEP */ 2135*6fe8890dSJaehoon Chung 2136*6fe8890dSJaehoon Chung static SIMPLE_DEV_PM_OPS(dw_mci_pmops, dw_mci_suspend, dw_mci_resume); 2137f95f3850SWill Newton 2138f95f3850SWill Newton static struct platform_driver dw_mci_driver = { 2139f95f3850SWill Newton .remove = __exit_p(dw_mci_remove), 2140f95f3850SWill Newton .driver = { 2141f95f3850SWill Newton .name = "dw_mmc", 2142*6fe8890dSJaehoon Chung .pm = &dw_mci_pmops, 2143f95f3850SWill Newton }, 2144f95f3850SWill Newton }; 2145f95f3850SWill Newton 2146f95f3850SWill Newton static int __init dw_mci_init(void) 2147f95f3850SWill Newton { 2148f95f3850SWill Newton return platform_driver_probe(&dw_mci_driver, dw_mci_probe); 2149f95f3850SWill Newton } 2150f95f3850SWill Newton 2151f95f3850SWill Newton static void __exit dw_mci_exit(void) 2152f95f3850SWill Newton { 2153f95f3850SWill Newton platform_driver_unregister(&dw_mci_driver); 2154f95f3850SWill Newton } 2155f95f3850SWill Newton 2156f95f3850SWill Newton module_init(dw_mci_init); 2157f95f3850SWill Newton module_exit(dw_mci_exit); 2158f95f3850SWill Newton 2159f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 2160f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 2161f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 2162f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 2163