1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/seq_file.h> 26f95f3850SWill Newton #include <linux/slab.h> 27f95f3850SWill Newton #include <linux/stat.h> 28f95f3850SWill Newton #include <linux/delay.h> 29f95f3850SWill Newton #include <linux/irq.h> 30f95f3850SWill Newton #include <linux/mmc/host.h> 31f95f3850SWill Newton #include <linux/mmc/mmc.h> 32f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 33f95f3850SWill Newton #include <linux/bitops.h> 34c07946a3SJaehoon Chung #include <linux/regulator/consumer.h> 351791b13eSJames Hogan #include <linux/workqueue.h> 36f95f3850SWill Newton 37f95f3850SWill Newton #include "dw_mmc.h" 38f95f3850SWill Newton 39f95f3850SWill Newton /* Common flag combinations */ 40f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 41f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 42f95f3850SWill Newton SDMMC_INT_EBE) 43f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 44f95f3850SWill Newton SDMMC_INT_RESP_ERR) 45f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 46f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 47f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 48f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 49f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 50f95f3850SWill Newton 51f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 52f95f3850SWill Newton struct idmac_desc { 53f95f3850SWill Newton u32 des0; /* Control Descriptor */ 54f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 55f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 56f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 57f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 58f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 59f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 60f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 61f95f3850SWill Newton 62f95f3850SWill Newton u32 des1; /* Buffer sizes */ 63f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 649b7bbe10SShashidhar Hiremath ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) 65f95f3850SWill Newton 66f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 67f95f3850SWill Newton 68f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 69f95f3850SWill Newton }; 70f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 71f95f3850SWill Newton 72f95f3850SWill Newton /** 73f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 74f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 75f95f3850SWill Newton * @host: The MMC controller this slot is using. 76f95f3850SWill Newton * @ctype: Card type for this slot. 77f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 78f95f3850SWill Newton * processed, or NULL when the slot is idle. 79f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 80f95f3850SWill Newton * &struct dw_mci. 81f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 82f95f3850SWill Newton * @flags: Random state bits associated with the slot. 83f95f3850SWill Newton * @id: Number of this slot. 84f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 85f95f3850SWill Newton */ 86f95f3850SWill Newton struct dw_mci_slot { 87f95f3850SWill Newton struct mmc_host *mmc; 88f95f3850SWill Newton struct dw_mci *host; 89f95f3850SWill Newton 90f95f3850SWill Newton u32 ctype; 91f95f3850SWill Newton 92f95f3850SWill Newton struct mmc_request *mrq; 93f95f3850SWill Newton struct list_head queue_node; 94f95f3850SWill Newton 95f95f3850SWill Newton unsigned int clock; 96f95f3850SWill Newton unsigned long flags; 97f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 98f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 99f95f3850SWill Newton int id; 100f95f3850SWill Newton int last_detect_state; 101f95f3850SWill Newton }; 102f95f3850SWill Newton 1031791b13eSJames Hogan static struct workqueue_struct *dw_mci_card_workqueue; 1041791b13eSJames Hogan 105f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 106f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 107f95f3850SWill Newton { 108f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 109f95f3850SWill Newton struct mmc_request *mrq; 110f95f3850SWill Newton struct mmc_command *cmd; 111f95f3850SWill Newton struct mmc_command *stop; 112f95f3850SWill Newton struct mmc_data *data; 113f95f3850SWill Newton 114f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 115f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 116f95f3850SWill Newton mrq = slot->mrq; 117f95f3850SWill Newton 118f95f3850SWill Newton if (mrq) { 119f95f3850SWill Newton cmd = mrq->cmd; 120f95f3850SWill Newton data = mrq->data; 121f95f3850SWill Newton stop = mrq->stop; 122f95f3850SWill Newton 123f95f3850SWill Newton if (cmd) 124f95f3850SWill Newton seq_printf(s, 125f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 126f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 127f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 128f95f3850SWill Newton cmd->resp[2], cmd->error); 129f95f3850SWill Newton if (data) 130f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 131f95f3850SWill Newton data->bytes_xfered, data->blocks, 132f95f3850SWill Newton data->blksz, data->flags, data->error); 133f95f3850SWill Newton if (stop) 134f95f3850SWill Newton seq_printf(s, 135f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 136f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 137f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 138f95f3850SWill Newton stop->resp[2], stop->error); 139f95f3850SWill Newton } 140f95f3850SWill Newton 141f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 142f95f3850SWill Newton 143f95f3850SWill Newton return 0; 144f95f3850SWill Newton } 145f95f3850SWill Newton 146f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 147f95f3850SWill Newton { 148f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 149f95f3850SWill Newton } 150f95f3850SWill Newton 151f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 152f95f3850SWill Newton .owner = THIS_MODULE, 153f95f3850SWill Newton .open = dw_mci_req_open, 154f95f3850SWill Newton .read = seq_read, 155f95f3850SWill Newton .llseek = seq_lseek, 156f95f3850SWill Newton .release = single_release, 157f95f3850SWill Newton }; 158f95f3850SWill Newton 159f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 160f95f3850SWill Newton { 161f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 162f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 163f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 164f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 165f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 166f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 167f95f3850SWill Newton 168f95f3850SWill Newton return 0; 169f95f3850SWill Newton } 170f95f3850SWill Newton 171f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 172f95f3850SWill Newton { 173f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 174f95f3850SWill Newton } 175f95f3850SWill Newton 176f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 177f95f3850SWill Newton .owner = THIS_MODULE, 178f95f3850SWill Newton .open = dw_mci_regs_open, 179f95f3850SWill Newton .read = seq_read, 180f95f3850SWill Newton .llseek = seq_lseek, 181f95f3850SWill Newton .release = single_release, 182f95f3850SWill Newton }; 183f95f3850SWill Newton 184f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 185f95f3850SWill Newton { 186f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 187f95f3850SWill Newton struct dw_mci *host = slot->host; 188f95f3850SWill Newton struct dentry *root; 189f95f3850SWill Newton struct dentry *node; 190f95f3850SWill Newton 191f95f3850SWill Newton root = mmc->debugfs_root; 192f95f3850SWill Newton if (!root) 193f95f3850SWill Newton return; 194f95f3850SWill Newton 195f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 196f95f3850SWill Newton &dw_mci_regs_fops); 197f95f3850SWill Newton if (!node) 198f95f3850SWill Newton goto err; 199f95f3850SWill Newton 200f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 201f95f3850SWill Newton &dw_mci_req_fops); 202f95f3850SWill Newton if (!node) 203f95f3850SWill Newton goto err; 204f95f3850SWill Newton 205f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 206f95f3850SWill Newton if (!node) 207f95f3850SWill Newton goto err; 208f95f3850SWill Newton 209f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 210f95f3850SWill Newton (u32 *)&host->pending_events); 211f95f3850SWill Newton if (!node) 212f95f3850SWill Newton goto err; 213f95f3850SWill Newton 214f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 215f95f3850SWill Newton (u32 *)&host->completed_events); 216f95f3850SWill Newton if (!node) 217f95f3850SWill Newton goto err; 218f95f3850SWill Newton 219f95f3850SWill Newton return; 220f95f3850SWill Newton 221f95f3850SWill Newton err: 222f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 223f95f3850SWill Newton } 224f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 225f95f3850SWill Newton 226f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 227f95f3850SWill Newton { 228f95f3850SWill Newton /* timeout (maximum) */ 229f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 230f95f3850SWill Newton } 231f95f3850SWill Newton 232f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 233f95f3850SWill Newton { 234f95f3850SWill Newton struct mmc_data *data; 235f95f3850SWill Newton u32 cmdr; 236f95f3850SWill Newton cmd->error = -EINPROGRESS; 237f95f3850SWill Newton 238f95f3850SWill Newton cmdr = cmd->opcode; 239f95f3850SWill Newton 240f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 241f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 242f95f3850SWill Newton else 243f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 244f95f3850SWill Newton 245f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 246f95f3850SWill Newton /* We expect a response, so set this bit */ 247f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 248f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 249f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 250f95f3850SWill Newton } 251f95f3850SWill Newton 252f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 253f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 254f95f3850SWill Newton 255f95f3850SWill Newton data = cmd->data; 256f95f3850SWill Newton if (data) { 257f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 258f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 259f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 260f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 261f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 262f95f3850SWill Newton } 263f95f3850SWill Newton 264f95f3850SWill Newton return cmdr; 265f95f3850SWill Newton } 266f95f3850SWill Newton 267f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 268f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 269f95f3850SWill Newton { 270f95f3850SWill Newton host->cmd = cmd; 271*62ca8034SShashidhar Hiremath dev_vdbg(&host->dev, 272f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 273f95f3850SWill Newton cmd->arg, cmd_flags); 274f95f3850SWill Newton 275f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 276f95f3850SWill Newton wmb(); 277f95f3850SWill Newton 278f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 279f95f3850SWill Newton } 280f95f3850SWill Newton 281f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 282f95f3850SWill Newton { 283f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 284f95f3850SWill Newton } 285f95f3850SWill Newton 286f95f3850SWill Newton /* DMA interface functions */ 287f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 288f95f3850SWill Newton { 28903e8cb53SJames Hogan if (host->using_dma) { 290f95f3850SWill Newton host->dma_ops->stop(host); 291f95f3850SWill Newton host->dma_ops->cleanup(host); 292f95f3850SWill Newton } else { 293f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 294f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 295f95f3850SWill Newton } 296f95f3850SWill Newton } 297f95f3850SWill Newton 298f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 299f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 300f95f3850SWill Newton { 301f95f3850SWill Newton struct mmc_data *data = host->data; 302f95f3850SWill Newton 303f95f3850SWill Newton if (data) 304*62ca8034SShashidhar Hiremath dma_unmap_sg(&host->dev, data->sg, data->sg_len, 305f95f3850SWill Newton ((data->flags & MMC_DATA_WRITE) 306f95f3850SWill Newton ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 307f95f3850SWill Newton } 308f95f3850SWill Newton 309f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 310f95f3850SWill Newton { 311f95f3850SWill Newton u32 temp; 312f95f3850SWill Newton 313f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 314f95f3850SWill Newton temp = mci_readl(host, CTRL); 315f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 316f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 317f95f3850SWill Newton mci_writel(host, CTRL, temp); 318f95f3850SWill Newton 319f95f3850SWill Newton /* Stop the IDMAC running */ 320f95f3850SWill Newton temp = mci_readl(host, BMOD); 321a5289a43SJaehoon Chung temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB); 322f95f3850SWill Newton mci_writel(host, BMOD, temp); 323f95f3850SWill Newton } 324f95f3850SWill Newton 325f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 326f95f3850SWill Newton { 327f95f3850SWill Newton struct mmc_data *data = host->data; 328f95f3850SWill Newton 329*62ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "DMA complete\n"); 330f95f3850SWill Newton 331f95f3850SWill Newton host->dma_ops->cleanup(host); 332f95f3850SWill Newton 333f95f3850SWill Newton /* 334f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 335f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 336f95f3850SWill Newton */ 337f95f3850SWill Newton if (data) { 338f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 339f95f3850SWill Newton tasklet_schedule(&host->tasklet); 340f95f3850SWill Newton } 341f95f3850SWill Newton } 342f95f3850SWill Newton 343f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 344f95f3850SWill Newton unsigned int sg_len) 345f95f3850SWill Newton { 346f95f3850SWill Newton int i; 347f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 348f95f3850SWill Newton 349f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 350f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 351f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 352f95f3850SWill Newton 353f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 354f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 355f95f3850SWill Newton 356f95f3850SWill Newton /* Buffer length */ 357f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 358f95f3850SWill Newton 359f95f3850SWill Newton /* Physical address to DMA to/from */ 360f95f3850SWill Newton desc->des2 = mem_addr; 361f95f3850SWill Newton } 362f95f3850SWill Newton 363f95f3850SWill Newton /* Set first descriptor */ 364f95f3850SWill Newton desc = host->sg_cpu; 365f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 366f95f3850SWill Newton 367f95f3850SWill Newton /* Set last descriptor */ 368f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 369f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 370f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 371f95f3850SWill Newton 372f95f3850SWill Newton wmb(); 373f95f3850SWill Newton } 374f95f3850SWill Newton 375f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 376f95f3850SWill Newton { 377f95f3850SWill Newton u32 temp; 378f95f3850SWill Newton 379f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 380f95f3850SWill Newton 381f95f3850SWill Newton /* Select IDMAC interface */ 382f95f3850SWill Newton temp = mci_readl(host, CTRL); 383f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 384f95f3850SWill Newton mci_writel(host, CTRL, temp); 385f95f3850SWill Newton 386f95f3850SWill Newton wmb(); 387f95f3850SWill Newton 388f95f3850SWill Newton /* Enable the IDMAC */ 389f95f3850SWill Newton temp = mci_readl(host, BMOD); 390a5289a43SJaehoon Chung temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB; 391f95f3850SWill Newton mci_writel(host, BMOD, temp); 392f95f3850SWill Newton 393f95f3850SWill Newton /* Start it running */ 394f95f3850SWill Newton mci_writel(host, PLDMND, 1); 395f95f3850SWill Newton } 396f95f3850SWill Newton 397f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 398f95f3850SWill Newton { 399f95f3850SWill Newton struct idmac_desc *p; 400f95f3850SWill Newton int i; 401f95f3850SWill Newton 402f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 403f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 404f95f3850SWill Newton 405f95f3850SWill Newton /* Forward link the descriptor list */ 406f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 407f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 408f95f3850SWill Newton 409f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 410f95f3850SWill Newton p->des3 = host->sg_dma; 411f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 412f95f3850SWill Newton 413f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 414f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 415f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 416f95f3850SWill Newton 417f95f3850SWill Newton /* Set the descriptor base address */ 418f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 419f95f3850SWill Newton return 0; 420f95f3850SWill Newton } 421f95f3850SWill Newton 422f95f3850SWill Newton static struct dw_mci_dma_ops dw_mci_idmac_ops = { 423f95f3850SWill Newton .init = dw_mci_idmac_init, 424f95f3850SWill Newton .start = dw_mci_idmac_start_dma, 425f95f3850SWill Newton .stop = dw_mci_idmac_stop_dma, 426f95f3850SWill Newton .complete = dw_mci_idmac_complete_dma, 427f95f3850SWill Newton .cleanup = dw_mci_dma_cleanup, 428f95f3850SWill Newton }; 429f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 430f95f3850SWill Newton 431f95f3850SWill Newton static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 432f95f3850SWill Newton { 433f95f3850SWill Newton struct scatterlist *sg; 434f95f3850SWill Newton unsigned int i, direction, sg_len; 435f95f3850SWill Newton u32 temp; 436f95f3850SWill Newton 43703e8cb53SJames Hogan host->using_dma = 0; 43803e8cb53SJames Hogan 439f95f3850SWill Newton /* If we don't have a channel, we can't do DMA */ 440f95f3850SWill Newton if (!host->use_dma) 441f95f3850SWill Newton return -ENODEV; 442f95f3850SWill Newton 443f95f3850SWill Newton /* 444f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 445f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 446f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 447f95f3850SWill Newton */ 448f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 449f95f3850SWill Newton return -EINVAL; 450f95f3850SWill Newton if (data->blksz & 3) 451f95f3850SWill Newton return -EINVAL; 452f95f3850SWill Newton 453f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 454f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 455f95f3850SWill Newton return -EINVAL; 456f95f3850SWill Newton } 457f95f3850SWill Newton 45803e8cb53SJames Hogan host->using_dma = 1; 45903e8cb53SJames Hogan 460f95f3850SWill Newton if (data->flags & MMC_DATA_READ) 461f95f3850SWill Newton direction = DMA_FROM_DEVICE; 462f95f3850SWill Newton else 463f95f3850SWill Newton direction = DMA_TO_DEVICE; 464f95f3850SWill Newton 465*62ca8034SShashidhar Hiremath sg_len = dma_map_sg(&host->dev, data->sg, data->sg_len, 466f95f3850SWill Newton direction); 467f95f3850SWill Newton 468*62ca8034SShashidhar Hiremath dev_vdbg(&host->dev, 469f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 470f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 471f95f3850SWill Newton sg_len); 472f95f3850SWill Newton 473f95f3850SWill Newton /* Enable the DMA interface */ 474f95f3850SWill Newton temp = mci_readl(host, CTRL); 475f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 476f95f3850SWill Newton mci_writel(host, CTRL, temp); 477f95f3850SWill Newton 478f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 479f95f3850SWill Newton temp = mci_readl(host, INTMASK); 480f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 481f95f3850SWill Newton mci_writel(host, INTMASK, temp); 482f95f3850SWill Newton 483f95f3850SWill Newton host->dma_ops->start(host, sg_len); 484f95f3850SWill Newton 485f95f3850SWill Newton return 0; 486f95f3850SWill Newton } 487f95f3850SWill Newton 488f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 489f95f3850SWill Newton { 490f95f3850SWill Newton u32 temp; 491f95f3850SWill Newton 492f95f3850SWill Newton data->error = -EINPROGRESS; 493f95f3850SWill Newton 494f95f3850SWill Newton WARN_ON(host->data); 495f95f3850SWill Newton host->sg = NULL; 496f95f3850SWill Newton host->data = data; 497f95f3850SWill Newton 49855c5efbcSJames Hogan if (data->flags & MMC_DATA_READ) 49955c5efbcSJames Hogan host->dir_status = DW_MCI_RECV_STATUS; 50055c5efbcSJames Hogan else 50155c5efbcSJames Hogan host->dir_status = DW_MCI_SEND_STATUS; 50255c5efbcSJames Hogan 503f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 504f9c2a0dcSSeungwon Jeon int flags = SG_MITER_ATOMIC; 505f9c2a0dcSSeungwon Jeon if (host->data->flags & MMC_DATA_READ) 506f9c2a0dcSSeungwon Jeon flags |= SG_MITER_TO_SG; 507f9c2a0dcSSeungwon Jeon else 508f9c2a0dcSSeungwon Jeon flags |= SG_MITER_FROM_SG; 509f9c2a0dcSSeungwon Jeon 510f9c2a0dcSSeungwon Jeon sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 511f95f3850SWill Newton host->sg = data->sg; 51234b664a2SJames Hogan host->part_buf_start = 0; 51334b664a2SJames Hogan host->part_buf_count = 0; 514f95f3850SWill Newton 515b40af3aaSJames Hogan mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); 516f95f3850SWill Newton temp = mci_readl(host, INTMASK); 517f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 518f95f3850SWill Newton mci_writel(host, INTMASK, temp); 519f95f3850SWill Newton 520f95f3850SWill Newton temp = mci_readl(host, CTRL); 521f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 522f95f3850SWill Newton mci_writel(host, CTRL, temp); 523f95f3850SWill Newton } 524f95f3850SWill Newton } 525f95f3850SWill Newton 526f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 527f95f3850SWill Newton { 528f95f3850SWill Newton struct dw_mci *host = slot->host; 529f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 530f95f3850SWill Newton unsigned int cmd_status = 0; 531f95f3850SWill Newton 532f95f3850SWill Newton mci_writel(host, CMDARG, arg); 533f95f3850SWill Newton wmb(); 534f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 535f95f3850SWill Newton 536f95f3850SWill Newton while (time_before(jiffies, timeout)) { 537f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 538f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 539f95f3850SWill Newton return; 540f95f3850SWill Newton } 541f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 542f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 543f95f3850SWill Newton cmd, arg, cmd_status); 544f95f3850SWill Newton } 545f95f3850SWill Newton 546f95f3850SWill Newton static void dw_mci_setup_bus(struct dw_mci_slot *slot) 547f95f3850SWill Newton { 548f95f3850SWill Newton struct dw_mci *host = slot->host; 549f95f3850SWill Newton u32 div; 550f95f3850SWill Newton 551f95f3850SWill Newton if (slot->clock != host->current_speed) { 552f95f3850SWill Newton if (host->bus_hz % slot->clock) 553f95f3850SWill Newton /* 554f95f3850SWill Newton * move the + 1 after the divide to prevent 555f95f3850SWill Newton * over-clocking the card. 556f95f3850SWill Newton */ 557f95f3850SWill Newton div = ((host->bus_hz / slot->clock) >> 1) + 1; 558f95f3850SWill Newton else 559f95f3850SWill Newton div = (host->bus_hz / slot->clock) >> 1; 560f95f3850SWill Newton 561f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 562f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 563f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 564f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 565f95f3850SWill Newton 566f95f3850SWill Newton /* disable clock */ 567f95f3850SWill Newton mci_writel(host, CLKENA, 0); 568f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 569f95f3850SWill Newton 570f95f3850SWill Newton /* inform CIU */ 571f95f3850SWill Newton mci_send_cmd(slot, 572f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 573f95f3850SWill Newton 574f95f3850SWill Newton /* set clock to desired speed */ 575f95f3850SWill Newton mci_writel(host, CLKDIV, div); 576f95f3850SWill Newton 577f95f3850SWill Newton /* inform CIU */ 578f95f3850SWill Newton mci_send_cmd(slot, 579f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 580f95f3850SWill Newton 581f95f3850SWill Newton /* enable clock */ 582aadb9f41SWill Newton mci_writel(host, CLKENA, SDMMC_CLKEN_ENABLE | 583aadb9f41SWill Newton SDMMC_CLKEN_LOW_PWR); 584f95f3850SWill Newton 585f95f3850SWill Newton /* inform CIU */ 586f95f3850SWill Newton mci_send_cmd(slot, 587f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 588f95f3850SWill Newton 589f95f3850SWill Newton host->current_speed = slot->clock; 590f95f3850SWill Newton } 591f95f3850SWill Newton 592f95f3850SWill Newton /* Set the current slot bus width */ 5931d56c453SSeungwon Jeon mci_writel(host, CTYPE, (slot->ctype << slot->id)); 594f95f3850SWill Newton } 595f95f3850SWill Newton 596053b3ce6SSeungwon Jeon static void __dw_mci_start_request(struct dw_mci *host, 597053b3ce6SSeungwon Jeon struct dw_mci_slot *slot, 598053b3ce6SSeungwon Jeon struct mmc_command *cmd) 599f95f3850SWill Newton { 600f95f3850SWill Newton struct mmc_request *mrq; 601f95f3850SWill Newton struct mmc_data *data; 602f95f3850SWill Newton u32 cmdflags; 603f95f3850SWill Newton 604f95f3850SWill Newton mrq = slot->mrq; 605f95f3850SWill Newton if (host->pdata->select_slot) 606f95f3850SWill Newton host->pdata->select_slot(slot->id); 607f95f3850SWill Newton 608f95f3850SWill Newton /* Slot specific timing and width adjustment */ 609f95f3850SWill Newton dw_mci_setup_bus(slot); 610f95f3850SWill Newton 611f95f3850SWill Newton host->cur_slot = slot; 612f95f3850SWill Newton host->mrq = mrq; 613f95f3850SWill Newton 614f95f3850SWill Newton host->pending_events = 0; 615f95f3850SWill Newton host->completed_events = 0; 616f95f3850SWill Newton host->data_status = 0; 617f95f3850SWill Newton 618053b3ce6SSeungwon Jeon data = cmd->data; 619f95f3850SWill Newton if (data) { 620f95f3850SWill Newton dw_mci_set_timeout(host); 621f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 622f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 623f95f3850SWill Newton } 624f95f3850SWill Newton 625f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 626f95f3850SWill Newton 627f95f3850SWill Newton /* this is the first command, send the initialization clock */ 628f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 629f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 630f95f3850SWill Newton 631f95f3850SWill Newton if (data) { 632f95f3850SWill Newton dw_mci_submit_data(host, data); 633f95f3850SWill Newton wmb(); 634f95f3850SWill Newton } 635f95f3850SWill Newton 636f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 637f95f3850SWill Newton 638f95f3850SWill Newton if (mrq->stop) 639f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 640f95f3850SWill Newton } 641f95f3850SWill Newton 642053b3ce6SSeungwon Jeon static void dw_mci_start_request(struct dw_mci *host, 643053b3ce6SSeungwon Jeon struct dw_mci_slot *slot) 644053b3ce6SSeungwon Jeon { 645053b3ce6SSeungwon Jeon struct mmc_request *mrq = slot->mrq; 646053b3ce6SSeungwon Jeon struct mmc_command *cmd; 647053b3ce6SSeungwon Jeon 648053b3ce6SSeungwon Jeon cmd = mrq->sbc ? mrq->sbc : mrq->cmd; 649053b3ce6SSeungwon Jeon __dw_mci_start_request(host, slot, cmd); 650053b3ce6SSeungwon Jeon } 651053b3ce6SSeungwon Jeon 6527456caaeSJames Hogan /* must be called with host->lock held */ 653f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 654f95f3850SWill Newton struct mmc_request *mrq) 655f95f3850SWill Newton { 656f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 657f95f3850SWill Newton host->state); 658f95f3850SWill Newton 659f95f3850SWill Newton slot->mrq = mrq; 660f95f3850SWill Newton 661f95f3850SWill Newton if (host->state == STATE_IDLE) { 662f95f3850SWill Newton host->state = STATE_SENDING_CMD; 663f95f3850SWill Newton dw_mci_start_request(host, slot); 664f95f3850SWill Newton } else { 665f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 666f95f3850SWill Newton } 667f95f3850SWill Newton } 668f95f3850SWill Newton 669f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 670f95f3850SWill Newton { 671f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 672f95f3850SWill Newton struct dw_mci *host = slot->host; 673f95f3850SWill Newton 674f95f3850SWill Newton WARN_ON(slot->mrq); 675f95f3850SWill Newton 6767456caaeSJames Hogan /* 6777456caaeSJames Hogan * The check for card presence and queueing of the request must be 6787456caaeSJames Hogan * atomic, otherwise the card could be removed in between and the 6797456caaeSJames Hogan * request wouldn't fail until another card was inserted. 6807456caaeSJames Hogan */ 6817456caaeSJames Hogan spin_lock_bh(&host->lock); 6827456caaeSJames Hogan 683f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 6847456caaeSJames Hogan spin_unlock_bh(&host->lock); 685f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 686f95f3850SWill Newton mmc_request_done(mmc, mrq); 687f95f3850SWill Newton return; 688f95f3850SWill Newton } 689f95f3850SWill Newton 690f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 6917456caaeSJames Hogan 6927456caaeSJames Hogan spin_unlock_bh(&host->lock); 693f95f3850SWill Newton } 694f95f3850SWill Newton 695f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 696f95f3850SWill Newton { 697f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 69841babf75SJaehoon Chung u32 regs; 699f95f3850SWill Newton 700f95f3850SWill Newton /* set default 1 bit mode */ 701f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 702f95f3850SWill Newton 703f95f3850SWill Newton switch (ios->bus_width) { 704f95f3850SWill Newton case MMC_BUS_WIDTH_1: 705f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 706f95f3850SWill Newton break; 707f95f3850SWill Newton case MMC_BUS_WIDTH_4: 708f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 709f95f3850SWill Newton break; 710c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 711c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 712c9b2a06fSJaehoon Chung break; 713f95f3850SWill Newton } 714f95f3850SWill Newton 71541babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 7163f514291SSeungwon Jeon 7173f514291SSeungwon Jeon /* DDR mode set */ 7183f514291SSeungwon Jeon if (ios->timing == MMC_TIMING_UHS_DDR50) 71941babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 7203f514291SSeungwon Jeon else 7213f514291SSeungwon Jeon regs &= ~(0x1 << slot->id) << 16; 7223f514291SSeungwon Jeon 72341babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 72441babf75SJaehoon Chung 725f95f3850SWill Newton if (ios->clock) { 726f95f3850SWill Newton /* 727f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 728f95f3850SWill Newton * core ios update when finding the minimum. 729f95f3850SWill Newton */ 730f95f3850SWill Newton slot->clock = ios->clock; 731f95f3850SWill Newton } 732f95f3850SWill Newton 733f95f3850SWill Newton switch (ios->power_mode) { 734f95f3850SWill Newton case MMC_POWER_UP: 735f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 736f95f3850SWill Newton break; 737f95f3850SWill Newton default: 738f95f3850SWill Newton break; 739f95f3850SWill Newton } 740f95f3850SWill Newton } 741f95f3850SWill Newton 742f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 743f95f3850SWill Newton { 744f95f3850SWill Newton int read_only; 745f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 746f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 747f95f3850SWill Newton 748f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 749f95f3850SWill Newton if (brd->get_ro) 750f95f3850SWill Newton read_only = brd->get_ro(slot->id); 751f95f3850SWill Newton else 752f95f3850SWill Newton read_only = 753f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 754f95f3850SWill Newton 755f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 756f95f3850SWill Newton read_only ? "read-only" : "read-write"); 757f95f3850SWill Newton 758f95f3850SWill Newton return read_only; 759f95f3850SWill Newton } 760f95f3850SWill Newton 761f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 762f95f3850SWill Newton { 763f95f3850SWill Newton int present; 764f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 765f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 766f95f3850SWill Newton 767f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 768fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 769fc3d7720SJaehoon Chung present = 1; 770fc3d7720SJaehoon Chung else if (brd->get_cd) 771f95f3850SWill Newton present = !brd->get_cd(slot->id); 772f95f3850SWill Newton else 773f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 774f95f3850SWill Newton == 0 ? 1 : 0; 775f95f3850SWill Newton 776f95f3850SWill Newton if (present) 777f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 778f95f3850SWill Newton else 779f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 780f95f3850SWill Newton 781f95f3850SWill Newton return present; 782f95f3850SWill Newton } 783f95f3850SWill Newton 7841a5c8e1fSShashidhar Hiremath static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) 7851a5c8e1fSShashidhar Hiremath { 7861a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = mmc_priv(mmc); 7871a5c8e1fSShashidhar Hiremath struct dw_mci *host = slot->host; 7881a5c8e1fSShashidhar Hiremath u32 int_mask; 7891a5c8e1fSShashidhar Hiremath 7901a5c8e1fSShashidhar Hiremath /* Enable/disable Slot Specific SDIO interrupt */ 7911a5c8e1fSShashidhar Hiremath int_mask = mci_readl(host, INTMASK); 7921a5c8e1fSShashidhar Hiremath if (enb) { 7931a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 7941a5c8e1fSShashidhar Hiremath (int_mask | (1 << SDMMC_INT_SDIO(slot->id)))); 7951a5c8e1fSShashidhar Hiremath } else { 7961a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 7971a5c8e1fSShashidhar Hiremath (int_mask & ~(1 << SDMMC_INT_SDIO(slot->id)))); 7981a5c8e1fSShashidhar Hiremath } 7991a5c8e1fSShashidhar Hiremath } 8001a5c8e1fSShashidhar Hiremath 801f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 802f95f3850SWill Newton .request = dw_mci_request, 803f95f3850SWill Newton .set_ios = dw_mci_set_ios, 804f95f3850SWill Newton .get_ro = dw_mci_get_ro, 805f95f3850SWill Newton .get_cd = dw_mci_get_cd, 8061a5c8e1fSShashidhar Hiremath .enable_sdio_irq = dw_mci_enable_sdio_irq, 807f95f3850SWill Newton }; 808f95f3850SWill Newton 809f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 810f95f3850SWill Newton __releases(&host->lock) 811f95f3850SWill Newton __acquires(&host->lock) 812f95f3850SWill Newton { 813f95f3850SWill Newton struct dw_mci_slot *slot; 814f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 815f95f3850SWill Newton 816f95f3850SWill Newton WARN_ON(host->cmd || host->data); 817f95f3850SWill Newton 818f95f3850SWill Newton host->cur_slot->mrq = NULL; 819f95f3850SWill Newton host->mrq = NULL; 820f95f3850SWill Newton if (!list_empty(&host->queue)) { 821f95f3850SWill Newton slot = list_entry(host->queue.next, 822f95f3850SWill Newton struct dw_mci_slot, queue_node); 823f95f3850SWill Newton list_del(&slot->queue_node); 824*62ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "list not empty: %s is next\n", 825f95f3850SWill Newton mmc_hostname(slot->mmc)); 826f95f3850SWill Newton host->state = STATE_SENDING_CMD; 827f95f3850SWill Newton dw_mci_start_request(host, slot); 828f95f3850SWill Newton } else { 829*62ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "list empty\n"); 830f95f3850SWill Newton host->state = STATE_IDLE; 831f95f3850SWill Newton } 832f95f3850SWill Newton 833f95f3850SWill Newton spin_unlock(&host->lock); 834f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 835f95f3850SWill Newton spin_lock(&host->lock); 836f95f3850SWill Newton } 837f95f3850SWill Newton 838f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 839f95f3850SWill Newton { 840f95f3850SWill Newton u32 status = host->cmd_status; 841f95f3850SWill Newton 842f95f3850SWill Newton host->cmd_status = 0; 843f95f3850SWill Newton 844f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 845f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 846f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 847f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 848f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 849f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 850f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 851f95f3850SWill Newton } else { 852f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 853f95f3850SWill Newton cmd->resp[1] = 0; 854f95f3850SWill Newton cmd->resp[2] = 0; 855f95f3850SWill Newton cmd->resp[3] = 0; 856f95f3850SWill Newton } 857f95f3850SWill Newton } 858f95f3850SWill Newton 859f95f3850SWill Newton if (status & SDMMC_INT_RTO) 860f95f3850SWill Newton cmd->error = -ETIMEDOUT; 861f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 862f95f3850SWill Newton cmd->error = -EILSEQ; 863f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 864f95f3850SWill Newton cmd->error = -EIO; 865f95f3850SWill Newton else 866f95f3850SWill Newton cmd->error = 0; 867f95f3850SWill Newton 868f95f3850SWill Newton if (cmd->error) { 869f95f3850SWill Newton /* newer ip versions need a delay between retries */ 870f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 871f95f3850SWill Newton mdelay(20); 872f95f3850SWill Newton 873f95f3850SWill Newton if (cmd->data) { 874f95f3850SWill Newton host->data = NULL; 875f95f3850SWill Newton dw_mci_stop_dma(host); 876f95f3850SWill Newton } 877f95f3850SWill Newton } 878f95f3850SWill Newton } 879f95f3850SWill Newton 880f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 881f95f3850SWill Newton { 882f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 883f95f3850SWill Newton struct mmc_data *data; 884f95f3850SWill Newton struct mmc_command *cmd; 885f95f3850SWill Newton enum dw_mci_state state; 886f95f3850SWill Newton enum dw_mci_state prev_state; 88794dd5b33SJames Hogan u32 status, ctrl; 888f95f3850SWill Newton 889f95f3850SWill Newton spin_lock(&host->lock); 890f95f3850SWill Newton 891f95f3850SWill Newton state = host->state; 892f95f3850SWill Newton data = host->data; 893f95f3850SWill Newton 894f95f3850SWill Newton do { 895f95f3850SWill Newton prev_state = state; 896f95f3850SWill Newton 897f95f3850SWill Newton switch (state) { 898f95f3850SWill Newton case STATE_IDLE: 899f95f3850SWill Newton break; 900f95f3850SWill Newton 901f95f3850SWill Newton case STATE_SENDING_CMD: 902f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 903f95f3850SWill Newton &host->pending_events)) 904f95f3850SWill Newton break; 905f95f3850SWill Newton 906f95f3850SWill Newton cmd = host->cmd; 907f95f3850SWill Newton host->cmd = NULL; 908f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 909053b3ce6SSeungwon Jeon dw_mci_command_complete(host, cmd); 910053b3ce6SSeungwon Jeon if (cmd == host->mrq->sbc && !cmd->error) { 911053b3ce6SSeungwon Jeon prev_state = state = STATE_SENDING_CMD; 912053b3ce6SSeungwon Jeon __dw_mci_start_request(host, host->cur_slot, 913053b3ce6SSeungwon Jeon host->mrq->cmd); 914053b3ce6SSeungwon Jeon goto unlock; 915053b3ce6SSeungwon Jeon } 916053b3ce6SSeungwon Jeon 917f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 918f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 919f95f3850SWill Newton goto unlock; 920f95f3850SWill Newton } 921f95f3850SWill Newton 922f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 923f95f3850SWill Newton /* fall through */ 924f95f3850SWill Newton 925f95f3850SWill Newton case STATE_SENDING_DATA: 926f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 927f95f3850SWill Newton &host->pending_events)) { 928f95f3850SWill Newton dw_mci_stop_dma(host); 929f95f3850SWill Newton if (data->stop) 930f95f3850SWill Newton send_stop_cmd(host, data); 931f95f3850SWill Newton state = STATE_DATA_ERROR; 932f95f3850SWill Newton break; 933f95f3850SWill Newton } 934f95f3850SWill Newton 935f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 936f95f3850SWill Newton &host->pending_events)) 937f95f3850SWill Newton break; 938f95f3850SWill Newton 939f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 940f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 941f95f3850SWill Newton /* fall through */ 942f95f3850SWill Newton 943f95f3850SWill Newton case STATE_DATA_BUSY: 944f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 945f95f3850SWill Newton &host->pending_events)) 946f95f3850SWill Newton break; 947f95f3850SWill Newton 948f95f3850SWill Newton host->data = NULL; 949f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 950f95f3850SWill Newton status = host->data_status; 951f95f3850SWill Newton 952f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 953f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 954f95f3850SWill Newton data->error = -ETIMEDOUT; 955f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 956f95f3850SWill Newton data->error = -EILSEQ; 95755c5efbcSJames Hogan } else if (status & SDMMC_INT_EBE && 95855c5efbcSJames Hogan host->dir_status == 95955c5efbcSJames Hogan DW_MCI_SEND_STATUS) { 96055c5efbcSJames Hogan /* 96155c5efbcSJames Hogan * No data CRC status was returned. 96255c5efbcSJames Hogan * The number of bytes transferred will 96355c5efbcSJames Hogan * be exaggerated in PIO mode. 96455c5efbcSJames Hogan */ 96555c5efbcSJames Hogan data->bytes_xfered = 0; 96655c5efbcSJames Hogan data->error = -ETIMEDOUT; 967f95f3850SWill Newton } else { 968*62ca8034SShashidhar Hiremath dev_err(&host->dev, 969f95f3850SWill Newton "data FIFO error " 970f95f3850SWill Newton "(status=%08x)\n", 971f95f3850SWill Newton status); 972f95f3850SWill Newton data->error = -EIO; 973f95f3850SWill Newton } 97494dd5b33SJames Hogan /* 97594dd5b33SJames Hogan * After an error, there may be data lingering 97694dd5b33SJames Hogan * in the FIFO, so reset it - doing so 97794dd5b33SJames Hogan * generates a block interrupt, hence setting 97894dd5b33SJames Hogan * the scatter-gather pointer to NULL. 97994dd5b33SJames Hogan */ 980f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 98194dd5b33SJames Hogan host->sg = NULL; 98294dd5b33SJames Hogan ctrl = mci_readl(host, CTRL); 98394dd5b33SJames Hogan ctrl |= SDMMC_CTRL_FIFO_RESET; 98494dd5b33SJames Hogan mci_writel(host, CTRL, ctrl); 985f95f3850SWill Newton } else { 986f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 987f95f3850SWill Newton data->error = 0; 988f95f3850SWill Newton } 989f95f3850SWill Newton 990f95f3850SWill Newton if (!data->stop) { 991f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 992f95f3850SWill Newton goto unlock; 993f95f3850SWill Newton } 994f95f3850SWill Newton 995053b3ce6SSeungwon Jeon if (host->mrq->sbc && !data->error) { 996053b3ce6SSeungwon Jeon data->stop->error = 0; 997053b3ce6SSeungwon Jeon dw_mci_request_end(host, host->mrq); 998053b3ce6SSeungwon Jeon goto unlock; 999053b3ce6SSeungwon Jeon } 1000053b3ce6SSeungwon Jeon 1001f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 1002f95f3850SWill Newton if (!data->error) 1003f95f3850SWill Newton send_stop_cmd(host, data); 1004f95f3850SWill Newton /* fall through */ 1005f95f3850SWill Newton 1006f95f3850SWill Newton case STATE_SENDING_STOP: 1007f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1008f95f3850SWill Newton &host->pending_events)) 1009f95f3850SWill Newton break; 1010f95f3850SWill Newton 1011f95f3850SWill Newton host->cmd = NULL; 1012f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 1013f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1014f95f3850SWill Newton goto unlock; 1015f95f3850SWill Newton 1016f95f3850SWill Newton case STATE_DATA_ERROR: 1017f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1018f95f3850SWill Newton &host->pending_events)) 1019f95f3850SWill Newton break; 1020f95f3850SWill Newton 1021f95f3850SWill Newton state = STATE_DATA_BUSY; 1022f95f3850SWill Newton break; 1023f95f3850SWill Newton } 1024f95f3850SWill Newton } while (state != prev_state); 1025f95f3850SWill Newton 1026f95f3850SWill Newton host->state = state; 1027f95f3850SWill Newton unlock: 1028f95f3850SWill Newton spin_unlock(&host->lock); 1029f95f3850SWill Newton 1030f95f3850SWill Newton } 1031f95f3850SWill Newton 103234b664a2SJames Hogan /* push final bytes to part_buf, only use during push */ 103334b664a2SJames Hogan static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) 103434b664a2SJames Hogan { 103534b664a2SJames Hogan memcpy((void *)&host->part_buf, buf, cnt); 103634b664a2SJames Hogan host->part_buf_count = cnt; 103734b664a2SJames Hogan } 103834b664a2SJames Hogan 103934b664a2SJames Hogan /* append bytes to part_buf, only use during push */ 104034b664a2SJames Hogan static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) 104134b664a2SJames Hogan { 104234b664a2SJames Hogan cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); 104334b664a2SJames Hogan memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); 104434b664a2SJames Hogan host->part_buf_count += cnt; 104534b664a2SJames Hogan return cnt; 104634b664a2SJames Hogan } 104734b664a2SJames Hogan 104834b664a2SJames Hogan /* pull first bytes from part_buf, only use during pull */ 104934b664a2SJames Hogan static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) 105034b664a2SJames Hogan { 105134b664a2SJames Hogan cnt = min(cnt, (int)host->part_buf_count); 105234b664a2SJames Hogan if (cnt) { 105334b664a2SJames Hogan memcpy(buf, (void *)&host->part_buf + host->part_buf_start, 105434b664a2SJames Hogan cnt); 105534b664a2SJames Hogan host->part_buf_count -= cnt; 105634b664a2SJames Hogan host->part_buf_start += cnt; 105734b664a2SJames Hogan } 105834b664a2SJames Hogan return cnt; 105934b664a2SJames Hogan } 106034b664a2SJames Hogan 106134b664a2SJames Hogan /* pull final bytes from the part_buf, assuming it's just been filled */ 106234b664a2SJames Hogan static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) 106334b664a2SJames Hogan { 106434b664a2SJames Hogan memcpy(buf, &host->part_buf, cnt); 106534b664a2SJames Hogan host->part_buf_start = cnt; 106634b664a2SJames Hogan host->part_buf_count = (1 << host->data_shift) - cnt; 106734b664a2SJames Hogan } 106834b664a2SJames Hogan 1069f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 1070f95f3850SWill Newton { 107134b664a2SJames Hogan /* try and push anything in the part_buf */ 107234b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 107334b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 107434b664a2SJames Hogan buf += len; 107534b664a2SJames Hogan cnt -= len; 107634b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 2) { 10774e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 10784e0a5adfSJaehoon Chung host->part_buf16); 107934b664a2SJames Hogan host->part_buf_count = 0; 108034b664a2SJames Hogan } 108134b664a2SJames Hogan } 108234b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 108334b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 108434b664a2SJames Hogan while (cnt >= 2) { 108534b664a2SJames Hogan u16 aligned_buf[64]; 108634b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 108734b664a2SJames Hogan int items = len >> 1; 108834b664a2SJames Hogan int i; 108934b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 109034b664a2SJames Hogan memcpy(aligned_buf, buf, len); 109134b664a2SJames Hogan buf += len; 109234b664a2SJames Hogan cnt -= len; 109334b664a2SJames Hogan /* push data from aligned buffer into fifo */ 109434b664a2SJames Hogan for (i = 0; i < items; ++i) 10954e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 10964e0a5adfSJaehoon Chung aligned_buf[i]); 109734b664a2SJames Hogan } 109834b664a2SJames Hogan } else 109934b664a2SJames Hogan #endif 110034b664a2SJames Hogan { 110134b664a2SJames Hogan u16 *pdata = buf; 110234b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 11034e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), *pdata++); 110434b664a2SJames Hogan buf = pdata; 110534b664a2SJames Hogan } 110634b664a2SJames Hogan /* put anything remaining in the part_buf */ 110734b664a2SJames Hogan if (cnt) { 110834b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 110934b664a2SJames Hogan if (!sg_next(host->sg)) 11104e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 11114e0a5adfSJaehoon Chung host->part_buf16); 1112f95f3850SWill Newton } 1113f95f3850SWill Newton } 1114f95f3850SWill Newton 1115f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 1116f95f3850SWill Newton { 111734b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 111834b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 111934b664a2SJames Hogan while (cnt >= 2) { 112034b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 112134b664a2SJames Hogan u16 aligned_buf[64]; 112234b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 112334b664a2SJames Hogan int items = len >> 1; 112434b664a2SJames Hogan int i; 112534b664a2SJames Hogan for (i = 0; i < items; ++i) 11264e0a5adfSJaehoon Chung aligned_buf[i] = mci_readw(host, 11274e0a5adfSJaehoon Chung DATA(host->data_offset)); 112834b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 112934b664a2SJames Hogan memcpy(buf, aligned_buf, len); 113034b664a2SJames Hogan buf += len; 113134b664a2SJames Hogan cnt -= len; 113234b664a2SJames Hogan } 113334b664a2SJames Hogan } else 113434b664a2SJames Hogan #endif 113534b664a2SJames Hogan { 113634b664a2SJames Hogan u16 *pdata = buf; 113734b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 11384e0a5adfSJaehoon Chung *pdata++ = mci_readw(host, DATA(host->data_offset)); 113934b664a2SJames Hogan buf = pdata; 114034b664a2SJames Hogan } 114134b664a2SJames Hogan if (cnt) { 11424e0a5adfSJaehoon Chung host->part_buf16 = mci_readw(host, DATA(host->data_offset)); 114334b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1144f95f3850SWill Newton } 1145f95f3850SWill Newton } 1146f95f3850SWill Newton 1147f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 1148f95f3850SWill Newton { 114934b664a2SJames Hogan /* try and push anything in the part_buf */ 115034b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 115134b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 115234b664a2SJames Hogan buf += len; 115334b664a2SJames Hogan cnt -= len; 115434b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 4) { 11554e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 11564e0a5adfSJaehoon Chung host->part_buf32); 115734b664a2SJames Hogan host->part_buf_count = 0; 115834b664a2SJames Hogan } 115934b664a2SJames Hogan } 116034b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 116134b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 116234b664a2SJames Hogan while (cnt >= 4) { 116334b664a2SJames Hogan u32 aligned_buf[32]; 116434b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 116534b664a2SJames Hogan int items = len >> 2; 116634b664a2SJames Hogan int i; 116734b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 116834b664a2SJames Hogan memcpy(aligned_buf, buf, len); 116934b664a2SJames Hogan buf += len; 117034b664a2SJames Hogan cnt -= len; 117134b664a2SJames Hogan /* push data from aligned buffer into fifo */ 117234b664a2SJames Hogan for (i = 0; i < items; ++i) 11734e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 11744e0a5adfSJaehoon Chung aligned_buf[i]); 117534b664a2SJames Hogan } 117634b664a2SJames Hogan } else 117734b664a2SJames Hogan #endif 117834b664a2SJames Hogan { 117934b664a2SJames Hogan u32 *pdata = buf; 118034b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 11814e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), *pdata++); 118234b664a2SJames Hogan buf = pdata; 118334b664a2SJames Hogan } 118434b664a2SJames Hogan /* put anything remaining in the part_buf */ 118534b664a2SJames Hogan if (cnt) { 118634b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 118734b664a2SJames Hogan if (!sg_next(host->sg)) 11884e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 11894e0a5adfSJaehoon Chung host->part_buf32); 1190f95f3850SWill Newton } 1191f95f3850SWill Newton } 1192f95f3850SWill Newton 1193f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 1194f95f3850SWill Newton { 119534b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 119634b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 119734b664a2SJames Hogan while (cnt >= 4) { 119834b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 119934b664a2SJames Hogan u32 aligned_buf[32]; 120034b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 120134b664a2SJames Hogan int items = len >> 2; 120234b664a2SJames Hogan int i; 120334b664a2SJames Hogan for (i = 0; i < items; ++i) 12044e0a5adfSJaehoon Chung aligned_buf[i] = mci_readl(host, 12054e0a5adfSJaehoon Chung DATA(host->data_offset)); 120634b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 120734b664a2SJames Hogan memcpy(buf, aligned_buf, len); 120834b664a2SJames Hogan buf += len; 120934b664a2SJames Hogan cnt -= len; 121034b664a2SJames Hogan } 121134b664a2SJames Hogan } else 121234b664a2SJames Hogan #endif 121334b664a2SJames Hogan { 121434b664a2SJames Hogan u32 *pdata = buf; 121534b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 12164e0a5adfSJaehoon Chung *pdata++ = mci_readl(host, DATA(host->data_offset)); 121734b664a2SJames Hogan buf = pdata; 121834b664a2SJames Hogan } 121934b664a2SJames Hogan if (cnt) { 12204e0a5adfSJaehoon Chung host->part_buf32 = mci_readl(host, DATA(host->data_offset)); 122134b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1222f95f3850SWill Newton } 1223f95f3850SWill Newton } 1224f95f3850SWill Newton 1225f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1226f95f3850SWill Newton { 122734b664a2SJames Hogan /* try and push anything in the part_buf */ 122834b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 122934b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 123034b664a2SJames Hogan buf += len; 123134b664a2SJames Hogan cnt -= len; 123234b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 8) { 12334e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12344e0a5adfSJaehoon Chung host->part_buf); 123534b664a2SJames Hogan host->part_buf_count = 0; 123634b664a2SJames Hogan } 123734b664a2SJames Hogan } 123834b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 123934b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 124034b664a2SJames Hogan while (cnt >= 8) { 124134b664a2SJames Hogan u64 aligned_buf[16]; 124234b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 124334b664a2SJames Hogan int items = len >> 3; 124434b664a2SJames Hogan int i; 124534b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 124634b664a2SJames Hogan memcpy(aligned_buf, buf, len); 124734b664a2SJames Hogan buf += len; 124834b664a2SJames Hogan cnt -= len; 124934b664a2SJames Hogan /* push data from aligned buffer into fifo */ 125034b664a2SJames Hogan for (i = 0; i < items; ++i) 12514e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 12524e0a5adfSJaehoon Chung aligned_buf[i]); 125334b664a2SJames Hogan } 125434b664a2SJames Hogan } else 125534b664a2SJames Hogan #endif 125634b664a2SJames Hogan { 125734b664a2SJames Hogan u64 *pdata = buf; 125834b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 12594e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), *pdata++); 126034b664a2SJames Hogan buf = pdata; 126134b664a2SJames Hogan } 126234b664a2SJames Hogan /* put anything remaining in the part_buf */ 126334b664a2SJames Hogan if (cnt) { 126434b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 126534b664a2SJames Hogan if (!sg_next(host->sg)) 12664e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 12674e0a5adfSJaehoon Chung host->part_buf); 1268f95f3850SWill Newton } 1269f95f3850SWill Newton } 1270f95f3850SWill Newton 1271f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1272f95f3850SWill Newton { 127334b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 127434b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 127534b664a2SJames Hogan while (cnt >= 8) { 127634b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 127734b664a2SJames Hogan u64 aligned_buf[16]; 127834b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 127934b664a2SJames Hogan int items = len >> 3; 128034b664a2SJames Hogan int i; 128134b664a2SJames Hogan for (i = 0; i < items; ++i) 12824e0a5adfSJaehoon Chung aligned_buf[i] = mci_readq(host, 12834e0a5adfSJaehoon Chung DATA(host->data_offset)); 128434b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 128534b664a2SJames Hogan memcpy(buf, aligned_buf, len); 128634b664a2SJames Hogan buf += len; 128734b664a2SJames Hogan cnt -= len; 1288f95f3850SWill Newton } 128934b664a2SJames Hogan } else 129034b664a2SJames Hogan #endif 129134b664a2SJames Hogan { 129234b664a2SJames Hogan u64 *pdata = buf; 129334b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 12944e0a5adfSJaehoon Chung *pdata++ = mci_readq(host, DATA(host->data_offset)); 129534b664a2SJames Hogan buf = pdata; 129634b664a2SJames Hogan } 129734b664a2SJames Hogan if (cnt) { 12984e0a5adfSJaehoon Chung host->part_buf = mci_readq(host, DATA(host->data_offset)); 129934b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 130034b664a2SJames Hogan } 130134b664a2SJames Hogan } 130234b664a2SJames Hogan 130334b664a2SJames Hogan static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) 130434b664a2SJames Hogan { 130534b664a2SJames Hogan int len; 130634b664a2SJames Hogan 130734b664a2SJames Hogan /* get remaining partial bytes */ 130834b664a2SJames Hogan len = dw_mci_pull_part_bytes(host, buf, cnt); 130934b664a2SJames Hogan if (unlikely(len == cnt)) 131034b664a2SJames Hogan return; 131134b664a2SJames Hogan buf += len; 131234b664a2SJames Hogan cnt -= len; 131334b664a2SJames Hogan 131434b664a2SJames Hogan /* get the rest of the data */ 131534b664a2SJames Hogan host->pull_data(host, buf, cnt); 1316f95f3850SWill Newton } 1317f95f3850SWill Newton 1318f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1319f95f3850SWill Newton { 1320f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1321f9c2a0dcSSeungwon Jeon void *buf; 1322f9c2a0dcSSeungwon Jeon unsigned int offset; 1323f95f3850SWill Newton struct mmc_data *data = host->data; 1324f95f3850SWill Newton int shift = host->data_shift; 1325f95f3850SWill Newton u32 status; 1326ba6a902dSChris Ball unsigned int nbytes = 0, len; 1327f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1328f95f3850SWill Newton 1329f95f3850SWill Newton do { 1330f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1331f9c2a0dcSSeungwon Jeon goto done; 1332f95f3850SWill Newton 1333f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1334f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1335f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1336f9c2a0dcSSeungwon Jeon offset = 0; 1337f9c2a0dcSSeungwon Jeon 1338f9c2a0dcSSeungwon Jeon do { 1339f9c2a0dcSSeungwon Jeon fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) 1340f9c2a0dcSSeungwon Jeon << shift) + host->part_buf_count; 1341f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1342f9c2a0dcSSeungwon Jeon if (!len) 1343f9c2a0dcSSeungwon Jeon break; 1344f9c2a0dcSSeungwon Jeon dw_mci_pull_data(host, (void *)(buf + offset), len); 1345f95f3850SWill Newton offset += len; 1346f95f3850SWill Newton nbytes += len; 1347f9c2a0dcSSeungwon Jeon remain -= len; 1348f9c2a0dcSSeungwon Jeon } while (remain); 1349f9c2a0dcSSeungwon Jeon sg_miter->consumed = offset; 1350f95f3850SWill Newton 1351f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1352f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1353f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1354f95f3850SWill Newton host->data_status = status; 1355f95f3850SWill Newton data->bytes_xfered += nbytes; 1356f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1357f9c2a0dcSSeungwon Jeon host->sg = NULL; 1358f95f3850SWill Newton smp_wmb(); 1359f95f3850SWill Newton 1360f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1361f95f3850SWill Newton 1362f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1363f95f3850SWill Newton return; 1364f95f3850SWill Newton } 1365f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1366f95f3850SWill Newton data->bytes_xfered += nbytes; 1367f9c2a0dcSSeungwon Jeon 1368f9c2a0dcSSeungwon Jeon if (!remain) { 1369f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1370f9c2a0dcSSeungwon Jeon goto done; 1371f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1372f9c2a0dcSSeungwon Jeon } 1373f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1374f95f3850SWill Newton return; 1375f95f3850SWill Newton 1376f95f3850SWill Newton done: 1377f95f3850SWill Newton data->bytes_xfered += nbytes; 1378f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1379f9c2a0dcSSeungwon Jeon host->sg = NULL; 1380f95f3850SWill Newton smp_wmb(); 1381f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1382f95f3850SWill Newton } 1383f95f3850SWill Newton 1384f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1385f95f3850SWill Newton { 1386f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1387f9c2a0dcSSeungwon Jeon void *buf; 1388f9c2a0dcSSeungwon Jeon unsigned int offset; 1389f95f3850SWill Newton struct mmc_data *data = host->data; 1390f95f3850SWill Newton int shift = host->data_shift; 1391f95f3850SWill Newton u32 status; 1392f95f3850SWill Newton unsigned int nbytes = 0, len; 1393f9c2a0dcSSeungwon Jeon unsigned int fifo_depth = host->fifo_depth; 1394f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1395f95f3850SWill Newton 1396f95f3850SWill Newton do { 1397f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1398f9c2a0dcSSeungwon Jeon goto done; 1399f95f3850SWill Newton 1400f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1401f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1402f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1403f9c2a0dcSSeungwon Jeon offset = 0; 1404f9c2a0dcSSeungwon Jeon 1405f9c2a0dcSSeungwon Jeon do { 1406f9c2a0dcSSeungwon Jeon fcnt = ((fifo_depth - 1407f9c2a0dcSSeungwon Jeon SDMMC_GET_FCNT(mci_readl(host, STATUS))) 1408f9c2a0dcSSeungwon Jeon << shift) - host->part_buf_count; 1409f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1410f9c2a0dcSSeungwon Jeon if (!len) 1411f9c2a0dcSSeungwon Jeon break; 1412f9c2a0dcSSeungwon Jeon host->push_data(host, (void *)(buf + offset), len); 1413f95f3850SWill Newton offset += len; 1414f95f3850SWill Newton nbytes += len; 1415f9c2a0dcSSeungwon Jeon remain -= len; 1416f9c2a0dcSSeungwon Jeon } while (remain); 1417f9c2a0dcSSeungwon Jeon sg_miter->consumed = offset; 1418f95f3850SWill Newton 1419f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1420f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1421f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1422f95f3850SWill Newton host->data_status = status; 1423f95f3850SWill Newton data->bytes_xfered += nbytes; 1424f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1425f9c2a0dcSSeungwon Jeon host->sg = NULL; 1426f95f3850SWill Newton 1427f95f3850SWill Newton smp_wmb(); 1428f95f3850SWill Newton 1429f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1430f95f3850SWill Newton 1431f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1432f95f3850SWill Newton return; 1433f95f3850SWill Newton } 1434f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1435f95f3850SWill Newton data->bytes_xfered += nbytes; 1436f9c2a0dcSSeungwon Jeon 1437f9c2a0dcSSeungwon Jeon if (!remain) { 1438f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1439f9c2a0dcSSeungwon Jeon goto done; 1440f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1441f9c2a0dcSSeungwon Jeon } 1442f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1443f95f3850SWill Newton return; 1444f95f3850SWill Newton 1445f95f3850SWill Newton done: 1446f95f3850SWill Newton data->bytes_xfered += nbytes; 1447f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1448f9c2a0dcSSeungwon Jeon host->sg = NULL; 1449f95f3850SWill Newton smp_wmb(); 1450f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1451f95f3850SWill Newton } 1452f95f3850SWill Newton 1453f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1454f95f3850SWill Newton { 1455f95f3850SWill Newton if (!host->cmd_status) 1456f95f3850SWill Newton host->cmd_status = status; 1457f95f3850SWill Newton 1458f95f3850SWill Newton smp_wmb(); 1459f95f3850SWill Newton 1460f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1461f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1462f95f3850SWill Newton } 1463f95f3850SWill Newton 1464f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1465f95f3850SWill Newton { 1466f95f3850SWill Newton struct dw_mci *host = dev_id; 1467f95f3850SWill Newton u32 status, pending; 1468f95f3850SWill Newton unsigned int pass_count = 0; 14691a5c8e1fSShashidhar Hiremath int i; 1470f95f3850SWill Newton 1471f95f3850SWill Newton do { 1472f95f3850SWill Newton status = mci_readl(host, RINTSTS); 1473f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1474f95f3850SWill Newton 1475f95f3850SWill Newton /* 1476f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1477f95f3850SWill Newton * is configured. 1478f95f3850SWill Newton */ 1479f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1480f95f3850SWill Newton if (!pending && 1481f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1482f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1483f95f3850SWill Newton } 1484f95f3850SWill Newton 1485f95f3850SWill Newton if (!pending) 1486f95f3850SWill Newton break; 1487f95f3850SWill Newton 1488f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1489f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1490f95f3850SWill Newton host->cmd_status = status; 1491f95f3850SWill Newton smp_wmb(); 1492f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1493f95f3850SWill Newton } 1494f95f3850SWill Newton 1495f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1496f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1497f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1498f95f3850SWill Newton host->data_status = status; 1499f95f3850SWill Newton smp_wmb(); 1500f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 15016e83e10dSSeungwon Jeon if (!(pending & (SDMMC_INT_DTO | SDMMC_INT_DCRC | 15026e83e10dSSeungwon Jeon SDMMC_INT_SBE | SDMMC_INT_EBE))) 1503f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1504f95f3850SWill Newton } 1505f95f3850SWill Newton 1506f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1507f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1508f95f3850SWill Newton if (!host->data_status) 1509f95f3850SWill Newton host->data_status = status; 1510f95f3850SWill Newton smp_wmb(); 1511f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1512f95f3850SWill Newton if (host->sg != NULL) 1513f95f3850SWill Newton dw_mci_read_data_pio(host); 1514f95f3850SWill Newton } 1515f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1516f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1517f95f3850SWill Newton } 1518f95f3850SWill Newton 1519f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1520f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1521b40af3aaSJames Hogan if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) 1522f95f3850SWill Newton dw_mci_read_data_pio(host); 1523f95f3850SWill Newton } 1524f95f3850SWill Newton 1525f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1526f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1527b40af3aaSJames Hogan if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) 1528f95f3850SWill Newton dw_mci_write_data_pio(host); 1529f95f3850SWill Newton } 1530f95f3850SWill Newton 1531f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1532f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1533f95f3850SWill Newton dw_mci_cmd_interrupt(host, status); 1534f95f3850SWill Newton } 1535f95f3850SWill Newton 1536f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1537f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 15381791b13eSJames Hogan queue_work(dw_mci_card_workqueue, &host->card_work); 1539f95f3850SWill Newton } 1540f95f3850SWill Newton 15411a5c8e1fSShashidhar Hiremath /* Handle SDIO Interrupts */ 15421a5c8e1fSShashidhar Hiremath for (i = 0; i < host->num_slots; i++) { 15431a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = host->slot[i]; 15441a5c8e1fSShashidhar Hiremath if (pending & SDMMC_INT_SDIO(i)) { 15451a5c8e1fSShashidhar Hiremath mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i)); 15461a5c8e1fSShashidhar Hiremath mmc_signal_sdio_irq(slot->mmc); 15471a5c8e1fSShashidhar Hiremath } 15481a5c8e1fSShashidhar Hiremath } 15491a5c8e1fSShashidhar Hiremath 1550f95f3850SWill Newton } while (pass_count++ < 5); 1551f95f3850SWill Newton 1552f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1553f95f3850SWill Newton /* Handle DMA interrupts */ 1554f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1555f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1556f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1557f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1558f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1559f95f3850SWill Newton host->dma_ops->complete(host); 1560f95f3850SWill Newton } 1561f95f3850SWill Newton #endif 1562f95f3850SWill Newton 1563f95f3850SWill Newton return IRQ_HANDLED; 1564f95f3850SWill Newton } 1565f95f3850SWill Newton 15661791b13eSJames Hogan static void dw_mci_work_routine_card(struct work_struct *work) 1567f95f3850SWill Newton { 15681791b13eSJames Hogan struct dw_mci *host = container_of(work, struct dw_mci, card_work); 1569f95f3850SWill Newton int i; 1570f95f3850SWill Newton 1571f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1572f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1573f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1574f95f3850SWill Newton struct mmc_request *mrq; 1575f95f3850SWill Newton int present; 1576f95f3850SWill Newton u32 ctrl; 1577f95f3850SWill Newton 1578f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1579f95f3850SWill Newton while (present != slot->last_detect_state) { 1580f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1581f95f3850SWill Newton present ? "inserted" : "removed"); 1582f95f3850SWill Newton 15831791b13eSJames Hogan /* Power up slot (before spin_lock, may sleep) */ 15841791b13eSJames Hogan if (present != 0 && host->pdata->setpower) 15851791b13eSJames Hogan host->pdata->setpower(slot->id, mmc->ocr_avail); 15861791b13eSJames Hogan 15871791b13eSJames Hogan spin_lock_bh(&host->lock); 15881791b13eSJames Hogan 1589f95f3850SWill Newton /* Card change detected */ 1590f95f3850SWill Newton slot->last_detect_state = present; 1591f95f3850SWill Newton 15921791b13eSJames Hogan /* Mark card as present if applicable */ 15931791b13eSJames Hogan if (present != 0) 1594f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1595f95f3850SWill Newton 1596f95f3850SWill Newton /* Clean up queue if present */ 1597f95f3850SWill Newton mrq = slot->mrq; 1598f95f3850SWill Newton if (mrq) { 1599f95f3850SWill Newton if (mrq == host->mrq) { 1600f95f3850SWill Newton host->data = NULL; 1601f95f3850SWill Newton host->cmd = NULL; 1602f95f3850SWill Newton 1603f95f3850SWill Newton switch (host->state) { 1604f95f3850SWill Newton case STATE_IDLE: 1605f95f3850SWill Newton break; 1606f95f3850SWill Newton case STATE_SENDING_CMD: 1607f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1608f95f3850SWill Newton if (!mrq->data) 1609f95f3850SWill Newton break; 1610f95f3850SWill Newton /* fall through */ 1611f95f3850SWill Newton case STATE_SENDING_DATA: 1612f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1613f95f3850SWill Newton dw_mci_stop_dma(host); 1614f95f3850SWill Newton break; 1615f95f3850SWill Newton case STATE_DATA_BUSY: 1616f95f3850SWill Newton case STATE_DATA_ERROR: 1617f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1618f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1619f95f3850SWill Newton if (!mrq->stop) 1620f95f3850SWill Newton break; 1621f95f3850SWill Newton /* fall through */ 1622f95f3850SWill Newton case STATE_SENDING_STOP: 1623f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1624f95f3850SWill Newton break; 1625f95f3850SWill Newton } 1626f95f3850SWill Newton 1627f95f3850SWill Newton dw_mci_request_end(host, mrq); 1628f95f3850SWill Newton } else { 1629f95f3850SWill Newton list_del(&slot->queue_node); 1630f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1631f95f3850SWill Newton if (mrq->data) 1632f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1633f95f3850SWill Newton if (mrq->stop) 1634f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1635f95f3850SWill Newton 1636f95f3850SWill Newton spin_unlock(&host->lock); 1637f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1638f95f3850SWill Newton spin_lock(&host->lock); 1639f95f3850SWill Newton } 1640f95f3850SWill Newton } 1641f95f3850SWill Newton 1642f95f3850SWill Newton /* Power down slot */ 1643f95f3850SWill Newton if (present == 0) { 1644f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1645f95f3850SWill Newton 1646f95f3850SWill Newton /* 1647f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1648f95f3850SWill Newton * block interrupt, hence setting the 1649f95f3850SWill Newton * scatter-gather pointer to NULL. 1650f95f3850SWill Newton */ 1651f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 1652f95f3850SWill Newton host->sg = NULL; 1653f95f3850SWill Newton 1654f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1655f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1656f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1657f95f3850SWill Newton 1658f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1659f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1660f95f3850SWill Newton ctrl |= 0x01; /* Software reset of DMA */ 1661f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1662f95f3850SWill Newton #endif 1663f95f3850SWill Newton 1664f95f3850SWill Newton } 1665f95f3850SWill Newton 16661791b13eSJames Hogan spin_unlock_bh(&host->lock); 16671791b13eSJames Hogan 16681791b13eSJames Hogan /* Power down slot (after spin_unlock, may sleep) */ 16691791b13eSJames Hogan if (present == 0 && host->pdata->setpower) 16701791b13eSJames Hogan host->pdata->setpower(slot->id, 0); 16711791b13eSJames Hogan 1672f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1673f95f3850SWill Newton } 1674f95f3850SWill Newton 1675f95f3850SWill Newton mmc_detect_change(slot->mmc, 1676f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1677f95f3850SWill Newton } 1678f95f3850SWill Newton } 1679f95f3850SWill Newton 1680f95f3850SWill Newton static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1681f95f3850SWill Newton { 1682f95f3850SWill Newton struct mmc_host *mmc; 1683f95f3850SWill Newton struct dw_mci_slot *slot; 1684f95f3850SWill Newton 1685*62ca8034SShashidhar Hiremath mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), &host->dev); 1686f95f3850SWill Newton if (!mmc) 1687f95f3850SWill Newton return -ENOMEM; 1688f95f3850SWill Newton 1689f95f3850SWill Newton slot = mmc_priv(mmc); 1690f95f3850SWill Newton slot->id = id; 1691f95f3850SWill Newton slot->mmc = mmc; 1692f95f3850SWill Newton slot->host = host; 1693f95f3850SWill Newton 1694f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1695f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1696f95f3850SWill Newton mmc->f_max = host->bus_hz; 1697f95f3850SWill Newton 1698f95f3850SWill Newton if (host->pdata->get_ocr) 1699f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1700f95f3850SWill Newton else 1701f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1702f95f3850SWill Newton 1703f95f3850SWill Newton /* 1704f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1705f95f3850SWill Newton * is detected. 1706f95f3850SWill Newton */ 1707f95f3850SWill Newton if (host->pdata->setpower) 1708f95f3850SWill Newton host->pdata->setpower(id, 0); 1709f95f3850SWill Newton 1710fc3d7720SJaehoon Chung if (host->pdata->caps) 1711fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1712fc3d7720SJaehoon Chung 17134f408cc6SSeungwon Jeon if (host->pdata->caps2) 17144f408cc6SSeungwon Jeon mmc->caps2 = host->pdata->caps2; 17154f408cc6SSeungwon Jeon 1716f95f3850SWill Newton if (host->pdata->get_bus_wd) 1717f95f3850SWill Newton if (host->pdata->get_bus_wd(slot->id) >= 4) 1718f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1719f95f3850SWill Newton 1720f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 17216daa7778SSeungwon Jeon mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 1722f95f3850SWill Newton 1723356ac2cfSJaehoon Chung if (mmc->caps2 & MMC_CAP2_POWEROFF_NOTIFY) 1724356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_SHORT; 1725356ac2cfSJaehoon Chung else 1726356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_NONE; 1727356ac2cfSJaehoon Chung 1728f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1729f95f3850SWill Newton mmc->max_segs = host->ring_size; 1730f95f3850SWill Newton mmc->max_blk_size = 65536; 1731f95f3850SWill Newton mmc->max_blk_count = host->ring_size; 1732f95f3850SWill Newton mmc->max_seg_size = 0x1000; 1733f95f3850SWill Newton mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1734f95f3850SWill Newton #else 1735f95f3850SWill Newton if (host->pdata->blk_settings) { 1736f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1737f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1738f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1739f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1740f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1741f95f3850SWill Newton } else { 1742f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1743f95f3850SWill Newton mmc->max_segs = 64; 1744f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1745f95f3850SWill Newton mmc->max_blk_count = 512; 1746f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1747f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1748f95f3850SWill Newton } 1749f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1750f95f3850SWill Newton 1751c07946a3SJaehoon Chung host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 1752c07946a3SJaehoon Chung if (IS_ERR(host->vmmc)) { 1753a3c76eb9SGirish K S pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1754c07946a3SJaehoon Chung host->vmmc = NULL; 1755c07946a3SJaehoon Chung } else 1756c07946a3SJaehoon Chung regulator_enable(host->vmmc); 1757c07946a3SJaehoon Chung 1758f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1759f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1760f95f3850SWill Newton else 1761f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1762f95f3850SWill Newton 1763f95f3850SWill Newton host->slot[id] = slot; 1764f95f3850SWill Newton mmc_add_host(mmc); 1765f95f3850SWill Newton 1766f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1767f95f3850SWill Newton dw_mci_init_debugfs(slot); 1768f95f3850SWill Newton #endif 1769f95f3850SWill Newton 1770f95f3850SWill Newton /* Card initially undetected */ 1771f95f3850SWill Newton slot->last_detect_state = 0; 1772f95f3850SWill Newton 1773dd6c4b98SWill Newton /* 1774dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 1775dd6c4b98SWill Newton * need to run the detect tasklet 1776dd6c4b98SWill Newton */ 17771791b13eSJames Hogan queue_work(dw_mci_card_workqueue, &host->card_work); 1778dd6c4b98SWill Newton 1779f95f3850SWill Newton return 0; 1780f95f3850SWill Newton } 1781f95f3850SWill Newton 1782f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 1783f95f3850SWill Newton { 1784f95f3850SWill Newton /* Shutdown detect IRQ */ 1785f95f3850SWill Newton if (slot->host->pdata->exit) 1786f95f3850SWill Newton slot->host->pdata->exit(id); 1787f95f3850SWill Newton 1788f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 1789f95f3850SWill Newton mmc_remove_host(slot->mmc); 1790f95f3850SWill Newton slot->host->slot[id] = NULL; 1791f95f3850SWill Newton mmc_free_host(slot->mmc); 1792f95f3850SWill Newton } 1793f95f3850SWill Newton 1794f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 1795f95f3850SWill Newton { 1796f95f3850SWill Newton /* Alloc memory for sg translation */ 1797*62ca8034SShashidhar Hiremath host->sg_cpu = dma_alloc_coherent(&host->dev, PAGE_SIZE, 1798f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 1799f95f3850SWill Newton if (!host->sg_cpu) { 1800*62ca8034SShashidhar Hiremath dev_err(&host->dev, "%s: could not alloc DMA memory\n", 1801f95f3850SWill Newton __func__); 1802f95f3850SWill Newton goto no_dma; 1803f95f3850SWill Newton } 1804f95f3850SWill Newton 1805f95f3850SWill Newton /* Determine which DMA interface to use */ 1806f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1807f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 1808*62ca8034SShashidhar Hiremath dev_info(&host->dev, "Using internal DMA controller.\n"); 1809f95f3850SWill Newton #endif 1810f95f3850SWill Newton 1811f95f3850SWill Newton if (!host->dma_ops) 1812f95f3850SWill Newton goto no_dma; 1813f95f3850SWill Newton 1814f95f3850SWill Newton if (host->dma_ops->init) { 1815f95f3850SWill Newton if (host->dma_ops->init(host)) { 1816*62ca8034SShashidhar Hiremath dev_err(&host->dev, "%s: Unable to initialize " 1817f95f3850SWill Newton "DMA Controller.\n", __func__); 1818f95f3850SWill Newton goto no_dma; 1819f95f3850SWill Newton } 1820f95f3850SWill Newton } else { 1821*62ca8034SShashidhar Hiremath dev_err(&host->dev, "DMA initialization not found.\n"); 1822f95f3850SWill Newton goto no_dma; 1823f95f3850SWill Newton } 1824f95f3850SWill Newton 1825f95f3850SWill Newton host->use_dma = 1; 1826f95f3850SWill Newton return; 1827f95f3850SWill Newton 1828f95f3850SWill Newton no_dma: 1829*62ca8034SShashidhar Hiremath dev_info(&host->dev, "Using PIO mode.\n"); 1830f95f3850SWill Newton host->use_dma = 0; 1831f95f3850SWill Newton return; 1832f95f3850SWill Newton } 1833f95f3850SWill Newton 1834f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 1835f95f3850SWill Newton { 1836f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 1837f95f3850SWill Newton unsigned int ctrl; 1838f95f3850SWill Newton 1839f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1840f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 1841f95f3850SWill Newton 1842f95f3850SWill Newton /* wait till resets clear */ 1843f95f3850SWill Newton do { 1844f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1845f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1846f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 1847f95f3850SWill Newton return true; 1848f95f3850SWill Newton } while (time_before(jiffies, timeout)); 1849f95f3850SWill Newton 1850f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 1851f95f3850SWill Newton 1852f95f3850SWill Newton return false; 1853f95f3850SWill Newton } 1854f95f3850SWill Newton 1855*62ca8034SShashidhar Hiremath int dw_mci_probe(struct dw_mci *host) 1856f95f3850SWill Newton { 1857*62ca8034SShashidhar Hiremath int width, i, ret = 0; 1858f95f3850SWill Newton u32 fifo_size; 1859f95f3850SWill Newton 1860*62ca8034SShashidhar Hiremath if (!host->pdata || !host->pdata->init) { 1861*62ca8034SShashidhar Hiremath dev_err(&host->dev, 1862f95f3850SWill Newton "Platform data must supply init function\n"); 1863*62ca8034SShashidhar Hiremath return -ENODEV; 1864f95f3850SWill Newton } 1865f95f3850SWill Newton 1866*62ca8034SShashidhar Hiremath if (!host->pdata->select_slot && host->pdata->num_slots > 1) { 1867*62ca8034SShashidhar Hiremath dev_err(&host->dev, 1868f95f3850SWill Newton "Platform data must supply select_slot function\n"); 1869*62ca8034SShashidhar Hiremath return -ENODEV; 1870f95f3850SWill Newton } 1871f95f3850SWill Newton 1872*62ca8034SShashidhar Hiremath if (!host->pdata->bus_hz) { 1873*62ca8034SShashidhar Hiremath dev_err(&host->dev, 1874f95f3850SWill Newton "Platform data must supply bus speed\n"); 1875*62ca8034SShashidhar Hiremath return -ENODEV; 1876f95f3850SWill Newton } 1877f95f3850SWill Newton 1878*62ca8034SShashidhar Hiremath host->bus_hz = host->pdata->bus_hz; 1879*62ca8034SShashidhar Hiremath host->quirks = host->pdata->quirks; 1880f95f3850SWill Newton 1881f95f3850SWill Newton spin_lock_init(&host->lock); 1882f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 1883f95f3850SWill Newton 1884f95f3850SWill Newton 1885*62ca8034SShashidhar Hiremath host->dma_ops = host->pdata->dma_ops; 1886f95f3850SWill Newton dw_mci_init_dma(host); 1887f95f3850SWill Newton 1888f95f3850SWill Newton /* 1889f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 1890f95f3850SWill Newton * the correct values. 1891f95f3850SWill Newton */ 1892f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 1893f95f3850SWill Newton if (!i) { 1894f95f3850SWill Newton host->push_data = dw_mci_push_data16; 1895f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 1896f95f3850SWill Newton width = 16; 1897f95f3850SWill Newton host->data_shift = 1; 1898f95f3850SWill Newton } else if (i == 2) { 1899f95f3850SWill Newton host->push_data = dw_mci_push_data64; 1900f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 1901f95f3850SWill Newton width = 64; 1902f95f3850SWill Newton host->data_shift = 3; 1903f95f3850SWill Newton } else { 1904f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 1905f95f3850SWill Newton WARN((i != 1), 1906f95f3850SWill Newton "HCON reports a reserved host data width!\n" 1907f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 1908f95f3850SWill Newton host->push_data = dw_mci_push_data32; 1909f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 1910f95f3850SWill Newton width = 32; 1911f95f3850SWill Newton host->data_shift = 2; 1912f95f3850SWill Newton } 1913f95f3850SWill Newton 1914f95f3850SWill Newton /* Reset all blocks */ 1915*62ca8034SShashidhar Hiremath if (!mci_wait_reset(&host->dev, host)) { 1916f95f3850SWill Newton ret = -ENODEV; 1917f95f3850SWill Newton goto err_dmaunmap; 1918f95f3850SWill Newton } 1919f95f3850SWill Newton 1920f95f3850SWill Newton /* Clear the interrupts for the host controller */ 1921f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1922f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 1923f95f3850SWill Newton 1924f95f3850SWill Newton /* Put in max timeout */ 1925f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 1926f95f3850SWill Newton 1927f95f3850SWill Newton /* 1928f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 1929f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 1930f95f3850SWill Newton */ 1931b86d8253SJames Hogan if (!host->pdata->fifo_depth) { 1932b86d8253SJames Hogan /* 1933b86d8253SJames Hogan * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may 1934b86d8253SJames Hogan * have been overwritten by the bootloader, just like we're 1935b86d8253SJames Hogan * about to do, so if you know the value for your hardware, you 1936b86d8253SJames Hogan * should put it in the platform data. 1937b86d8253SJames Hogan */ 1938f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 19398234e869SJaehoon Chung fifo_size = 1 + ((fifo_size >> 16) & 0xfff); 1940b86d8253SJames Hogan } else { 1941b86d8253SJames Hogan fifo_size = host->pdata->fifo_depth; 1942b86d8253SJames Hogan } 1943b86d8253SJames Hogan host->fifo_depth = fifo_size; 1944e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 1945e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 1946e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 1947f95f3850SWill Newton 1948f95f3850SWill Newton /* disable clock to CIU */ 1949f95f3850SWill Newton mci_writel(host, CLKENA, 0); 1950f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 1951f95f3850SWill Newton 1952f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 19531791b13eSJames Hogan dw_mci_card_workqueue = alloc_workqueue("dw-mci-card", 19541791b13eSJames Hogan WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); 19551791b13eSJames Hogan if (!dw_mci_card_workqueue) 19561791b13eSJames Hogan goto err_dmaunmap; 19571791b13eSJames Hogan INIT_WORK(&host->card_work, dw_mci_work_routine_card); 1958*62ca8034SShashidhar Hiremath ret = request_irq(host->irq, dw_mci_interrupt, host->irq_flags, "dw-mci", host); 1959f95f3850SWill Newton if (ret) 19601791b13eSJames Hogan goto err_workqueue; 1961f95f3850SWill Newton 1962f95f3850SWill Newton if (host->pdata->num_slots) 1963f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 1964f95f3850SWill Newton else 1965f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 1966f95f3850SWill Newton 1967f95f3850SWill Newton /* We need at least one slot to succeed */ 1968f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1969f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 1970f95f3850SWill Newton if (ret) { 1971f95f3850SWill Newton ret = -ENODEV; 1972f95f3850SWill Newton goto err_init_slot; 1973f95f3850SWill Newton } 1974f95f3850SWill Newton } 1975f95f3850SWill Newton 1976f95f3850SWill Newton /* 19774e0a5adfSJaehoon Chung * In 2.40a spec, Data offset is changed. 19784e0a5adfSJaehoon Chung * Need to check the version-id and set data-offset for DATA register. 19794e0a5adfSJaehoon Chung */ 19804e0a5adfSJaehoon Chung host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); 1981*62ca8034SShashidhar Hiremath dev_info(&host->dev, "Version ID is %04x\n", host->verid); 19824e0a5adfSJaehoon Chung 19834e0a5adfSJaehoon Chung if (host->verid < DW_MMC_240A) 19844e0a5adfSJaehoon Chung host->data_offset = DATA_OFFSET; 19854e0a5adfSJaehoon Chung else 19864e0a5adfSJaehoon Chung host->data_offset = DATA_240A_OFFSET; 19874e0a5adfSJaehoon Chung 19884e0a5adfSJaehoon Chung /* 1989f95f3850SWill Newton * Enable interrupts for command done, data over, data empty, card det, 1990f95f3850SWill Newton * receive ready and error such as transmit, receive timeout, crc error 1991f95f3850SWill Newton */ 1992f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1993f95f3850SWill Newton mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 1994f95f3850SWill Newton SDMMC_INT_TXDR | SDMMC_INT_RXDR | 1995f95f3850SWill Newton DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 1996f95f3850SWill Newton mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 1997f95f3850SWill Newton 1998*62ca8034SShashidhar Hiremath dev_info(&host->dev, "DW MMC controller at irq %d, " 1999b86d8253SJames Hogan "%d bit host data width, " 2000b86d8253SJames Hogan "%u deep fifo\n", 2001*62ca8034SShashidhar Hiremath host->irq, width, fifo_size); 2002f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 2003*62ca8034SShashidhar Hiremath dev_info(&host->dev, "Internal DMAC interrupt fix enabled.\n"); 2004f95f3850SWill Newton 2005f95f3850SWill Newton return 0; 2006f95f3850SWill Newton 2007f95f3850SWill Newton err_init_slot: 2008f95f3850SWill Newton /* De-init any initialized slots */ 2009f95f3850SWill Newton while (i > 0) { 2010f95f3850SWill Newton if (host->slot[i]) 2011f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2012f95f3850SWill Newton i--; 2013f95f3850SWill Newton } 2014*62ca8034SShashidhar Hiremath free_irq(host->irq, host); 2015f95f3850SWill Newton 20161791b13eSJames Hogan err_workqueue: 20171791b13eSJames Hogan destroy_workqueue(dw_mci_card_workqueue); 20181791b13eSJames Hogan 2019f95f3850SWill Newton err_dmaunmap: 2020f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2021f95f3850SWill Newton host->dma_ops->exit(host); 2022*62ca8034SShashidhar Hiremath dma_free_coherent(&host->dev, PAGE_SIZE, 2023f95f3850SWill Newton host->sg_cpu, host->sg_dma); 2024f95f3850SWill Newton 2025c07946a3SJaehoon Chung if (host->vmmc) { 2026c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2027c07946a3SJaehoon Chung regulator_put(host->vmmc); 2028c07946a3SJaehoon Chung } 2029f95f3850SWill Newton return ret; 2030f95f3850SWill Newton } 2031*62ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_probe); 2032f95f3850SWill Newton 2033*62ca8034SShashidhar Hiremath void dw_mci_remove(struct dw_mci *host) 2034f95f3850SWill Newton { 2035f95f3850SWill Newton int i; 2036f95f3850SWill Newton 2037f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2038f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2039f95f3850SWill Newton 2040f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2041*62ca8034SShashidhar Hiremath dev_dbg(&host->dev, "remove slot %d\n", i); 2042f95f3850SWill Newton if (host->slot[i]) 2043f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2044f95f3850SWill Newton } 2045f95f3850SWill Newton 2046f95f3850SWill Newton /* disable clock to CIU */ 2047f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2048f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2049f95f3850SWill Newton 2050*62ca8034SShashidhar Hiremath free_irq(host->irq, host); 20511791b13eSJames Hogan destroy_workqueue(dw_mci_card_workqueue); 2052*62ca8034SShashidhar Hiremath dma_free_coherent(&host->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); 2053f95f3850SWill Newton 2054f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2055f95f3850SWill Newton host->dma_ops->exit(host); 2056f95f3850SWill Newton 2057c07946a3SJaehoon Chung if (host->vmmc) { 2058c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2059c07946a3SJaehoon Chung regulator_put(host->vmmc); 2060c07946a3SJaehoon Chung } 2061c07946a3SJaehoon Chung 2062f95f3850SWill Newton } 2063*62ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_remove); 2064*62ca8034SShashidhar Hiremath 2065*62ca8034SShashidhar Hiremath 2066f95f3850SWill Newton 20676fe8890dSJaehoon Chung #ifdef CONFIG_PM_SLEEP 2068f95f3850SWill Newton /* 2069f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 2070f95f3850SWill Newton */ 2071*62ca8034SShashidhar Hiremath int dw_mci_suspend(struct dw_mci *host) 2072f95f3850SWill Newton { 2073*62ca8034SShashidhar Hiremath int i, ret = 0; 2074f95f3850SWill Newton 2075f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2076f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2077f95f3850SWill Newton if (!slot) 2078f95f3850SWill Newton continue; 2079f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 2080f95f3850SWill Newton if (ret < 0) { 2081f95f3850SWill Newton while (--i >= 0) { 2082f95f3850SWill Newton slot = host->slot[i]; 2083f95f3850SWill Newton if (slot) 2084f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 2085f95f3850SWill Newton } 2086f95f3850SWill Newton return ret; 2087f95f3850SWill Newton } 2088f95f3850SWill Newton } 2089f95f3850SWill Newton 2090c07946a3SJaehoon Chung if (host->vmmc) 2091c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2092c07946a3SJaehoon Chung 2093f95f3850SWill Newton return 0; 2094f95f3850SWill Newton } 2095*62ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_suspend); 2096f95f3850SWill Newton 2097*62ca8034SShashidhar Hiremath int dw_mci_resume(struct dw_mci *host) 2098f95f3850SWill Newton { 2099f95f3850SWill Newton int i, ret; 2100f95f3850SWill Newton 21011d6c4e0aSJaehoon Chung if (host->vmmc) 21021d6c4e0aSJaehoon Chung regulator_enable(host->vmmc); 21031d6c4e0aSJaehoon Chung 2104e61cf118SJaehoon Chung if (host->dma_ops->init) 2105e61cf118SJaehoon Chung host->dma_ops->init(host); 2106e61cf118SJaehoon Chung 2107*62ca8034SShashidhar Hiremath if (!mci_wait_reset(&host->dev, host)) { 2108e61cf118SJaehoon Chung ret = -ENODEV; 2109e61cf118SJaehoon Chung return ret; 2110e61cf118SJaehoon Chung } 2111e61cf118SJaehoon Chung 2112e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 2113e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2114e61cf118SJaehoon Chung 2115e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 2116e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2117e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2118e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2119e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 2120e61cf118SJaehoon Chung 2121f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2122f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2123f95f3850SWill Newton if (!slot) 2124f95f3850SWill Newton continue; 2125f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 2126f95f3850SWill Newton if (ret < 0) 2127f95f3850SWill Newton return ret; 2128f95f3850SWill Newton } 2129f95f3850SWill Newton return 0; 2130f95f3850SWill Newton } 2131*62ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_resume); 21326fe8890dSJaehoon Chung #endif /* CONFIG_PM_SLEEP */ 21336fe8890dSJaehoon Chung 2134f95f3850SWill Newton static int __init dw_mci_init(void) 2135f95f3850SWill Newton { 2136*62ca8034SShashidhar Hiremath printk(KERN_INFO "Synopsys Designware Multimedia Card Interface Driver"); 2137*62ca8034SShashidhar Hiremath return 0; 2138f95f3850SWill Newton } 2139f95f3850SWill Newton 2140f95f3850SWill Newton static void __exit dw_mci_exit(void) 2141f95f3850SWill Newton { 2142f95f3850SWill Newton } 2143f95f3850SWill Newton 2144f95f3850SWill Newton module_init(dw_mci_init); 2145f95f3850SWill Newton module_exit(dw_mci_exit); 2146f95f3850SWill Newton 2147f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 2148f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 2149f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 2150f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 2151