1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/seq_file.h> 26f95f3850SWill Newton #include <linux/slab.h> 27f95f3850SWill Newton #include <linux/stat.h> 28f95f3850SWill Newton #include <linux/delay.h> 29f95f3850SWill Newton #include <linux/irq.h> 30f95f3850SWill Newton #include <linux/mmc/host.h> 31f95f3850SWill Newton #include <linux/mmc/mmc.h> 32f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 33f95f3850SWill Newton #include <linux/bitops.h> 34c07946a3SJaehoon Chung #include <linux/regulator/consumer.h> 351791b13eSJames Hogan #include <linux/workqueue.h> 36f95f3850SWill Newton 37f95f3850SWill Newton #include "dw_mmc.h" 38f95f3850SWill Newton 39f95f3850SWill Newton /* Common flag combinations */ 40f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 41f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 42f95f3850SWill Newton SDMMC_INT_EBE) 43f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 44f95f3850SWill Newton SDMMC_INT_RESP_ERR) 45f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 46f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 47f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 48f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 49f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 50f95f3850SWill Newton 51f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 52f95f3850SWill Newton struct idmac_desc { 53f95f3850SWill Newton u32 des0; /* Control Descriptor */ 54f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 55f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 56f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 57f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 58f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 59f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 60f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 61f95f3850SWill Newton 62f95f3850SWill Newton u32 des1; /* Buffer sizes */ 63f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 649b7bbe10SShashidhar Hiremath ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) 65f95f3850SWill Newton 66f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 67f95f3850SWill Newton 68f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 69f95f3850SWill Newton }; 70f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 71f95f3850SWill Newton 72f95f3850SWill Newton /** 73f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 74f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 75f95f3850SWill Newton * @host: The MMC controller this slot is using. 76f95f3850SWill Newton * @ctype: Card type for this slot. 77f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 78f95f3850SWill Newton * processed, or NULL when the slot is idle. 79f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 80f95f3850SWill Newton * &struct dw_mci. 81f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 82f95f3850SWill Newton * @flags: Random state bits associated with the slot. 83f95f3850SWill Newton * @id: Number of this slot. 84f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 85f95f3850SWill Newton */ 86f95f3850SWill Newton struct dw_mci_slot { 87f95f3850SWill Newton struct mmc_host *mmc; 88f95f3850SWill Newton struct dw_mci *host; 89f95f3850SWill Newton 90f95f3850SWill Newton u32 ctype; 91f95f3850SWill Newton 92f95f3850SWill Newton struct mmc_request *mrq; 93f95f3850SWill Newton struct list_head queue_node; 94f95f3850SWill Newton 95f95f3850SWill Newton unsigned int clock; 96f95f3850SWill Newton unsigned long flags; 97f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 98f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 99f95f3850SWill Newton int id; 100f95f3850SWill Newton int last_detect_state; 101f95f3850SWill Newton }; 102f95f3850SWill Newton 103f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 104f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 105f95f3850SWill Newton { 106f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 107f95f3850SWill Newton struct mmc_request *mrq; 108f95f3850SWill Newton struct mmc_command *cmd; 109f95f3850SWill Newton struct mmc_command *stop; 110f95f3850SWill Newton struct mmc_data *data; 111f95f3850SWill Newton 112f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 113f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 114f95f3850SWill Newton mrq = slot->mrq; 115f95f3850SWill Newton 116f95f3850SWill Newton if (mrq) { 117f95f3850SWill Newton cmd = mrq->cmd; 118f95f3850SWill Newton data = mrq->data; 119f95f3850SWill Newton stop = mrq->stop; 120f95f3850SWill Newton 121f95f3850SWill Newton if (cmd) 122f95f3850SWill Newton seq_printf(s, 123f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 124f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 125f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 126f95f3850SWill Newton cmd->resp[2], cmd->error); 127f95f3850SWill Newton if (data) 128f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 129f95f3850SWill Newton data->bytes_xfered, data->blocks, 130f95f3850SWill Newton data->blksz, data->flags, data->error); 131f95f3850SWill Newton if (stop) 132f95f3850SWill Newton seq_printf(s, 133f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 134f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 135f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 136f95f3850SWill Newton stop->resp[2], stop->error); 137f95f3850SWill Newton } 138f95f3850SWill Newton 139f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 140f95f3850SWill Newton 141f95f3850SWill Newton return 0; 142f95f3850SWill Newton } 143f95f3850SWill Newton 144f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 145f95f3850SWill Newton { 146f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 147f95f3850SWill Newton } 148f95f3850SWill Newton 149f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 150f95f3850SWill Newton .owner = THIS_MODULE, 151f95f3850SWill Newton .open = dw_mci_req_open, 152f95f3850SWill Newton .read = seq_read, 153f95f3850SWill Newton .llseek = seq_lseek, 154f95f3850SWill Newton .release = single_release, 155f95f3850SWill Newton }; 156f95f3850SWill Newton 157f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 158f95f3850SWill Newton { 159f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 160f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 161f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 162f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 163f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 164f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 165f95f3850SWill Newton 166f95f3850SWill Newton return 0; 167f95f3850SWill Newton } 168f95f3850SWill Newton 169f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 170f95f3850SWill Newton { 171f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 172f95f3850SWill Newton } 173f95f3850SWill Newton 174f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 175f95f3850SWill Newton .owner = THIS_MODULE, 176f95f3850SWill Newton .open = dw_mci_regs_open, 177f95f3850SWill Newton .read = seq_read, 178f95f3850SWill Newton .llseek = seq_lseek, 179f95f3850SWill Newton .release = single_release, 180f95f3850SWill Newton }; 181f95f3850SWill Newton 182f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 183f95f3850SWill Newton { 184f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 185f95f3850SWill Newton struct dw_mci *host = slot->host; 186f95f3850SWill Newton struct dentry *root; 187f95f3850SWill Newton struct dentry *node; 188f95f3850SWill Newton 189f95f3850SWill Newton root = mmc->debugfs_root; 190f95f3850SWill Newton if (!root) 191f95f3850SWill Newton return; 192f95f3850SWill Newton 193f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 194f95f3850SWill Newton &dw_mci_regs_fops); 195f95f3850SWill Newton if (!node) 196f95f3850SWill Newton goto err; 197f95f3850SWill Newton 198f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 199f95f3850SWill Newton &dw_mci_req_fops); 200f95f3850SWill Newton if (!node) 201f95f3850SWill Newton goto err; 202f95f3850SWill Newton 203f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 204f95f3850SWill Newton if (!node) 205f95f3850SWill Newton goto err; 206f95f3850SWill Newton 207f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 208f95f3850SWill Newton (u32 *)&host->pending_events); 209f95f3850SWill Newton if (!node) 210f95f3850SWill Newton goto err; 211f95f3850SWill Newton 212f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 213f95f3850SWill Newton (u32 *)&host->completed_events); 214f95f3850SWill Newton if (!node) 215f95f3850SWill Newton goto err; 216f95f3850SWill Newton 217f95f3850SWill Newton return; 218f95f3850SWill Newton 219f95f3850SWill Newton err: 220f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 221f95f3850SWill Newton } 222f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 223f95f3850SWill Newton 224f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 225f95f3850SWill Newton { 226f95f3850SWill Newton /* timeout (maximum) */ 227f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 228f95f3850SWill Newton } 229f95f3850SWill Newton 230f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 231f95f3850SWill Newton { 232f95f3850SWill Newton struct mmc_data *data; 233f95f3850SWill Newton u32 cmdr; 234f95f3850SWill Newton cmd->error = -EINPROGRESS; 235f95f3850SWill Newton 236f95f3850SWill Newton cmdr = cmd->opcode; 237f95f3850SWill Newton 238f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 239f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 240f95f3850SWill Newton else 241f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 242f95f3850SWill Newton 243f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 244f95f3850SWill Newton /* We expect a response, so set this bit */ 245f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 246f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 247f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 248f95f3850SWill Newton } 249f95f3850SWill Newton 250f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 251f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 252f95f3850SWill Newton 253f95f3850SWill Newton data = cmd->data; 254f95f3850SWill Newton if (data) { 255f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 256f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 257f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 258f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 259f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 260f95f3850SWill Newton } 261f95f3850SWill Newton 262f95f3850SWill Newton return cmdr; 263f95f3850SWill Newton } 264f95f3850SWill Newton 265f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 266f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 267f95f3850SWill Newton { 268f95f3850SWill Newton host->cmd = cmd; 26962ca8034SShashidhar Hiremath dev_vdbg(&host->dev, 270f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 271f95f3850SWill Newton cmd->arg, cmd_flags); 272f95f3850SWill Newton 273f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 274f95f3850SWill Newton wmb(); 275f95f3850SWill Newton 276f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 277f95f3850SWill Newton } 278f95f3850SWill Newton 279f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 280f95f3850SWill Newton { 281f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 282f95f3850SWill Newton } 283f95f3850SWill Newton 284f95f3850SWill Newton /* DMA interface functions */ 285f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 286f95f3850SWill Newton { 28703e8cb53SJames Hogan if (host->using_dma) { 288f95f3850SWill Newton host->dma_ops->stop(host); 289f95f3850SWill Newton host->dma_ops->cleanup(host); 290f95f3850SWill Newton } else { 291f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 292f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 293f95f3850SWill Newton } 294f95f3850SWill Newton } 295f95f3850SWill Newton 2969aa51408SSeungwon Jeon static int dw_mci_get_dma_dir(struct mmc_data *data) 2979aa51408SSeungwon Jeon { 2989aa51408SSeungwon Jeon if (data->flags & MMC_DATA_WRITE) 2999aa51408SSeungwon Jeon return DMA_TO_DEVICE; 3009aa51408SSeungwon Jeon else 3019aa51408SSeungwon Jeon return DMA_FROM_DEVICE; 3029aa51408SSeungwon Jeon } 3039aa51408SSeungwon Jeon 3049beee912SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 305f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 306f95f3850SWill Newton { 307f95f3850SWill Newton struct mmc_data *data = host->data; 308f95f3850SWill Newton 309f95f3850SWill Newton if (data) 3109aa51408SSeungwon Jeon if (!data->host_cookie) 3119aa51408SSeungwon Jeon dma_unmap_sg(&host->dev, 3129aa51408SSeungwon Jeon data->sg, 3139aa51408SSeungwon Jeon data->sg_len, 3149aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 315f95f3850SWill Newton } 316f95f3850SWill Newton 317f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 318f95f3850SWill Newton { 319f95f3850SWill Newton u32 temp; 320f95f3850SWill Newton 321f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 322f95f3850SWill Newton temp = mci_readl(host, CTRL); 323f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 324f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 325f95f3850SWill Newton mci_writel(host, CTRL, temp); 326f95f3850SWill Newton 327f95f3850SWill Newton /* Stop the IDMAC running */ 328f95f3850SWill Newton temp = mci_readl(host, BMOD); 329a5289a43SJaehoon Chung temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB); 330f95f3850SWill Newton mci_writel(host, BMOD, temp); 331f95f3850SWill Newton } 332f95f3850SWill Newton 333f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 334f95f3850SWill Newton { 335f95f3850SWill Newton struct mmc_data *data = host->data; 336f95f3850SWill Newton 33762ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "DMA complete\n"); 338f95f3850SWill Newton 339f95f3850SWill Newton host->dma_ops->cleanup(host); 340f95f3850SWill Newton 341f95f3850SWill Newton /* 342f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 343f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 344f95f3850SWill Newton */ 345f95f3850SWill Newton if (data) { 346f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 347f95f3850SWill Newton tasklet_schedule(&host->tasklet); 348f95f3850SWill Newton } 349f95f3850SWill Newton } 350f95f3850SWill Newton 351f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 352f95f3850SWill Newton unsigned int sg_len) 353f95f3850SWill Newton { 354f95f3850SWill Newton int i; 355f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 356f95f3850SWill Newton 357f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 358f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 359f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 360f95f3850SWill Newton 361f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 362f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 363f95f3850SWill Newton 364f95f3850SWill Newton /* Buffer length */ 365f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 366f95f3850SWill Newton 367f95f3850SWill Newton /* Physical address to DMA to/from */ 368f95f3850SWill Newton desc->des2 = mem_addr; 369f95f3850SWill Newton } 370f95f3850SWill Newton 371f95f3850SWill Newton /* Set first descriptor */ 372f95f3850SWill Newton desc = host->sg_cpu; 373f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 374f95f3850SWill Newton 375f95f3850SWill Newton /* Set last descriptor */ 376f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 377f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 378f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 379f95f3850SWill Newton 380f95f3850SWill Newton wmb(); 381f95f3850SWill Newton } 382f95f3850SWill Newton 383f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 384f95f3850SWill Newton { 385f95f3850SWill Newton u32 temp; 386f95f3850SWill Newton 387f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 388f95f3850SWill Newton 389f95f3850SWill Newton /* Select IDMAC interface */ 390f95f3850SWill Newton temp = mci_readl(host, CTRL); 391f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 392f95f3850SWill Newton mci_writel(host, CTRL, temp); 393f95f3850SWill Newton 394f95f3850SWill Newton wmb(); 395f95f3850SWill Newton 396f95f3850SWill Newton /* Enable the IDMAC */ 397f95f3850SWill Newton temp = mci_readl(host, BMOD); 398a5289a43SJaehoon Chung temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB; 399f95f3850SWill Newton mci_writel(host, BMOD, temp); 400f95f3850SWill Newton 401f95f3850SWill Newton /* Start it running */ 402f95f3850SWill Newton mci_writel(host, PLDMND, 1); 403f95f3850SWill Newton } 404f95f3850SWill Newton 405f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 406f95f3850SWill Newton { 407f95f3850SWill Newton struct idmac_desc *p; 408f95f3850SWill Newton int i; 409f95f3850SWill Newton 410f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 411f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 412f95f3850SWill Newton 413f95f3850SWill Newton /* Forward link the descriptor list */ 414f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 415f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 416f95f3850SWill Newton 417f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 418f95f3850SWill Newton p->des3 = host->sg_dma; 419f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 420f95f3850SWill Newton 421*141a712aSSeungwon Jeon mci_writel(host, BMOD, SDMMC_IDMAC_SWRESET); 422*141a712aSSeungwon Jeon 423f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 424f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 425f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 426f95f3850SWill Newton 427f95f3850SWill Newton /* Set the descriptor base address */ 428f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 429f95f3850SWill Newton return 0; 430f95f3850SWill Newton } 431f95f3850SWill Newton 432885c3e80SSeungwon Jeon static struct dw_mci_dma_ops dw_mci_idmac_ops = { 433885c3e80SSeungwon Jeon .init = dw_mci_idmac_init, 434885c3e80SSeungwon Jeon .start = dw_mci_idmac_start_dma, 435885c3e80SSeungwon Jeon .stop = dw_mci_idmac_stop_dma, 436885c3e80SSeungwon Jeon .complete = dw_mci_idmac_complete_dma, 437885c3e80SSeungwon Jeon .cleanup = dw_mci_dma_cleanup, 438885c3e80SSeungwon Jeon }; 439885c3e80SSeungwon Jeon #endif /* CONFIG_MMC_DW_IDMAC */ 440885c3e80SSeungwon Jeon 4419aa51408SSeungwon Jeon static int dw_mci_pre_dma_transfer(struct dw_mci *host, 4429aa51408SSeungwon Jeon struct mmc_data *data, 4439aa51408SSeungwon Jeon bool next) 444f95f3850SWill Newton { 445f95f3850SWill Newton struct scatterlist *sg; 4469aa51408SSeungwon Jeon unsigned int i, sg_len; 447f95f3850SWill Newton 4489aa51408SSeungwon Jeon if (!next && data->host_cookie) 4499aa51408SSeungwon Jeon return data->host_cookie; 450f95f3850SWill Newton 451f95f3850SWill Newton /* 452f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 453f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 454f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 455f95f3850SWill Newton */ 456f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 457f95f3850SWill Newton return -EINVAL; 4589aa51408SSeungwon Jeon 459f95f3850SWill Newton if (data->blksz & 3) 460f95f3850SWill Newton return -EINVAL; 461f95f3850SWill Newton 462f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 463f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 464f95f3850SWill Newton return -EINVAL; 465f95f3850SWill Newton } 466f95f3850SWill Newton 4679aa51408SSeungwon Jeon sg_len = dma_map_sg(&host->dev, 4689aa51408SSeungwon Jeon data->sg, 4699aa51408SSeungwon Jeon data->sg_len, 4709aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 4719aa51408SSeungwon Jeon if (sg_len == 0) 4729aa51408SSeungwon Jeon return -EINVAL; 4739aa51408SSeungwon Jeon 4749aa51408SSeungwon Jeon if (next) 4759aa51408SSeungwon Jeon data->host_cookie = sg_len; 4769aa51408SSeungwon Jeon 4779aa51408SSeungwon Jeon return sg_len; 4789aa51408SSeungwon Jeon } 4799aa51408SSeungwon Jeon 4809aa51408SSeungwon Jeon static void dw_mci_pre_req(struct mmc_host *mmc, 4819aa51408SSeungwon Jeon struct mmc_request *mrq, 4829aa51408SSeungwon Jeon bool is_first_req) 4839aa51408SSeungwon Jeon { 4849aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 4859aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 4869aa51408SSeungwon Jeon 4879aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 4889aa51408SSeungwon Jeon return; 4899aa51408SSeungwon Jeon 4909aa51408SSeungwon Jeon if (data->host_cookie) { 4919aa51408SSeungwon Jeon data->host_cookie = 0; 4929aa51408SSeungwon Jeon return; 4939aa51408SSeungwon Jeon } 4949aa51408SSeungwon Jeon 4959aa51408SSeungwon Jeon if (dw_mci_pre_dma_transfer(slot->host, mrq->data, 1) < 0) 4969aa51408SSeungwon Jeon data->host_cookie = 0; 4979aa51408SSeungwon Jeon } 4989aa51408SSeungwon Jeon 4999aa51408SSeungwon Jeon static void dw_mci_post_req(struct mmc_host *mmc, 5009aa51408SSeungwon Jeon struct mmc_request *mrq, 5019aa51408SSeungwon Jeon int err) 5029aa51408SSeungwon Jeon { 5039aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 5049aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 5059aa51408SSeungwon Jeon 5069aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 5079aa51408SSeungwon Jeon return; 5089aa51408SSeungwon Jeon 5099aa51408SSeungwon Jeon if (data->host_cookie) 5109aa51408SSeungwon Jeon dma_unmap_sg(&slot->host->dev, 5119aa51408SSeungwon Jeon data->sg, 5129aa51408SSeungwon Jeon data->sg_len, 5139aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 5149aa51408SSeungwon Jeon data->host_cookie = 0; 5159aa51408SSeungwon Jeon } 5169aa51408SSeungwon Jeon 5179aa51408SSeungwon Jeon static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 5189aa51408SSeungwon Jeon { 5199aa51408SSeungwon Jeon int sg_len; 5209aa51408SSeungwon Jeon u32 temp; 5219aa51408SSeungwon Jeon 5229aa51408SSeungwon Jeon host->using_dma = 0; 5239aa51408SSeungwon Jeon 5249aa51408SSeungwon Jeon /* If we don't have a channel, we can't do DMA */ 5259aa51408SSeungwon Jeon if (!host->use_dma) 5269aa51408SSeungwon Jeon return -ENODEV; 5279aa51408SSeungwon Jeon 5289aa51408SSeungwon Jeon sg_len = dw_mci_pre_dma_transfer(host, data, 0); 529a99aa9b9SSeungwon Jeon if (sg_len < 0) { 530a99aa9b9SSeungwon Jeon host->dma_ops->stop(host); 5319aa51408SSeungwon Jeon return sg_len; 532a99aa9b9SSeungwon Jeon } 5339aa51408SSeungwon Jeon 53403e8cb53SJames Hogan host->using_dma = 1; 53503e8cb53SJames Hogan 53662ca8034SShashidhar Hiremath dev_vdbg(&host->dev, 537f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 538f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 539f95f3850SWill Newton sg_len); 540f95f3850SWill Newton 541f95f3850SWill Newton /* Enable the DMA interface */ 542f95f3850SWill Newton temp = mci_readl(host, CTRL); 543f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 544f95f3850SWill Newton mci_writel(host, CTRL, temp); 545f95f3850SWill Newton 546f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 547f95f3850SWill Newton temp = mci_readl(host, INTMASK); 548f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 549f95f3850SWill Newton mci_writel(host, INTMASK, temp); 550f95f3850SWill Newton 551f95f3850SWill Newton host->dma_ops->start(host, sg_len); 552f95f3850SWill Newton 553f95f3850SWill Newton return 0; 554f95f3850SWill Newton } 555f95f3850SWill Newton 556f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 557f95f3850SWill Newton { 558f95f3850SWill Newton u32 temp; 559f95f3850SWill Newton 560f95f3850SWill Newton data->error = -EINPROGRESS; 561f95f3850SWill Newton 562f95f3850SWill Newton WARN_ON(host->data); 563f95f3850SWill Newton host->sg = NULL; 564f95f3850SWill Newton host->data = data; 565f95f3850SWill Newton 56655c5efbcSJames Hogan if (data->flags & MMC_DATA_READ) 56755c5efbcSJames Hogan host->dir_status = DW_MCI_RECV_STATUS; 56855c5efbcSJames Hogan else 56955c5efbcSJames Hogan host->dir_status = DW_MCI_SEND_STATUS; 57055c5efbcSJames Hogan 571f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 572f9c2a0dcSSeungwon Jeon int flags = SG_MITER_ATOMIC; 573f9c2a0dcSSeungwon Jeon if (host->data->flags & MMC_DATA_READ) 574f9c2a0dcSSeungwon Jeon flags |= SG_MITER_TO_SG; 575f9c2a0dcSSeungwon Jeon else 576f9c2a0dcSSeungwon Jeon flags |= SG_MITER_FROM_SG; 577f9c2a0dcSSeungwon Jeon 578f9c2a0dcSSeungwon Jeon sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 579f95f3850SWill Newton host->sg = data->sg; 58034b664a2SJames Hogan host->part_buf_start = 0; 58134b664a2SJames Hogan host->part_buf_count = 0; 582f95f3850SWill Newton 583b40af3aaSJames Hogan mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); 584f95f3850SWill Newton temp = mci_readl(host, INTMASK); 585f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 586f95f3850SWill Newton mci_writel(host, INTMASK, temp); 587f95f3850SWill Newton 588f95f3850SWill Newton temp = mci_readl(host, CTRL); 589f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 590f95f3850SWill Newton mci_writel(host, CTRL, temp); 591f95f3850SWill Newton } 592f95f3850SWill Newton } 593f95f3850SWill Newton 594f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 595f95f3850SWill Newton { 596f95f3850SWill Newton struct dw_mci *host = slot->host; 597f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 598f95f3850SWill Newton unsigned int cmd_status = 0; 599f95f3850SWill Newton 600f95f3850SWill Newton mci_writel(host, CMDARG, arg); 601f95f3850SWill Newton wmb(); 602f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 603f95f3850SWill Newton 604f95f3850SWill Newton while (time_before(jiffies, timeout)) { 605f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 606f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 607f95f3850SWill Newton return; 608f95f3850SWill Newton } 609f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 610f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 611f95f3850SWill Newton cmd, arg, cmd_status); 612f95f3850SWill Newton } 613f95f3850SWill Newton 614f95f3850SWill Newton static void dw_mci_setup_bus(struct dw_mci_slot *slot) 615f95f3850SWill Newton { 616f95f3850SWill Newton struct dw_mci *host = slot->host; 617f95f3850SWill Newton u32 div; 618f95f3850SWill Newton 619f95f3850SWill Newton if (slot->clock != host->current_speed) { 620f95f3850SWill Newton if (host->bus_hz % slot->clock) 621f95f3850SWill Newton /* 622f95f3850SWill Newton * move the + 1 after the divide to prevent 623f95f3850SWill Newton * over-clocking the card. 624f95f3850SWill Newton */ 625f95f3850SWill Newton div = ((host->bus_hz / slot->clock) >> 1) + 1; 626f95f3850SWill Newton else 627f95f3850SWill Newton div = (host->bus_hz / slot->clock) >> 1; 628f95f3850SWill Newton 629f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 630f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 631f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 632f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 633f95f3850SWill Newton 634f95f3850SWill Newton /* disable clock */ 635f95f3850SWill Newton mci_writel(host, CLKENA, 0); 636f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 637f95f3850SWill Newton 638f95f3850SWill Newton /* inform CIU */ 639f95f3850SWill Newton mci_send_cmd(slot, 640f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 641f95f3850SWill Newton 642f95f3850SWill Newton /* set clock to desired speed */ 643f95f3850SWill Newton mci_writel(host, CLKDIV, div); 644f95f3850SWill Newton 645f95f3850SWill Newton /* inform CIU */ 646f95f3850SWill Newton mci_send_cmd(slot, 647f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 648f95f3850SWill Newton 649f95f3850SWill Newton /* enable clock */ 650e3891dc5SJaehoon Chung mci_writel(host, CLKENA, ((SDMMC_CLKEN_ENABLE | 651e3891dc5SJaehoon Chung SDMMC_CLKEN_LOW_PWR) << slot->id)); 652f95f3850SWill Newton 653f95f3850SWill Newton /* inform CIU */ 654f95f3850SWill Newton mci_send_cmd(slot, 655f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 656f95f3850SWill Newton 657f95f3850SWill Newton host->current_speed = slot->clock; 658f95f3850SWill Newton } 659f95f3850SWill Newton 660f95f3850SWill Newton /* Set the current slot bus width */ 6611d56c453SSeungwon Jeon mci_writel(host, CTYPE, (slot->ctype << slot->id)); 662f95f3850SWill Newton } 663f95f3850SWill Newton 664053b3ce6SSeungwon Jeon static void __dw_mci_start_request(struct dw_mci *host, 665053b3ce6SSeungwon Jeon struct dw_mci_slot *slot, 666053b3ce6SSeungwon Jeon struct mmc_command *cmd) 667f95f3850SWill Newton { 668f95f3850SWill Newton struct mmc_request *mrq; 669f95f3850SWill Newton struct mmc_data *data; 670f95f3850SWill Newton u32 cmdflags; 671f95f3850SWill Newton 672f95f3850SWill Newton mrq = slot->mrq; 673f95f3850SWill Newton if (host->pdata->select_slot) 674f95f3850SWill Newton host->pdata->select_slot(slot->id); 675f95f3850SWill Newton 676f95f3850SWill Newton /* Slot specific timing and width adjustment */ 677f95f3850SWill Newton dw_mci_setup_bus(slot); 678f95f3850SWill Newton 679f95f3850SWill Newton host->cur_slot = slot; 680f95f3850SWill Newton host->mrq = mrq; 681f95f3850SWill Newton 682f95f3850SWill Newton host->pending_events = 0; 683f95f3850SWill Newton host->completed_events = 0; 684f95f3850SWill Newton host->data_status = 0; 685f95f3850SWill Newton 686053b3ce6SSeungwon Jeon data = cmd->data; 687f95f3850SWill Newton if (data) { 688f95f3850SWill Newton dw_mci_set_timeout(host); 689f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 690f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 691f95f3850SWill Newton } 692f95f3850SWill Newton 693f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 694f95f3850SWill Newton 695f95f3850SWill Newton /* this is the first command, send the initialization clock */ 696f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 697f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 698f95f3850SWill Newton 699f95f3850SWill Newton if (data) { 700f95f3850SWill Newton dw_mci_submit_data(host, data); 701f95f3850SWill Newton wmb(); 702f95f3850SWill Newton } 703f95f3850SWill Newton 704f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 705f95f3850SWill Newton 706f95f3850SWill Newton if (mrq->stop) 707f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 708f95f3850SWill Newton } 709f95f3850SWill Newton 710053b3ce6SSeungwon Jeon static void dw_mci_start_request(struct dw_mci *host, 711053b3ce6SSeungwon Jeon struct dw_mci_slot *slot) 712053b3ce6SSeungwon Jeon { 713053b3ce6SSeungwon Jeon struct mmc_request *mrq = slot->mrq; 714053b3ce6SSeungwon Jeon struct mmc_command *cmd; 715053b3ce6SSeungwon Jeon 716053b3ce6SSeungwon Jeon cmd = mrq->sbc ? mrq->sbc : mrq->cmd; 717053b3ce6SSeungwon Jeon __dw_mci_start_request(host, slot, cmd); 718053b3ce6SSeungwon Jeon } 719053b3ce6SSeungwon Jeon 7207456caaeSJames Hogan /* must be called with host->lock held */ 721f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 722f95f3850SWill Newton struct mmc_request *mrq) 723f95f3850SWill Newton { 724f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 725f95f3850SWill Newton host->state); 726f95f3850SWill Newton 727f95f3850SWill Newton slot->mrq = mrq; 728f95f3850SWill Newton 729f95f3850SWill Newton if (host->state == STATE_IDLE) { 730f95f3850SWill Newton host->state = STATE_SENDING_CMD; 731f95f3850SWill Newton dw_mci_start_request(host, slot); 732f95f3850SWill Newton } else { 733f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 734f95f3850SWill Newton } 735f95f3850SWill Newton } 736f95f3850SWill Newton 737f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 738f95f3850SWill Newton { 739f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 740f95f3850SWill Newton struct dw_mci *host = slot->host; 741f95f3850SWill Newton 742f95f3850SWill Newton WARN_ON(slot->mrq); 743f95f3850SWill Newton 7447456caaeSJames Hogan /* 7457456caaeSJames Hogan * The check for card presence and queueing of the request must be 7467456caaeSJames Hogan * atomic, otherwise the card could be removed in between and the 7477456caaeSJames Hogan * request wouldn't fail until another card was inserted. 7487456caaeSJames Hogan */ 7497456caaeSJames Hogan spin_lock_bh(&host->lock); 7507456caaeSJames Hogan 751f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 7527456caaeSJames Hogan spin_unlock_bh(&host->lock); 753f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 754f95f3850SWill Newton mmc_request_done(mmc, mrq); 755f95f3850SWill Newton return; 756f95f3850SWill Newton } 757f95f3850SWill Newton 758f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 7597456caaeSJames Hogan 7607456caaeSJames Hogan spin_unlock_bh(&host->lock); 761f95f3850SWill Newton } 762f95f3850SWill Newton 763f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 764f95f3850SWill Newton { 765f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 76641babf75SJaehoon Chung u32 regs; 767f95f3850SWill Newton 768f95f3850SWill Newton /* set default 1 bit mode */ 769f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 770f95f3850SWill Newton 771f95f3850SWill Newton switch (ios->bus_width) { 772f95f3850SWill Newton case MMC_BUS_WIDTH_1: 773f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 774f95f3850SWill Newton break; 775f95f3850SWill Newton case MMC_BUS_WIDTH_4: 776f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 777f95f3850SWill Newton break; 778c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 779c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 780c9b2a06fSJaehoon Chung break; 781f95f3850SWill Newton } 782f95f3850SWill Newton 78341babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 7843f514291SSeungwon Jeon 7853f514291SSeungwon Jeon /* DDR mode set */ 7863f514291SSeungwon Jeon if (ios->timing == MMC_TIMING_UHS_DDR50) 78741babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 7883f514291SSeungwon Jeon else 7893f514291SSeungwon Jeon regs &= ~(0x1 << slot->id) << 16; 7903f514291SSeungwon Jeon 79141babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 79241babf75SJaehoon Chung 793f95f3850SWill Newton if (ios->clock) { 794f95f3850SWill Newton /* 795f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 796f95f3850SWill Newton * core ios update when finding the minimum. 797f95f3850SWill Newton */ 798f95f3850SWill Newton slot->clock = ios->clock; 799f95f3850SWill Newton } 800f95f3850SWill Newton 801f95f3850SWill Newton switch (ios->power_mode) { 802f95f3850SWill Newton case MMC_POWER_UP: 803f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 804f95f3850SWill Newton break; 805f95f3850SWill Newton default: 806f95f3850SWill Newton break; 807f95f3850SWill Newton } 808f95f3850SWill Newton } 809f95f3850SWill Newton 810f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 811f95f3850SWill Newton { 812f95f3850SWill Newton int read_only; 813f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 814f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 815f95f3850SWill Newton 816f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 817f95f3850SWill Newton if (brd->get_ro) 818f95f3850SWill Newton read_only = brd->get_ro(slot->id); 819f95f3850SWill Newton else 820f95f3850SWill Newton read_only = 821f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 822f95f3850SWill Newton 823f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 824f95f3850SWill Newton read_only ? "read-only" : "read-write"); 825f95f3850SWill Newton 826f95f3850SWill Newton return read_only; 827f95f3850SWill Newton } 828f95f3850SWill Newton 829f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 830f95f3850SWill Newton { 831f95f3850SWill Newton int present; 832f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 833f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 834f95f3850SWill Newton 835f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 836fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 837fc3d7720SJaehoon Chung present = 1; 838fc3d7720SJaehoon Chung else if (brd->get_cd) 839f95f3850SWill Newton present = !brd->get_cd(slot->id); 840f95f3850SWill Newton else 841f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 842f95f3850SWill Newton == 0 ? 1 : 0; 843f95f3850SWill Newton 844f95f3850SWill Newton if (present) 845f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 846f95f3850SWill Newton else 847f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 848f95f3850SWill Newton 849f95f3850SWill Newton return present; 850f95f3850SWill Newton } 851f95f3850SWill Newton 8521a5c8e1fSShashidhar Hiremath static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) 8531a5c8e1fSShashidhar Hiremath { 8541a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = mmc_priv(mmc); 8551a5c8e1fSShashidhar Hiremath struct dw_mci *host = slot->host; 8561a5c8e1fSShashidhar Hiremath u32 int_mask; 8571a5c8e1fSShashidhar Hiremath 8581a5c8e1fSShashidhar Hiremath /* Enable/disable Slot Specific SDIO interrupt */ 8591a5c8e1fSShashidhar Hiremath int_mask = mci_readl(host, INTMASK); 8601a5c8e1fSShashidhar Hiremath if (enb) { 8611a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 862705ad047SKyoungil Kim (int_mask | SDMMC_INT_SDIO(slot->id))); 8631a5c8e1fSShashidhar Hiremath } else { 8641a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 865705ad047SKyoungil Kim (int_mask & ~SDMMC_INT_SDIO(slot->id))); 8661a5c8e1fSShashidhar Hiremath } 8671a5c8e1fSShashidhar Hiremath } 8681a5c8e1fSShashidhar Hiremath 869f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 870f95f3850SWill Newton .request = dw_mci_request, 8719aa51408SSeungwon Jeon .pre_req = dw_mci_pre_req, 8729aa51408SSeungwon Jeon .post_req = dw_mci_post_req, 873f95f3850SWill Newton .set_ios = dw_mci_set_ios, 874f95f3850SWill Newton .get_ro = dw_mci_get_ro, 875f95f3850SWill Newton .get_cd = dw_mci_get_cd, 8761a5c8e1fSShashidhar Hiremath .enable_sdio_irq = dw_mci_enable_sdio_irq, 877f95f3850SWill Newton }; 878f95f3850SWill Newton 879f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 880f95f3850SWill Newton __releases(&host->lock) 881f95f3850SWill Newton __acquires(&host->lock) 882f95f3850SWill Newton { 883f95f3850SWill Newton struct dw_mci_slot *slot; 884f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 885f95f3850SWill Newton 886f95f3850SWill Newton WARN_ON(host->cmd || host->data); 887f95f3850SWill Newton 888f95f3850SWill Newton host->cur_slot->mrq = NULL; 889f95f3850SWill Newton host->mrq = NULL; 890f95f3850SWill Newton if (!list_empty(&host->queue)) { 891f95f3850SWill Newton slot = list_entry(host->queue.next, 892f95f3850SWill Newton struct dw_mci_slot, queue_node); 893f95f3850SWill Newton list_del(&slot->queue_node); 89462ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "list not empty: %s is next\n", 895f95f3850SWill Newton mmc_hostname(slot->mmc)); 896f95f3850SWill Newton host->state = STATE_SENDING_CMD; 897f95f3850SWill Newton dw_mci_start_request(host, slot); 898f95f3850SWill Newton } else { 89962ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "list empty\n"); 900f95f3850SWill Newton host->state = STATE_IDLE; 901f95f3850SWill Newton } 902f95f3850SWill Newton 903f95f3850SWill Newton spin_unlock(&host->lock); 904f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 905f95f3850SWill Newton spin_lock(&host->lock); 906f95f3850SWill Newton } 907f95f3850SWill Newton 908f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 909f95f3850SWill Newton { 910f95f3850SWill Newton u32 status = host->cmd_status; 911f95f3850SWill Newton 912f95f3850SWill Newton host->cmd_status = 0; 913f95f3850SWill Newton 914f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 915f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 916f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 917f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 918f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 919f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 920f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 921f95f3850SWill Newton } else { 922f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 923f95f3850SWill Newton cmd->resp[1] = 0; 924f95f3850SWill Newton cmd->resp[2] = 0; 925f95f3850SWill Newton cmd->resp[3] = 0; 926f95f3850SWill Newton } 927f95f3850SWill Newton } 928f95f3850SWill Newton 929f95f3850SWill Newton if (status & SDMMC_INT_RTO) 930f95f3850SWill Newton cmd->error = -ETIMEDOUT; 931f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 932f95f3850SWill Newton cmd->error = -EILSEQ; 933f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 934f95f3850SWill Newton cmd->error = -EIO; 935f95f3850SWill Newton else 936f95f3850SWill Newton cmd->error = 0; 937f95f3850SWill Newton 938f95f3850SWill Newton if (cmd->error) { 939f95f3850SWill Newton /* newer ip versions need a delay between retries */ 940f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 941f95f3850SWill Newton mdelay(20); 942f95f3850SWill Newton 943f95f3850SWill Newton if (cmd->data) { 944f95f3850SWill Newton host->data = NULL; 945f95f3850SWill Newton dw_mci_stop_dma(host); 946f95f3850SWill Newton } 947f95f3850SWill Newton } 948f95f3850SWill Newton } 949f95f3850SWill Newton 950f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 951f95f3850SWill Newton { 952f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 953f95f3850SWill Newton struct mmc_data *data; 954f95f3850SWill Newton struct mmc_command *cmd; 955f95f3850SWill Newton enum dw_mci_state state; 956f95f3850SWill Newton enum dw_mci_state prev_state; 95794dd5b33SJames Hogan u32 status, ctrl; 958f95f3850SWill Newton 959f95f3850SWill Newton spin_lock(&host->lock); 960f95f3850SWill Newton 961f95f3850SWill Newton state = host->state; 962f95f3850SWill Newton data = host->data; 963f95f3850SWill Newton 964f95f3850SWill Newton do { 965f95f3850SWill Newton prev_state = state; 966f95f3850SWill Newton 967f95f3850SWill Newton switch (state) { 968f95f3850SWill Newton case STATE_IDLE: 969f95f3850SWill Newton break; 970f95f3850SWill Newton 971f95f3850SWill Newton case STATE_SENDING_CMD: 972f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 973f95f3850SWill Newton &host->pending_events)) 974f95f3850SWill Newton break; 975f95f3850SWill Newton 976f95f3850SWill Newton cmd = host->cmd; 977f95f3850SWill Newton host->cmd = NULL; 978f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 979053b3ce6SSeungwon Jeon dw_mci_command_complete(host, cmd); 980053b3ce6SSeungwon Jeon if (cmd == host->mrq->sbc && !cmd->error) { 981053b3ce6SSeungwon Jeon prev_state = state = STATE_SENDING_CMD; 982053b3ce6SSeungwon Jeon __dw_mci_start_request(host, host->cur_slot, 983053b3ce6SSeungwon Jeon host->mrq->cmd); 984053b3ce6SSeungwon Jeon goto unlock; 985053b3ce6SSeungwon Jeon } 986053b3ce6SSeungwon Jeon 987f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 988f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 989f95f3850SWill Newton goto unlock; 990f95f3850SWill Newton } 991f95f3850SWill Newton 992f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 993f95f3850SWill Newton /* fall through */ 994f95f3850SWill Newton 995f95f3850SWill Newton case STATE_SENDING_DATA: 996f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 997f95f3850SWill Newton &host->pending_events)) { 998f95f3850SWill Newton dw_mci_stop_dma(host); 999f95f3850SWill Newton if (data->stop) 1000f95f3850SWill Newton send_stop_cmd(host, data); 1001f95f3850SWill Newton state = STATE_DATA_ERROR; 1002f95f3850SWill Newton break; 1003f95f3850SWill Newton } 1004f95f3850SWill Newton 1005f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1006f95f3850SWill Newton &host->pending_events)) 1007f95f3850SWill Newton break; 1008f95f3850SWill Newton 1009f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 1010f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 1011f95f3850SWill Newton /* fall through */ 1012f95f3850SWill Newton 1013f95f3850SWill Newton case STATE_DATA_BUSY: 1014f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 1015f95f3850SWill Newton &host->pending_events)) 1016f95f3850SWill Newton break; 1017f95f3850SWill Newton 1018f95f3850SWill Newton host->data = NULL; 1019f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 1020f95f3850SWill Newton status = host->data_status; 1021f95f3850SWill Newton 1022f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1023f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 1024f95f3850SWill Newton data->error = -ETIMEDOUT; 1025f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 1026f95f3850SWill Newton data->error = -EILSEQ; 102755c5efbcSJames Hogan } else if (status & SDMMC_INT_EBE && 102855c5efbcSJames Hogan host->dir_status == 102955c5efbcSJames Hogan DW_MCI_SEND_STATUS) { 103055c5efbcSJames Hogan /* 103155c5efbcSJames Hogan * No data CRC status was returned. 103255c5efbcSJames Hogan * The number of bytes transferred will 103355c5efbcSJames Hogan * be exaggerated in PIO mode. 103455c5efbcSJames Hogan */ 103555c5efbcSJames Hogan data->bytes_xfered = 0; 103655c5efbcSJames Hogan data->error = -ETIMEDOUT; 1037f95f3850SWill Newton } else { 103862ca8034SShashidhar Hiremath dev_err(&host->dev, 1039f95f3850SWill Newton "data FIFO error " 1040f95f3850SWill Newton "(status=%08x)\n", 1041f95f3850SWill Newton status); 1042f95f3850SWill Newton data->error = -EIO; 1043f95f3850SWill Newton } 104494dd5b33SJames Hogan /* 104594dd5b33SJames Hogan * After an error, there may be data lingering 104694dd5b33SJames Hogan * in the FIFO, so reset it - doing so 104794dd5b33SJames Hogan * generates a block interrupt, hence setting 104894dd5b33SJames Hogan * the scatter-gather pointer to NULL. 104994dd5b33SJames Hogan */ 1050f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 105194dd5b33SJames Hogan host->sg = NULL; 105294dd5b33SJames Hogan ctrl = mci_readl(host, CTRL); 105394dd5b33SJames Hogan ctrl |= SDMMC_CTRL_FIFO_RESET; 105494dd5b33SJames Hogan mci_writel(host, CTRL, ctrl); 1055f95f3850SWill Newton } else { 1056f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 1057f95f3850SWill Newton data->error = 0; 1058f95f3850SWill Newton } 1059f95f3850SWill Newton 1060f95f3850SWill Newton if (!data->stop) { 1061f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1062f95f3850SWill Newton goto unlock; 1063f95f3850SWill Newton } 1064f95f3850SWill Newton 1065053b3ce6SSeungwon Jeon if (host->mrq->sbc && !data->error) { 1066053b3ce6SSeungwon Jeon data->stop->error = 0; 1067053b3ce6SSeungwon Jeon dw_mci_request_end(host, host->mrq); 1068053b3ce6SSeungwon Jeon goto unlock; 1069053b3ce6SSeungwon Jeon } 1070053b3ce6SSeungwon Jeon 1071f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 1072f95f3850SWill Newton if (!data->error) 1073f95f3850SWill Newton send_stop_cmd(host, data); 1074f95f3850SWill Newton /* fall through */ 1075f95f3850SWill Newton 1076f95f3850SWill Newton case STATE_SENDING_STOP: 1077f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1078f95f3850SWill Newton &host->pending_events)) 1079f95f3850SWill Newton break; 1080f95f3850SWill Newton 1081f95f3850SWill Newton host->cmd = NULL; 1082f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 1083f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1084f95f3850SWill Newton goto unlock; 1085f95f3850SWill Newton 1086f95f3850SWill Newton case STATE_DATA_ERROR: 1087f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1088f95f3850SWill Newton &host->pending_events)) 1089f95f3850SWill Newton break; 1090f95f3850SWill Newton 1091f95f3850SWill Newton state = STATE_DATA_BUSY; 1092f95f3850SWill Newton break; 1093f95f3850SWill Newton } 1094f95f3850SWill Newton } while (state != prev_state); 1095f95f3850SWill Newton 1096f95f3850SWill Newton host->state = state; 1097f95f3850SWill Newton unlock: 1098f95f3850SWill Newton spin_unlock(&host->lock); 1099f95f3850SWill Newton 1100f95f3850SWill Newton } 1101f95f3850SWill Newton 110234b664a2SJames Hogan /* push final bytes to part_buf, only use during push */ 110334b664a2SJames Hogan static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) 110434b664a2SJames Hogan { 110534b664a2SJames Hogan memcpy((void *)&host->part_buf, buf, cnt); 110634b664a2SJames Hogan host->part_buf_count = cnt; 110734b664a2SJames Hogan } 110834b664a2SJames Hogan 110934b664a2SJames Hogan /* append bytes to part_buf, only use during push */ 111034b664a2SJames Hogan static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) 111134b664a2SJames Hogan { 111234b664a2SJames Hogan cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); 111334b664a2SJames Hogan memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); 111434b664a2SJames Hogan host->part_buf_count += cnt; 111534b664a2SJames Hogan return cnt; 111634b664a2SJames Hogan } 111734b664a2SJames Hogan 111834b664a2SJames Hogan /* pull first bytes from part_buf, only use during pull */ 111934b664a2SJames Hogan static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) 112034b664a2SJames Hogan { 112134b664a2SJames Hogan cnt = min(cnt, (int)host->part_buf_count); 112234b664a2SJames Hogan if (cnt) { 112334b664a2SJames Hogan memcpy(buf, (void *)&host->part_buf + host->part_buf_start, 112434b664a2SJames Hogan cnt); 112534b664a2SJames Hogan host->part_buf_count -= cnt; 112634b664a2SJames Hogan host->part_buf_start += cnt; 112734b664a2SJames Hogan } 112834b664a2SJames Hogan return cnt; 112934b664a2SJames Hogan } 113034b664a2SJames Hogan 113134b664a2SJames Hogan /* pull final bytes from the part_buf, assuming it's just been filled */ 113234b664a2SJames Hogan static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) 113334b664a2SJames Hogan { 113434b664a2SJames Hogan memcpy(buf, &host->part_buf, cnt); 113534b664a2SJames Hogan host->part_buf_start = cnt; 113634b664a2SJames Hogan host->part_buf_count = (1 << host->data_shift) - cnt; 113734b664a2SJames Hogan } 113834b664a2SJames Hogan 1139f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 1140f95f3850SWill Newton { 114134b664a2SJames Hogan /* try and push anything in the part_buf */ 114234b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 114334b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 114434b664a2SJames Hogan buf += len; 114534b664a2SJames Hogan cnt -= len; 114634b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 2) { 11474e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 11484e0a5adfSJaehoon Chung host->part_buf16); 114934b664a2SJames Hogan host->part_buf_count = 0; 115034b664a2SJames Hogan } 115134b664a2SJames Hogan } 115234b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 115334b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 115434b664a2SJames Hogan while (cnt >= 2) { 115534b664a2SJames Hogan u16 aligned_buf[64]; 115634b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 115734b664a2SJames Hogan int items = len >> 1; 115834b664a2SJames Hogan int i; 115934b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 116034b664a2SJames Hogan memcpy(aligned_buf, buf, len); 116134b664a2SJames Hogan buf += len; 116234b664a2SJames Hogan cnt -= len; 116334b664a2SJames Hogan /* push data from aligned buffer into fifo */ 116434b664a2SJames Hogan for (i = 0; i < items; ++i) 11654e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 11664e0a5adfSJaehoon Chung aligned_buf[i]); 116734b664a2SJames Hogan } 116834b664a2SJames Hogan } else 116934b664a2SJames Hogan #endif 117034b664a2SJames Hogan { 117134b664a2SJames Hogan u16 *pdata = buf; 117234b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 11734e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), *pdata++); 117434b664a2SJames Hogan buf = pdata; 117534b664a2SJames Hogan } 117634b664a2SJames Hogan /* put anything remaining in the part_buf */ 117734b664a2SJames Hogan if (cnt) { 117834b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 117934b664a2SJames Hogan if (!sg_next(host->sg)) 11804e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 11814e0a5adfSJaehoon Chung host->part_buf16); 1182f95f3850SWill Newton } 1183f95f3850SWill Newton } 1184f95f3850SWill Newton 1185f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 1186f95f3850SWill Newton { 118734b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 118834b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 118934b664a2SJames Hogan while (cnt >= 2) { 119034b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 119134b664a2SJames Hogan u16 aligned_buf[64]; 119234b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 119334b664a2SJames Hogan int items = len >> 1; 119434b664a2SJames Hogan int i; 119534b664a2SJames Hogan for (i = 0; i < items; ++i) 11964e0a5adfSJaehoon Chung aligned_buf[i] = mci_readw(host, 11974e0a5adfSJaehoon Chung DATA(host->data_offset)); 119834b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 119934b664a2SJames Hogan memcpy(buf, aligned_buf, len); 120034b664a2SJames Hogan buf += len; 120134b664a2SJames Hogan cnt -= len; 120234b664a2SJames Hogan } 120334b664a2SJames Hogan } else 120434b664a2SJames Hogan #endif 120534b664a2SJames Hogan { 120634b664a2SJames Hogan u16 *pdata = buf; 120734b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 12084e0a5adfSJaehoon Chung *pdata++ = mci_readw(host, DATA(host->data_offset)); 120934b664a2SJames Hogan buf = pdata; 121034b664a2SJames Hogan } 121134b664a2SJames Hogan if (cnt) { 12124e0a5adfSJaehoon Chung host->part_buf16 = mci_readw(host, DATA(host->data_offset)); 121334b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1214f95f3850SWill Newton } 1215f95f3850SWill Newton } 1216f95f3850SWill Newton 1217f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 1218f95f3850SWill Newton { 121934b664a2SJames Hogan /* try and push anything in the part_buf */ 122034b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 122134b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 122234b664a2SJames Hogan buf += len; 122334b664a2SJames Hogan cnt -= len; 122434b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 4) { 12254e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12264e0a5adfSJaehoon Chung host->part_buf32); 122734b664a2SJames Hogan host->part_buf_count = 0; 122834b664a2SJames Hogan } 122934b664a2SJames Hogan } 123034b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 123134b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 123234b664a2SJames Hogan while (cnt >= 4) { 123334b664a2SJames Hogan u32 aligned_buf[32]; 123434b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 123534b664a2SJames Hogan int items = len >> 2; 123634b664a2SJames Hogan int i; 123734b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 123834b664a2SJames Hogan memcpy(aligned_buf, buf, len); 123934b664a2SJames Hogan buf += len; 124034b664a2SJames Hogan cnt -= len; 124134b664a2SJames Hogan /* push data from aligned buffer into fifo */ 124234b664a2SJames Hogan for (i = 0; i < items; ++i) 12434e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12444e0a5adfSJaehoon Chung aligned_buf[i]); 124534b664a2SJames Hogan } 124634b664a2SJames Hogan } else 124734b664a2SJames Hogan #endif 124834b664a2SJames Hogan { 124934b664a2SJames Hogan u32 *pdata = buf; 125034b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 12514e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), *pdata++); 125234b664a2SJames Hogan buf = pdata; 125334b664a2SJames Hogan } 125434b664a2SJames Hogan /* put anything remaining in the part_buf */ 125534b664a2SJames Hogan if (cnt) { 125634b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 125734b664a2SJames Hogan if (!sg_next(host->sg)) 12584e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12594e0a5adfSJaehoon Chung host->part_buf32); 1260f95f3850SWill Newton } 1261f95f3850SWill Newton } 1262f95f3850SWill Newton 1263f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 1264f95f3850SWill Newton { 126534b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 126634b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 126734b664a2SJames Hogan while (cnt >= 4) { 126834b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 126934b664a2SJames Hogan u32 aligned_buf[32]; 127034b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 127134b664a2SJames Hogan int items = len >> 2; 127234b664a2SJames Hogan int i; 127334b664a2SJames Hogan for (i = 0; i < items; ++i) 12744e0a5adfSJaehoon Chung aligned_buf[i] = mci_readl(host, 12754e0a5adfSJaehoon Chung DATA(host->data_offset)); 127634b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 127734b664a2SJames Hogan memcpy(buf, aligned_buf, len); 127834b664a2SJames Hogan buf += len; 127934b664a2SJames Hogan cnt -= len; 128034b664a2SJames Hogan } 128134b664a2SJames Hogan } else 128234b664a2SJames Hogan #endif 128334b664a2SJames Hogan { 128434b664a2SJames Hogan u32 *pdata = buf; 128534b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 12864e0a5adfSJaehoon Chung *pdata++ = mci_readl(host, DATA(host->data_offset)); 128734b664a2SJames Hogan buf = pdata; 128834b664a2SJames Hogan } 128934b664a2SJames Hogan if (cnt) { 12904e0a5adfSJaehoon Chung host->part_buf32 = mci_readl(host, DATA(host->data_offset)); 129134b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1292f95f3850SWill Newton } 1293f95f3850SWill Newton } 1294f95f3850SWill Newton 1295f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1296f95f3850SWill Newton { 129734b664a2SJames Hogan /* try and push anything in the part_buf */ 129834b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 129934b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 130034b664a2SJames Hogan buf += len; 130134b664a2SJames Hogan cnt -= len; 130234b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 8) { 13034e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 13044e0a5adfSJaehoon Chung host->part_buf); 130534b664a2SJames Hogan host->part_buf_count = 0; 130634b664a2SJames Hogan } 130734b664a2SJames Hogan } 130834b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 130934b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 131034b664a2SJames Hogan while (cnt >= 8) { 131134b664a2SJames Hogan u64 aligned_buf[16]; 131234b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 131334b664a2SJames Hogan int items = len >> 3; 131434b664a2SJames Hogan int i; 131534b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 131634b664a2SJames Hogan memcpy(aligned_buf, buf, len); 131734b664a2SJames Hogan buf += len; 131834b664a2SJames Hogan cnt -= len; 131934b664a2SJames Hogan /* push data from aligned buffer into fifo */ 132034b664a2SJames Hogan for (i = 0; i < items; ++i) 13214e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13224e0a5adfSJaehoon Chung aligned_buf[i]); 132334b664a2SJames Hogan } 132434b664a2SJames Hogan } else 132534b664a2SJames Hogan #endif 132634b664a2SJames Hogan { 132734b664a2SJames Hogan u64 *pdata = buf; 132834b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 13294e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), *pdata++); 133034b664a2SJames Hogan buf = pdata; 133134b664a2SJames Hogan } 133234b664a2SJames Hogan /* put anything remaining in the part_buf */ 133334b664a2SJames Hogan if (cnt) { 133434b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 133534b664a2SJames Hogan if (!sg_next(host->sg)) 13364e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13374e0a5adfSJaehoon Chung host->part_buf); 1338f95f3850SWill Newton } 1339f95f3850SWill Newton } 1340f95f3850SWill Newton 1341f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1342f95f3850SWill Newton { 134334b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 134434b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 134534b664a2SJames Hogan while (cnt >= 8) { 134634b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 134734b664a2SJames Hogan u64 aligned_buf[16]; 134834b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 134934b664a2SJames Hogan int items = len >> 3; 135034b664a2SJames Hogan int i; 135134b664a2SJames Hogan for (i = 0; i < items; ++i) 13524e0a5adfSJaehoon Chung aligned_buf[i] = mci_readq(host, 13534e0a5adfSJaehoon Chung DATA(host->data_offset)); 135434b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 135534b664a2SJames Hogan memcpy(buf, aligned_buf, len); 135634b664a2SJames Hogan buf += len; 135734b664a2SJames Hogan cnt -= len; 1358f95f3850SWill Newton } 135934b664a2SJames Hogan } else 136034b664a2SJames Hogan #endif 136134b664a2SJames Hogan { 136234b664a2SJames Hogan u64 *pdata = buf; 136334b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 13644e0a5adfSJaehoon Chung *pdata++ = mci_readq(host, DATA(host->data_offset)); 136534b664a2SJames Hogan buf = pdata; 136634b664a2SJames Hogan } 136734b664a2SJames Hogan if (cnt) { 13684e0a5adfSJaehoon Chung host->part_buf = mci_readq(host, DATA(host->data_offset)); 136934b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 137034b664a2SJames Hogan } 137134b664a2SJames Hogan } 137234b664a2SJames Hogan 137334b664a2SJames Hogan static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) 137434b664a2SJames Hogan { 137534b664a2SJames Hogan int len; 137634b664a2SJames Hogan 137734b664a2SJames Hogan /* get remaining partial bytes */ 137834b664a2SJames Hogan len = dw_mci_pull_part_bytes(host, buf, cnt); 137934b664a2SJames Hogan if (unlikely(len == cnt)) 138034b664a2SJames Hogan return; 138134b664a2SJames Hogan buf += len; 138234b664a2SJames Hogan cnt -= len; 138334b664a2SJames Hogan 138434b664a2SJames Hogan /* get the rest of the data */ 138534b664a2SJames Hogan host->pull_data(host, buf, cnt); 1386f95f3850SWill Newton } 1387f95f3850SWill Newton 1388f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1389f95f3850SWill Newton { 1390f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1391f9c2a0dcSSeungwon Jeon void *buf; 1392f9c2a0dcSSeungwon Jeon unsigned int offset; 1393f95f3850SWill Newton struct mmc_data *data = host->data; 1394f95f3850SWill Newton int shift = host->data_shift; 1395f95f3850SWill Newton u32 status; 1396ba6a902dSChris Ball unsigned int nbytes = 0, len; 1397f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1398f95f3850SWill Newton 1399f95f3850SWill Newton do { 1400f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1401f9c2a0dcSSeungwon Jeon goto done; 1402f95f3850SWill Newton 1403f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1404f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1405f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1406f9c2a0dcSSeungwon Jeon offset = 0; 1407f9c2a0dcSSeungwon Jeon 1408f9c2a0dcSSeungwon Jeon do { 1409f9c2a0dcSSeungwon Jeon fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) 1410f9c2a0dcSSeungwon Jeon << shift) + host->part_buf_count; 1411f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1412f9c2a0dcSSeungwon Jeon if (!len) 1413f9c2a0dcSSeungwon Jeon break; 1414f9c2a0dcSSeungwon Jeon dw_mci_pull_data(host, (void *)(buf + offset), len); 1415f95f3850SWill Newton offset += len; 1416f95f3850SWill Newton nbytes += len; 1417f9c2a0dcSSeungwon Jeon remain -= len; 1418f9c2a0dcSSeungwon Jeon } while (remain); 1419f9c2a0dcSSeungwon Jeon sg_miter->consumed = offset; 1420f95f3850SWill Newton 1421f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1422f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1423f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1424f95f3850SWill Newton host->data_status = status; 1425f95f3850SWill Newton data->bytes_xfered += nbytes; 1426f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1427f9c2a0dcSSeungwon Jeon host->sg = NULL; 1428f95f3850SWill Newton smp_wmb(); 1429f95f3850SWill Newton 1430f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1431f95f3850SWill Newton 1432f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1433f95f3850SWill Newton return; 1434f95f3850SWill Newton } 1435f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1436f95f3850SWill Newton data->bytes_xfered += nbytes; 1437f9c2a0dcSSeungwon Jeon 1438f9c2a0dcSSeungwon Jeon if (!remain) { 1439f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1440f9c2a0dcSSeungwon Jeon goto done; 1441f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1442f9c2a0dcSSeungwon Jeon } 1443f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1444f95f3850SWill Newton return; 1445f95f3850SWill Newton 1446f95f3850SWill Newton done: 1447f95f3850SWill Newton data->bytes_xfered += nbytes; 1448f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1449f9c2a0dcSSeungwon Jeon host->sg = NULL; 1450f95f3850SWill Newton smp_wmb(); 1451f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1452f95f3850SWill Newton } 1453f95f3850SWill Newton 1454f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1455f95f3850SWill Newton { 1456f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1457f9c2a0dcSSeungwon Jeon void *buf; 1458f9c2a0dcSSeungwon Jeon unsigned int offset; 1459f95f3850SWill Newton struct mmc_data *data = host->data; 1460f95f3850SWill Newton int shift = host->data_shift; 1461f95f3850SWill Newton u32 status; 1462f95f3850SWill Newton unsigned int nbytes = 0, len; 1463f9c2a0dcSSeungwon Jeon unsigned int fifo_depth = host->fifo_depth; 1464f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1465f95f3850SWill Newton 1466f95f3850SWill Newton do { 1467f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1468f9c2a0dcSSeungwon Jeon goto done; 1469f95f3850SWill Newton 1470f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1471f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1472f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1473f9c2a0dcSSeungwon Jeon offset = 0; 1474f9c2a0dcSSeungwon Jeon 1475f9c2a0dcSSeungwon Jeon do { 1476f9c2a0dcSSeungwon Jeon fcnt = ((fifo_depth - 1477f9c2a0dcSSeungwon Jeon SDMMC_GET_FCNT(mci_readl(host, STATUS))) 1478f9c2a0dcSSeungwon Jeon << shift) - host->part_buf_count; 1479f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1480f9c2a0dcSSeungwon Jeon if (!len) 1481f9c2a0dcSSeungwon Jeon break; 1482f9c2a0dcSSeungwon Jeon host->push_data(host, (void *)(buf + offset), len); 1483f95f3850SWill Newton offset += len; 1484f95f3850SWill Newton nbytes += len; 1485f9c2a0dcSSeungwon Jeon remain -= len; 1486f9c2a0dcSSeungwon Jeon } while (remain); 1487f9c2a0dcSSeungwon Jeon sg_miter->consumed = offset; 1488f95f3850SWill Newton 1489f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1490f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1491f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1492f95f3850SWill Newton host->data_status = status; 1493f95f3850SWill Newton data->bytes_xfered += nbytes; 1494f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1495f9c2a0dcSSeungwon Jeon host->sg = NULL; 1496f95f3850SWill Newton 1497f95f3850SWill Newton smp_wmb(); 1498f95f3850SWill Newton 1499f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1500f95f3850SWill Newton 1501f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1502f95f3850SWill Newton return; 1503f95f3850SWill Newton } 1504f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1505f95f3850SWill Newton data->bytes_xfered += nbytes; 1506f9c2a0dcSSeungwon Jeon 1507f9c2a0dcSSeungwon Jeon if (!remain) { 1508f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1509f9c2a0dcSSeungwon Jeon goto done; 1510f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1511f9c2a0dcSSeungwon Jeon } 1512f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1513f95f3850SWill Newton return; 1514f95f3850SWill Newton 1515f95f3850SWill Newton done: 1516f95f3850SWill Newton data->bytes_xfered += nbytes; 1517f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1518f9c2a0dcSSeungwon Jeon host->sg = NULL; 1519f95f3850SWill Newton smp_wmb(); 1520f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1521f95f3850SWill Newton } 1522f95f3850SWill Newton 1523f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1524f95f3850SWill Newton { 1525f95f3850SWill Newton if (!host->cmd_status) 1526f95f3850SWill Newton host->cmd_status = status; 1527f95f3850SWill Newton 1528f95f3850SWill Newton smp_wmb(); 1529f95f3850SWill Newton 1530f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1531f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1532f95f3850SWill Newton } 1533f95f3850SWill Newton 1534f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1535f95f3850SWill Newton { 1536f95f3850SWill Newton struct dw_mci *host = dev_id; 1537f95f3850SWill Newton u32 status, pending; 1538f95f3850SWill Newton unsigned int pass_count = 0; 15391a5c8e1fSShashidhar Hiremath int i; 1540f95f3850SWill Newton 1541f95f3850SWill Newton do { 1542f95f3850SWill Newton status = mci_readl(host, RINTSTS); 1543f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1544f95f3850SWill Newton 1545f95f3850SWill Newton /* 1546f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1547f95f3850SWill Newton * is configured. 1548f95f3850SWill Newton */ 1549f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1550f95f3850SWill Newton if (!pending && 1551f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1552f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1553f95f3850SWill Newton } 1554f95f3850SWill Newton 1555f95f3850SWill Newton if (!pending) 1556f95f3850SWill Newton break; 1557f95f3850SWill Newton 1558f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1559f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1560f95f3850SWill Newton host->cmd_status = status; 1561f95f3850SWill Newton smp_wmb(); 1562f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1563f95f3850SWill Newton } 1564f95f3850SWill Newton 1565f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1566f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1567f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1568f95f3850SWill Newton host->data_status = status; 1569f95f3850SWill Newton smp_wmb(); 1570f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 15716e83e10dSSeungwon Jeon if (!(pending & (SDMMC_INT_DTO | SDMMC_INT_DCRC | 15726e83e10dSSeungwon Jeon SDMMC_INT_SBE | SDMMC_INT_EBE))) 1573f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1574f95f3850SWill Newton } 1575f95f3850SWill Newton 1576f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1577f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1578f95f3850SWill Newton if (!host->data_status) 1579f95f3850SWill Newton host->data_status = status; 1580f95f3850SWill Newton smp_wmb(); 1581f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1582f95f3850SWill Newton if (host->sg != NULL) 1583f95f3850SWill Newton dw_mci_read_data_pio(host); 1584f95f3850SWill Newton } 1585f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1586f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1587f95f3850SWill Newton } 1588f95f3850SWill Newton 1589f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1590f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1591b40af3aaSJames Hogan if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) 1592f95f3850SWill Newton dw_mci_read_data_pio(host); 1593f95f3850SWill Newton } 1594f95f3850SWill Newton 1595f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1596f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1597b40af3aaSJames Hogan if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) 1598f95f3850SWill Newton dw_mci_write_data_pio(host); 1599f95f3850SWill Newton } 1600f95f3850SWill Newton 1601f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1602f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1603f95f3850SWill Newton dw_mci_cmd_interrupt(host, status); 1604f95f3850SWill Newton } 1605f95f3850SWill Newton 1606f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1607f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 160895dcc2cbSThomas Abraham queue_work(host->card_workqueue, &host->card_work); 1609f95f3850SWill Newton } 1610f95f3850SWill Newton 16111a5c8e1fSShashidhar Hiremath /* Handle SDIO Interrupts */ 16121a5c8e1fSShashidhar Hiremath for (i = 0; i < host->num_slots; i++) { 16131a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = host->slot[i]; 16141a5c8e1fSShashidhar Hiremath if (pending & SDMMC_INT_SDIO(i)) { 16151a5c8e1fSShashidhar Hiremath mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i)); 16161a5c8e1fSShashidhar Hiremath mmc_signal_sdio_irq(slot->mmc); 16171a5c8e1fSShashidhar Hiremath } 16181a5c8e1fSShashidhar Hiremath } 16191a5c8e1fSShashidhar Hiremath 1620f95f3850SWill Newton } while (pass_count++ < 5); 1621f95f3850SWill Newton 1622f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1623f95f3850SWill Newton /* Handle DMA interrupts */ 1624f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1625f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1626f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1627f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1628f95f3850SWill Newton host->dma_ops->complete(host); 1629f95f3850SWill Newton } 1630f95f3850SWill Newton #endif 1631f95f3850SWill Newton 1632f95f3850SWill Newton return IRQ_HANDLED; 1633f95f3850SWill Newton } 1634f95f3850SWill Newton 16351791b13eSJames Hogan static void dw_mci_work_routine_card(struct work_struct *work) 1636f95f3850SWill Newton { 16371791b13eSJames Hogan struct dw_mci *host = container_of(work, struct dw_mci, card_work); 1638f95f3850SWill Newton int i; 1639f95f3850SWill Newton 1640f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1641f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1642f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1643f95f3850SWill Newton struct mmc_request *mrq; 1644f95f3850SWill Newton int present; 1645f95f3850SWill Newton u32 ctrl; 1646f95f3850SWill Newton 1647f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1648f95f3850SWill Newton while (present != slot->last_detect_state) { 1649f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1650f95f3850SWill Newton present ? "inserted" : "removed"); 1651f95f3850SWill Newton 16521791b13eSJames Hogan /* Power up slot (before spin_lock, may sleep) */ 16531791b13eSJames Hogan if (present != 0 && host->pdata->setpower) 16541791b13eSJames Hogan host->pdata->setpower(slot->id, mmc->ocr_avail); 16551791b13eSJames Hogan 16561791b13eSJames Hogan spin_lock_bh(&host->lock); 16571791b13eSJames Hogan 1658f95f3850SWill Newton /* Card change detected */ 1659f95f3850SWill Newton slot->last_detect_state = present; 1660f95f3850SWill Newton 16611791b13eSJames Hogan /* Mark card as present if applicable */ 16621791b13eSJames Hogan if (present != 0) 1663f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1664f95f3850SWill Newton 1665f95f3850SWill Newton /* Clean up queue if present */ 1666f95f3850SWill Newton mrq = slot->mrq; 1667f95f3850SWill Newton if (mrq) { 1668f95f3850SWill Newton if (mrq == host->mrq) { 1669f95f3850SWill Newton host->data = NULL; 1670f95f3850SWill Newton host->cmd = NULL; 1671f95f3850SWill Newton 1672f95f3850SWill Newton switch (host->state) { 1673f95f3850SWill Newton case STATE_IDLE: 1674f95f3850SWill Newton break; 1675f95f3850SWill Newton case STATE_SENDING_CMD: 1676f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1677f95f3850SWill Newton if (!mrq->data) 1678f95f3850SWill Newton break; 1679f95f3850SWill Newton /* fall through */ 1680f95f3850SWill Newton case STATE_SENDING_DATA: 1681f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1682f95f3850SWill Newton dw_mci_stop_dma(host); 1683f95f3850SWill Newton break; 1684f95f3850SWill Newton case STATE_DATA_BUSY: 1685f95f3850SWill Newton case STATE_DATA_ERROR: 1686f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1687f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1688f95f3850SWill Newton if (!mrq->stop) 1689f95f3850SWill Newton break; 1690f95f3850SWill Newton /* fall through */ 1691f95f3850SWill Newton case STATE_SENDING_STOP: 1692f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1693f95f3850SWill Newton break; 1694f95f3850SWill Newton } 1695f95f3850SWill Newton 1696f95f3850SWill Newton dw_mci_request_end(host, mrq); 1697f95f3850SWill Newton } else { 1698f95f3850SWill Newton list_del(&slot->queue_node); 1699f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1700f95f3850SWill Newton if (mrq->data) 1701f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1702f95f3850SWill Newton if (mrq->stop) 1703f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1704f95f3850SWill Newton 1705f95f3850SWill Newton spin_unlock(&host->lock); 1706f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1707f95f3850SWill Newton spin_lock(&host->lock); 1708f95f3850SWill Newton } 1709f95f3850SWill Newton } 1710f95f3850SWill Newton 1711f95f3850SWill Newton /* Power down slot */ 1712f95f3850SWill Newton if (present == 0) { 1713f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1714f95f3850SWill Newton 1715f95f3850SWill Newton /* 1716f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1717f95f3850SWill Newton * block interrupt, hence setting the 1718f95f3850SWill Newton * scatter-gather pointer to NULL. 1719f95f3850SWill Newton */ 1720f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 1721f95f3850SWill Newton host->sg = NULL; 1722f95f3850SWill Newton 1723f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1724f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1725f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1726f95f3850SWill Newton 1727f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1728f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1729*141a712aSSeungwon Jeon /* Software reset of DMA */ 1730*141a712aSSeungwon Jeon ctrl |= SDMMC_IDMAC_SWRESET; 1731f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1732f95f3850SWill Newton #endif 1733f95f3850SWill Newton 1734f95f3850SWill Newton } 1735f95f3850SWill Newton 17361791b13eSJames Hogan spin_unlock_bh(&host->lock); 17371791b13eSJames Hogan 17381791b13eSJames Hogan /* Power down slot (after spin_unlock, may sleep) */ 17391791b13eSJames Hogan if (present == 0 && host->pdata->setpower) 17401791b13eSJames Hogan host->pdata->setpower(slot->id, 0); 17411791b13eSJames Hogan 1742f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1743f95f3850SWill Newton } 1744f95f3850SWill Newton 1745f95f3850SWill Newton mmc_detect_change(slot->mmc, 1746f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1747f95f3850SWill Newton } 1748f95f3850SWill Newton } 1749f95f3850SWill Newton 1750f95f3850SWill Newton static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1751f95f3850SWill Newton { 1752f95f3850SWill Newton struct mmc_host *mmc; 1753f95f3850SWill Newton struct dw_mci_slot *slot; 1754f95f3850SWill Newton 175562ca8034SShashidhar Hiremath mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), &host->dev); 1756f95f3850SWill Newton if (!mmc) 1757f95f3850SWill Newton return -ENOMEM; 1758f95f3850SWill Newton 1759f95f3850SWill Newton slot = mmc_priv(mmc); 1760f95f3850SWill Newton slot->id = id; 1761f95f3850SWill Newton slot->mmc = mmc; 1762f95f3850SWill Newton slot->host = host; 1763f95f3850SWill Newton 1764f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1765f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1766f95f3850SWill Newton mmc->f_max = host->bus_hz; 1767f95f3850SWill Newton 1768f95f3850SWill Newton if (host->pdata->get_ocr) 1769f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1770f95f3850SWill Newton else 1771f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1772f95f3850SWill Newton 1773f95f3850SWill Newton /* 1774f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1775f95f3850SWill Newton * is detected. 1776f95f3850SWill Newton */ 1777f95f3850SWill Newton if (host->pdata->setpower) 1778f95f3850SWill Newton host->pdata->setpower(id, 0); 1779f95f3850SWill Newton 1780fc3d7720SJaehoon Chung if (host->pdata->caps) 1781fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1782fc3d7720SJaehoon Chung 17834f408cc6SSeungwon Jeon if (host->pdata->caps2) 17844f408cc6SSeungwon Jeon mmc->caps2 = host->pdata->caps2; 17854f408cc6SSeungwon Jeon 1786f95f3850SWill Newton if (host->pdata->get_bus_wd) 1787f95f3850SWill Newton if (host->pdata->get_bus_wd(slot->id) >= 4) 1788f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1789f95f3850SWill Newton 1790f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 17916daa7778SSeungwon Jeon mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 1792f95f3850SWill Newton 1793356ac2cfSJaehoon Chung if (mmc->caps2 & MMC_CAP2_POWEROFF_NOTIFY) 1794356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_SHORT; 1795356ac2cfSJaehoon Chung else 1796356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_NONE; 1797356ac2cfSJaehoon Chung 1798f95f3850SWill Newton if (host->pdata->blk_settings) { 1799f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1800f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1801f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1802f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1803f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1804f95f3850SWill Newton } else { 1805f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1806a39e5746SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 1807a39e5746SJaehoon Chung mmc->max_segs = host->ring_size; 1808a39e5746SJaehoon Chung mmc->max_blk_size = 65536; 1809a39e5746SJaehoon Chung mmc->max_blk_count = host->ring_size; 1810a39e5746SJaehoon Chung mmc->max_seg_size = 0x1000; 1811a39e5746SJaehoon Chung mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1812a39e5746SJaehoon Chung #else 1813f95f3850SWill Newton mmc->max_segs = 64; 1814f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1815f95f3850SWill Newton mmc->max_blk_count = 512; 1816f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1817f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1818f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1819a39e5746SJaehoon Chung } 1820f95f3850SWill Newton 1821c07946a3SJaehoon Chung host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 1822c07946a3SJaehoon Chung if (IS_ERR(host->vmmc)) { 1823a3c76eb9SGirish K S pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1824c07946a3SJaehoon Chung host->vmmc = NULL; 1825c07946a3SJaehoon Chung } else 1826c07946a3SJaehoon Chung regulator_enable(host->vmmc); 1827c07946a3SJaehoon Chung 1828f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1829f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1830f95f3850SWill Newton else 1831f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1832f95f3850SWill Newton 1833f95f3850SWill Newton host->slot[id] = slot; 1834f95f3850SWill Newton mmc_add_host(mmc); 1835f95f3850SWill Newton 1836f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1837f95f3850SWill Newton dw_mci_init_debugfs(slot); 1838f95f3850SWill Newton #endif 1839f95f3850SWill Newton 1840f95f3850SWill Newton /* Card initially undetected */ 1841f95f3850SWill Newton slot->last_detect_state = 0; 1842f95f3850SWill Newton 1843dd6c4b98SWill Newton /* 1844dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 1845dd6c4b98SWill Newton * need to run the detect tasklet 1846dd6c4b98SWill Newton */ 184795dcc2cbSThomas Abraham queue_work(host->card_workqueue, &host->card_work); 1848dd6c4b98SWill Newton 1849f95f3850SWill Newton return 0; 1850f95f3850SWill Newton } 1851f95f3850SWill Newton 1852f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 1853f95f3850SWill Newton { 1854f95f3850SWill Newton /* Shutdown detect IRQ */ 1855f95f3850SWill Newton if (slot->host->pdata->exit) 1856f95f3850SWill Newton slot->host->pdata->exit(id); 1857f95f3850SWill Newton 1858f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 1859f95f3850SWill Newton mmc_remove_host(slot->mmc); 1860f95f3850SWill Newton slot->host->slot[id] = NULL; 1861f95f3850SWill Newton mmc_free_host(slot->mmc); 1862f95f3850SWill Newton } 1863f95f3850SWill Newton 1864f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 1865f95f3850SWill Newton { 1866f95f3850SWill Newton /* Alloc memory for sg translation */ 186762ca8034SShashidhar Hiremath host->sg_cpu = dma_alloc_coherent(&host->dev, PAGE_SIZE, 1868f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 1869f95f3850SWill Newton if (!host->sg_cpu) { 187062ca8034SShashidhar Hiremath dev_err(&host->dev, "%s: could not alloc DMA memory\n", 1871f95f3850SWill Newton __func__); 1872f95f3850SWill Newton goto no_dma; 1873f95f3850SWill Newton } 1874f95f3850SWill Newton 1875f95f3850SWill Newton /* Determine which DMA interface to use */ 1876f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1877f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 187862ca8034SShashidhar Hiremath dev_info(&host->dev, "Using internal DMA controller.\n"); 1879f95f3850SWill Newton #endif 1880f95f3850SWill Newton 1881f95f3850SWill Newton if (!host->dma_ops) 1882f95f3850SWill Newton goto no_dma; 1883f95f3850SWill Newton 1884e1631f98SJaehoon Chung if (host->dma_ops->init && host->dma_ops->start && 1885e1631f98SJaehoon Chung host->dma_ops->stop && host->dma_ops->cleanup) { 1886f95f3850SWill Newton if (host->dma_ops->init(host)) { 188762ca8034SShashidhar Hiremath dev_err(&host->dev, "%s: Unable to initialize " 1888f95f3850SWill Newton "DMA Controller.\n", __func__); 1889f95f3850SWill Newton goto no_dma; 1890f95f3850SWill Newton } 1891f95f3850SWill Newton } else { 189262ca8034SShashidhar Hiremath dev_err(&host->dev, "DMA initialization not found.\n"); 1893f95f3850SWill Newton goto no_dma; 1894f95f3850SWill Newton } 1895f95f3850SWill Newton 1896f95f3850SWill Newton host->use_dma = 1; 1897f95f3850SWill Newton return; 1898f95f3850SWill Newton 1899f95f3850SWill Newton no_dma: 190062ca8034SShashidhar Hiremath dev_info(&host->dev, "Using PIO mode.\n"); 1901f95f3850SWill Newton host->use_dma = 0; 1902f95f3850SWill Newton return; 1903f95f3850SWill Newton } 1904f95f3850SWill Newton 1905f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 1906f95f3850SWill Newton { 1907f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 1908f95f3850SWill Newton unsigned int ctrl; 1909f95f3850SWill Newton 1910f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1911f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 1912f95f3850SWill Newton 1913f95f3850SWill Newton /* wait till resets clear */ 1914f95f3850SWill Newton do { 1915f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1916f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1917f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 1918f95f3850SWill Newton return true; 1919f95f3850SWill Newton } while (time_before(jiffies, timeout)); 1920f95f3850SWill Newton 1921f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 1922f95f3850SWill Newton 1923f95f3850SWill Newton return false; 1924f95f3850SWill Newton } 1925f95f3850SWill Newton 192662ca8034SShashidhar Hiremath int dw_mci_probe(struct dw_mci *host) 1927f95f3850SWill Newton { 192862ca8034SShashidhar Hiremath int width, i, ret = 0; 1929f95f3850SWill Newton u32 fifo_size; 1930f95f3850SWill Newton 193162ca8034SShashidhar Hiremath if (!host->pdata || !host->pdata->init) { 193262ca8034SShashidhar Hiremath dev_err(&host->dev, 1933f95f3850SWill Newton "Platform data must supply init function\n"); 193462ca8034SShashidhar Hiremath return -ENODEV; 1935f95f3850SWill Newton } 1936f95f3850SWill Newton 193762ca8034SShashidhar Hiremath if (!host->pdata->select_slot && host->pdata->num_slots > 1) { 193862ca8034SShashidhar Hiremath dev_err(&host->dev, 1939f95f3850SWill Newton "Platform data must supply select_slot function\n"); 194062ca8034SShashidhar Hiremath return -ENODEV; 1941f95f3850SWill Newton } 1942f95f3850SWill Newton 194362ca8034SShashidhar Hiremath if (!host->pdata->bus_hz) { 194462ca8034SShashidhar Hiremath dev_err(&host->dev, 1945f95f3850SWill Newton "Platform data must supply bus speed\n"); 194662ca8034SShashidhar Hiremath return -ENODEV; 1947f95f3850SWill Newton } 1948f95f3850SWill Newton 194962ca8034SShashidhar Hiremath host->bus_hz = host->pdata->bus_hz; 195062ca8034SShashidhar Hiremath host->quirks = host->pdata->quirks; 1951f95f3850SWill Newton 1952f95f3850SWill Newton spin_lock_init(&host->lock); 1953f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 1954f95f3850SWill Newton 1955f95f3850SWill Newton /* 1956f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 1957f95f3850SWill Newton * the correct values. 1958f95f3850SWill Newton */ 1959f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 1960f95f3850SWill Newton if (!i) { 1961f95f3850SWill Newton host->push_data = dw_mci_push_data16; 1962f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 1963f95f3850SWill Newton width = 16; 1964f95f3850SWill Newton host->data_shift = 1; 1965f95f3850SWill Newton } else if (i == 2) { 1966f95f3850SWill Newton host->push_data = dw_mci_push_data64; 1967f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 1968f95f3850SWill Newton width = 64; 1969f95f3850SWill Newton host->data_shift = 3; 1970f95f3850SWill Newton } else { 1971f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 1972f95f3850SWill Newton WARN((i != 1), 1973f95f3850SWill Newton "HCON reports a reserved host data width!\n" 1974f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 1975f95f3850SWill Newton host->push_data = dw_mci_push_data32; 1976f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 1977f95f3850SWill Newton width = 32; 1978f95f3850SWill Newton host->data_shift = 2; 1979f95f3850SWill Newton } 1980f95f3850SWill Newton 1981f95f3850SWill Newton /* Reset all blocks */ 1982*141a712aSSeungwon Jeon if (!mci_wait_reset(&host->dev, host)) 1983*141a712aSSeungwon Jeon return -ENODEV; 1984*141a712aSSeungwon Jeon 1985*141a712aSSeungwon Jeon host->dma_ops = host->pdata->dma_ops; 1986*141a712aSSeungwon Jeon dw_mci_init_dma(host); 1987f95f3850SWill Newton 1988f95f3850SWill Newton /* Clear the interrupts for the host controller */ 1989f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1990f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 1991f95f3850SWill Newton 1992f95f3850SWill Newton /* Put in max timeout */ 1993f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 1994f95f3850SWill Newton 1995f95f3850SWill Newton /* 1996f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 1997f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 1998f95f3850SWill Newton */ 1999b86d8253SJames Hogan if (!host->pdata->fifo_depth) { 2000b86d8253SJames Hogan /* 2001b86d8253SJames Hogan * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may 2002b86d8253SJames Hogan * have been overwritten by the bootloader, just like we're 2003b86d8253SJames Hogan * about to do, so if you know the value for your hardware, you 2004b86d8253SJames Hogan * should put it in the platform data. 2005b86d8253SJames Hogan */ 2006f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 20078234e869SJaehoon Chung fifo_size = 1 + ((fifo_size >> 16) & 0xfff); 2008b86d8253SJames Hogan } else { 2009b86d8253SJames Hogan fifo_size = host->pdata->fifo_depth; 2010b86d8253SJames Hogan } 2011b86d8253SJames Hogan host->fifo_depth = fifo_size; 2012e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 2013e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 2014e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2015f95f3850SWill Newton 2016f95f3850SWill Newton /* disable clock to CIU */ 2017f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2018f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2019f95f3850SWill Newton 2020f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 202195dcc2cbSThomas Abraham host->card_workqueue = alloc_workqueue("dw-mci-card", 20221791b13eSJames Hogan WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); 202395dcc2cbSThomas Abraham if (!host->card_workqueue) 20241791b13eSJames Hogan goto err_dmaunmap; 20251791b13eSJames Hogan INIT_WORK(&host->card_work, dw_mci_work_routine_card); 202662ca8034SShashidhar Hiremath ret = request_irq(host->irq, dw_mci_interrupt, host->irq_flags, "dw-mci", host); 2027f95f3850SWill Newton if (ret) 20281791b13eSJames Hogan goto err_workqueue; 2029f95f3850SWill Newton 2030f95f3850SWill Newton if (host->pdata->num_slots) 2031f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 2032f95f3850SWill Newton else 2033f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 2034f95f3850SWill Newton 2035f95f3850SWill Newton /* We need at least one slot to succeed */ 2036f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2037f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 2038f95f3850SWill Newton if (ret) { 2039f95f3850SWill Newton ret = -ENODEV; 2040f95f3850SWill Newton goto err_init_slot; 2041f95f3850SWill Newton } 2042f95f3850SWill Newton } 2043f95f3850SWill Newton 2044f95f3850SWill Newton /* 20454e0a5adfSJaehoon Chung * In 2.40a spec, Data offset is changed. 20464e0a5adfSJaehoon Chung * Need to check the version-id and set data-offset for DATA register. 20474e0a5adfSJaehoon Chung */ 20484e0a5adfSJaehoon Chung host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); 204962ca8034SShashidhar Hiremath dev_info(&host->dev, "Version ID is %04x\n", host->verid); 20504e0a5adfSJaehoon Chung 20514e0a5adfSJaehoon Chung if (host->verid < DW_MMC_240A) 20524e0a5adfSJaehoon Chung host->data_offset = DATA_OFFSET; 20534e0a5adfSJaehoon Chung else 20544e0a5adfSJaehoon Chung host->data_offset = DATA_240A_OFFSET; 20554e0a5adfSJaehoon Chung 20564e0a5adfSJaehoon Chung /* 2057f95f3850SWill Newton * Enable interrupts for command done, data over, data empty, card det, 2058f95f3850SWill Newton * receive ready and error such as transmit, receive timeout, crc error 2059f95f3850SWill Newton */ 2060f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2061f95f3850SWill Newton mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2062f95f3850SWill Newton SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2063f95f3850SWill Newton DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2064f95f3850SWill Newton mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 2065f95f3850SWill Newton 206662ca8034SShashidhar Hiremath dev_info(&host->dev, "DW MMC controller at irq %d, " 2067b86d8253SJames Hogan "%d bit host data width, " 2068b86d8253SJames Hogan "%u deep fifo\n", 206962ca8034SShashidhar Hiremath host->irq, width, fifo_size); 2070f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 207162ca8034SShashidhar Hiremath dev_info(&host->dev, "Internal DMAC interrupt fix enabled.\n"); 2072f95f3850SWill Newton 2073f95f3850SWill Newton return 0; 2074f95f3850SWill Newton 2075f95f3850SWill Newton err_init_slot: 2076f95f3850SWill Newton /* De-init any initialized slots */ 2077f95f3850SWill Newton while (i > 0) { 2078f95f3850SWill Newton if (host->slot[i]) 2079f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2080f95f3850SWill Newton i--; 2081f95f3850SWill Newton } 208262ca8034SShashidhar Hiremath free_irq(host->irq, host); 2083f95f3850SWill Newton 20841791b13eSJames Hogan err_workqueue: 208595dcc2cbSThomas Abraham destroy_workqueue(host->card_workqueue); 20861791b13eSJames Hogan 2087f95f3850SWill Newton err_dmaunmap: 2088f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2089f95f3850SWill Newton host->dma_ops->exit(host); 209062ca8034SShashidhar Hiremath dma_free_coherent(&host->dev, PAGE_SIZE, 2091f95f3850SWill Newton host->sg_cpu, host->sg_dma); 2092f95f3850SWill Newton 2093c07946a3SJaehoon Chung if (host->vmmc) { 2094c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2095c07946a3SJaehoon Chung regulator_put(host->vmmc); 2096c07946a3SJaehoon Chung } 2097f95f3850SWill Newton return ret; 2098f95f3850SWill Newton } 209962ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_probe); 2100f95f3850SWill Newton 210162ca8034SShashidhar Hiremath void dw_mci_remove(struct dw_mci *host) 2102f95f3850SWill Newton { 2103f95f3850SWill Newton int i; 2104f95f3850SWill Newton 2105f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2106f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2107f95f3850SWill Newton 2108f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 210962ca8034SShashidhar Hiremath dev_dbg(&host->dev, "remove slot %d\n", i); 2110f95f3850SWill Newton if (host->slot[i]) 2111f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2112f95f3850SWill Newton } 2113f95f3850SWill Newton 2114f95f3850SWill Newton /* disable clock to CIU */ 2115f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2116f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2117f95f3850SWill Newton 211862ca8034SShashidhar Hiremath free_irq(host->irq, host); 211995dcc2cbSThomas Abraham destroy_workqueue(host->card_workqueue); 212062ca8034SShashidhar Hiremath dma_free_coherent(&host->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); 2121f95f3850SWill Newton 2122f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2123f95f3850SWill Newton host->dma_ops->exit(host); 2124f95f3850SWill Newton 2125c07946a3SJaehoon Chung if (host->vmmc) { 2126c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2127c07946a3SJaehoon Chung regulator_put(host->vmmc); 2128c07946a3SJaehoon Chung } 2129c07946a3SJaehoon Chung 2130f95f3850SWill Newton } 213162ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_remove); 213262ca8034SShashidhar Hiremath 213362ca8034SShashidhar Hiremath 2134f95f3850SWill Newton 21356fe8890dSJaehoon Chung #ifdef CONFIG_PM_SLEEP 2136f95f3850SWill Newton /* 2137f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 2138f95f3850SWill Newton */ 213962ca8034SShashidhar Hiremath int dw_mci_suspend(struct dw_mci *host) 2140f95f3850SWill Newton { 214162ca8034SShashidhar Hiremath int i, ret = 0; 2142f95f3850SWill Newton 2143f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2144f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2145f95f3850SWill Newton if (!slot) 2146f95f3850SWill Newton continue; 2147f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 2148f95f3850SWill Newton if (ret < 0) { 2149f95f3850SWill Newton while (--i >= 0) { 2150f95f3850SWill Newton slot = host->slot[i]; 2151f95f3850SWill Newton if (slot) 2152f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 2153f95f3850SWill Newton } 2154f95f3850SWill Newton return ret; 2155f95f3850SWill Newton } 2156f95f3850SWill Newton } 2157f95f3850SWill Newton 2158c07946a3SJaehoon Chung if (host->vmmc) 2159c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2160c07946a3SJaehoon Chung 2161f95f3850SWill Newton return 0; 2162f95f3850SWill Newton } 216362ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_suspend); 2164f95f3850SWill Newton 216562ca8034SShashidhar Hiremath int dw_mci_resume(struct dw_mci *host) 2166f95f3850SWill Newton { 2167f95f3850SWill Newton int i, ret; 2168f95f3850SWill Newton 21691d6c4e0aSJaehoon Chung if (host->vmmc) 21701d6c4e0aSJaehoon Chung regulator_enable(host->vmmc); 21711d6c4e0aSJaehoon Chung 217262ca8034SShashidhar Hiremath if (!mci_wait_reset(&host->dev, host)) { 2173e61cf118SJaehoon Chung ret = -ENODEV; 2174e61cf118SJaehoon Chung return ret; 2175e61cf118SJaehoon Chung } 2176e61cf118SJaehoon Chung 2177*141a712aSSeungwon Jeon if (host->dma_ops->init) 2178*141a712aSSeungwon Jeon host->dma_ops->init(host); 2179*141a712aSSeungwon Jeon 2180e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 2181e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2182e61cf118SJaehoon Chung 2183e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 2184e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2185e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2186e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2187e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 2188e61cf118SJaehoon Chung 2189f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2190f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2191f95f3850SWill Newton if (!slot) 2192f95f3850SWill Newton continue; 2193f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 2194f95f3850SWill Newton if (ret < 0) 2195f95f3850SWill Newton return ret; 2196f95f3850SWill Newton } 2197f95f3850SWill Newton return 0; 2198f95f3850SWill Newton } 219962ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_resume); 22006fe8890dSJaehoon Chung #endif /* CONFIG_PM_SLEEP */ 22016fe8890dSJaehoon Chung 2202f95f3850SWill Newton static int __init dw_mci_init(void) 2203f95f3850SWill Newton { 220462ca8034SShashidhar Hiremath printk(KERN_INFO "Synopsys Designware Multimedia Card Interface Driver"); 220562ca8034SShashidhar Hiremath return 0; 2206f95f3850SWill Newton } 2207f95f3850SWill Newton 2208f95f3850SWill Newton static void __exit dw_mci_exit(void) 2209f95f3850SWill Newton { 2210f95f3850SWill Newton } 2211f95f3850SWill Newton 2212f95f3850SWill Newton module_init(dw_mci_init); 2213f95f3850SWill Newton module_exit(dw_mci_exit); 2214f95f3850SWill Newton 2215f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 2216f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 2217f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 2218f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 2219