1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/seq_file.h> 26f95f3850SWill Newton #include <linux/slab.h> 27f95f3850SWill Newton #include <linux/stat.h> 28f95f3850SWill Newton #include <linux/delay.h> 29f95f3850SWill Newton #include <linux/irq.h> 30f95f3850SWill Newton #include <linux/mmc/host.h> 31f95f3850SWill Newton #include <linux/mmc/mmc.h> 32f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 33f95f3850SWill Newton #include <linux/bitops.h> 34c07946a3SJaehoon Chung #include <linux/regulator/consumer.h> 351791b13eSJames Hogan #include <linux/workqueue.h> 36c91eab4bSThomas Abraham #include <linux/of.h> 3755a6ceb2SDoug Anderson #include <linux/of_gpio.h> 38f95f3850SWill Newton 39f95f3850SWill Newton #include "dw_mmc.h" 40f95f3850SWill Newton 41f95f3850SWill Newton /* Common flag combinations */ 42f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 43f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 44f95f3850SWill Newton SDMMC_INT_EBE) 45f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 46f95f3850SWill Newton SDMMC_INT_RESP_ERR) 47f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 48f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 49f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 50f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 51f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 52f95f3850SWill Newton 53f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 54f95f3850SWill Newton struct idmac_desc { 55f95f3850SWill Newton u32 des0; /* Control Descriptor */ 56f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 57f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 58f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 59f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 60f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 61f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 62f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 63f95f3850SWill Newton 64f95f3850SWill Newton u32 des1; /* Buffer sizes */ 65f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 669b7bbe10SShashidhar Hiremath ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) 67f95f3850SWill Newton 68f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 69f95f3850SWill Newton 70f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 71f95f3850SWill Newton }; 72f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 73f95f3850SWill Newton 74f95f3850SWill Newton /** 75f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 76f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 77f95f3850SWill Newton * @host: The MMC controller this slot is using. 78a70aaa64SDoug Anderson * @quirks: Slot-level quirks (DW_MCI_SLOT_QUIRK_XXX) 7955a6ceb2SDoug Anderson * @wp_gpio: If gpio_is_valid() we'll use this to read write protect. 80f95f3850SWill Newton * @ctype: Card type for this slot. 81f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 82f95f3850SWill Newton * processed, or NULL when the slot is idle. 83f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 84f95f3850SWill Newton * &struct dw_mci. 85f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 86f95f3850SWill Newton * @flags: Random state bits associated with the slot. 87f95f3850SWill Newton * @id: Number of this slot. 88f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 89f95f3850SWill Newton */ 90f95f3850SWill Newton struct dw_mci_slot { 91f95f3850SWill Newton struct mmc_host *mmc; 92f95f3850SWill Newton struct dw_mci *host; 93f95f3850SWill Newton 94a70aaa64SDoug Anderson int quirks; 9555a6ceb2SDoug Anderson int wp_gpio; 96a70aaa64SDoug Anderson 97f95f3850SWill Newton u32 ctype; 98f95f3850SWill Newton 99f95f3850SWill Newton struct mmc_request *mrq; 100f95f3850SWill Newton struct list_head queue_node; 101f95f3850SWill Newton 102f95f3850SWill Newton unsigned int clock; 103f95f3850SWill Newton unsigned long flags; 104f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 105f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 106f95f3850SWill Newton int id; 107f95f3850SWill Newton int last_detect_state; 108f95f3850SWill Newton }; 109f95f3850SWill Newton 110f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 111f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 112f95f3850SWill Newton { 113f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 114f95f3850SWill Newton struct mmc_request *mrq; 115f95f3850SWill Newton struct mmc_command *cmd; 116f95f3850SWill Newton struct mmc_command *stop; 117f95f3850SWill Newton struct mmc_data *data; 118f95f3850SWill Newton 119f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 120f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 121f95f3850SWill Newton mrq = slot->mrq; 122f95f3850SWill Newton 123f95f3850SWill Newton if (mrq) { 124f95f3850SWill Newton cmd = mrq->cmd; 125f95f3850SWill Newton data = mrq->data; 126f95f3850SWill Newton stop = mrq->stop; 127f95f3850SWill Newton 128f95f3850SWill Newton if (cmd) 129f95f3850SWill Newton seq_printf(s, 130f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 131f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 132f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 133f95f3850SWill Newton cmd->resp[2], cmd->error); 134f95f3850SWill Newton if (data) 135f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 136f95f3850SWill Newton data->bytes_xfered, data->blocks, 137f95f3850SWill Newton data->blksz, data->flags, data->error); 138f95f3850SWill Newton if (stop) 139f95f3850SWill Newton seq_printf(s, 140f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 141f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 142f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 143f95f3850SWill Newton stop->resp[2], stop->error); 144f95f3850SWill Newton } 145f95f3850SWill Newton 146f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 147f95f3850SWill Newton 148f95f3850SWill Newton return 0; 149f95f3850SWill Newton } 150f95f3850SWill Newton 151f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 152f95f3850SWill Newton { 153f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 154f95f3850SWill Newton } 155f95f3850SWill Newton 156f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 157f95f3850SWill Newton .owner = THIS_MODULE, 158f95f3850SWill Newton .open = dw_mci_req_open, 159f95f3850SWill Newton .read = seq_read, 160f95f3850SWill Newton .llseek = seq_lseek, 161f95f3850SWill Newton .release = single_release, 162f95f3850SWill Newton }; 163f95f3850SWill Newton 164f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 165f95f3850SWill Newton { 166f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 167f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 168f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 169f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 170f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 171f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 172f95f3850SWill Newton 173f95f3850SWill Newton return 0; 174f95f3850SWill Newton } 175f95f3850SWill Newton 176f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 177f95f3850SWill Newton { 178f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 179f95f3850SWill Newton } 180f95f3850SWill Newton 181f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 182f95f3850SWill Newton .owner = THIS_MODULE, 183f95f3850SWill Newton .open = dw_mci_regs_open, 184f95f3850SWill Newton .read = seq_read, 185f95f3850SWill Newton .llseek = seq_lseek, 186f95f3850SWill Newton .release = single_release, 187f95f3850SWill Newton }; 188f95f3850SWill Newton 189f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 190f95f3850SWill Newton { 191f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 192f95f3850SWill Newton struct dw_mci *host = slot->host; 193f95f3850SWill Newton struct dentry *root; 194f95f3850SWill Newton struct dentry *node; 195f95f3850SWill Newton 196f95f3850SWill Newton root = mmc->debugfs_root; 197f95f3850SWill Newton if (!root) 198f95f3850SWill Newton return; 199f95f3850SWill Newton 200f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 201f95f3850SWill Newton &dw_mci_regs_fops); 202f95f3850SWill Newton if (!node) 203f95f3850SWill Newton goto err; 204f95f3850SWill Newton 205f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 206f95f3850SWill Newton &dw_mci_req_fops); 207f95f3850SWill Newton if (!node) 208f95f3850SWill Newton goto err; 209f95f3850SWill Newton 210f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 211f95f3850SWill Newton if (!node) 212f95f3850SWill Newton goto err; 213f95f3850SWill Newton 214f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 215f95f3850SWill Newton (u32 *)&host->pending_events); 216f95f3850SWill Newton if (!node) 217f95f3850SWill Newton goto err; 218f95f3850SWill Newton 219f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 220f95f3850SWill Newton (u32 *)&host->completed_events); 221f95f3850SWill Newton if (!node) 222f95f3850SWill Newton goto err; 223f95f3850SWill Newton 224f95f3850SWill Newton return; 225f95f3850SWill Newton 226f95f3850SWill Newton err: 227f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 228f95f3850SWill Newton } 229f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 230f95f3850SWill Newton 231f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 232f95f3850SWill Newton { 233f95f3850SWill Newton /* timeout (maximum) */ 234f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 235f95f3850SWill Newton } 236f95f3850SWill Newton 237f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 238f95f3850SWill Newton { 239f95f3850SWill Newton struct mmc_data *data; 240800d78bfSThomas Abraham struct dw_mci_slot *slot = mmc_priv(mmc); 241e95baf13SArnd Bergmann const struct dw_mci_drv_data *drv_data = slot->host->drv_data; 242f95f3850SWill Newton u32 cmdr; 243f95f3850SWill Newton cmd->error = -EINPROGRESS; 244f95f3850SWill Newton 245f95f3850SWill Newton cmdr = cmd->opcode; 246f95f3850SWill Newton 247f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 248f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 249f95f3850SWill Newton else 250f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 251f95f3850SWill Newton 252f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 253f95f3850SWill Newton /* We expect a response, so set this bit */ 254f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 255f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 256f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 257f95f3850SWill Newton } 258f95f3850SWill Newton 259f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 260f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 261f95f3850SWill Newton 262f95f3850SWill Newton data = cmd->data; 263f95f3850SWill Newton if (data) { 264f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 265f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 266f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 267f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 268f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 269f95f3850SWill Newton } 270f95f3850SWill Newton 271cb27a843SJames Hogan if (drv_data && drv_data->prepare_command) 272cb27a843SJames Hogan drv_data->prepare_command(slot->host, &cmdr); 273800d78bfSThomas Abraham 274f95f3850SWill Newton return cmdr; 275f95f3850SWill Newton } 276f95f3850SWill Newton 277f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 278f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 279f95f3850SWill Newton { 280f95f3850SWill Newton host->cmd = cmd; 2814a90920cSThomas Abraham dev_vdbg(host->dev, 282f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 283f95f3850SWill Newton cmd->arg, cmd_flags); 284f95f3850SWill Newton 285f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 286f95f3850SWill Newton wmb(); 287f95f3850SWill Newton 288f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 289f95f3850SWill Newton } 290f95f3850SWill Newton 291f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 292f95f3850SWill Newton { 293f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 294f95f3850SWill Newton } 295f95f3850SWill Newton 296f95f3850SWill Newton /* DMA interface functions */ 297f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 298f95f3850SWill Newton { 29903e8cb53SJames Hogan if (host->using_dma) { 300f95f3850SWill Newton host->dma_ops->stop(host); 301f95f3850SWill Newton host->dma_ops->cleanup(host); 302f95f3850SWill Newton } else { 303f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 304f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 305f95f3850SWill Newton } 306f95f3850SWill Newton } 307f95f3850SWill Newton 3089aa51408SSeungwon Jeon static int dw_mci_get_dma_dir(struct mmc_data *data) 3099aa51408SSeungwon Jeon { 3109aa51408SSeungwon Jeon if (data->flags & MMC_DATA_WRITE) 3119aa51408SSeungwon Jeon return DMA_TO_DEVICE; 3129aa51408SSeungwon Jeon else 3139aa51408SSeungwon Jeon return DMA_FROM_DEVICE; 3149aa51408SSeungwon Jeon } 3159aa51408SSeungwon Jeon 3169beee912SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 317f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 318f95f3850SWill Newton { 319f95f3850SWill Newton struct mmc_data *data = host->data; 320f95f3850SWill Newton 321f95f3850SWill Newton if (data) 3229aa51408SSeungwon Jeon if (!data->host_cookie) 3234a90920cSThomas Abraham dma_unmap_sg(host->dev, 3249aa51408SSeungwon Jeon data->sg, 3259aa51408SSeungwon Jeon data->sg_len, 3269aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 327f95f3850SWill Newton } 328f95f3850SWill Newton 329f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 330f95f3850SWill Newton { 331f95f3850SWill Newton u32 temp; 332f95f3850SWill Newton 333f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 334f95f3850SWill Newton temp = mci_readl(host, CTRL); 335f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 336f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 337f95f3850SWill Newton mci_writel(host, CTRL, temp); 338f95f3850SWill Newton 339f95f3850SWill Newton /* Stop the IDMAC running */ 340f95f3850SWill Newton temp = mci_readl(host, BMOD); 341a5289a43SJaehoon Chung temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB); 342f95f3850SWill Newton mci_writel(host, BMOD, temp); 343f95f3850SWill Newton } 344f95f3850SWill Newton 345f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 346f95f3850SWill Newton { 347f95f3850SWill Newton struct mmc_data *data = host->data; 348f95f3850SWill Newton 3494a90920cSThomas Abraham dev_vdbg(host->dev, "DMA complete\n"); 350f95f3850SWill Newton 351f95f3850SWill Newton host->dma_ops->cleanup(host); 352f95f3850SWill Newton 353f95f3850SWill Newton /* 354f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 355f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 356f95f3850SWill Newton */ 357f95f3850SWill Newton if (data) { 358f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 359f95f3850SWill Newton tasklet_schedule(&host->tasklet); 360f95f3850SWill Newton } 361f95f3850SWill Newton } 362f95f3850SWill Newton 363f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 364f95f3850SWill Newton unsigned int sg_len) 365f95f3850SWill Newton { 366f95f3850SWill Newton int i; 367f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 368f95f3850SWill Newton 369f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 370f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 371f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 372f95f3850SWill Newton 373f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 374f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 375f95f3850SWill Newton 376f95f3850SWill Newton /* Buffer length */ 377f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 378f95f3850SWill Newton 379f95f3850SWill Newton /* Physical address to DMA to/from */ 380f95f3850SWill Newton desc->des2 = mem_addr; 381f95f3850SWill Newton } 382f95f3850SWill Newton 383f95f3850SWill Newton /* Set first descriptor */ 384f95f3850SWill Newton desc = host->sg_cpu; 385f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 386f95f3850SWill Newton 387f95f3850SWill Newton /* Set last descriptor */ 388f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 389f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 390f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 391f95f3850SWill Newton 392f95f3850SWill Newton wmb(); 393f95f3850SWill Newton } 394f95f3850SWill Newton 395f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 396f95f3850SWill Newton { 397f95f3850SWill Newton u32 temp; 398f95f3850SWill Newton 399f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 400f95f3850SWill Newton 401f95f3850SWill Newton /* Select IDMAC interface */ 402f95f3850SWill Newton temp = mci_readl(host, CTRL); 403f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 404f95f3850SWill Newton mci_writel(host, CTRL, temp); 405f95f3850SWill Newton 406f95f3850SWill Newton wmb(); 407f95f3850SWill Newton 408f95f3850SWill Newton /* Enable the IDMAC */ 409f95f3850SWill Newton temp = mci_readl(host, BMOD); 410a5289a43SJaehoon Chung temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB; 411f95f3850SWill Newton mci_writel(host, BMOD, temp); 412f95f3850SWill Newton 413f95f3850SWill Newton /* Start it running */ 414f95f3850SWill Newton mci_writel(host, PLDMND, 1); 415f95f3850SWill Newton } 416f95f3850SWill Newton 417f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 418f95f3850SWill Newton { 419f95f3850SWill Newton struct idmac_desc *p; 420897b69e7SSeungwon Jeon int i; 421f95f3850SWill Newton 422f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 423f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 424f95f3850SWill Newton 425f95f3850SWill Newton /* Forward link the descriptor list */ 426f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 427f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 428f95f3850SWill Newton 429f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 430f95f3850SWill Newton p->des3 = host->sg_dma; 431f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 432f95f3850SWill Newton 433141a712aSSeungwon Jeon mci_writel(host, BMOD, SDMMC_IDMAC_SWRESET); 434141a712aSSeungwon Jeon 435f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 436f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 437f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 438f95f3850SWill Newton 439f95f3850SWill Newton /* Set the descriptor base address */ 440f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 441f95f3850SWill Newton return 0; 442f95f3850SWill Newton } 443f95f3850SWill Newton 4448e2b36eaSArnd Bergmann static const struct dw_mci_dma_ops dw_mci_idmac_ops = { 445885c3e80SSeungwon Jeon .init = dw_mci_idmac_init, 446885c3e80SSeungwon Jeon .start = dw_mci_idmac_start_dma, 447885c3e80SSeungwon Jeon .stop = dw_mci_idmac_stop_dma, 448885c3e80SSeungwon Jeon .complete = dw_mci_idmac_complete_dma, 449885c3e80SSeungwon Jeon .cleanup = dw_mci_dma_cleanup, 450885c3e80SSeungwon Jeon }; 451885c3e80SSeungwon Jeon #endif /* CONFIG_MMC_DW_IDMAC */ 452885c3e80SSeungwon Jeon 4539aa51408SSeungwon Jeon static int dw_mci_pre_dma_transfer(struct dw_mci *host, 4549aa51408SSeungwon Jeon struct mmc_data *data, 4559aa51408SSeungwon Jeon bool next) 456f95f3850SWill Newton { 457f95f3850SWill Newton struct scatterlist *sg; 4589aa51408SSeungwon Jeon unsigned int i, sg_len; 459f95f3850SWill Newton 4609aa51408SSeungwon Jeon if (!next && data->host_cookie) 4619aa51408SSeungwon Jeon return data->host_cookie; 462f95f3850SWill Newton 463f95f3850SWill Newton /* 464f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 465f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 466f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 467f95f3850SWill Newton */ 468f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 469f95f3850SWill Newton return -EINVAL; 4709aa51408SSeungwon Jeon 471f95f3850SWill Newton if (data->blksz & 3) 472f95f3850SWill Newton return -EINVAL; 473f95f3850SWill Newton 474f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 475f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 476f95f3850SWill Newton return -EINVAL; 477f95f3850SWill Newton } 478f95f3850SWill Newton 4794a90920cSThomas Abraham sg_len = dma_map_sg(host->dev, 4809aa51408SSeungwon Jeon data->sg, 4819aa51408SSeungwon Jeon data->sg_len, 4829aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 4839aa51408SSeungwon Jeon if (sg_len == 0) 4849aa51408SSeungwon Jeon return -EINVAL; 4859aa51408SSeungwon Jeon 4869aa51408SSeungwon Jeon if (next) 4879aa51408SSeungwon Jeon data->host_cookie = sg_len; 4889aa51408SSeungwon Jeon 4899aa51408SSeungwon Jeon return sg_len; 4909aa51408SSeungwon Jeon } 4919aa51408SSeungwon Jeon 4929aa51408SSeungwon Jeon static void dw_mci_pre_req(struct mmc_host *mmc, 4939aa51408SSeungwon Jeon struct mmc_request *mrq, 4949aa51408SSeungwon Jeon bool is_first_req) 4959aa51408SSeungwon Jeon { 4969aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 4979aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 4989aa51408SSeungwon Jeon 4999aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 5009aa51408SSeungwon Jeon return; 5019aa51408SSeungwon Jeon 5029aa51408SSeungwon Jeon if (data->host_cookie) { 5039aa51408SSeungwon Jeon data->host_cookie = 0; 5049aa51408SSeungwon Jeon return; 5059aa51408SSeungwon Jeon } 5069aa51408SSeungwon Jeon 5079aa51408SSeungwon Jeon if (dw_mci_pre_dma_transfer(slot->host, mrq->data, 1) < 0) 5089aa51408SSeungwon Jeon data->host_cookie = 0; 5099aa51408SSeungwon Jeon } 5109aa51408SSeungwon Jeon 5119aa51408SSeungwon Jeon static void dw_mci_post_req(struct mmc_host *mmc, 5129aa51408SSeungwon Jeon struct mmc_request *mrq, 5139aa51408SSeungwon Jeon int err) 5149aa51408SSeungwon Jeon { 5159aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 5169aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 5179aa51408SSeungwon Jeon 5189aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 5199aa51408SSeungwon Jeon return; 5209aa51408SSeungwon Jeon 5219aa51408SSeungwon Jeon if (data->host_cookie) 5224a90920cSThomas Abraham dma_unmap_sg(slot->host->dev, 5239aa51408SSeungwon Jeon data->sg, 5249aa51408SSeungwon Jeon data->sg_len, 5259aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 5269aa51408SSeungwon Jeon data->host_cookie = 0; 5279aa51408SSeungwon Jeon } 5289aa51408SSeungwon Jeon 5299aa51408SSeungwon Jeon static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 5309aa51408SSeungwon Jeon { 5319aa51408SSeungwon Jeon int sg_len; 5329aa51408SSeungwon Jeon u32 temp; 5339aa51408SSeungwon Jeon 5349aa51408SSeungwon Jeon host->using_dma = 0; 5359aa51408SSeungwon Jeon 5369aa51408SSeungwon Jeon /* If we don't have a channel, we can't do DMA */ 5379aa51408SSeungwon Jeon if (!host->use_dma) 5389aa51408SSeungwon Jeon return -ENODEV; 5399aa51408SSeungwon Jeon 5409aa51408SSeungwon Jeon sg_len = dw_mci_pre_dma_transfer(host, data, 0); 541a99aa9b9SSeungwon Jeon if (sg_len < 0) { 542a99aa9b9SSeungwon Jeon host->dma_ops->stop(host); 5439aa51408SSeungwon Jeon return sg_len; 544a99aa9b9SSeungwon Jeon } 5459aa51408SSeungwon Jeon 54603e8cb53SJames Hogan host->using_dma = 1; 54703e8cb53SJames Hogan 5484a90920cSThomas Abraham dev_vdbg(host->dev, 549f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 550f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 551f95f3850SWill Newton sg_len); 552f95f3850SWill Newton 553f95f3850SWill Newton /* Enable the DMA interface */ 554f95f3850SWill Newton temp = mci_readl(host, CTRL); 555f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 556f95f3850SWill Newton mci_writel(host, CTRL, temp); 557f95f3850SWill Newton 558f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 559f95f3850SWill Newton temp = mci_readl(host, INTMASK); 560f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 561f95f3850SWill Newton mci_writel(host, INTMASK, temp); 562f95f3850SWill Newton 563f95f3850SWill Newton host->dma_ops->start(host, sg_len); 564f95f3850SWill Newton 565f95f3850SWill Newton return 0; 566f95f3850SWill Newton } 567f95f3850SWill Newton 568f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 569f95f3850SWill Newton { 570f95f3850SWill Newton u32 temp; 571f95f3850SWill Newton 572f95f3850SWill Newton data->error = -EINPROGRESS; 573f95f3850SWill Newton 574f95f3850SWill Newton WARN_ON(host->data); 575f95f3850SWill Newton host->sg = NULL; 576f95f3850SWill Newton host->data = data; 577f95f3850SWill Newton 57855c5efbcSJames Hogan if (data->flags & MMC_DATA_READ) 57955c5efbcSJames Hogan host->dir_status = DW_MCI_RECV_STATUS; 58055c5efbcSJames Hogan else 58155c5efbcSJames Hogan host->dir_status = DW_MCI_SEND_STATUS; 58255c5efbcSJames Hogan 583f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 584f9c2a0dcSSeungwon Jeon int flags = SG_MITER_ATOMIC; 585f9c2a0dcSSeungwon Jeon if (host->data->flags & MMC_DATA_READ) 586f9c2a0dcSSeungwon Jeon flags |= SG_MITER_TO_SG; 587f9c2a0dcSSeungwon Jeon else 588f9c2a0dcSSeungwon Jeon flags |= SG_MITER_FROM_SG; 589f9c2a0dcSSeungwon Jeon 590f9c2a0dcSSeungwon Jeon sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 591f95f3850SWill Newton host->sg = data->sg; 59234b664a2SJames Hogan host->part_buf_start = 0; 59334b664a2SJames Hogan host->part_buf_count = 0; 594f95f3850SWill Newton 595b40af3aaSJames Hogan mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); 596f95f3850SWill Newton temp = mci_readl(host, INTMASK); 597f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 598f95f3850SWill Newton mci_writel(host, INTMASK, temp); 599f95f3850SWill Newton 600f95f3850SWill Newton temp = mci_readl(host, CTRL); 601f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 602f95f3850SWill Newton mci_writel(host, CTRL, temp); 603f95f3850SWill Newton } 604f95f3850SWill Newton } 605f95f3850SWill Newton 606f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 607f95f3850SWill Newton { 608f95f3850SWill Newton struct dw_mci *host = slot->host; 609f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 610f95f3850SWill Newton unsigned int cmd_status = 0; 611f95f3850SWill Newton 612f95f3850SWill Newton mci_writel(host, CMDARG, arg); 613f95f3850SWill Newton wmb(); 614f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 615f95f3850SWill Newton 616f95f3850SWill Newton while (time_before(jiffies, timeout)) { 617f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 618f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 619f95f3850SWill Newton return; 620f95f3850SWill Newton } 621f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 622f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 623f95f3850SWill Newton cmd, arg, cmd_status); 624f95f3850SWill Newton } 625f95f3850SWill Newton 626ab269128SAbhilash Kesavan static void dw_mci_setup_bus(struct dw_mci_slot *slot, bool force_clkinit) 627f95f3850SWill Newton { 628f95f3850SWill Newton struct dw_mci *host = slot->host; 629f95f3850SWill Newton u32 div; 6309623b5b9SDoug Anderson u32 clk_en_a; 631f95f3850SWill Newton 632ab269128SAbhilash Kesavan if (slot->clock != host->current_speed || force_clkinit) { 633e419990bSSeungwon Jeon div = host->bus_hz / slot->clock; 634e419990bSSeungwon Jeon if (host->bus_hz % slot->clock && host->bus_hz > slot->clock) 635f95f3850SWill Newton /* 636f95f3850SWill Newton * move the + 1 after the divide to prevent 637f95f3850SWill Newton * over-clocking the card. 638f95f3850SWill Newton */ 639e419990bSSeungwon Jeon div += 1; 640e419990bSSeungwon Jeon 641e419990bSSeungwon Jeon div = (host->bus_hz != slot->clock) ? DIV_ROUND_UP(div, 2) : 0; 642f95f3850SWill Newton 643f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 644f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 645f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 646f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 647f95f3850SWill Newton 648f95f3850SWill Newton /* disable clock */ 649f95f3850SWill Newton mci_writel(host, CLKENA, 0); 650f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 651f95f3850SWill Newton 652f95f3850SWill Newton /* inform CIU */ 653f95f3850SWill Newton mci_send_cmd(slot, 654f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 655f95f3850SWill Newton 656f95f3850SWill Newton /* set clock to desired speed */ 657f95f3850SWill Newton mci_writel(host, CLKDIV, div); 658f95f3850SWill Newton 659f95f3850SWill Newton /* inform CIU */ 660f95f3850SWill Newton mci_send_cmd(slot, 661f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 662f95f3850SWill Newton 6639623b5b9SDoug Anderson /* enable clock; only low power if no SDIO */ 6649623b5b9SDoug Anderson clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; 6659623b5b9SDoug Anderson if (!(mci_readl(host, INTMASK) & SDMMC_INT_SDIO(slot->id))) 6669623b5b9SDoug Anderson clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id; 6679623b5b9SDoug Anderson mci_writel(host, CLKENA, clk_en_a); 668f95f3850SWill Newton 669f95f3850SWill Newton /* inform CIU */ 670f95f3850SWill Newton mci_send_cmd(slot, 671f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 672f95f3850SWill Newton 673f95f3850SWill Newton host->current_speed = slot->clock; 674f95f3850SWill Newton } 675f95f3850SWill Newton 676f95f3850SWill Newton /* Set the current slot bus width */ 6771d56c453SSeungwon Jeon mci_writel(host, CTYPE, (slot->ctype << slot->id)); 678f95f3850SWill Newton } 679f95f3850SWill Newton 680053b3ce6SSeungwon Jeon static void __dw_mci_start_request(struct dw_mci *host, 681053b3ce6SSeungwon Jeon struct dw_mci_slot *slot, 682053b3ce6SSeungwon Jeon struct mmc_command *cmd) 683f95f3850SWill Newton { 684f95f3850SWill Newton struct mmc_request *mrq; 685f95f3850SWill Newton struct mmc_data *data; 686f95f3850SWill Newton u32 cmdflags; 687f95f3850SWill Newton 688f95f3850SWill Newton mrq = slot->mrq; 689f95f3850SWill Newton if (host->pdata->select_slot) 690f95f3850SWill Newton host->pdata->select_slot(slot->id); 691f95f3850SWill Newton 692f95f3850SWill Newton host->cur_slot = slot; 693f95f3850SWill Newton host->mrq = mrq; 694f95f3850SWill Newton 695f95f3850SWill Newton host->pending_events = 0; 696f95f3850SWill Newton host->completed_events = 0; 697f95f3850SWill Newton host->data_status = 0; 698f95f3850SWill Newton 699053b3ce6SSeungwon Jeon data = cmd->data; 700f95f3850SWill Newton if (data) { 701f95f3850SWill Newton dw_mci_set_timeout(host); 702f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 703f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 704f95f3850SWill Newton } 705f95f3850SWill Newton 706f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 707f95f3850SWill Newton 708f95f3850SWill Newton /* this is the first command, send the initialization clock */ 709f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 710f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 711f95f3850SWill Newton 712f95f3850SWill Newton if (data) { 713f95f3850SWill Newton dw_mci_submit_data(host, data); 714f95f3850SWill Newton wmb(); 715f95f3850SWill Newton } 716f95f3850SWill Newton 717f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 718f95f3850SWill Newton 719f95f3850SWill Newton if (mrq->stop) 720f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 721f95f3850SWill Newton } 722f95f3850SWill Newton 723053b3ce6SSeungwon Jeon static void dw_mci_start_request(struct dw_mci *host, 724053b3ce6SSeungwon Jeon struct dw_mci_slot *slot) 725053b3ce6SSeungwon Jeon { 726053b3ce6SSeungwon Jeon struct mmc_request *mrq = slot->mrq; 727053b3ce6SSeungwon Jeon struct mmc_command *cmd; 728053b3ce6SSeungwon Jeon 729053b3ce6SSeungwon Jeon cmd = mrq->sbc ? mrq->sbc : mrq->cmd; 730053b3ce6SSeungwon Jeon __dw_mci_start_request(host, slot, cmd); 731053b3ce6SSeungwon Jeon } 732053b3ce6SSeungwon Jeon 7337456caaeSJames Hogan /* must be called with host->lock held */ 734f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 735f95f3850SWill Newton struct mmc_request *mrq) 736f95f3850SWill Newton { 737f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 738f95f3850SWill Newton host->state); 739f95f3850SWill Newton 740f95f3850SWill Newton slot->mrq = mrq; 741f95f3850SWill Newton 742f95f3850SWill Newton if (host->state == STATE_IDLE) { 743f95f3850SWill Newton host->state = STATE_SENDING_CMD; 744f95f3850SWill Newton dw_mci_start_request(host, slot); 745f95f3850SWill Newton } else { 746f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 747f95f3850SWill Newton } 748f95f3850SWill Newton } 749f95f3850SWill Newton 750f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 751f95f3850SWill Newton { 752f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 753f95f3850SWill Newton struct dw_mci *host = slot->host; 754f95f3850SWill Newton 755f95f3850SWill Newton WARN_ON(slot->mrq); 756f95f3850SWill Newton 7577456caaeSJames Hogan /* 7587456caaeSJames Hogan * The check for card presence and queueing of the request must be 7597456caaeSJames Hogan * atomic, otherwise the card could be removed in between and the 7607456caaeSJames Hogan * request wouldn't fail until another card was inserted. 7617456caaeSJames Hogan */ 7627456caaeSJames Hogan spin_lock_bh(&host->lock); 7637456caaeSJames Hogan 764f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 7657456caaeSJames Hogan spin_unlock_bh(&host->lock); 766f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 767f95f3850SWill Newton mmc_request_done(mmc, mrq); 768f95f3850SWill Newton return; 769f95f3850SWill Newton } 770f95f3850SWill Newton 771f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 7727456caaeSJames Hogan 7737456caaeSJames Hogan spin_unlock_bh(&host->lock); 774f95f3850SWill Newton } 775f95f3850SWill Newton 776f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 777f95f3850SWill Newton { 778f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 779e95baf13SArnd Bergmann const struct dw_mci_drv_data *drv_data = slot->host->drv_data; 78041babf75SJaehoon Chung u32 regs; 781f95f3850SWill Newton 782f95f3850SWill Newton switch (ios->bus_width) { 783f95f3850SWill Newton case MMC_BUS_WIDTH_4: 784f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 785f95f3850SWill Newton break; 786c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 787c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 788c9b2a06fSJaehoon Chung break; 789b2f7cb45SJaehoon Chung default: 790b2f7cb45SJaehoon Chung /* set default 1 bit mode */ 791b2f7cb45SJaehoon Chung slot->ctype = SDMMC_CTYPE_1BIT; 792f95f3850SWill Newton } 793f95f3850SWill Newton 79441babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 7953f514291SSeungwon Jeon 7963f514291SSeungwon Jeon /* DDR mode set */ 7973f514291SSeungwon Jeon if (ios->timing == MMC_TIMING_UHS_DDR50) 79841babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 7993f514291SSeungwon Jeon else 8003f514291SSeungwon Jeon regs &= ~(0x1 << slot->id) << 16; 8013f514291SSeungwon Jeon 80241babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 80341babf75SJaehoon Chung 804f95f3850SWill Newton if (ios->clock) { 805f95f3850SWill Newton /* 806f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 807f95f3850SWill Newton * core ios update when finding the minimum. 808f95f3850SWill Newton */ 809f95f3850SWill Newton slot->clock = ios->clock; 810f95f3850SWill Newton } 811f95f3850SWill Newton 812cb27a843SJames Hogan if (drv_data && drv_data->set_ios) 813cb27a843SJames Hogan drv_data->set_ios(slot->host, ios); 814800d78bfSThomas Abraham 815bf7cb224SJaehoon Chung /* Slot specific timing and width adjustment */ 816bf7cb224SJaehoon Chung dw_mci_setup_bus(slot, false); 817bf7cb224SJaehoon Chung 818f95f3850SWill Newton switch (ios->power_mode) { 819f95f3850SWill Newton case MMC_POWER_UP: 820f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 821f95f3850SWill Newton break; 822f95f3850SWill Newton default: 823f95f3850SWill Newton break; 824f95f3850SWill Newton } 825f95f3850SWill Newton } 826f95f3850SWill Newton 827f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 828f95f3850SWill Newton { 829f95f3850SWill Newton int read_only; 830f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 831f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 832f95f3850SWill Newton 833f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 8349640639bSDoug Anderson if (slot->quirks & DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT) 835b4967aa5SThomas Abraham read_only = 0; 836b4967aa5SThomas Abraham else if (brd->get_ro) 837f95f3850SWill Newton read_only = brd->get_ro(slot->id); 83855a6ceb2SDoug Anderson else if (gpio_is_valid(slot->wp_gpio)) 83955a6ceb2SDoug Anderson read_only = gpio_get_value(slot->wp_gpio); 840f95f3850SWill Newton else 841f95f3850SWill Newton read_only = 842f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 843f95f3850SWill Newton 844f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 845f95f3850SWill Newton read_only ? "read-only" : "read-write"); 846f95f3850SWill Newton 847f95f3850SWill Newton return read_only; 848f95f3850SWill Newton } 849f95f3850SWill Newton 850f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 851f95f3850SWill Newton { 852f95f3850SWill Newton int present; 853f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 854f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 855f95f3850SWill Newton 856f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 857fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 858fc3d7720SJaehoon Chung present = 1; 859fc3d7720SJaehoon Chung else if (brd->get_cd) 860f95f3850SWill Newton present = !brd->get_cd(slot->id); 861f95f3850SWill Newton else 862f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 863f95f3850SWill Newton == 0 ? 1 : 0; 864f95f3850SWill Newton 865f95f3850SWill Newton if (present) 866f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 867f95f3850SWill Newton else 868f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 869f95f3850SWill Newton 870f95f3850SWill Newton return present; 871f95f3850SWill Newton } 872f95f3850SWill Newton 8739623b5b9SDoug Anderson /* 8749623b5b9SDoug Anderson * Disable lower power mode. 8759623b5b9SDoug Anderson * 8769623b5b9SDoug Anderson * Low power mode will stop the card clock when idle. According to the 8779623b5b9SDoug Anderson * description of the CLKENA register we should disable low power mode 8789623b5b9SDoug Anderson * for SDIO cards if we need SDIO interrupts to work. 8799623b5b9SDoug Anderson * 8809623b5b9SDoug Anderson * This function is fast if low power mode is already disabled. 8819623b5b9SDoug Anderson */ 8829623b5b9SDoug Anderson static void dw_mci_disable_low_power(struct dw_mci_slot *slot) 8839623b5b9SDoug Anderson { 8849623b5b9SDoug Anderson struct dw_mci *host = slot->host; 8859623b5b9SDoug Anderson u32 clk_en_a; 8869623b5b9SDoug Anderson const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR << slot->id; 8879623b5b9SDoug Anderson 8889623b5b9SDoug Anderson clk_en_a = mci_readl(host, CLKENA); 8899623b5b9SDoug Anderson 8909623b5b9SDoug Anderson if (clk_en_a & clken_low_pwr) { 8919623b5b9SDoug Anderson mci_writel(host, CLKENA, clk_en_a & ~clken_low_pwr); 8929623b5b9SDoug Anderson mci_send_cmd(slot, SDMMC_CMD_UPD_CLK | 8939623b5b9SDoug Anderson SDMMC_CMD_PRV_DAT_WAIT, 0); 8949623b5b9SDoug Anderson } 8959623b5b9SDoug Anderson } 8969623b5b9SDoug Anderson 8971a5c8e1fSShashidhar Hiremath static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) 8981a5c8e1fSShashidhar Hiremath { 8991a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = mmc_priv(mmc); 9001a5c8e1fSShashidhar Hiremath struct dw_mci *host = slot->host; 9011a5c8e1fSShashidhar Hiremath u32 int_mask; 9021a5c8e1fSShashidhar Hiremath 9031a5c8e1fSShashidhar Hiremath /* Enable/disable Slot Specific SDIO interrupt */ 9041a5c8e1fSShashidhar Hiremath int_mask = mci_readl(host, INTMASK); 9051a5c8e1fSShashidhar Hiremath if (enb) { 9069623b5b9SDoug Anderson /* 9079623b5b9SDoug Anderson * Turn off low power mode if it was enabled. This is a bit of 9089623b5b9SDoug Anderson * a heavy operation and we disable / enable IRQs a lot, so 9099623b5b9SDoug Anderson * we'll leave low power mode disabled and it will get 9109623b5b9SDoug Anderson * re-enabled again in dw_mci_setup_bus(). 9119623b5b9SDoug Anderson */ 9129623b5b9SDoug Anderson dw_mci_disable_low_power(slot); 9139623b5b9SDoug Anderson 9141a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 915705ad047SKyoungil Kim (int_mask | SDMMC_INT_SDIO(slot->id))); 9161a5c8e1fSShashidhar Hiremath } else { 9171a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 918705ad047SKyoungil Kim (int_mask & ~SDMMC_INT_SDIO(slot->id))); 9191a5c8e1fSShashidhar Hiremath } 9201a5c8e1fSShashidhar Hiremath } 9211a5c8e1fSShashidhar Hiremath 922f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 923f95f3850SWill Newton .request = dw_mci_request, 9249aa51408SSeungwon Jeon .pre_req = dw_mci_pre_req, 9259aa51408SSeungwon Jeon .post_req = dw_mci_post_req, 926f95f3850SWill Newton .set_ios = dw_mci_set_ios, 927f95f3850SWill Newton .get_ro = dw_mci_get_ro, 928f95f3850SWill Newton .get_cd = dw_mci_get_cd, 9291a5c8e1fSShashidhar Hiremath .enable_sdio_irq = dw_mci_enable_sdio_irq, 930f95f3850SWill Newton }; 931f95f3850SWill Newton 932f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 933f95f3850SWill Newton __releases(&host->lock) 934f95f3850SWill Newton __acquires(&host->lock) 935f95f3850SWill Newton { 936f95f3850SWill Newton struct dw_mci_slot *slot; 937f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 938f95f3850SWill Newton 939f95f3850SWill Newton WARN_ON(host->cmd || host->data); 940f95f3850SWill Newton 941f95f3850SWill Newton host->cur_slot->mrq = NULL; 942f95f3850SWill Newton host->mrq = NULL; 943f95f3850SWill Newton if (!list_empty(&host->queue)) { 944f95f3850SWill Newton slot = list_entry(host->queue.next, 945f95f3850SWill Newton struct dw_mci_slot, queue_node); 946f95f3850SWill Newton list_del(&slot->queue_node); 9474a90920cSThomas Abraham dev_vdbg(host->dev, "list not empty: %s is next\n", 948f95f3850SWill Newton mmc_hostname(slot->mmc)); 949f95f3850SWill Newton host->state = STATE_SENDING_CMD; 950f95f3850SWill Newton dw_mci_start_request(host, slot); 951f95f3850SWill Newton } else { 9524a90920cSThomas Abraham dev_vdbg(host->dev, "list empty\n"); 953f95f3850SWill Newton host->state = STATE_IDLE; 954f95f3850SWill Newton } 955f95f3850SWill Newton 956f95f3850SWill Newton spin_unlock(&host->lock); 957f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 958f95f3850SWill Newton spin_lock(&host->lock); 959f95f3850SWill Newton } 960f95f3850SWill Newton 961f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 962f95f3850SWill Newton { 963f95f3850SWill Newton u32 status = host->cmd_status; 964f95f3850SWill Newton 965f95f3850SWill Newton host->cmd_status = 0; 966f95f3850SWill Newton 967f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 968f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 969f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 970f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 971f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 972f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 973f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 974f95f3850SWill Newton } else { 975f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 976f95f3850SWill Newton cmd->resp[1] = 0; 977f95f3850SWill Newton cmd->resp[2] = 0; 978f95f3850SWill Newton cmd->resp[3] = 0; 979f95f3850SWill Newton } 980f95f3850SWill Newton } 981f95f3850SWill Newton 982f95f3850SWill Newton if (status & SDMMC_INT_RTO) 983f95f3850SWill Newton cmd->error = -ETIMEDOUT; 984f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 985f95f3850SWill Newton cmd->error = -EILSEQ; 986f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 987f95f3850SWill Newton cmd->error = -EIO; 988f95f3850SWill Newton else 989f95f3850SWill Newton cmd->error = 0; 990f95f3850SWill Newton 991f95f3850SWill Newton if (cmd->error) { 992f95f3850SWill Newton /* newer ip versions need a delay between retries */ 993f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 994f95f3850SWill Newton mdelay(20); 995f95f3850SWill Newton 996f95f3850SWill Newton if (cmd->data) { 997f95f3850SWill Newton dw_mci_stop_dma(host); 998fda5f736SSeungwon Jeon host->data = NULL; 999f95f3850SWill Newton } 1000f95f3850SWill Newton } 1001f95f3850SWill Newton } 1002f95f3850SWill Newton 1003f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 1004f95f3850SWill Newton { 1005f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 1006f95f3850SWill Newton struct mmc_data *data; 1007f95f3850SWill Newton struct mmc_command *cmd; 1008f95f3850SWill Newton enum dw_mci_state state; 1009f95f3850SWill Newton enum dw_mci_state prev_state; 101094dd5b33SJames Hogan u32 status, ctrl; 1011f95f3850SWill Newton 1012f95f3850SWill Newton spin_lock(&host->lock); 1013f95f3850SWill Newton 1014f95f3850SWill Newton state = host->state; 1015f95f3850SWill Newton data = host->data; 1016f95f3850SWill Newton 1017f95f3850SWill Newton do { 1018f95f3850SWill Newton prev_state = state; 1019f95f3850SWill Newton 1020f95f3850SWill Newton switch (state) { 1021f95f3850SWill Newton case STATE_IDLE: 1022f95f3850SWill Newton break; 1023f95f3850SWill Newton 1024f95f3850SWill Newton case STATE_SENDING_CMD: 1025f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1026f95f3850SWill Newton &host->pending_events)) 1027f95f3850SWill Newton break; 1028f95f3850SWill Newton 1029f95f3850SWill Newton cmd = host->cmd; 1030f95f3850SWill Newton host->cmd = NULL; 1031f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 1032053b3ce6SSeungwon Jeon dw_mci_command_complete(host, cmd); 1033053b3ce6SSeungwon Jeon if (cmd == host->mrq->sbc && !cmd->error) { 1034053b3ce6SSeungwon Jeon prev_state = state = STATE_SENDING_CMD; 1035053b3ce6SSeungwon Jeon __dw_mci_start_request(host, host->cur_slot, 1036053b3ce6SSeungwon Jeon host->mrq->cmd); 1037053b3ce6SSeungwon Jeon goto unlock; 1038053b3ce6SSeungwon Jeon } 1039053b3ce6SSeungwon Jeon 1040f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 1041f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1042f95f3850SWill Newton goto unlock; 1043f95f3850SWill Newton } 1044f95f3850SWill Newton 1045f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 1046f95f3850SWill Newton /* fall through */ 1047f95f3850SWill Newton 1048f95f3850SWill Newton case STATE_SENDING_DATA: 1049f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 1050f95f3850SWill Newton &host->pending_events)) { 1051f95f3850SWill Newton dw_mci_stop_dma(host); 1052f95f3850SWill Newton if (data->stop) 1053f95f3850SWill Newton send_stop_cmd(host, data); 1054f95f3850SWill Newton state = STATE_DATA_ERROR; 1055f95f3850SWill Newton break; 1056f95f3850SWill Newton } 1057f95f3850SWill Newton 1058f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1059f95f3850SWill Newton &host->pending_events)) 1060f95f3850SWill Newton break; 1061f95f3850SWill Newton 1062f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 1063f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 1064f95f3850SWill Newton /* fall through */ 1065f95f3850SWill Newton 1066f95f3850SWill Newton case STATE_DATA_BUSY: 1067f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 1068f95f3850SWill Newton &host->pending_events)) 1069f95f3850SWill Newton break; 1070f95f3850SWill Newton 1071f95f3850SWill Newton host->data = NULL; 1072f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 1073f95f3850SWill Newton status = host->data_status; 1074f95f3850SWill Newton 1075f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1076f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 1077f95f3850SWill Newton data->error = -ETIMEDOUT; 1078f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 1079f95f3850SWill Newton data->error = -EILSEQ; 108055c5efbcSJames Hogan } else if (status & SDMMC_INT_EBE && 108155c5efbcSJames Hogan host->dir_status == 108255c5efbcSJames Hogan DW_MCI_SEND_STATUS) { 108355c5efbcSJames Hogan /* 108455c5efbcSJames Hogan * No data CRC status was returned. 108555c5efbcSJames Hogan * The number of bytes transferred will 108655c5efbcSJames Hogan * be exaggerated in PIO mode. 108755c5efbcSJames Hogan */ 108855c5efbcSJames Hogan data->bytes_xfered = 0; 108955c5efbcSJames Hogan data->error = -ETIMEDOUT; 1090f95f3850SWill Newton } else { 10914a90920cSThomas Abraham dev_err(host->dev, 1092f95f3850SWill Newton "data FIFO error " 1093f95f3850SWill Newton "(status=%08x)\n", 1094f95f3850SWill Newton status); 1095f95f3850SWill Newton data->error = -EIO; 1096f95f3850SWill Newton } 109794dd5b33SJames Hogan /* 109894dd5b33SJames Hogan * After an error, there may be data lingering 109994dd5b33SJames Hogan * in the FIFO, so reset it - doing so 110094dd5b33SJames Hogan * generates a block interrupt, hence setting 110194dd5b33SJames Hogan * the scatter-gather pointer to NULL. 110294dd5b33SJames Hogan */ 1103f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 110494dd5b33SJames Hogan host->sg = NULL; 110594dd5b33SJames Hogan ctrl = mci_readl(host, CTRL); 110694dd5b33SJames Hogan ctrl |= SDMMC_CTRL_FIFO_RESET; 110794dd5b33SJames Hogan mci_writel(host, CTRL, ctrl); 1108f95f3850SWill Newton } else { 1109f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 1110f95f3850SWill Newton data->error = 0; 1111f95f3850SWill Newton } 1112f95f3850SWill Newton 1113f95f3850SWill Newton if (!data->stop) { 1114f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1115f95f3850SWill Newton goto unlock; 1116f95f3850SWill Newton } 1117f95f3850SWill Newton 1118053b3ce6SSeungwon Jeon if (host->mrq->sbc && !data->error) { 1119053b3ce6SSeungwon Jeon data->stop->error = 0; 1120053b3ce6SSeungwon Jeon dw_mci_request_end(host, host->mrq); 1121053b3ce6SSeungwon Jeon goto unlock; 1122053b3ce6SSeungwon Jeon } 1123053b3ce6SSeungwon Jeon 1124f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 1125f95f3850SWill Newton if (!data->error) 1126f95f3850SWill Newton send_stop_cmd(host, data); 1127f95f3850SWill Newton /* fall through */ 1128f95f3850SWill Newton 1129f95f3850SWill Newton case STATE_SENDING_STOP: 1130f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1131f95f3850SWill Newton &host->pending_events)) 1132f95f3850SWill Newton break; 1133f95f3850SWill Newton 1134f95f3850SWill Newton host->cmd = NULL; 1135f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 1136f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1137f95f3850SWill Newton goto unlock; 1138f95f3850SWill Newton 1139f95f3850SWill Newton case STATE_DATA_ERROR: 1140f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1141f95f3850SWill Newton &host->pending_events)) 1142f95f3850SWill Newton break; 1143f95f3850SWill Newton 1144f95f3850SWill Newton state = STATE_DATA_BUSY; 1145f95f3850SWill Newton break; 1146f95f3850SWill Newton } 1147f95f3850SWill Newton } while (state != prev_state); 1148f95f3850SWill Newton 1149f95f3850SWill Newton host->state = state; 1150f95f3850SWill Newton unlock: 1151f95f3850SWill Newton spin_unlock(&host->lock); 1152f95f3850SWill Newton 1153f95f3850SWill Newton } 1154f95f3850SWill Newton 115534b664a2SJames Hogan /* push final bytes to part_buf, only use during push */ 115634b664a2SJames Hogan static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) 115734b664a2SJames Hogan { 115834b664a2SJames Hogan memcpy((void *)&host->part_buf, buf, cnt); 115934b664a2SJames Hogan host->part_buf_count = cnt; 116034b664a2SJames Hogan } 116134b664a2SJames Hogan 116234b664a2SJames Hogan /* append bytes to part_buf, only use during push */ 116334b664a2SJames Hogan static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) 116434b664a2SJames Hogan { 116534b664a2SJames Hogan cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); 116634b664a2SJames Hogan memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); 116734b664a2SJames Hogan host->part_buf_count += cnt; 116834b664a2SJames Hogan return cnt; 116934b664a2SJames Hogan } 117034b664a2SJames Hogan 117134b664a2SJames Hogan /* pull first bytes from part_buf, only use during pull */ 117234b664a2SJames Hogan static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) 117334b664a2SJames Hogan { 117434b664a2SJames Hogan cnt = min(cnt, (int)host->part_buf_count); 117534b664a2SJames Hogan if (cnt) { 117634b664a2SJames Hogan memcpy(buf, (void *)&host->part_buf + host->part_buf_start, 117734b664a2SJames Hogan cnt); 117834b664a2SJames Hogan host->part_buf_count -= cnt; 117934b664a2SJames Hogan host->part_buf_start += cnt; 118034b664a2SJames Hogan } 118134b664a2SJames Hogan return cnt; 118234b664a2SJames Hogan } 118334b664a2SJames Hogan 118434b664a2SJames Hogan /* pull final bytes from the part_buf, assuming it's just been filled */ 118534b664a2SJames Hogan static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) 118634b664a2SJames Hogan { 118734b664a2SJames Hogan memcpy(buf, &host->part_buf, cnt); 118834b664a2SJames Hogan host->part_buf_start = cnt; 118934b664a2SJames Hogan host->part_buf_count = (1 << host->data_shift) - cnt; 119034b664a2SJames Hogan } 119134b664a2SJames Hogan 1192f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 1193f95f3850SWill Newton { 119434b664a2SJames Hogan /* try and push anything in the part_buf */ 119534b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 119634b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 119734b664a2SJames Hogan buf += len; 119834b664a2SJames Hogan cnt -= len; 119934b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 2) { 12004e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12014e0a5adfSJaehoon Chung host->part_buf16); 120234b664a2SJames Hogan host->part_buf_count = 0; 120334b664a2SJames Hogan } 120434b664a2SJames Hogan } 120534b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 120634b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 120734b664a2SJames Hogan while (cnt >= 2) { 120834b664a2SJames Hogan u16 aligned_buf[64]; 120934b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 121034b664a2SJames Hogan int items = len >> 1; 121134b664a2SJames Hogan int i; 121234b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 121334b664a2SJames Hogan memcpy(aligned_buf, buf, len); 121434b664a2SJames Hogan buf += len; 121534b664a2SJames Hogan cnt -= len; 121634b664a2SJames Hogan /* push data from aligned buffer into fifo */ 121734b664a2SJames Hogan for (i = 0; i < items; ++i) 12184e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12194e0a5adfSJaehoon Chung aligned_buf[i]); 122034b664a2SJames Hogan } 122134b664a2SJames Hogan } else 122234b664a2SJames Hogan #endif 122334b664a2SJames Hogan { 122434b664a2SJames Hogan u16 *pdata = buf; 122534b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 12264e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), *pdata++); 122734b664a2SJames Hogan buf = pdata; 122834b664a2SJames Hogan } 122934b664a2SJames Hogan /* put anything remaining in the part_buf */ 123034b664a2SJames Hogan if (cnt) { 123134b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 123234b664a2SJames Hogan if (!sg_next(host->sg)) 12334e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 12344e0a5adfSJaehoon Chung host->part_buf16); 1235f95f3850SWill Newton } 1236f95f3850SWill Newton } 1237f95f3850SWill Newton 1238f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 1239f95f3850SWill Newton { 124034b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 124134b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 124234b664a2SJames Hogan while (cnt >= 2) { 124334b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 124434b664a2SJames Hogan u16 aligned_buf[64]; 124534b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 124634b664a2SJames Hogan int items = len >> 1; 124734b664a2SJames Hogan int i; 124834b664a2SJames Hogan for (i = 0; i < items; ++i) 12494e0a5adfSJaehoon Chung aligned_buf[i] = mci_readw(host, 12504e0a5adfSJaehoon Chung DATA(host->data_offset)); 125134b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 125234b664a2SJames Hogan memcpy(buf, aligned_buf, len); 125334b664a2SJames Hogan buf += len; 125434b664a2SJames Hogan cnt -= len; 125534b664a2SJames Hogan } 125634b664a2SJames Hogan } else 125734b664a2SJames Hogan #endif 125834b664a2SJames Hogan { 125934b664a2SJames Hogan u16 *pdata = buf; 126034b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 12614e0a5adfSJaehoon Chung *pdata++ = mci_readw(host, DATA(host->data_offset)); 126234b664a2SJames Hogan buf = pdata; 126334b664a2SJames Hogan } 126434b664a2SJames Hogan if (cnt) { 12654e0a5adfSJaehoon Chung host->part_buf16 = mci_readw(host, DATA(host->data_offset)); 126634b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1267f95f3850SWill Newton } 1268f95f3850SWill Newton } 1269f95f3850SWill Newton 1270f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 1271f95f3850SWill Newton { 127234b664a2SJames Hogan /* try and push anything in the part_buf */ 127334b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 127434b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 127534b664a2SJames Hogan buf += len; 127634b664a2SJames Hogan cnt -= len; 127734b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 4) { 12784e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12794e0a5adfSJaehoon Chung host->part_buf32); 128034b664a2SJames Hogan host->part_buf_count = 0; 128134b664a2SJames Hogan } 128234b664a2SJames Hogan } 128334b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 128434b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 128534b664a2SJames Hogan while (cnt >= 4) { 128634b664a2SJames Hogan u32 aligned_buf[32]; 128734b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 128834b664a2SJames Hogan int items = len >> 2; 128934b664a2SJames Hogan int i; 129034b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 129134b664a2SJames Hogan memcpy(aligned_buf, buf, len); 129234b664a2SJames Hogan buf += len; 129334b664a2SJames Hogan cnt -= len; 129434b664a2SJames Hogan /* push data from aligned buffer into fifo */ 129534b664a2SJames Hogan for (i = 0; i < items; ++i) 12964e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12974e0a5adfSJaehoon Chung aligned_buf[i]); 129834b664a2SJames Hogan } 129934b664a2SJames Hogan } else 130034b664a2SJames Hogan #endif 130134b664a2SJames Hogan { 130234b664a2SJames Hogan u32 *pdata = buf; 130334b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 13044e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), *pdata++); 130534b664a2SJames Hogan buf = pdata; 130634b664a2SJames Hogan } 130734b664a2SJames Hogan /* put anything remaining in the part_buf */ 130834b664a2SJames Hogan if (cnt) { 130934b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 131034b664a2SJames Hogan if (!sg_next(host->sg)) 13114e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 13124e0a5adfSJaehoon Chung host->part_buf32); 1313f95f3850SWill Newton } 1314f95f3850SWill Newton } 1315f95f3850SWill Newton 1316f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 1317f95f3850SWill Newton { 131834b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 131934b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 132034b664a2SJames Hogan while (cnt >= 4) { 132134b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 132234b664a2SJames Hogan u32 aligned_buf[32]; 132334b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 132434b664a2SJames Hogan int items = len >> 2; 132534b664a2SJames Hogan int i; 132634b664a2SJames Hogan for (i = 0; i < items; ++i) 13274e0a5adfSJaehoon Chung aligned_buf[i] = mci_readl(host, 13284e0a5adfSJaehoon Chung DATA(host->data_offset)); 132934b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 133034b664a2SJames Hogan memcpy(buf, aligned_buf, len); 133134b664a2SJames Hogan buf += len; 133234b664a2SJames Hogan cnt -= len; 133334b664a2SJames Hogan } 133434b664a2SJames Hogan } else 133534b664a2SJames Hogan #endif 133634b664a2SJames Hogan { 133734b664a2SJames Hogan u32 *pdata = buf; 133834b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 13394e0a5adfSJaehoon Chung *pdata++ = mci_readl(host, DATA(host->data_offset)); 134034b664a2SJames Hogan buf = pdata; 134134b664a2SJames Hogan } 134234b664a2SJames Hogan if (cnt) { 13434e0a5adfSJaehoon Chung host->part_buf32 = mci_readl(host, DATA(host->data_offset)); 134434b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1345f95f3850SWill Newton } 1346f95f3850SWill Newton } 1347f95f3850SWill Newton 1348f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1349f95f3850SWill Newton { 135034b664a2SJames Hogan /* try and push anything in the part_buf */ 135134b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 135234b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 135334b664a2SJames Hogan buf += len; 135434b664a2SJames Hogan cnt -= len; 135534b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 8) { 13564e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 13574e0a5adfSJaehoon Chung host->part_buf); 135834b664a2SJames Hogan host->part_buf_count = 0; 135934b664a2SJames Hogan } 136034b664a2SJames Hogan } 136134b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 136234b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 136334b664a2SJames Hogan while (cnt >= 8) { 136434b664a2SJames Hogan u64 aligned_buf[16]; 136534b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 136634b664a2SJames Hogan int items = len >> 3; 136734b664a2SJames Hogan int i; 136834b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 136934b664a2SJames Hogan memcpy(aligned_buf, buf, len); 137034b664a2SJames Hogan buf += len; 137134b664a2SJames Hogan cnt -= len; 137234b664a2SJames Hogan /* push data from aligned buffer into fifo */ 137334b664a2SJames Hogan for (i = 0; i < items; ++i) 13744e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13754e0a5adfSJaehoon Chung aligned_buf[i]); 137634b664a2SJames Hogan } 137734b664a2SJames Hogan } else 137834b664a2SJames Hogan #endif 137934b664a2SJames Hogan { 138034b664a2SJames Hogan u64 *pdata = buf; 138134b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 13824e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), *pdata++); 138334b664a2SJames Hogan buf = pdata; 138434b664a2SJames Hogan } 138534b664a2SJames Hogan /* put anything remaining in the part_buf */ 138634b664a2SJames Hogan if (cnt) { 138734b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 138834b664a2SJames Hogan if (!sg_next(host->sg)) 13894e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13904e0a5adfSJaehoon Chung host->part_buf); 1391f95f3850SWill Newton } 1392f95f3850SWill Newton } 1393f95f3850SWill Newton 1394f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1395f95f3850SWill Newton { 139634b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 139734b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 139834b664a2SJames Hogan while (cnt >= 8) { 139934b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 140034b664a2SJames Hogan u64 aligned_buf[16]; 140134b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 140234b664a2SJames Hogan int items = len >> 3; 140334b664a2SJames Hogan int i; 140434b664a2SJames Hogan for (i = 0; i < items; ++i) 14054e0a5adfSJaehoon Chung aligned_buf[i] = mci_readq(host, 14064e0a5adfSJaehoon Chung DATA(host->data_offset)); 140734b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 140834b664a2SJames Hogan memcpy(buf, aligned_buf, len); 140934b664a2SJames Hogan buf += len; 141034b664a2SJames Hogan cnt -= len; 1411f95f3850SWill Newton } 141234b664a2SJames Hogan } else 141334b664a2SJames Hogan #endif 141434b664a2SJames Hogan { 141534b664a2SJames Hogan u64 *pdata = buf; 141634b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 14174e0a5adfSJaehoon Chung *pdata++ = mci_readq(host, DATA(host->data_offset)); 141834b664a2SJames Hogan buf = pdata; 141934b664a2SJames Hogan } 142034b664a2SJames Hogan if (cnt) { 14214e0a5adfSJaehoon Chung host->part_buf = mci_readq(host, DATA(host->data_offset)); 142234b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 142334b664a2SJames Hogan } 142434b664a2SJames Hogan } 142534b664a2SJames Hogan 142634b664a2SJames Hogan static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) 142734b664a2SJames Hogan { 142834b664a2SJames Hogan int len; 142934b664a2SJames Hogan 143034b664a2SJames Hogan /* get remaining partial bytes */ 143134b664a2SJames Hogan len = dw_mci_pull_part_bytes(host, buf, cnt); 143234b664a2SJames Hogan if (unlikely(len == cnt)) 143334b664a2SJames Hogan return; 143434b664a2SJames Hogan buf += len; 143534b664a2SJames Hogan cnt -= len; 143634b664a2SJames Hogan 143734b664a2SJames Hogan /* get the rest of the data */ 143834b664a2SJames Hogan host->pull_data(host, buf, cnt); 1439f95f3850SWill Newton } 1440f95f3850SWill Newton 1441f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1442f95f3850SWill Newton { 1443f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1444f9c2a0dcSSeungwon Jeon void *buf; 1445f9c2a0dcSSeungwon Jeon unsigned int offset; 1446f95f3850SWill Newton struct mmc_data *data = host->data; 1447f95f3850SWill Newton int shift = host->data_shift; 1448f95f3850SWill Newton u32 status; 1449ba6a902dSChris Ball unsigned int nbytes = 0, len; 1450f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1451f95f3850SWill Newton 1452f95f3850SWill Newton do { 1453f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1454f9c2a0dcSSeungwon Jeon goto done; 1455f95f3850SWill Newton 14564225fc85SImre Deak host->sg = sg_miter->piter.sg; 1457f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1458f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1459f9c2a0dcSSeungwon Jeon offset = 0; 1460f9c2a0dcSSeungwon Jeon 1461f9c2a0dcSSeungwon Jeon do { 1462f9c2a0dcSSeungwon Jeon fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) 1463f9c2a0dcSSeungwon Jeon << shift) + host->part_buf_count; 1464f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1465f9c2a0dcSSeungwon Jeon if (!len) 1466f9c2a0dcSSeungwon Jeon break; 1467f9c2a0dcSSeungwon Jeon dw_mci_pull_data(host, (void *)(buf + offset), len); 1468f95f3850SWill Newton offset += len; 1469f95f3850SWill Newton nbytes += len; 1470f9c2a0dcSSeungwon Jeon remain -= len; 1471f9c2a0dcSSeungwon Jeon } while (remain); 1472f95f3850SWill Newton 1473e74f3a9cSSeungwon Jeon sg_miter->consumed = offset; 1474f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1475f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1476f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1477f95f3850SWill Newton data->bytes_xfered += nbytes; 1478f9c2a0dcSSeungwon Jeon 1479f9c2a0dcSSeungwon Jeon if (!remain) { 1480f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1481f9c2a0dcSSeungwon Jeon goto done; 1482f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1483f9c2a0dcSSeungwon Jeon } 1484f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1485f95f3850SWill Newton return; 1486f95f3850SWill Newton 1487f95f3850SWill Newton done: 1488f95f3850SWill Newton data->bytes_xfered += nbytes; 1489f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1490f9c2a0dcSSeungwon Jeon host->sg = NULL; 1491f95f3850SWill Newton smp_wmb(); 1492f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1493f95f3850SWill Newton } 1494f95f3850SWill Newton 1495f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1496f95f3850SWill Newton { 1497f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1498f9c2a0dcSSeungwon Jeon void *buf; 1499f9c2a0dcSSeungwon Jeon unsigned int offset; 1500f95f3850SWill Newton struct mmc_data *data = host->data; 1501f95f3850SWill Newton int shift = host->data_shift; 1502f95f3850SWill Newton u32 status; 1503f95f3850SWill Newton unsigned int nbytes = 0, len; 1504f9c2a0dcSSeungwon Jeon unsigned int fifo_depth = host->fifo_depth; 1505f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1506f95f3850SWill Newton 1507f95f3850SWill Newton do { 1508f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1509f9c2a0dcSSeungwon Jeon goto done; 1510f95f3850SWill Newton 15114225fc85SImre Deak host->sg = sg_miter->piter.sg; 1512f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1513f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1514f9c2a0dcSSeungwon Jeon offset = 0; 1515f9c2a0dcSSeungwon Jeon 1516f9c2a0dcSSeungwon Jeon do { 1517f9c2a0dcSSeungwon Jeon fcnt = ((fifo_depth - 1518f9c2a0dcSSeungwon Jeon SDMMC_GET_FCNT(mci_readl(host, STATUS))) 1519f9c2a0dcSSeungwon Jeon << shift) - host->part_buf_count; 1520f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1521f9c2a0dcSSeungwon Jeon if (!len) 1522f9c2a0dcSSeungwon Jeon break; 1523f9c2a0dcSSeungwon Jeon host->push_data(host, (void *)(buf + offset), len); 1524f95f3850SWill Newton offset += len; 1525f95f3850SWill Newton nbytes += len; 1526f9c2a0dcSSeungwon Jeon remain -= len; 1527f9c2a0dcSSeungwon Jeon } while (remain); 1528f95f3850SWill Newton 1529e74f3a9cSSeungwon Jeon sg_miter->consumed = offset; 1530f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1531f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1532f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1533f95f3850SWill Newton data->bytes_xfered += nbytes; 1534f9c2a0dcSSeungwon Jeon 1535f9c2a0dcSSeungwon Jeon if (!remain) { 1536f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1537f9c2a0dcSSeungwon Jeon goto done; 1538f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1539f9c2a0dcSSeungwon Jeon } 1540f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1541f95f3850SWill Newton return; 1542f95f3850SWill Newton 1543f95f3850SWill Newton done: 1544f95f3850SWill Newton data->bytes_xfered += nbytes; 1545f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1546f9c2a0dcSSeungwon Jeon host->sg = NULL; 1547f95f3850SWill Newton smp_wmb(); 1548f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1549f95f3850SWill Newton } 1550f95f3850SWill Newton 1551f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1552f95f3850SWill Newton { 1553f95f3850SWill Newton if (!host->cmd_status) 1554f95f3850SWill Newton host->cmd_status = status; 1555f95f3850SWill Newton 1556f95f3850SWill Newton smp_wmb(); 1557f95f3850SWill Newton 1558f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1559f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1560f95f3850SWill Newton } 1561f95f3850SWill Newton 1562f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1563f95f3850SWill Newton { 1564f95f3850SWill Newton struct dw_mci *host = dev_id; 1565182c9081SSeungwon Jeon u32 pending; 1566f95f3850SWill Newton unsigned int pass_count = 0; 15671a5c8e1fSShashidhar Hiremath int i; 1568f95f3850SWill Newton 1569f95f3850SWill Newton do { 1570f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1571f95f3850SWill Newton 1572f95f3850SWill Newton /* 1573f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1574f95f3850SWill Newton * is configured. 1575f95f3850SWill Newton */ 1576f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1577f95f3850SWill Newton if (!pending && 1578f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1579f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1580f95f3850SWill Newton } 1581f95f3850SWill Newton 1582f95f3850SWill Newton if (!pending) 1583f95f3850SWill Newton break; 1584f95f3850SWill Newton 1585f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1586f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1587182c9081SSeungwon Jeon host->cmd_status = pending; 1588f95f3850SWill Newton smp_wmb(); 1589f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1590f95f3850SWill Newton } 1591f95f3850SWill Newton 1592f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1593f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1594f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1595182c9081SSeungwon Jeon host->data_status = pending; 1596f95f3850SWill Newton smp_wmb(); 1597f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1598f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1599f95f3850SWill Newton } 1600f95f3850SWill Newton 1601f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1602f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1603f95f3850SWill Newton if (!host->data_status) 1604182c9081SSeungwon Jeon host->data_status = pending; 1605f95f3850SWill Newton smp_wmb(); 1606f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1607f95f3850SWill Newton if (host->sg != NULL) 1608f95f3850SWill Newton dw_mci_read_data_pio(host); 1609f95f3850SWill Newton } 1610f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1611f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1612f95f3850SWill Newton } 1613f95f3850SWill Newton 1614f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1615f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1616b40af3aaSJames Hogan if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) 1617f95f3850SWill Newton dw_mci_read_data_pio(host); 1618f95f3850SWill Newton } 1619f95f3850SWill Newton 1620f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1621f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1622b40af3aaSJames Hogan if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) 1623f95f3850SWill Newton dw_mci_write_data_pio(host); 1624f95f3850SWill Newton } 1625f95f3850SWill Newton 1626f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1627f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1628182c9081SSeungwon Jeon dw_mci_cmd_interrupt(host, pending); 1629f95f3850SWill Newton } 1630f95f3850SWill Newton 1631f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1632f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 163395dcc2cbSThomas Abraham queue_work(host->card_workqueue, &host->card_work); 1634f95f3850SWill Newton } 1635f95f3850SWill Newton 16361a5c8e1fSShashidhar Hiremath /* Handle SDIO Interrupts */ 16371a5c8e1fSShashidhar Hiremath for (i = 0; i < host->num_slots; i++) { 16381a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = host->slot[i]; 16391a5c8e1fSShashidhar Hiremath if (pending & SDMMC_INT_SDIO(i)) { 16401a5c8e1fSShashidhar Hiremath mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i)); 16411a5c8e1fSShashidhar Hiremath mmc_signal_sdio_irq(slot->mmc); 16421a5c8e1fSShashidhar Hiremath } 16431a5c8e1fSShashidhar Hiremath } 16441a5c8e1fSShashidhar Hiremath 1645f95f3850SWill Newton } while (pass_count++ < 5); 1646f95f3850SWill Newton 1647f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1648f95f3850SWill Newton /* Handle DMA interrupts */ 1649f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1650f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1651f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1652f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1653f95f3850SWill Newton host->dma_ops->complete(host); 1654f95f3850SWill Newton } 1655f95f3850SWill Newton #endif 1656f95f3850SWill Newton 1657f95f3850SWill Newton return IRQ_HANDLED; 1658f95f3850SWill Newton } 1659f95f3850SWill Newton 16601791b13eSJames Hogan static void dw_mci_work_routine_card(struct work_struct *work) 1661f95f3850SWill Newton { 16621791b13eSJames Hogan struct dw_mci *host = container_of(work, struct dw_mci, card_work); 1663f95f3850SWill Newton int i; 1664f95f3850SWill Newton 1665f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1666f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1667f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1668f95f3850SWill Newton struct mmc_request *mrq; 1669f95f3850SWill Newton int present; 1670f95f3850SWill Newton u32 ctrl; 1671f95f3850SWill Newton 1672f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1673f95f3850SWill Newton while (present != slot->last_detect_state) { 1674f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1675f95f3850SWill Newton present ? "inserted" : "removed"); 1676f95f3850SWill Newton 16771791b13eSJames Hogan /* Power up slot (before spin_lock, may sleep) */ 16781791b13eSJames Hogan if (present != 0 && host->pdata->setpower) 16791791b13eSJames Hogan host->pdata->setpower(slot->id, mmc->ocr_avail); 16801791b13eSJames Hogan 16811791b13eSJames Hogan spin_lock_bh(&host->lock); 16821791b13eSJames Hogan 1683f95f3850SWill Newton /* Card change detected */ 1684f95f3850SWill Newton slot->last_detect_state = present; 1685f95f3850SWill Newton 16861791b13eSJames Hogan /* Mark card as present if applicable */ 16871791b13eSJames Hogan if (present != 0) 1688f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1689f95f3850SWill Newton 1690f95f3850SWill Newton /* Clean up queue if present */ 1691f95f3850SWill Newton mrq = slot->mrq; 1692f95f3850SWill Newton if (mrq) { 1693f95f3850SWill Newton if (mrq == host->mrq) { 1694f95f3850SWill Newton host->data = NULL; 1695f95f3850SWill Newton host->cmd = NULL; 1696f95f3850SWill Newton 1697f95f3850SWill Newton switch (host->state) { 1698f95f3850SWill Newton case STATE_IDLE: 1699f95f3850SWill Newton break; 1700f95f3850SWill Newton case STATE_SENDING_CMD: 1701f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1702f95f3850SWill Newton if (!mrq->data) 1703f95f3850SWill Newton break; 1704f95f3850SWill Newton /* fall through */ 1705f95f3850SWill Newton case STATE_SENDING_DATA: 1706f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1707f95f3850SWill Newton dw_mci_stop_dma(host); 1708f95f3850SWill Newton break; 1709f95f3850SWill Newton case STATE_DATA_BUSY: 1710f95f3850SWill Newton case STATE_DATA_ERROR: 1711f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1712f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1713f95f3850SWill Newton if (!mrq->stop) 1714f95f3850SWill Newton break; 1715f95f3850SWill Newton /* fall through */ 1716f95f3850SWill Newton case STATE_SENDING_STOP: 1717f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1718f95f3850SWill Newton break; 1719f95f3850SWill Newton } 1720f95f3850SWill Newton 1721f95f3850SWill Newton dw_mci_request_end(host, mrq); 1722f95f3850SWill Newton } else { 1723f95f3850SWill Newton list_del(&slot->queue_node); 1724f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1725f95f3850SWill Newton if (mrq->data) 1726f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1727f95f3850SWill Newton if (mrq->stop) 1728f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1729f95f3850SWill Newton 1730f95f3850SWill Newton spin_unlock(&host->lock); 1731f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1732f95f3850SWill Newton spin_lock(&host->lock); 1733f95f3850SWill Newton } 1734f95f3850SWill Newton } 1735f95f3850SWill Newton 1736f95f3850SWill Newton /* Power down slot */ 1737f95f3850SWill Newton if (present == 0) { 1738f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1739f95f3850SWill Newton 1740f95f3850SWill Newton /* 1741f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1742f95f3850SWill Newton * block interrupt, hence setting the 1743f95f3850SWill Newton * scatter-gather pointer to NULL. 1744f95f3850SWill Newton */ 1745f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 1746f95f3850SWill Newton host->sg = NULL; 1747f95f3850SWill Newton 1748f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1749f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1750f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1751f95f3850SWill Newton 1752f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1753f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1754141a712aSSeungwon Jeon /* Software reset of DMA */ 1755141a712aSSeungwon Jeon ctrl |= SDMMC_IDMAC_SWRESET; 1756f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1757f95f3850SWill Newton #endif 1758f95f3850SWill Newton 1759f95f3850SWill Newton } 1760f95f3850SWill Newton 17611791b13eSJames Hogan spin_unlock_bh(&host->lock); 17621791b13eSJames Hogan 17631791b13eSJames Hogan /* Power down slot (after spin_unlock, may sleep) */ 17641791b13eSJames Hogan if (present == 0 && host->pdata->setpower) 17651791b13eSJames Hogan host->pdata->setpower(slot->id, 0); 17661791b13eSJames Hogan 1767f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1768f95f3850SWill Newton } 1769f95f3850SWill Newton 1770f95f3850SWill Newton mmc_detect_change(slot->mmc, 1771f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1772f95f3850SWill Newton } 1773f95f3850SWill Newton } 1774f95f3850SWill Newton 1775c91eab4bSThomas Abraham #ifdef CONFIG_OF 1776c91eab4bSThomas Abraham /* given a slot id, find out the device node representing that slot */ 1777c91eab4bSThomas Abraham static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) 1778c91eab4bSThomas Abraham { 1779c91eab4bSThomas Abraham struct device_node *np; 1780c91eab4bSThomas Abraham const __be32 *addr; 1781c91eab4bSThomas Abraham int len; 1782c91eab4bSThomas Abraham 1783c91eab4bSThomas Abraham if (!dev || !dev->of_node) 1784c91eab4bSThomas Abraham return NULL; 1785c91eab4bSThomas Abraham 1786c91eab4bSThomas Abraham for_each_child_of_node(dev->of_node, np) { 1787c91eab4bSThomas Abraham addr = of_get_property(np, "reg", &len); 1788c91eab4bSThomas Abraham if (!addr || (len < sizeof(int))) 1789c91eab4bSThomas Abraham continue; 1790c91eab4bSThomas Abraham if (be32_to_cpup(addr) == slot) 1791c91eab4bSThomas Abraham return np; 1792c91eab4bSThomas Abraham } 1793c91eab4bSThomas Abraham return NULL; 1794c91eab4bSThomas Abraham } 1795c91eab4bSThomas Abraham 1796a70aaa64SDoug Anderson static struct dw_mci_of_slot_quirks { 1797a70aaa64SDoug Anderson char *quirk; 1798a70aaa64SDoug Anderson int id; 1799a70aaa64SDoug Anderson } of_slot_quirks[] = { 1800a70aaa64SDoug Anderson { 1801a70aaa64SDoug Anderson .quirk = "disable-wp", 1802a70aaa64SDoug Anderson .id = DW_MCI_SLOT_QUIRK_NO_WRITE_PROTECT, 1803a70aaa64SDoug Anderson }, 1804a70aaa64SDoug Anderson }; 1805a70aaa64SDoug Anderson 1806a70aaa64SDoug Anderson static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot) 1807a70aaa64SDoug Anderson { 1808a70aaa64SDoug Anderson struct device_node *np = dw_mci_of_find_slot_node(dev, slot); 1809a70aaa64SDoug Anderson int quirks = 0; 1810a70aaa64SDoug Anderson int idx; 1811a70aaa64SDoug Anderson 1812a70aaa64SDoug Anderson /* get quirks */ 1813a70aaa64SDoug Anderson for (idx = 0; idx < ARRAY_SIZE(of_slot_quirks); idx++) 1814a70aaa64SDoug Anderson if (of_get_property(np, of_slot_quirks[idx].quirk, NULL)) 1815a70aaa64SDoug Anderson quirks |= of_slot_quirks[idx].id; 1816a70aaa64SDoug Anderson 1817a70aaa64SDoug Anderson return quirks; 1818a70aaa64SDoug Anderson } 1819a70aaa64SDoug Anderson 1820c91eab4bSThomas Abraham /* find out bus-width for a given slot */ 1821c91eab4bSThomas Abraham static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot) 1822c91eab4bSThomas Abraham { 1823c91eab4bSThomas Abraham struct device_node *np = dw_mci_of_find_slot_node(dev, slot); 1824c91eab4bSThomas Abraham u32 bus_wd = 1; 1825c91eab4bSThomas Abraham 1826c91eab4bSThomas Abraham if (!np) 1827c91eab4bSThomas Abraham return 1; 1828c91eab4bSThomas Abraham 1829c91eab4bSThomas Abraham if (of_property_read_u32(np, "bus-width", &bus_wd)) 1830c91eab4bSThomas Abraham dev_err(dev, "bus-width property not found, assuming width" 1831c91eab4bSThomas Abraham " as 1\n"); 1832c91eab4bSThomas Abraham return bus_wd; 1833c91eab4bSThomas Abraham } 183455a6ceb2SDoug Anderson 183555a6ceb2SDoug Anderson /* find the write protect gpio for a given slot; or -1 if none specified */ 183655a6ceb2SDoug Anderson static int dw_mci_of_get_wp_gpio(struct device *dev, u8 slot) 183755a6ceb2SDoug Anderson { 183855a6ceb2SDoug Anderson struct device_node *np = dw_mci_of_find_slot_node(dev, slot); 183955a6ceb2SDoug Anderson int gpio; 184055a6ceb2SDoug Anderson 184155a6ceb2SDoug Anderson if (!np) 184255a6ceb2SDoug Anderson return -EINVAL; 184355a6ceb2SDoug Anderson 184455a6ceb2SDoug Anderson gpio = of_get_named_gpio(np, "wp-gpios", 0); 184555a6ceb2SDoug Anderson 184655a6ceb2SDoug Anderson /* Having a missing entry is valid; return silently */ 184755a6ceb2SDoug Anderson if (!gpio_is_valid(gpio)) 184855a6ceb2SDoug Anderson return -EINVAL; 184955a6ceb2SDoug Anderson 185055a6ceb2SDoug Anderson if (devm_gpio_request(dev, gpio, "dw-mci-wp")) { 185155a6ceb2SDoug Anderson dev_warn(dev, "gpio [%d] request failed\n", gpio); 185255a6ceb2SDoug Anderson return -EINVAL; 185355a6ceb2SDoug Anderson } 185455a6ceb2SDoug Anderson 185555a6ceb2SDoug Anderson return gpio; 185655a6ceb2SDoug Anderson } 1857c91eab4bSThomas Abraham #else /* CONFIG_OF */ 1858a70aaa64SDoug Anderson static int dw_mci_of_get_slot_quirks(struct device *dev, u8 slot) 1859a70aaa64SDoug Anderson { 1860a70aaa64SDoug Anderson return 0; 1861a70aaa64SDoug Anderson } 1862c91eab4bSThomas Abraham static u32 dw_mci_of_get_bus_wd(struct device *dev, u8 slot) 1863c91eab4bSThomas Abraham { 1864c91eab4bSThomas Abraham return 1; 1865c91eab4bSThomas Abraham } 1866c91eab4bSThomas Abraham static struct device_node *dw_mci_of_find_slot_node(struct device *dev, u8 slot) 1867c91eab4bSThomas Abraham { 1868c91eab4bSThomas Abraham return NULL; 1869c91eab4bSThomas Abraham } 187055a6ceb2SDoug Anderson static int dw_mci_of_get_wp_gpio(struct device *dev, u8 slot) 187155a6ceb2SDoug Anderson { 187255a6ceb2SDoug Anderson return -EINVAL; 187355a6ceb2SDoug Anderson } 1874c91eab4bSThomas Abraham #endif /* CONFIG_OF */ 1875c91eab4bSThomas Abraham 187636c179a9SJaehoon Chung static int dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1877f95f3850SWill Newton { 1878f95f3850SWill Newton struct mmc_host *mmc; 1879f95f3850SWill Newton struct dw_mci_slot *slot; 1880e95baf13SArnd Bergmann const struct dw_mci_drv_data *drv_data = host->drv_data; 1881800d78bfSThomas Abraham int ctrl_id, ret; 1882c91eab4bSThomas Abraham u8 bus_width; 1883f95f3850SWill Newton 18844a90920cSThomas Abraham mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); 1885f95f3850SWill Newton if (!mmc) 1886f95f3850SWill Newton return -ENOMEM; 1887f95f3850SWill Newton 1888f95f3850SWill Newton slot = mmc_priv(mmc); 1889f95f3850SWill Newton slot->id = id; 1890f95f3850SWill Newton slot->mmc = mmc; 1891f95f3850SWill Newton slot->host = host; 1892c91eab4bSThomas Abraham host->slot[id] = slot; 1893f95f3850SWill Newton 1894a70aaa64SDoug Anderson slot->quirks = dw_mci_of_get_slot_quirks(host->dev, slot->id); 1895a70aaa64SDoug Anderson 1896f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1897f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1898f95f3850SWill Newton mmc->f_max = host->bus_hz; 1899f95f3850SWill Newton 1900f95f3850SWill Newton if (host->pdata->get_ocr) 1901f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1902f95f3850SWill Newton else 1903f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1904f95f3850SWill Newton 1905f95f3850SWill Newton /* 1906f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1907f95f3850SWill Newton * is detected. 1908f95f3850SWill Newton */ 1909f95f3850SWill Newton if (host->pdata->setpower) 1910f95f3850SWill Newton host->pdata->setpower(id, 0); 1911f95f3850SWill Newton 1912fc3d7720SJaehoon Chung if (host->pdata->caps) 1913fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1914fc3d7720SJaehoon Chung 1915ab269128SAbhilash Kesavan if (host->pdata->pm_caps) 1916ab269128SAbhilash Kesavan mmc->pm_caps = host->pdata->pm_caps; 1917ab269128SAbhilash Kesavan 1918800d78bfSThomas Abraham if (host->dev->of_node) { 1919800d78bfSThomas Abraham ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); 1920800d78bfSThomas Abraham if (ctrl_id < 0) 1921800d78bfSThomas Abraham ctrl_id = 0; 1922800d78bfSThomas Abraham } else { 1923800d78bfSThomas Abraham ctrl_id = to_platform_device(host->dev)->id; 1924800d78bfSThomas Abraham } 1925cb27a843SJames Hogan if (drv_data && drv_data->caps) 1926cb27a843SJames Hogan mmc->caps |= drv_data->caps[ctrl_id]; 1927800d78bfSThomas Abraham 19284f408cc6SSeungwon Jeon if (host->pdata->caps2) 19294f408cc6SSeungwon Jeon mmc->caps2 = host->pdata->caps2; 19304f408cc6SSeungwon Jeon 1931f95f3850SWill Newton if (host->pdata->get_bus_wd) 1932c91eab4bSThomas Abraham bus_width = host->pdata->get_bus_wd(slot->id); 1933c91eab4bSThomas Abraham else if (host->dev->of_node) 1934c91eab4bSThomas Abraham bus_width = dw_mci_of_get_bus_wd(host->dev, slot->id); 1935c91eab4bSThomas Abraham else 1936c91eab4bSThomas Abraham bus_width = 1; 1937c91eab4bSThomas Abraham 1938cb27a843SJames Hogan if (drv_data && drv_data->setup_bus) { 1939800d78bfSThomas Abraham struct device_node *slot_np; 1940800d78bfSThomas Abraham slot_np = dw_mci_of_find_slot_node(host->dev, slot->id); 1941cb27a843SJames Hogan ret = drv_data->setup_bus(host, slot_np, bus_width); 1942800d78bfSThomas Abraham if (ret) 1943800d78bfSThomas Abraham goto err_setup_bus; 1944800d78bfSThomas Abraham } 1945800d78bfSThomas Abraham 1946c91eab4bSThomas Abraham switch (bus_width) { 1947c91eab4bSThomas Abraham case 8: 1948c91eab4bSThomas Abraham mmc->caps |= MMC_CAP_8_BIT_DATA; 1949c91eab4bSThomas Abraham case 4: 1950f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1951c91eab4bSThomas Abraham } 1952f95f3850SWill Newton 1953f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 19546daa7778SSeungwon Jeon mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 1955f95f3850SWill Newton 1956f95f3850SWill Newton if (host->pdata->blk_settings) { 1957f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1958f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1959f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1960f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1961f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1962f95f3850SWill Newton } else { 1963f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1964a39e5746SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 1965a39e5746SJaehoon Chung mmc->max_segs = host->ring_size; 1966a39e5746SJaehoon Chung mmc->max_blk_size = 65536; 1967a39e5746SJaehoon Chung mmc->max_blk_count = host->ring_size; 1968a39e5746SJaehoon Chung mmc->max_seg_size = 0x1000; 1969a39e5746SJaehoon Chung mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1970a39e5746SJaehoon Chung #else 1971f95f3850SWill Newton mmc->max_segs = 64; 1972f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1973f95f3850SWill Newton mmc->max_blk_count = 512; 1974f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1975f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1976f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1977a39e5746SJaehoon Chung } 1978f95f3850SWill Newton 1979780f22afSSeungwon Jeon host->vmmc = devm_regulator_get(mmc_dev(mmc), "vmmc"); 1980c07946a3SJaehoon Chung if (IS_ERR(host->vmmc)) { 1981a3c76eb9SGirish K S pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1982c07946a3SJaehoon Chung host->vmmc = NULL; 1983c07946a3SJaehoon Chung } else 1984c07946a3SJaehoon Chung regulator_enable(host->vmmc); 1985c07946a3SJaehoon Chung 1986f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1987f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1988f95f3850SWill Newton else 1989f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1990f95f3850SWill Newton 199155a6ceb2SDoug Anderson slot->wp_gpio = dw_mci_of_get_wp_gpio(host->dev, slot->id); 199255a6ceb2SDoug Anderson 1993*0cea529dSJaehoon Chung ret = mmc_add_host(mmc); 1994*0cea529dSJaehoon Chung if (ret) 1995*0cea529dSJaehoon Chung goto err_setup_bus; 1996f95f3850SWill Newton 1997f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1998f95f3850SWill Newton dw_mci_init_debugfs(slot); 1999f95f3850SWill Newton #endif 2000f95f3850SWill Newton 2001f95f3850SWill Newton /* Card initially undetected */ 2002f95f3850SWill Newton slot->last_detect_state = 0; 2003f95f3850SWill Newton 2004dd6c4b98SWill Newton /* 2005dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 2006dd6c4b98SWill Newton * need to run the detect tasklet 2007dd6c4b98SWill Newton */ 200895dcc2cbSThomas Abraham queue_work(host->card_workqueue, &host->card_work); 2009dd6c4b98SWill Newton 2010f95f3850SWill Newton return 0; 2011800d78bfSThomas Abraham 2012800d78bfSThomas Abraham err_setup_bus: 2013800d78bfSThomas Abraham mmc_free_host(mmc); 2014800d78bfSThomas Abraham return -EINVAL; 2015f95f3850SWill Newton } 2016f95f3850SWill Newton 2017f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 2018f95f3850SWill Newton { 2019f95f3850SWill Newton /* Shutdown detect IRQ */ 2020f95f3850SWill Newton if (slot->host->pdata->exit) 2021f95f3850SWill Newton slot->host->pdata->exit(id); 2022f95f3850SWill Newton 2023f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 2024f95f3850SWill Newton mmc_remove_host(slot->mmc); 2025f95f3850SWill Newton slot->host->slot[id] = NULL; 2026f95f3850SWill Newton mmc_free_host(slot->mmc); 2027f95f3850SWill Newton } 2028f95f3850SWill Newton 2029f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 2030f95f3850SWill Newton { 2031f95f3850SWill Newton /* Alloc memory for sg translation */ 2032780f22afSSeungwon Jeon host->sg_cpu = dmam_alloc_coherent(host->dev, PAGE_SIZE, 2033f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 2034f95f3850SWill Newton if (!host->sg_cpu) { 20354a90920cSThomas Abraham dev_err(host->dev, "%s: could not alloc DMA memory\n", 2036f95f3850SWill Newton __func__); 2037f95f3850SWill Newton goto no_dma; 2038f95f3850SWill Newton } 2039f95f3850SWill Newton 2040f95f3850SWill Newton /* Determine which DMA interface to use */ 2041f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 2042f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 204300956ea3SSeungwon Jeon dev_info(host->dev, "Using internal DMA controller.\n"); 2044f95f3850SWill Newton #endif 2045f95f3850SWill Newton 2046f95f3850SWill Newton if (!host->dma_ops) 2047f95f3850SWill Newton goto no_dma; 2048f95f3850SWill Newton 2049e1631f98SJaehoon Chung if (host->dma_ops->init && host->dma_ops->start && 2050e1631f98SJaehoon Chung host->dma_ops->stop && host->dma_ops->cleanup) { 2051f95f3850SWill Newton if (host->dma_ops->init(host)) { 20524a90920cSThomas Abraham dev_err(host->dev, "%s: Unable to initialize " 2053f95f3850SWill Newton "DMA Controller.\n", __func__); 2054f95f3850SWill Newton goto no_dma; 2055f95f3850SWill Newton } 2056f95f3850SWill Newton } else { 20574a90920cSThomas Abraham dev_err(host->dev, "DMA initialization not found.\n"); 2058f95f3850SWill Newton goto no_dma; 2059f95f3850SWill Newton } 2060f95f3850SWill Newton 2061f95f3850SWill Newton host->use_dma = 1; 2062f95f3850SWill Newton return; 2063f95f3850SWill Newton 2064f95f3850SWill Newton no_dma: 20654a90920cSThomas Abraham dev_info(host->dev, "Using PIO mode.\n"); 2066f95f3850SWill Newton host->use_dma = 0; 2067f95f3850SWill Newton return; 2068f95f3850SWill Newton } 2069f95f3850SWill Newton 2070f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 2071f95f3850SWill Newton { 2072f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 2073f95f3850SWill Newton unsigned int ctrl; 2074f95f3850SWill Newton 2075f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 2076f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 2077f95f3850SWill Newton 2078f95f3850SWill Newton /* wait till resets clear */ 2079f95f3850SWill Newton do { 2080f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 2081f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 2082f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 2083f95f3850SWill Newton return true; 2084f95f3850SWill Newton } while (time_before(jiffies, timeout)); 2085f95f3850SWill Newton 2086f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 2087f95f3850SWill Newton 2088f95f3850SWill Newton return false; 2089f95f3850SWill Newton } 2090f95f3850SWill Newton 2091c91eab4bSThomas Abraham #ifdef CONFIG_OF 2092c91eab4bSThomas Abraham static struct dw_mci_of_quirks { 2093c91eab4bSThomas Abraham char *quirk; 2094c91eab4bSThomas Abraham int id; 2095c91eab4bSThomas Abraham } of_quirks[] = { 2096c91eab4bSThomas Abraham { 2097c91eab4bSThomas Abraham .quirk = "supports-highspeed", 2098c91eab4bSThomas Abraham .id = DW_MCI_QUIRK_HIGHSPEED, 2099c91eab4bSThomas Abraham }, { 2100c91eab4bSThomas Abraham .quirk = "broken-cd", 2101c91eab4bSThomas Abraham .id = DW_MCI_QUIRK_BROKEN_CARD_DETECTION, 2102c91eab4bSThomas Abraham }, 2103c91eab4bSThomas Abraham }; 2104c91eab4bSThomas Abraham 2105c91eab4bSThomas Abraham static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) 2106c91eab4bSThomas Abraham { 2107c91eab4bSThomas Abraham struct dw_mci_board *pdata; 2108c91eab4bSThomas Abraham struct device *dev = host->dev; 2109c91eab4bSThomas Abraham struct device_node *np = dev->of_node; 2110e95baf13SArnd Bergmann const struct dw_mci_drv_data *drv_data = host->drv_data; 2111800d78bfSThomas Abraham int idx, ret; 2112c91eab4bSThomas Abraham 2113c91eab4bSThomas Abraham pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 2114c91eab4bSThomas Abraham if (!pdata) { 2115c91eab4bSThomas Abraham dev_err(dev, "could not allocate memory for pdata\n"); 2116c91eab4bSThomas Abraham return ERR_PTR(-ENOMEM); 2117c91eab4bSThomas Abraham } 2118c91eab4bSThomas Abraham 2119c91eab4bSThomas Abraham /* find out number of slots supported */ 2120c91eab4bSThomas Abraham if (of_property_read_u32(dev->of_node, "num-slots", 2121c91eab4bSThomas Abraham &pdata->num_slots)) { 2122c91eab4bSThomas Abraham dev_info(dev, "num-slots property not found, " 2123c91eab4bSThomas Abraham "assuming 1 slot is available\n"); 2124c91eab4bSThomas Abraham pdata->num_slots = 1; 2125c91eab4bSThomas Abraham } 2126c91eab4bSThomas Abraham 2127c91eab4bSThomas Abraham /* get quirks */ 2128c91eab4bSThomas Abraham for (idx = 0; idx < ARRAY_SIZE(of_quirks); idx++) 2129c91eab4bSThomas Abraham if (of_get_property(np, of_quirks[idx].quirk, NULL)) 2130c91eab4bSThomas Abraham pdata->quirks |= of_quirks[idx].id; 2131c91eab4bSThomas Abraham 2132c91eab4bSThomas Abraham if (of_property_read_u32(np, "fifo-depth", &pdata->fifo_depth)) 2133c91eab4bSThomas Abraham dev_info(dev, "fifo-depth property not found, using " 2134c91eab4bSThomas Abraham "value of FIFOTH register as default\n"); 2135c91eab4bSThomas Abraham 2136c91eab4bSThomas Abraham of_property_read_u32(np, "card-detect-delay", &pdata->detect_delay_ms); 2137c91eab4bSThomas Abraham 2138cb27a843SJames Hogan if (drv_data && drv_data->parse_dt) { 2139cb27a843SJames Hogan ret = drv_data->parse_dt(host); 2140800d78bfSThomas Abraham if (ret) 2141800d78bfSThomas Abraham return ERR_PTR(ret); 2142800d78bfSThomas Abraham } 2143800d78bfSThomas Abraham 2144ab269128SAbhilash Kesavan if (of_find_property(np, "keep-power-in-suspend", NULL)) 2145ab269128SAbhilash Kesavan pdata->pm_caps |= MMC_PM_KEEP_POWER; 2146ab269128SAbhilash Kesavan 2147ab269128SAbhilash Kesavan if (of_find_property(np, "enable-sdio-wakeup", NULL)) 2148ab269128SAbhilash Kesavan pdata->pm_caps |= MMC_PM_WAKE_SDIO_IRQ; 2149ab269128SAbhilash Kesavan 2150c91eab4bSThomas Abraham return pdata; 2151c91eab4bSThomas Abraham } 2152c91eab4bSThomas Abraham 2153c91eab4bSThomas Abraham #else /* CONFIG_OF */ 2154c91eab4bSThomas Abraham static struct dw_mci_board *dw_mci_parse_dt(struct dw_mci *host) 2155c91eab4bSThomas Abraham { 2156c91eab4bSThomas Abraham return ERR_PTR(-EINVAL); 2157c91eab4bSThomas Abraham } 2158c91eab4bSThomas Abraham #endif /* CONFIG_OF */ 2159c91eab4bSThomas Abraham 216062ca8034SShashidhar Hiremath int dw_mci_probe(struct dw_mci *host) 2161f95f3850SWill Newton { 2162e95baf13SArnd Bergmann const struct dw_mci_drv_data *drv_data = host->drv_data; 216362ca8034SShashidhar Hiremath int width, i, ret = 0; 2164f95f3850SWill Newton u32 fifo_size; 21651c2215b7SThomas Abraham int init_slots = 0; 2166f95f3850SWill Newton 2167c91eab4bSThomas Abraham if (!host->pdata) { 2168c91eab4bSThomas Abraham host->pdata = dw_mci_parse_dt(host); 2169c91eab4bSThomas Abraham if (IS_ERR(host->pdata)) { 2170c91eab4bSThomas Abraham dev_err(host->dev, "platform data not available\n"); 2171c91eab4bSThomas Abraham return -EINVAL; 2172c91eab4bSThomas Abraham } 2173f95f3850SWill Newton } 2174f95f3850SWill Newton 217562ca8034SShashidhar Hiremath if (!host->pdata->select_slot && host->pdata->num_slots > 1) { 21764a90920cSThomas Abraham dev_err(host->dev, 2177f95f3850SWill Newton "Platform data must supply select_slot function\n"); 217862ca8034SShashidhar Hiremath return -ENODEV; 2179f95f3850SWill Newton } 2180f95f3850SWill Newton 2181780f22afSSeungwon Jeon host->biu_clk = devm_clk_get(host->dev, "biu"); 2182f90a0612SThomas Abraham if (IS_ERR(host->biu_clk)) { 2183f90a0612SThomas Abraham dev_dbg(host->dev, "biu clock not available\n"); 2184f90a0612SThomas Abraham } else { 2185f90a0612SThomas Abraham ret = clk_prepare_enable(host->biu_clk); 2186f90a0612SThomas Abraham if (ret) { 2187f90a0612SThomas Abraham dev_err(host->dev, "failed to enable biu clock\n"); 2188f90a0612SThomas Abraham return ret; 2189f90a0612SThomas Abraham } 2190f95f3850SWill Newton } 2191f95f3850SWill Newton 2192780f22afSSeungwon Jeon host->ciu_clk = devm_clk_get(host->dev, "ciu"); 2193f90a0612SThomas Abraham if (IS_ERR(host->ciu_clk)) { 2194f90a0612SThomas Abraham dev_dbg(host->dev, "ciu clock not available\n"); 2195f90a0612SThomas Abraham } else { 2196f90a0612SThomas Abraham ret = clk_prepare_enable(host->ciu_clk); 2197f90a0612SThomas Abraham if (ret) { 2198f90a0612SThomas Abraham dev_err(host->dev, "failed to enable ciu clock\n"); 2199f90a0612SThomas Abraham goto err_clk_biu; 2200f90a0612SThomas Abraham } 2201f90a0612SThomas Abraham } 2202f90a0612SThomas Abraham 2203f90a0612SThomas Abraham if (IS_ERR(host->ciu_clk)) 220462ca8034SShashidhar Hiremath host->bus_hz = host->pdata->bus_hz; 2205f90a0612SThomas Abraham else 2206f90a0612SThomas Abraham host->bus_hz = clk_get_rate(host->ciu_clk); 2207f90a0612SThomas Abraham 2208cb27a843SJames Hogan if (drv_data && drv_data->setup_clock) { 2209cb27a843SJames Hogan ret = drv_data->setup_clock(host); 2210800d78bfSThomas Abraham if (ret) { 2211800d78bfSThomas Abraham dev_err(host->dev, 2212800d78bfSThomas Abraham "implementation specific clock setup failed\n"); 2213800d78bfSThomas Abraham goto err_clk_ciu; 2214800d78bfSThomas Abraham } 2215800d78bfSThomas Abraham } 2216800d78bfSThomas Abraham 2217f90a0612SThomas Abraham if (!host->bus_hz) { 2218f90a0612SThomas Abraham dev_err(host->dev, 2219f90a0612SThomas Abraham "Platform data must supply bus speed\n"); 2220f90a0612SThomas Abraham ret = -ENODEV; 2221f90a0612SThomas Abraham goto err_clk_ciu; 2222f90a0612SThomas Abraham } 2223f90a0612SThomas Abraham 222462ca8034SShashidhar Hiremath host->quirks = host->pdata->quirks; 2225f95f3850SWill Newton 2226f95f3850SWill Newton spin_lock_init(&host->lock); 2227f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 2228f95f3850SWill Newton 2229f95f3850SWill Newton /* 2230f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 2231f95f3850SWill Newton * the correct values. 2232f95f3850SWill Newton */ 2233f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 2234f95f3850SWill Newton if (!i) { 2235f95f3850SWill Newton host->push_data = dw_mci_push_data16; 2236f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 2237f95f3850SWill Newton width = 16; 2238f95f3850SWill Newton host->data_shift = 1; 2239f95f3850SWill Newton } else if (i == 2) { 2240f95f3850SWill Newton host->push_data = dw_mci_push_data64; 2241f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 2242f95f3850SWill Newton width = 64; 2243f95f3850SWill Newton host->data_shift = 3; 2244f95f3850SWill Newton } else { 2245f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 2246f95f3850SWill Newton WARN((i != 1), 2247f95f3850SWill Newton "HCON reports a reserved host data width!\n" 2248f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 2249f95f3850SWill Newton host->push_data = dw_mci_push_data32; 2250f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 2251f95f3850SWill Newton width = 32; 2252f95f3850SWill Newton host->data_shift = 2; 2253f95f3850SWill Newton } 2254f95f3850SWill Newton 2255f95f3850SWill Newton /* Reset all blocks */ 22564a90920cSThomas Abraham if (!mci_wait_reset(host->dev, host)) 2257141a712aSSeungwon Jeon return -ENODEV; 2258141a712aSSeungwon Jeon 2259141a712aSSeungwon Jeon host->dma_ops = host->pdata->dma_ops; 2260141a712aSSeungwon Jeon dw_mci_init_dma(host); 2261f95f3850SWill Newton 2262f95f3850SWill Newton /* Clear the interrupts for the host controller */ 2263f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2264f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2265f95f3850SWill Newton 2266f95f3850SWill Newton /* Put in max timeout */ 2267f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 2268f95f3850SWill Newton 2269f95f3850SWill Newton /* 2270f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 2271f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 2272f95f3850SWill Newton */ 2273b86d8253SJames Hogan if (!host->pdata->fifo_depth) { 2274b86d8253SJames Hogan /* 2275b86d8253SJames Hogan * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may 2276b86d8253SJames Hogan * have been overwritten by the bootloader, just like we're 2277b86d8253SJames Hogan * about to do, so if you know the value for your hardware, you 2278b86d8253SJames Hogan * should put it in the platform data. 2279b86d8253SJames Hogan */ 2280f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 22818234e869SJaehoon Chung fifo_size = 1 + ((fifo_size >> 16) & 0xfff); 2282b86d8253SJames Hogan } else { 2283b86d8253SJames Hogan fifo_size = host->pdata->fifo_depth; 2284b86d8253SJames Hogan } 2285b86d8253SJames Hogan host->fifo_depth = fifo_size; 2286e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 2287e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 2288e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2289f95f3850SWill Newton 2290f95f3850SWill Newton /* disable clock to CIU */ 2291f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2292f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2293f95f3850SWill Newton 2294f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 229595dcc2cbSThomas Abraham host->card_workqueue = alloc_workqueue("dw-mci-card", 22961791b13eSJames Hogan WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); 229795dcc2cbSThomas Abraham if (!host->card_workqueue) 22981791b13eSJames Hogan goto err_dmaunmap; 22991791b13eSJames Hogan INIT_WORK(&host->card_work, dw_mci_work_routine_card); 2300780f22afSSeungwon Jeon ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, 2301780f22afSSeungwon Jeon host->irq_flags, "dw-mci", host); 2302f95f3850SWill Newton if (ret) 23031791b13eSJames Hogan goto err_workqueue; 2304f95f3850SWill Newton 2305f95f3850SWill Newton if (host->pdata->num_slots) 2306f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 2307f95f3850SWill Newton else 2308f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 2309f95f3850SWill Newton 23102da1d7f2SYuvaraj CD /* 23112da1d7f2SYuvaraj CD * Enable interrupts for command done, data over, data empty, card det, 23122da1d7f2SYuvaraj CD * receive ready and error such as transmit, receive timeout, crc error 23132da1d7f2SYuvaraj CD */ 23142da1d7f2SYuvaraj CD mci_writel(host, RINTSTS, 0xFFFFFFFF); 23152da1d7f2SYuvaraj CD mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 23162da1d7f2SYuvaraj CD SDMMC_INT_TXDR | SDMMC_INT_RXDR | 23172da1d7f2SYuvaraj CD DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 23182da1d7f2SYuvaraj CD mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 23192da1d7f2SYuvaraj CD 23202da1d7f2SYuvaraj CD dev_info(host->dev, "DW MMC controller at irq %d, " 23212da1d7f2SYuvaraj CD "%d bit host data width, " 23222da1d7f2SYuvaraj CD "%u deep fifo\n", 23232da1d7f2SYuvaraj CD host->irq, width, fifo_size); 23242da1d7f2SYuvaraj CD 2325f95f3850SWill Newton /* We need at least one slot to succeed */ 2326f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2327f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 23281c2215b7SThomas Abraham if (ret) 23291c2215b7SThomas Abraham dev_dbg(host->dev, "slot %d init failed\n", i); 23301c2215b7SThomas Abraham else 23311c2215b7SThomas Abraham init_slots++; 2332f95f3850SWill Newton } 23331c2215b7SThomas Abraham 23341c2215b7SThomas Abraham if (init_slots) { 23351c2215b7SThomas Abraham dev_info(host->dev, "%d slots initialized\n", init_slots); 23361c2215b7SThomas Abraham } else { 23371c2215b7SThomas Abraham dev_dbg(host->dev, "attempted to initialize %d slots, " 23381c2215b7SThomas Abraham "but failed on all\n", host->num_slots); 2339780f22afSSeungwon Jeon goto err_workqueue; 2340f95f3850SWill Newton } 2341f95f3850SWill Newton 2342f95f3850SWill Newton /* 23434e0a5adfSJaehoon Chung * In 2.40a spec, Data offset is changed. 23444e0a5adfSJaehoon Chung * Need to check the version-id and set data-offset for DATA register. 23454e0a5adfSJaehoon Chung */ 23464e0a5adfSJaehoon Chung host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); 23474a90920cSThomas Abraham dev_info(host->dev, "Version ID is %04x\n", host->verid); 23484e0a5adfSJaehoon Chung 23494e0a5adfSJaehoon Chung if (host->verid < DW_MMC_240A) 23504e0a5adfSJaehoon Chung host->data_offset = DATA_OFFSET; 23514e0a5adfSJaehoon Chung else 23524e0a5adfSJaehoon Chung host->data_offset = DATA_240A_OFFSET; 23534e0a5adfSJaehoon Chung 2354f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 23554a90920cSThomas Abraham dev_info(host->dev, "Internal DMAC interrupt fix enabled.\n"); 2356f95f3850SWill Newton 2357f95f3850SWill Newton return 0; 2358f95f3850SWill Newton 23591791b13eSJames Hogan err_workqueue: 236095dcc2cbSThomas Abraham destroy_workqueue(host->card_workqueue); 23611791b13eSJames Hogan 2362f95f3850SWill Newton err_dmaunmap: 2363f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2364f95f3850SWill Newton host->dma_ops->exit(host); 2365f95f3850SWill Newton 2366780f22afSSeungwon Jeon if (host->vmmc) 2367c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2368f90a0612SThomas Abraham 2369f90a0612SThomas Abraham err_clk_ciu: 2370780f22afSSeungwon Jeon if (!IS_ERR(host->ciu_clk)) 2371f90a0612SThomas Abraham clk_disable_unprepare(host->ciu_clk); 2372780f22afSSeungwon Jeon 2373f90a0612SThomas Abraham err_clk_biu: 2374780f22afSSeungwon Jeon if (!IS_ERR(host->biu_clk)) 2375f90a0612SThomas Abraham clk_disable_unprepare(host->biu_clk); 2376780f22afSSeungwon Jeon 2377f95f3850SWill Newton return ret; 2378f95f3850SWill Newton } 237962ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_probe); 2380f95f3850SWill Newton 238162ca8034SShashidhar Hiremath void dw_mci_remove(struct dw_mci *host) 2382f95f3850SWill Newton { 2383f95f3850SWill Newton int i; 2384f95f3850SWill Newton 2385f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2386f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2387f95f3850SWill Newton 2388f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 23894a90920cSThomas Abraham dev_dbg(host->dev, "remove slot %d\n", i); 2390f95f3850SWill Newton if (host->slot[i]) 2391f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2392f95f3850SWill Newton } 2393f95f3850SWill Newton 2394f95f3850SWill Newton /* disable clock to CIU */ 2395f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2396f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2397f95f3850SWill Newton 239895dcc2cbSThomas Abraham destroy_workqueue(host->card_workqueue); 2399f95f3850SWill Newton 2400f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2401f95f3850SWill Newton host->dma_ops->exit(host); 2402f95f3850SWill Newton 2403780f22afSSeungwon Jeon if (host->vmmc) 2404c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2405c07946a3SJaehoon Chung 2406f90a0612SThomas Abraham if (!IS_ERR(host->ciu_clk)) 2407f90a0612SThomas Abraham clk_disable_unprepare(host->ciu_clk); 2408780f22afSSeungwon Jeon 2409f90a0612SThomas Abraham if (!IS_ERR(host->biu_clk)) 2410f90a0612SThomas Abraham clk_disable_unprepare(host->biu_clk); 2411f95f3850SWill Newton } 241262ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_remove); 241362ca8034SShashidhar Hiremath 241462ca8034SShashidhar Hiremath 2415f95f3850SWill Newton 24166fe8890dSJaehoon Chung #ifdef CONFIG_PM_SLEEP 2417f95f3850SWill Newton /* 2418f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 2419f95f3850SWill Newton */ 242062ca8034SShashidhar Hiremath int dw_mci_suspend(struct dw_mci *host) 2421f95f3850SWill Newton { 242262ca8034SShashidhar Hiremath int i, ret = 0; 2423f95f3850SWill Newton 2424f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2425f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2426f95f3850SWill Newton if (!slot) 2427f95f3850SWill Newton continue; 2428f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 2429f95f3850SWill Newton if (ret < 0) { 2430f95f3850SWill Newton while (--i >= 0) { 2431f95f3850SWill Newton slot = host->slot[i]; 2432f95f3850SWill Newton if (slot) 2433f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 2434f95f3850SWill Newton } 2435f95f3850SWill Newton return ret; 2436f95f3850SWill Newton } 2437f95f3850SWill Newton } 2438f95f3850SWill Newton 2439c07946a3SJaehoon Chung if (host->vmmc) 2440c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2441c07946a3SJaehoon Chung 2442f95f3850SWill Newton return 0; 2443f95f3850SWill Newton } 244462ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_suspend); 2445f95f3850SWill Newton 244662ca8034SShashidhar Hiremath int dw_mci_resume(struct dw_mci *host) 2447f95f3850SWill Newton { 2448f95f3850SWill Newton int i, ret; 2449f95f3850SWill Newton 24501d6c4e0aSJaehoon Chung if (host->vmmc) 24511d6c4e0aSJaehoon Chung regulator_enable(host->vmmc); 24521d6c4e0aSJaehoon Chung 24534a90920cSThomas Abraham if (!mci_wait_reset(host->dev, host)) { 2454e61cf118SJaehoon Chung ret = -ENODEV; 2455e61cf118SJaehoon Chung return ret; 2456e61cf118SJaehoon Chung } 2457e61cf118SJaehoon Chung 24583bfe619dSJonathan Kliegman if (host->use_dma && host->dma_ops->init) 2459141a712aSSeungwon Jeon host->dma_ops->init(host); 2460141a712aSSeungwon Jeon 2461e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 2462e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2463e61cf118SJaehoon Chung 2464e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 2465e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2466e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2467e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2468e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 2469e61cf118SJaehoon Chung 2470f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2471f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2472f95f3850SWill Newton if (!slot) 2473f95f3850SWill Newton continue; 2474ab269128SAbhilash Kesavan if (slot->mmc->pm_flags & MMC_PM_KEEP_POWER) { 2475ab269128SAbhilash Kesavan dw_mci_set_ios(slot->mmc, &slot->mmc->ios); 2476ab269128SAbhilash Kesavan dw_mci_setup_bus(slot, true); 2477ab269128SAbhilash Kesavan } 2478ab269128SAbhilash Kesavan 2479f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 2480f95f3850SWill Newton if (ret < 0) 2481f95f3850SWill Newton return ret; 2482f95f3850SWill Newton } 2483f95f3850SWill Newton return 0; 2484f95f3850SWill Newton } 248562ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_resume); 24866fe8890dSJaehoon Chung #endif /* CONFIG_PM_SLEEP */ 24876fe8890dSJaehoon Chung 2488f95f3850SWill Newton static int __init dw_mci_init(void) 2489f95f3850SWill Newton { 249062ca8034SShashidhar Hiremath printk(KERN_INFO "Synopsys Designware Multimedia Card Interface Driver"); 249162ca8034SShashidhar Hiremath return 0; 2492f95f3850SWill Newton } 2493f95f3850SWill Newton 2494f95f3850SWill Newton static void __exit dw_mci_exit(void) 2495f95f3850SWill Newton { 2496f95f3850SWill Newton } 2497f95f3850SWill Newton 2498f95f3850SWill Newton module_init(dw_mci_init); 2499f95f3850SWill Newton module_exit(dw_mci_exit); 2500f95f3850SWill Newton 2501f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 2502f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 2503f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 2504f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 2505