1 /* 2 * SN Platform GRU Driver 3 * 4 * FAULT HANDLER FOR GRU DETECTED TLB MISSES 5 * 6 * This file contains code that handles TLB misses within the GRU. 7 * These misses are reported either via interrupts or user polling of 8 * the user CB. 9 * 10 * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved. 11 * 12 * This program is free software; you can redistribute it and/or modify 13 * it under the terms of the GNU General Public License as published by 14 * the Free Software Foundation; either version 2 of the License, or 15 * (at your option) any later version. 16 * 17 * This program is distributed in the hope that it will be useful, 18 * but WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20 * GNU General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License 23 * along with this program; if not, write to the Free Software 24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25 */ 26 27 #include <linux/kernel.h> 28 #include <linux/errno.h> 29 #include <linux/spinlock.h> 30 #include <linux/mm.h> 31 #include <linux/hugetlb.h> 32 #include <linux/device.h> 33 #include <linux/io.h> 34 #include <linux/uaccess.h> 35 #include <linux/security.h> 36 #include <asm/pgtable.h> 37 #include "gru.h" 38 #include "grutables.h" 39 #include "grulib.h" 40 #include "gru_instructions.h" 41 #include <asm/uv/uv_hub.h> 42 43 /* 44 * Test if a physical address is a valid GRU GSEG address 45 */ 46 static inline int is_gru_paddr(unsigned long paddr) 47 { 48 return paddr >= gru_start_paddr && paddr < gru_end_paddr; 49 } 50 51 /* 52 * Find the vma of a GRU segment. Caller must hold mmap_sem. 53 */ 54 struct vm_area_struct *gru_find_vma(unsigned long vaddr) 55 { 56 struct vm_area_struct *vma; 57 58 vma = find_vma(current->mm, vaddr); 59 if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops) 60 return vma; 61 return NULL; 62 } 63 64 /* 65 * Find and lock the gts that contains the specified user vaddr. 66 * 67 * Returns: 68 * - *gts with the mmap_sem locked for read and the GTS locked. 69 * - NULL if vaddr invalid OR is not a valid GSEG vaddr. 70 */ 71 72 static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr) 73 { 74 struct mm_struct *mm = current->mm; 75 struct vm_area_struct *vma; 76 struct gru_thread_state *gts = NULL; 77 78 down_read(&mm->mmap_sem); 79 vma = gru_find_vma(vaddr); 80 if (vma) 81 gts = gru_find_thread_state(vma, TSID(vaddr, vma)); 82 if (gts) 83 mutex_lock(>s->ts_ctxlock); 84 else 85 up_read(&mm->mmap_sem); 86 return gts; 87 } 88 89 static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr) 90 { 91 struct mm_struct *mm = current->mm; 92 struct vm_area_struct *vma; 93 struct gru_thread_state *gts = NULL; 94 95 down_write(&mm->mmap_sem); 96 vma = gru_find_vma(vaddr); 97 if (vma) 98 gts = gru_alloc_thread_state(vma, TSID(vaddr, vma)); 99 if (gts) { 100 mutex_lock(>s->ts_ctxlock); 101 downgrade_write(&mm->mmap_sem); 102 } else { 103 up_write(&mm->mmap_sem); 104 } 105 106 return gts; 107 } 108 109 /* 110 * Unlock a GTS that was previously locked with gru_find_lock_gts(). 111 */ 112 static void gru_unlock_gts(struct gru_thread_state *gts) 113 { 114 mutex_unlock(>s->ts_ctxlock); 115 up_read(¤t->mm->mmap_sem); 116 } 117 118 /* 119 * Set a CB.istatus to active using a user virtual address. This must be done 120 * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY. 121 * If the line is evicted, the status may be lost. The in-cache update 122 * is necessary to prevent the user from seeing a stale cb.istatus that will 123 * change as soon as the TFH restart is complete. Races may cause an 124 * occasional failure to clear the cb.istatus, but that is ok. 125 * 126 * If the cb address is not valid (should not happen, but...), nothing 127 * bad will happen.. The get_user()/put_user() will fail but there 128 * are no bad side-effects. 129 */ 130 static void gru_cb_set_istatus_active(unsigned long __user *cb) 131 { 132 union { 133 struct gru_instruction_bits bits; 134 unsigned long dw; 135 } u; 136 137 if (cb) { 138 get_user(u.dw, cb); 139 u.bits.istatus = CBS_ACTIVE; 140 put_user(u.dw, cb); 141 } 142 } 143 144 /* 145 * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the 146 * interrupt. Interrupts are always sent to a cpu on the blade that contains the 147 * GRU (except for headless blades which are not currently supported). A blade 148 * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ 149 * number uniquely identifies the GRU chiplet on the local blade that caused the 150 * interrupt. Always called in interrupt context. 151 */ 152 static inline struct gru_state *irq_to_gru(int irq) 153 { 154 return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU]; 155 } 156 157 /* 158 * Read & clear a TFM 159 * 160 * The GRU has an array of fault maps. A map is private to a cpu 161 * Only one cpu will be accessing a cpu's fault map. 162 * 163 * This function scans the cpu-private fault map & clears all bits that 164 * are set. The function returns a bitmap that indicates the bits that 165 * were cleared. Note that sense the maps may be updated asynchronously by 166 * the GRU, atomic operations must be used to clear bits. 167 */ 168 static void get_clear_fault_map(struct gru_state *gru, 169 struct gru_tlb_fault_map *imap, 170 struct gru_tlb_fault_map *dmap) 171 { 172 unsigned long i, k; 173 struct gru_tlb_fault_map *tfm; 174 175 tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id()); 176 prefetchw(tfm); /* Helps on hardware, required for emulator */ 177 for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) { 178 k = tfm->fault_bits[i]; 179 if (k) 180 k = xchg(&tfm->fault_bits[i], 0UL); 181 imap->fault_bits[i] = k; 182 k = tfm->done_bits[i]; 183 if (k) 184 k = xchg(&tfm->done_bits[i], 0UL); 185 dmap->fault_bits[i] = k; 186 } 187 188 /* 189 * Not functionally required but helps performance. (Required 190 * on emulator) 191 */ 192 gru_flush_cache(tfm); 193 } 194 195 /* 196 * Atomic (interrupt context) & non-atomic (user context) functions to 197 * convert a vaddr into a physical address. The size of the page 198 * is returned in pageshift. 199 * returns: 200 * 0 - successful 201 * < 0 - error code 202 * 1 - (atomic only) try again in non-atomic context 203 */ 204 static int non_atomic_pte_lookup(struct vm_area_struct *vma, 205 unsigned long vaddr, int write, 206 unsigned long *paddr, int *pageshift) 207 { 208 struct page *page; 209 210 /* ZZZ Need to handle HUGE pages */ 211 if (is_vm_hugetlb_page(vma)) 212 return -EFAULT; 213 *pageshift = PAGE_SHIFT; 214 if (get_user_pages 215 (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0) 216 return -EFAULT; 217 *paddr = page_to_phys(page); 218 put_page(page); 219 return 0; 220 } 221 222 /* 223 * atomic_pte_lookup 224 * 225 * Convert a user virtual address to a physical address 226 * Only supports Intel large pages (2MB only) on x86_64. 227 * ZZZ - hugepage support is incomplete 228 * 229 * NOTE: mmap_sem is already held on entry to this function. This 230 * guarantees existence of the page tables. 231 */ 232 static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr, 233 int write, unsigned long *paddr, int *pageshift) 234 { 235 pgd_t *pgdp; 236 pmd_t *pmdp; 237 pud_t *pudp; 238 pte_t pte; 239 240 pgdp = pgd_offset(vma->vm_mm, vaddr); 241 if (unlikely(pgd_none(*pgdp))) 242 goto err; 243 244 pudp = pud_offset(pgdp, vaddr); 245 if (unlikely(pud_none(*pudp))) 246 goto err; 247 248 pmdp = pmd_offset(pudp, vaddr); 249 if (unlikely(pmd_none(*pmdp))) 250 goto err; 251 #ifdef CONFIG_X86_64 252 if (unlikely(pmd_large(*pmdp))) 253 pte = *(pte_t *) pmdp; 254 else 255 #endif 256 pte = *pte_offset_kernel(pmdp, vaddr); 257 258 if (unlikely(!pte_present(pte) || 259 (write && (!pte_write(pte) || !pte_dirty(pte))))) 260 return 1; 261 262 *paddr = pte_pfn(pte) << PAGE_SHIFT; 263 #ifdef CONFIG_HUGETLB_PAGE 264 *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT; 265 #else 266 *pageshift = PAGE_SHIFT; 267 #endif 268 return 0; 269 270 err: 271 local_irq_enable(); 272 return 1; 273 } 274 275 static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr, 276 int write, int atomic, unsigned long *gpa, int *pageshift) 277 { 278 struct mm_struct *mm = gts->ts_mm; 279 struct vm_area_struct *vma; 280 unsigned long paddr; 281 int ret, ps; 282 283 vma = find_vma(mm, vaddr); 284 if (!vma) 285 goto inval; 286 287 /* 288 * Atomic lookup is faster & usually works even if called in non-atomic 289 * context. 290 */ 291 rmb(); /* Must/check ms_range_active before loading PTEs */ 292 ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &ps); 293 if (ret) { 294 if (atomic) 295 goto upm; 296 if (non_atomic_pte_lookup(vma, vaddr, write, &paddr, &ps)) 297 goto inval; 298 } 299 if (is_gru_paddr(paddr)) 300 goto inval; 301 paddr = paddr & ~((1UL << ps) - 1); 302 *gpa = uv_soc_phys_ram_to_gpa(paddr); 303 *pageshift = ps; 304 return 0; 305 306 inval: 307 return -1; 308 upm: 309 return -2; 310 } 311 312 313 /* 314 * Drop a TLB entry into the GRU. The fault is described by info in an TFH. 315 * Input: 316 * cb Address of user CBR. Null if not running in user context 317 * Return: 318 * 0 = dropin, exception, or switch to UPM successful 319 * 1 = range invalidate active 320 * < 0 = error code 321 * 322 */ 323 static int gru_try_dropin(struct gru_thread_state *gts, 324 struct gru_tlb_fault_handle *tfh, 325 unsigned long __user *cb) 326 { 327 int pageshift = 0, asid, write, ret, atomic = !cb; 328 unsigned long gpa = 0, vaddr = 0; 329 330 /* 331 * NOTE: The GRU contains magic hardware that eliminates races between 332 * TLB invalidates and TLB dropins. If an invalidate occurs 333 * in the window between reading the TFH and the subsequent TLB dropin, 334 * the dropin is ignored. This eliminates the need for additional locks. 335 */ 336 337 /* 338 * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call. 339 * Might be a hardware race OR a stupid user. Ignore FMM because FMM 340 * is a transient state. 341 */ 342 if (tfh->status != TFHSTATUS_EXCEPTION) { 343 gru_flush_cache(tfh); 344 if (tfh->status != TFHSTATUS_EXCEPTION) 345 goto failnoexception; 346 STAT(tfh_stale_on_fault); 347 } 348 if (tfh->state == TFHSTATE_IDLE) 349 goto failidle; 350 if (tfh->state == TFHSTATE_MISS_FMM && cb) 351 goto failfmm; 352 353 write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0; 354 vaddr = tfh->missvaddr; 355 asid = tfh->missasid; 356 if (asid == 0) 357 goto failnoasid; 358 359 rmb(); /* TFH must be cache resident before reading ms_range_active */ 360 361 /* 362 * TFH is cache resident - at least briefly. Fail the dropin 363 * if a range invalidate is active. 364 */ 365 if (atomic_read(>s->ts_gms->ms_range_active)) 366 goto failactive; 367 368 ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift); 369 if (ret == -1) 370 goto failinval; 371 if (ret == -2) 372 goto failupm; 373 374 if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) { 375 gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift); 376 if (atomic || !gru_update_cch(gts, 0)) { 377 gts->ts_force_cch_reload = 1; 378 goto failupm; 379 } 380 } 381 gru_cb_set_istatus_active(cb); 382 tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write, 383 GRU_PAGESIZE(pageshift)); 384 STAT(tlb_dropin); 385 gru_dbg(grudev, 386 "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n", 387 ret ? "non-atomic" : "atomic", tfh, vaddr, asid, 388 pageshift, gpa); 389 return 0; 390 391 failnoasid: 392 /* No asid (delayed unload). */ 393 STAT(tlb_dropin_fail_no_asid); 394 gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr); 395 if (!cb) 396 tfh_user_polling_mode(tfh); 397 else 398 gru_flush_cache(tfh); 399 return -EAGAIN; 400 401 failupm: 402 /* Atomic failure switch CBR to UPM */ 403 tfh_user_polling_mode(tfh); 404 STAT(tlb_dropin_fail_upm); 405 gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr); 406 return 1; 407 408 failfmm: 409 /* FMM state on UPM call */ 410 gru_flush_cache(tfh); 411 STAT(tlb_dropin_fail_fmm); 412 gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state); 413 return 0; 414 415 failnoexception: 416 /* TFH status did not show exception pending */ 417 gru_flush_cache(tfh); 418 if (cb) 419 gru_flush_cache(cb); 420 STAT(tlb_dropin_fail_no_exception); 421 gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n", tfh, tfh->status, tfh->state); 422 return 0; 423 424 failidle: 425 /* TFH state was idle - no miss pending */ 426 gru_flush_cache(tfh); 427 if (cb) 428 gru_flush_cache(cb); 429 STAT(tlb_dropin_fail_idle); 430 gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state); 431 return 0; 432 433 failinval: 434 /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */ 435 tfh_exception(tfh); 436 STAT(tlb_dropin_fail_invalid); 437 gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr); 438 return -EFAULT; 439 440 failactive: 441 /* Range invalidate active. Switch to UPM iff atomic */ 442 if (!cb) 443 tfh_user_polling_mode(tfh); 444 else 445 gru_flush_cache(tfh); 446 STAT(tlb_dropin_fail_range_active); 447 gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n", 448 tfh, vaddr); 449 return 1; 450 } 451 452 /* 453 * Process an external interrupt from the GRU. This interrupt is 454 * caused by a TLB miss. 455 * Note that this is the interrupt handler that is registered with linux 456 * interrupt handlers. 457 */ 458 irqreturn_t gru_intr(int irq, void *dev_id) 459 { 460 struct gru_state *gru; 461 struct gru_tlb_fault_map imap, dmap; 462 struct gru_thread_state *gts; 463 struct gru_tlb_fault_handle *tfh = NULL; 464 int cbrnum, ctxnum; 465 466 STAT(intr); 467 468 gru = irq_to_gru(irq); 469 if (!gru) { 470 dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n", 471 raw_smp_processor_id(), irq); 472 return IRQ_NONE; 473 } 474 get_clear_fault_map(gru, &imap, &dmap); 475 476 for_each_cbr_in_tfm(cbrnum, dmap.fault_bits) { 477 complete(gru->gs_blade->bs_async_wq); 478 gru_dbg(grudev, "gid %d, cbr_done %d, done %d\n", 479 gru->gs_gid, cbrnum, gru->gs_blade->bs_async_wq->done); 480 } 481 482 for_each_cbr_in_tfm(cbrnum, imap.fault_bits) { 483 tfh = get_tfh_by_index(gru, cbrnum); 484 prefetchw(tfh); /* Helps on hdw, required for emulator */ 485 486 /* 487 * When hardware sets a bit in the faultmap, it implicitly 488 * locks the GRU context so that it cannot be unloaded. 489 * The gts cannot change until a TFH start/writestart command 490 * is issued. 491 */ 492 ctxnum = tfh->ctxnum; 493 gts = gru->gs_gts[ctxnum]; 494 495 /* 496 * This is running in interrupt context. Trylock the mmap_sem. 497 * If it fails, retry the fault in user context. 498 */ 499 if (!gts->ts_force_cch_reload && 500 down_read_trylock(>s->ts_mm->mmap_sem)) { 501 gts->ustats.fmm_tlbdropin++; 502 gru_try_dropin(gts, tfh, NULL); 503 up_read(>s->ts_mm->mmap_sem); 504 } else { 505 tfh_user_polling_mode(tfh); 506 STAT(intr_mm_lock_failed); 507 } 508 } 509 return IRQ_HANDLED; 510 } 511 512 513 static int gru_user_dropin(struct gru_thread_state *gts, 514 struct gru_tlb_fault_handle *tfh, 515 unsigned long __user *cb) 516 { 517 struct gru_mm_struct *gms = gts->ts_gms; 518 int ret; 519 520 gts->ustats.upm_tlbdropin++; 521 while (1) { 522 wait_event(gms->ms_wait_queue, 523 atomic_read(&gms->ms_range_active) == 0); 524 prefetchw(tfh); /* Helps on hdw, required for emulator */ 525 ret = gru_try_dropin(gts, tfh, cb); 526 if (ret <= 0) 527 return ret; 528 STAT(call_os_wait_queue); 529 } 530 } 531 532 /* 533 * This interface is called as a result of a user detecting a "call OS" bit 534 * in a user CB. Normally means that a TLB fault has occurred. 535 * cb - user virtual address of the CB 536 */ 537 int gru_handle_user_call_os(unsigned long cb) 538 { 539 struct gru_tlb_fault_handle *tfh; 540 struct gru_thread_state *gts; 541 unsigned long __user *cbp; 542 int ucbnum, cbrnum, ret = -EINVAL; 543 544 STAT(call_os); 545 gru_dbg(grudev, "address 0x%lx\n", cb); 546 547 /* sanity check the cb pointer */ 548 ucbnum = get_cb_number((void *)cb); 549 if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB) 550 return -EINVAL; 551 cbp = (unsigned long *)cb; 552 553 gts = gru_find_lock_gts(cb); 554 if (!gts) 555 return -EINVAL; 556 557 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) 558 goto exit; 559 560 /* 561 * If force_unload is set, the UPM TLB fault is phony. The task 562 * has migrated to another node and the GSEG must be moved. Just 563 * unload the context. The task will page fault and assign a new 564 * context. 565 */ 566 if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 && 567 gts->ts_blade != uv_numa_blade_id()) { 568 STAT(call_os_offnode_reference); 569 gts->ts_force_unload = 1; 570 } 571 572 /* 573 * CCH may contain stale data if ts_force_cch_reload is set. 574 */ 575 if (gts->ts_gru && gts->ts_force_cch_reload) { 576 gts->ts_force_cch_reload = 0; 577 gru_update_cch(gts, 0); 578 } 579 580 ret = -EAGAIN; 581 cbrnum = thread_cbr_number(gts, ucbnum); 582 if (gts->ts_force_unload) { 583 gru_unload_context(gts, 1); 584 } else if (gts->ts_gru) { 585 tfh = get_tfh_by_index(gts->ts_gru, cbrnum); 586 ret = gru_user_dropin(gts, tfh, cbp); 587 } 588 exit: 589 gru_unlock_gts(gts); 590 return ret; 591 } 592 593 /* 594 * Fetch the exception detail information for a CB that terminated with 595 * an exception. 596 */ 597 int gru_get_exception_detail(unsigned long arg) 598 { 599 struct control_block_extended_exc_detail excdet; 600 struct gru_control_block_extended *cbe; 601 struct gru_thread_state *gts; 602 int ucbnum, cbrnum, ret; 603 604 STAT(user_exception); 605 if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet))) 606 return -EFAULT; 607 608 gru_dbg(grudev, "address 0x%lx\n", excdet.cb); 609 gts = gru_find_lock_gts(excdet.cb); 610 if (!gts) 611 return -EINVAL; 612 613 ucbnum = get_cb_number((void *)excdet.cb); 614 if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) { 615 ret = -EINVAL; 616 } else if (gts->ts_gru) { 617 cbrnum = thread_cbr_number(gts, ucbnum); 618 cbe = get_cbe_by_index(gts->ts_gru, cbrnum); 619 gru_flush_cache(cbe); /* CBE not coherent */ 620 excdet.opc = cbe->opccpy; 621 excdet.exopc = cbe->exopccpy; 622 excdet.ecause = cbe->ecause; 623 excdet.exceptdet0 = cbe->idef1upd; 624 excdet.exceptdet1 = cbe->idef3upd; 625 excdet.cbrstate = cbe->cbrstate; 626 excdet.cbrexecstatus = cbe->cbrexecstatus; 627 gru_flush_cache(cbe); 628 ret = 0; 629 } else { 630 ret = -EAGAIN; 631 } 632 gru_unlock_gts(gts); 633 634 gru_dbg(grudev, 635 "cb 0x%lx, op %d, exopc %d, cbrstate %d, cbrexecstatus 0x%x, ecause 0x%x, " 636 "exdet0 0x%lx, exdet1 0x%x\n", 637 excdet.cb, excdet.opc, excdet.exopc, excdet.cbrstate, excdet.cbrexecstatus, 638 excdet.ecause, excdet.exceptdet0, excdet.exceptdet1); 639 if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet))) 640 ret = -EFAULT; 641 return ret; 642 } 643 644 /* 645 * User request to unload a context. Content is saved for possible reload. 646 */ 647 static int gru_unload_all_contexts(void) 648 { 649 struct gru_thread_state *gts; 650 struct gru_state *gru; 651 int gid, ctxnum; 652 653 if (!capable(CAP_SYS_ADMIN)) 654 return -EPERM; 655 foreach_gid(gid) { 656 gru = GID_TO_GRU(gid); 657 spin_lock(&gru->gs_lock); 658 for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) { 659 gts = gru->gs_gts[ctxnum]; 660 if (gts && mutex_trylock(>s->ts_ctxlock)) { 661 spin_unlock(&gru->gs_lock); 662 gru_unload_context(gts, 1); 663 mutex_unlock(>s->ts_ctxlock); 664 spin_lock(&gru->gs_lock); 665 } 666 } 667 spin_unlock(&gru->gs_lock); 668 } 669 return 0; 670 } 671 672 int gru_user_unload_context(unsigned long arg) 673 { 674 struct gru_thread_state *gts; 675 struct gru_unload_context_req req; 676 677 STAT(user_unload_context); 678 if (copy_from_user(&req, (void __user *)arg, sizeof(req))) 679 return -EFAULT; 680 681 gru_dbg(grudev, "gseg 0x%lx\n", req.gseg); 682 683 if (!req.gseg) 684 return gru_unload_all_contexts(); 685 686 gts = gru_find_lock_gts(req.gseg); 687 if (!gts) 688 return -EINVAL; 689 690 if (gts->ts_gru) 691 gru_unload_context(gts, 1); 692 gru_unlock_gts(gts); 693 694 return 0; 695 } 696 697 /* 698 * User request to flush a range of virtual addresses from the GRU TLB 699 * (Mainly for testing). 700 */ 701 int gru_user_flush_tlb(unsigned long arg) 702 { 703 struct gru_thread_state *gts; 704 struct gru_flush_tlb_req req; 705 struct gru_mm_struct *gms; 706 707 STAT(user_flush_tlb); 708 if (copy_from_user(&req, (void __user *)arg, sizeof(req))) 709 return -EFAULT; 710 711 gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg, 712 req.vaddr, req.len); 713 714 gts = gru_find_lock_gts(req.gseg); 715 if (!gts) 716 return -EINVAL; 717 718 gms = gts->ts_gms; 719 gru_unlock_gts(gts); 720 gru_flush_tlb_range(gms, req.vaddr, req.len); 721 722 return 0; 723 } 724 725 /* 726 * Fetch GSEG statisticss 727 */ 728 long gru_get_gseg_statistics(unsigned long arg) 729 { 730 struct gru_thread_state *gts; 731 struct gru_get_gseg_statistics_req req; 732 733 if (copy_from_user(&req, (void __user *)arg, sizeof(req))) 734 return -EFAULT; 735 736 gts = gru_find_lock_gts(req.gseg); 737 if (gts) { 738 memcpy(&req.stats, >s->ustats, sizeof(gts->ustats)); 739 gru_unlock_gts(gts); 740 } else { 741 memset(&req.stats, 0, sizeof(gts->ustats)); 742 } 743 744 if (copy_to_user((void __user *)arg, &req, sizeof(req))) 745 return -EFAULT; 746 747 return 0; 748 } 749 750 /* 751 * Register the current task as the user of the GSEG slice. 752 * Needed for TLB fault interrupt targeting. 753 */ 754 int gru_set_context_option(unsigned long arg) 755 { 756 struct gru_thread_state *gts; 757 struct gru_set_context_option_req req; 758 int ret = 0; 759 760 STAT(set_context_option); 761 if (copy_from_user(&req, (void __user *)arg, sizeof(req))) 762 return -EFAULT; 763 gru_dbg(grudev, "op %d, gseg 0x%lx, value1 0x%lx\n", req.op, req.gseg, req.val1); 764 765 gts = gru_alloc_locked_gts(req.gseg); 766 if (!gts) 767 return -EINVAL; 768 769 switch (req.op) { 770 case sco_gseg_owner: 771 /* Register the current task as the GSEG owner */ 772 gts->ts_tgid_owner = current->tgid; 773 break; 774 case sco_cch_req_slice: 775 /* Set the CCH slice option */ 776 gts->ts_cch_req_slice = req.val1 & 3; 777 break; 778 default: 779 ret = -EINVAL; 780 } 781 gru_unlock_gts(gts); 782 783 return ret; 784 } 785