1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) KEBA Industrial Automation Gmbh 2024 4 * 5 * Driver for KEBA system FPGA 6 * 7 * The KEBA system FPGA implements various devices. This driver registers 8 * auxiliary devices for every device within the FPGA. 9 */ 10 11 #include <linux/device.h> 12 #include <linux/i2c.h> 13 #include <linux/misc/keba.h> 14 #include <linux/module.h> 15 #include <linux/mtd/partitions.h> 16 #include <linux/nvmem-consumer.h> 17 #include <linux/nvmem-provider.h> 18 #include <linux/pci.h> 19 #include <linux/spi/flash.h> 20 #include <linux/spi/spi.h> 21 22 #define CP500 "cp500" 23 24 #define PCI_VENDOR_ID_KEBA 0xCEBA 25 #define PCI_DEVICE_ID_KEBA_CP035 0x2706 26 #define PCI_DEVICE_ID_KEBA_CP505 0x2703 27 #define PCI_DEVICE_ID_KEBA_CP520 0x2696 28 29 #define CP500_SYS_BAR 0 30 #define CP500_ECM_BAR 1 31 32 /* BAR 0 registers */ 33 #define CP500_VERSION_REG 0x00 34 #define CP500_RECONFIG_REG 0x11 /* upper 8-bits of STARTUP register */ 35 #define CP500_PRESENT_REG 0x20 36 #define CP500_AXI_REG 0x40 37 38 /* Bits in BUILD_REG */ 39 #define CP500_BUILD_TEST 0x8000 /* FPGA test version */ 40 41 /* Bits in RECONFIG_REG */ 42 #define CP500_RECFG_REQ 0x01 /* reconfigure FPGA on next reset */ 43 44 /* Bits in PRESENT_REG */ 45 #define CP500_PRESENT_FAN0 0x01 46 47 /* MSIX */ 48 #define CP500_AXI_MSIX 3 49 #define CP500_NUM_MSIX 8 50 #define CP500_NUM_MSIX_NO_MMI 2 51 #define CP500_NUM_MSIX_NO_AXI 3 52 53 /* EEPROM */ 54 #define CP500_EEPROM_DA_OFFSET 0x016F 55 #define CP500_EEPROM_DA_ESC_TYPE_MASK 0x01 56 #define CP500_EEPROM_ESC_LAN9252 0x00 57 #define CP500_EEPROM_ESC_ET1100 0x01 58 #define CP500_EEPROM_CPU_NAME "cpu_eeprom" 59 #define CP500_EEPROM_CPU_OFFSET 0 60 #define CP500_EEPROM_CPU_SIZE 3072 61 #define CP500_EEPROM_USER_NAME "user_eeprom" 62 #define CP500_EEPROM_USER_OFFSET 3072 63 #define CP500_EEPROM_USER_SIZE 1024 64 65 /* SPI flash running at full speed */ 66 #define CP500_FLASH_HZ (33 * 1000 * 1000) 67 68 /* LAN9252 */ 69 #define CP500_LAN9252_HZ (10 * 1000 * 1000) 70 71 #define CP500_IS_CP035(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP035) 72 #define CP500_IS_CP505(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP505) 73 #define CP500_IS_CP520(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP520) 74 75 struct cp500_dev_info { 76 off_t offset; 77 size_t size; 78 }; 79 80 struct cp500_devs { 81 struct cp500_dev_info startup; 82 struct cp500_dev_info spi; 83 struct cp500_dev_info i2c; 84 struct cp500_dev_info fan; 85 struct cp500_dev_info batt; 86 }; 87 88 /* list of devices within FPGA of CP035 family (CP035, CP056, CP057) */ 89 static struct cp500_devs cp035_devices = { 90 .startup = { 0x0000, SZ_4K }, 91 .spi = { 0x1000, SZ_4K }, 92 .i2c = { 0x4000, SZ_4K }, 93 .fan = { 0x9000, SZ_4K }, 94 .batt = { 0xA000, SZ_4K }, 95 }; 96 97 /* list of devices within FPGA of CP505 family (CP503, CP505, CP507) */ 98 static struct cp500_devs cp505_devices = { 99 .startup = { 0x0000, SZ_4K }, 100 .spi = { 0x4000, SZ_4K }, 101 .i2c = { 0x5000, SZ_4K }, 102 .fan = { 0x9000, SZ_4K }, 103 .batt = { 0xA000, SZ_4K }, 104 }; 105 106 /* list of devices within FPGA of CP520 family (CP520, CP530) */ 107 static struct cp500_devs cp520_devices = { 108 .startup = { 0x0000, SZ_4K }, 109 .spi = { 0x4000, SZ_4K }, 110 .i2c = { 0x5000, SZ_4K }, 111 .fan = { 0x8000, SZ_4K }, 112 .batt = { 0x9000, SZ_4K }, 113 }; 114 115 struct cp500_nvmem { 116 struct nvmem_device *nvmem; 117 unsigned int offset; 118 }; 119 120 struct cp500 { 121 struct pci_dev *pci_dev; 122 struct cp500_devs *devs; 123 int msix_num; 124 struct { 125 int major; 126 int minor; 127 int build; 128 } version; 129 struct notifier_block nvmem_notifier; 130 atomic_t nvmem_notified; 131 132 /* system FPGA BAR */ 133 resource_size_t sys_hwbase; 134 struct keba_spi_auxdev *spi; 135 struct keba_i2c_auxdev *i2c; 136 struct keba_fan_auxdev *fan; 137 struct keba_batt_auxdev *batt; 138 139 /* ECM EtherCAT BAR */ 140 resource_size_t ecm_hwbase; 141 142 /* NVMEM devices */ 143 struct cp500_nvmem nvmem_cpu; 144 struct cp500_nvmem nvmem_user; 145 146 void __iomem *system_startup_addr; 147 }; 148 149 /* I2C devices */ 150 #define CP500_EEPROM_ADDR 0x50 151 static struct i2c_board_info cp500_i2c_info[] = { 152 { /* temperature sensor */ 153 I2C_BOARD_INFO("emc1403", 0x4c), 154 }, 155 { /* 156 * CPU EEPROM 157 * CP035 family: CPU board 158 * CP505 family: bridge board 159 * CP520 family: carrier board 160 */ 161 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR), 162 }, 163 { /* interface board EEPROM */ 164 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 1), 165 }, 166 { /* 167 * EEPROM (optional) 168 * CP505 family: CPU board 169 * CP520 family: MMI board 170 */ 171 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 2), 172 }, 173 { /* extension module 0 EEPROM (optional) */ 174 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 3), 175 }, 176 { /* extension module 1 EEPROM (optional) */ 177 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 4), 178 }, 179 { /* extension module 2 EEPROM (optional) */ 180 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 5), 181 }, 182 { /* extension module 3 EEPROM (optional) */ 183 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 6), 184 } 185 }; 186 187 /* SPI devices */ 188 static struct mtd_partition cp500_partitions[] = { 189 { 190 .name = "system-flash-parts", 191 .size = MTDPART_SIZ_FULL, 192 .offset = 0, 193 .mask_flags = 0 194 } 195 }; 196 static const struct flash_platform_data cp500_w25q32 = { 197 .type = "w25q32", 198 .name = "system-flash", 199 .parts = cp500_partitions, 200 .nr_parts = ARRAY_SIZE(cp500_partitions), 201 }; 202 static const struct flash_platform_data cp500_m25p16 = { 203 .type = "m25p16", 204 .name = "system-flash", 205 .parts = cp500_partitions, 206 .nr_parts = ARRAY_SIZE(cp500_partitions), 207 }; 208 static struct spi_board_info cp500_spi_info[] = { 209 { /* system FPGA configuration bitstream flash */ 210 .modalias = "m25p80", 211 .platform_data = &cp500_m25p16, 212 .max_speed_hz = CP500_FLASH_HZ, 213 .chip_select = 0, 214 .mode = SPI_MODE_3, 215 }, { /* LAN9252 EtherCAT slave controller */ 216 .modalias = "lan9252", 217 .platform_data = NULL, 218 .max_speed_hz = CP500_LAN9252_HZ, 219 .chip_select = 1, 220 .mode = SPI_MODE_3, 221 } 222 }; 223 224 static ssize_t cp500_get_fpga_version(struct cp500 *cp500, char *buf, 225 size_t max_len) 226 { 227 int n; 228 229 if (CP500_IS_CP035(cp500)) 230 n = scnprintf(buf, max_len, "CP035"); 231 else if (CP500_IS_CP505(cp500)) 232 n = scnprintf(buf, max_len, "CP505"); 233 else 234 n = scnprintf(buf, max_len, "CP500"); 235 236 n += scnprintf(buf + n, max_len - n, "_FPGA_%d.%02d", 237 cp500->version.major, cp500->version.minor); 238 239 /* test versions have test bit set */ 240 if (cp500->version.build & CP500_BUILD_TEST) 241 n += scnprintf(buf + n, max_len - n, "Test%d", 242 cp500->version.build & ~CP500_BUILD_TEST); 243 244 n += scnprintf(buf + n, max_len - n, "\n"); 245 246 return n; 247 } 248 249 static ssize_t version_show(struct device *dev, struct device_attribute *attr, 250 char *buf) 251 { 252 struct cp500 *cp500 = dev_get_drvdata(dev); 253 254 return cp500_get_fpga_version(cp500, buf, PAGE_SIZE); 255 } 256 static DEVICE_ATTR_RO(version); 257 258 static ssize_t keep_cfg_show(struct device *dev, struct device_attribute *attr, 259 char *buf) 260 { 261 struct cp500 *cp500 = dev_get_drvdata(dev); 262 unsigned long keep_cfg = 1; 263 264 /* 265 * FPGA configuration stream is kept during reset when RECONFIG bit is 266 * zero 267 */ 268 if (ioread8(cp500->system_startup_addr + CP500_RECONFIG_REG) & 269 CP500_RECFG_REQ) 270 keep_cfg = 0; 271 272 return sysfs_emit(buf, "%lu\n", keep_cfg); 273 } 274 275 static ssize_t keep_cfg_store(struct device *dev, struct device_attribute *attr, 276 const char *buf, size_t count) 277 { 278 struct cp500 *cp500 = dev_get_drvdata(dev); 279 unsigned long keep_cfg; 280 281 if (kstrtoul(buf, 10, &keep_cfg) < 0) 282 return -EINVAL; 283 284 /* 285 * In normal operation "keep_cfg" is "1". This means that the FPGA keeps 286 * its configuration stream during a reset. 287 * In case of a firmware update of the FPGA, the configuration stream 288 * needs to be reloaded. This can be done without a powercycle by 289 * writing a "0" into the "keep_cfg" attribute. After a reset/reboot th 290 * new configuration stream will be loaded. 291 */ 292 if (keep_cfg) 293 iowrite8(0, cp500->system_startup_addr + CP500_RECONFIG_REG); 294 else 295 iowrite8(CP500_RECFG_REQ, 296 cp500->system_startup_addr + CP500_RECONFIG_REG); 297 298 return count; 299 } 300 static DEVICE_ATTR_RW(keep_cfg); 301 302 static struct attribute *cp500_attrs[] = { 303 &dev_attr_version.attr, 304 &dev_attr_keep_cfg.attr, 305 NULL 306 }; 307 ATTRIBUTE_GROUPS(cp500); 308 309 static void cp500_i2c_release(struct device *dev) 310 { 311 struct keba_i2c_auxdev *i2c = 312 container_of(dev, struct keba_i2c_auxdev, auxdev.dev); 313 314 kfree(i2c); 315 } 316 317 static int cp500_register_i2c(struct cp500 *cp500) 318 { 319 int ret; 320 321 cp500->i2c = kzalloc(sizeof(*cp500->i2c), GFP_KERNEL); 322 if (!cp500->i2c) 323 return -ENOMEM; 324 325 cp500->i2c->auxdev.name = "i2c"; 326 cp500->i2c->auxdev.id = 0; 327 cp500->i2c->auxdev.dev.release = cp500_i2c_release; 328 cp500->i2c->auxdev.dev.parent = &cp500->pci_dev->dev; 329 cp500->i2c->io = (struct resource) { 330 /* I2C register area */ 331 .start = (resource_size_t) cp500->sys_hwbase + 332 cp500->devs->i2c.offset, 333 .end = (resource_size_t) cp500->sys_hwbase + 334 cp500->devs->i2c.offset + 335 cp500->devs->i2c.size - 1, 336 .flags = IORESOURCE_MEM, 337 }; 338 cp500->i2c->info_size = ARRAY_SIZE(cp500_i2c_info); 339 cp500->i2c->info = cp500_i2c_info; 340 341 ret = auxiliary_device_init(&cp500->i2c->auxdev); 342 if (ret) { 343 kfree(cp500->i2c); 344 cp500->i2c = NULL; 345 346 return ret; 347 } 348 ret = __auxiliary_device_add(&cp500->i2c->auxdev, "keba"); 349 if (ret) { 350 auxiliary_device_uninit(&cp500->i2c->auxdev); 351 cp500->i2c = NULL; 352 353 return ret; 354 } 355 356 return 0; 357 } 358 359 static void cp500_spi_release(struct device *dev) 360 { 361 struct keba_spi_auxdev *spi = 362 container_of(dev, struct keba_spi_auxdev, auxdev.dev); 363 364 kfree(spi); 365 } 366 367 static int cp500_register_spi(struct cp500 *cp500, u8 esc_type) 368 { 369 int info_size; 370 int ret; 371 372 cp500->spi = kzalloc(sizeof(*cp500->spi), GFP_KERNEL); 373 if (!cp500->spi) 374 return -ENOMEM; 375 376 if (CP500_IS_CP035(cp500)) 377 cp500_spi_info[0].platform_data = &cp500_w25q32; 378 if (esc_type == CP500_EEPROM_ESC_LAN9252) 379 info_size = ARRAY_SIZE(cp500_spi_info); 380 else 381 info_size = ARRAY_SIZE(cp500_spi_info) - 1; 382 383 cp500->spi->auxdev.name = "spi"; 384 cp500->spi->auxdev.id = 0; 385 cp500->spi->auxdev.dev.release = cp500_spi_release; 386 cp500->spi->auxdev.dev.parent = &cp500->pci_dev->dev; 387 cp500->spi->io = (struct resource) { 388 /* SPI register area */ 389 .start = (resource_size_t) cp500->sys_hwbase + 390 cp500->devs->spi.offset, 391 .end = (resource_size_t) cp500->sys_hwbase + 392 cp500->devs->spi.offset + 393 cp500->devs->spi.size - 1, 394 .flags = IORESOURCE_MEM, 395 }; 396 cp500->spi->info_size = info_size; 397 cp500->spi->info = cp500_spi_info; 398 399 ret = auxiliary_device_init(&cp500->spi->auxdev); 400 if (ret) { 401 kfree(cp500->spi); 402 cp500->spi = NULL; 403 404 return ret; 405 } 406 ret = __auxiliary_device_add(&cp500->spi->auxdev, "keba"); 407 if (ret) { 408 auxiliary_device_uninit(&cp500->spi->auxdev); 409 cp500->spi = NULL; 410 411 return ret; 412 } 413 414 return 0; 415 } 416 417 static void cp500_fan_release(struct device *dev) 418 { 419 struct keba_fan_auxdev *fan = 420 container_of(dev, struct keba_fan_auxdev, auxdev.dev); 421 422 kfree(fan); 423 } 424 425 static int cp500_register_fan(struct cp500 *cp500) 426 { 427 int ret; 428 429 cp500->fan = kzalloc(sizeof(*cp500->fan), GFP_KERNEL); 430 if (!cp500->fan) 431 return -ENOMEM; 432 433 cp500->fan->auxdev.name = "fan"; 434 cp500->fan->auxdev.id = 0; 435 cp500->fan->auxdev.dev.release = cp500_fan_release; 436 cp500->fan->auxdev.dev.parent = &cp500->pci_dev->dev; 437 cp500->fan->io = (struct resource) { 438 /* fan register area */ 439 .start = (resource_size_t) cp500->sys_hwbase + 440 cp500->devs->fan.offset, 441 .end = (resource_size_t) cp500->sys_hwbase + 442 cp500->devs->fan.offset + 443 cp500->devs->fan.size - 1, 444 .flags = IORESOURCE_MEM, 445 }; 446 447 ret = auxiliary_device_init(&cp500->fan->auxdev); 448 if (ret) { 449 kfree(cp500->fan); 450 cp500->fan = NULL; 451 452 return ret; 453 } 454 ret = __auxiliary_device_add(&cp500->fan->auxdev, "keba"); 455 if (ret) { 456 auxiliary_device_uninit(&cp500->fan->auxdev); 457 cp500->fan = NULL; 458 459 return ret; 460 } 461 462 return 0; 463 } 464 465 static void cp500_batt_release(struct device *dev) 466 { 467 struct keba_batt_auxdev *fan = 468 container_of(dev, struct keba_batt_auxdev, auxdev.dev); 469 470 kfree(fan); 471 } 472 473 static int cp500_register_batt(struct cp500 *cp500) 474 { 475 int ret; 476 477 cp500->batt = kzalloc(sizeof(*cp500->batt), GFP_KERNEL); 478 if (!cp500->batt) 479 return -ENOMEM; 480 481 cp500->batt->auxdev.name = "batt"; 482 cp500->batt->auxdev.id = 0; 483 cp500->batt->auxdev.dev.release = cp500_batt_release; 484 cp500->batt->auxdev.dev.parent = &cp500->pci_dev->dev; 485 cp500->batt->io = (struct resource) { 486 /* battery register area */ 487 .start = (resource_size_t) cp500->sys_hwbase + 488 cp500->devs->batt.offset, 489 .end = (resource_size_t) cp500->sys_hwbase + 490 cp500->devs->batt.offset + 491 cp500->devs->batt.size - 1, 492 .flags = IORESOURCE_MEM, 493 }; 494 495 ret = auxiliary_device_init(&cp500->batt->auxdev); 496 if (ret) { 497 kfree(cp500->batt); 498 cp500->batt = NULL; 499 500 return ret; 501 } 502 ret = __auxiliary_device_add(&cp500->batt->auxdev, "keba"); 503 if (ret) { 504 auxiliary_device_uninit(&cp500->batt->auxdev); 505 cp500->batt = NULL; 506 507 return ret; 508 } 509 510 return 0; 511 } 512 513 static int cp500_nvmem_read(void *priv, unsigned int offset, void *val, 514 size_t bytes) 515 { 516 struct cp500_nvmem *nvmem = priv; 517 int ret; 518 519 ret = nvmem_device_read(nvmem->nvmem, nvmem->offset + offset, bytes, 520 val); 521 if (ret != bytes) 522 return ret; 523 524 return 0; 525 } 526 527 static int cp500_nvmem_write(void *priv, unsigned int offset, void *val, 528 size_t bytes) 529 { 530 struct cp500_nvmem *nvmem = priv; 531 int ret; 532 533 ret = nvmem_device_write(nvmem->nvmem, nvmem->offset + offset, bytes, 534 val); 535 if (ret != bytes) 536 return ret; 537 538 return 0; 539 } 540 541 static int cp500_nvmem_register(struct cp500 *cp500, struct nvmem_device *nvmem) 542 { 543 struct device *dev = &cp500->pci_dev->dev; 544 struct nvmem_config nvmem_config = {}; 545 struct nvmem_device *tmp; 546 547 /* 548 * The main EEPROM of CP500 devices is logically split into two EEPROMs. 549 * The first logical EEPROM with 3 kB contains the type label which is 550 * programmed during production of the device. The second logical EEPROM 551 * with 1 kB is not programmed during production and can be used for 552 * arbitrary user data. 553 */ 554 555 nvmem_config.dev = dev; 556 nvmem_config.owner = THIS_MODULE; 557 nvmem_config.id = NVMEM_DEVID_NONE; 558 nvmem_config.type = NVMEM_TYPE_EEPROM; 559 nvmem_config.root_only = true; 560 nvmem_config.reg_read = cp500_nvmem_read; 561 nvmem_config.reg_write = cp500_nvmem_write; 562 563 cp500->nvmem_cpu.nvmem = nvmem; 564 cp500->nvmem_cpu.offset = CP500_EEPROM_CPU_OFFSET; 565 nvmem_config.name = CP500_EEPROM_CPU_NAME; 566 nvmem_config.size = CP500_EEPROM_CPU_SIZE; 567 nvmem_config.priv = &cp500->nvmem_cpu; 568 tmp = devm_nvmem_register(dev, &nvmem_config); 569 if (IS_ERR(tmp)) 570 return PTR_ERR(tmp); 571 572 cp500->nvmem_user.nvmem = nvmem; 573 cp500->nvmem_user.offset = CP500_EEPROM_USER_OFFSET; 574 nvmem_config.name = CP500_EEPROM_USER_NAME; 575 nvmem_config.size = CP500_EEPROM_USER_SIZE; 576 nvmem_config.priv = &cp500->nvmem_user; 577 tmp = devm_nvmem_register(dev, &nvmem_config); 578 if (IS_ERR(tmp)) 579 return PTR_ERR(tmp); 580 581 return 0; 582 } 583 584 static int cp500_nvmem_match(struct device *dev, const void *data) 585 { 586 const struct cp500 *cp500 = data; 587 struct i2c_client *client; 588 589 /* match only CPU EEPROM below the cp500 device */ 590 dev = dev->parent; 591 client = i2c_verify_client(dev); 592 if (!client || client->addr != CP500_EEPROM_ADDR) 593 return 0; 594 while ((dev = dev->parent)) 595 if (dev == &cp500->pci_dev->dev) 596 return 1; 597 598 return 0; 599 } 600 601 static void cp500_devm_nvmem_put(void *data) 602 { 603 struct nvmem_device *nvmem = data; 604 605 nvmem_device_put(nvmem); 606 } 607 608 static int cp500_nvmem(struct notifier_block *nb, unsigned long action, 609 void *data) 610 { 611 struct nvmem_device *nvmem; 612 struct cp500 *cp500; 613 struct device *dev; 614 int notified; 615 u8 esc_type; 616 int ret; 617 618 if (action != NVMEM_ADD) 619 return NOTIFY_DONE; 620 cp500 = container_of(nb, struct cp500, nvmem_notifier); 621 dev = &cp500->pci_dev->dev; 622 623 /* process CPU EEPROM content only once */ 624 notified = atomic_read(&cp500->nvmem_notified); 625 if (notified) 626 return NOTIFY_DONE; 627 nvmem = nvmem_device_find(cp500, cp500_nvmem_match); 628 if (IS_ERR_OR_NULL(nvmem)) 629 return NOTIFY_DONE; 630 if (!atomic_try_cmpxchg_relaxed(&cp500->nvmem_notified, ¬ified, 1)) { 631 nvmem_device_put(nvmem); 632 633 return NOTIFY_DONE; 634 } 635 636 ret = devm_add_action_or_reset(dev, cp500_devm_nvmem_put, nvmem); 637 if (ret) 638 return ret; 639 640 ret = cp500_nvmem_register(cp500, nvmem); 641 if (ret) 642 return ret; 643 644 ret = nvmem_device_read(nvmem, CP500_EEPROM_DA_OFFSET, sizeof(esc_type), 645 (void *)&esc_type); 646 if (ret != sizeof(esc_type)) { 647 dev_warn(dev, "Failed to read device assembly!\n"); 648 649 return NOTIFY_DONE; 650 } 651 esc_type &= CP500_EEPROM_DA_ESC_TYPE_MASK; 652 653 if (cp500_register_spi(cp500, esc_type)) 654 dev_warn(dev, "Failed to register SPI!\n"); 655 656 return NOTIFY_OK; 657 } 658 659 static void cp500_register_auxiliary_devs(struct cp500 *cp500) 660 { 661 struct device *dev = &cp500->pci_dev->dev; 662 u8 present = ioread8(cp500->system_startup_addr + CP500_PRESENT_REG); 663 664 if (cp500_register_i2c(cp500)) 665 dev_warn(dev, "Failed to register I2C!\n"); 666 if (present & CP500_PRESENT_FAN0) 667 if (cp500_register_fan(cp500)) 668 dev_warn(dev, "Failed to register fan!\n"); 669 if (cp500_register_batt(cp500)) 670 dev_warn(dev, "Failed to register battery!\n"); 671 } 672 673 static void cp500_unregister_dev(struct auxiliary_device *auxdev) 674 { 675 auxiliary_device_delete(auxdev); 676 auxiliary_device_uninit(auxdev); 677 } 678 679 static void cp500_unregister_auxiliary_devs(struct cp500 *cp500) 680 { 681 if (cp500->spi) { 682 cp500_unregister_dev(&cp500->spi->auxdev); 683 cp500->spi = NULL; 684 } 685 if (cp500->i2c) { 686 cp500_unregister_dev(&cp500->i2c->auxdev); 687 cp500->i2c = NULL; 688 } 689 if (cp500->fan) { 690 cp500_unregister_dev(&cp500->fan->auxdev); 691 cp500->fan = NULL; 692 } 693 if (cp500->batt) { 694 cp500_unregister_dev(&cp500->batt->auxdev); 695 cp500->batt = NULL; 696 } 697 } 698 699 static irqreturn_t cp500_axi_handler(int irq, void *dev) 700 { 701 struct cp500 *cp500 = dev; 702 u32 axi_address = ioread32(cp500->system_startup_addr + CP500_AXI_REG); 703 704 /* 705 * FPGA signals AXI response error, print AXI address to indicate which 706 * IP core was affected 707 */ 708 dev_err(&cp500->pci_dev->dev, "AXI response error at 0x%08x\n", 709 axi_address); 710 711 return IRQ_HANDLED; 712 } 713 714 static int cp500_enable(struct cp500 *cp500) 715 { 716 int axi_irq = -1; 717 int ret; 718 719 if (cp500->msix_num > CP500_NUM_MSIX_NO_AXI) { 720 axi_irq = pci_irq_vector(cp500->pci_dev, CP500_AXI_MSIX); 721 ret = request_irq(axi_irq, cp500_axi_handler, 0, 722 CP500, cp500); 723 if (ret != 0) { 724 dev_err(&cp500->pci_dev->dev, 725 "Failed to register AXI response error!\n"); 726 return ret; 727 } 728 } 729 730 return 0; 731 } 732 733 static void cp500_disable(struct cp500 *cp500) 734 { 735 int axi_irq; 736 737 if (cp500->msix_num > CP500_NUM_MSIX_NO_AXI) { 738 axi_irq = pci_irq_vector(cp500->pci_dev, CP500_AXI_MSIX); 739 free_irq(axi_irq, cp500); 740 } 741 } 742 743 static int cp500_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) 744 { 745 struct device *dev = &pci_dev->dev; 746 struct resource startup; 747 struct cp500 *cp500; 748 u32 cp500_vers; 749 char buf[64]; 750 int ret; 751 752 cp500 = devm_kzalloc(dev, sizeof(*cp500), GFP_KERNEL); 753 if (!cp500) 754 return -ENOMEM; 755 cp500->pci_dev = pci_dev; 756 cp500->sys_hwbase = pci_resource_start(pci_dev, CP500_SYS_BAR); 757 cp500->ecm_hwbase = pci_resource_start(pci_dev, CP500_ECM_BAR); 758 if (!cp500->sys_hwbase || !cp500->ecm_hwbase) 759 return -ENODEV; 760 761 if (CP500_IS_CP035(cp500)) 762 cp500->devs = &cp035_devices; 763 else if (CP500_IS_CP505(cp500)) 764 cp500->devs = &cp505_devices; 765 else if (CP500_IS_CP520(cp500)) 766 cp500->devs = &cp520_devices; 767 else 768 return -ENODEV; 769 770 ret = pci_enable_device(pci_dev); 771 if (ret) 772 return ret; 773 pci_set_master(pci_dev); 774 775 startup = *pci_resource_n(pci_dev, CP500_SYS_BAR); 776 startup.end = startup.start + cp500->devs->startup.size - 1; 777 cp500->system_startup_addr = devm_ioremap_resource(&pci_dev->dev, 778 &startup); 779 if (IS_ERR(cp500->system_startup_addr)) { 780 ret = PTR_ERR(cp500->system_startup_addr); 781 goto out_disable; 782 } 783 784 cp500->msix_num = pci_alloc_irq_vectors(pci_dev, CP500_NUM_MSIX_NO_MMI, 785 CP500_NUM_MSIX, PCI_IRQ_MSIX); 786 if (cp500->msix_num < CP500_NUM_MSIX_NO_MMI) { 787 dev_err(&pci_dev->dev, 788 "Hardware does not support enough MSI-X interrupts\n"); 789 ret = -ENODEV; 790 goto out_disable; 791 } 792 793 cp500_vers = ioread32(cp500->system_startup_addr + CP500_VERSION_REG); 794 cp500->version.major = (cp500_vers & 0xff); 795 cp500->version.minor = (cp500_vers >> 8) & 0xff; 796 cp500->version.build = (cp500_vers >> 16) & 0xffff; 797 cp500_get_fpga_version(cp500, buf, sizeof(buf)); 798 799 dev_info(&pci_dev->dev, "FPGA version %s", buf); 800 801 pci_set_drvdata(pci_dev, cp500); 802 803 cp500->nvmem_notifier.notifier_call = cp500_nvmem; 804 ret = nvmem_register_notifier(&cp500->nvmem_notifier); 805 if (ret != 0) 806 goto out_free_irq; 807 808 ret = cp500_enable(cp500); 809 if (ret != 0) 810 goto out_unregister_nvmem; 811 812 cp500_register_auxiliary_devs(cp500); 813 814 return 0; 815 816 out_unregister_nvmem: 817 nvmem_unregister_notifier(&cp500->nvmem_notifier); 818 out_free_irq: 819 pci_free_irq_vectors(pci_dev); 820 out_disable: 821 pci_clear_master(pci_dev); 822 pci_disable_device(pci_dev); 823 824 return ret; 825 } 826 827 static void cp500_remove(struct pci_dev *pci_dev) 828 { 829 struct cp500 *cp500 = pci_get_drvdata(pci_dev); 830 831 cp500_unregister_auxiliary_devs(cp500); 832 833 cp500_disable(cp500); 834 835 nvmem_unregister_notifier(&cp500->nvmem_notifier); 836 837 pci_set_drvdata(pci_dev, 0); 838 839 pci_free_irq_vectors(pci_dev); 840 841 pci_clear_master(pci_dev); 842 pci_disable_device(pci_dev); 843 } 844 845 static struct pci_device_id cp500_ids[] = { 846 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP035) }, 847 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP505) }, 848 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP520) }, 849 { } 850 }; 851 MODULE_DEVICE_TABLE(pci, cp500_ids); 852 853 static struct pci_driver cp500_driver = { 854 .name = CP500, 855 .id_table = cp500_ids, 856 .probe = cp500_probe, 857 .remove = cp500_remove, 858 .dev_groups = cp500_groups, 859 }; 860 module_pci_driver(cp500_driver); 861 862 MODULE_AUTHOR("Gerhard Engleder <eg@keba.com>"); 863 MODULE_DESCRIPTION("KEBA CP500 system FPGA driver"); 864 MODULE_LICENSE("GPL"); 865