1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) KEBA Industrial Automation Gmbh 2024 4 * 5 * Driver for KEBA system FPGA 6 * 7 * The KEBA system FPGA implements various devices. This driver registers 8 * auxiliary devices for every device within the FPGA. 9 */ 10 11 #include <linux/device.h> 12 #include <linux/i2c.h> 13 #include <linux/misc/keba.h> 14 #include <linux/module.h> 15 #include <linux/mtd/partitions.h> 16 #include <linux/nvmem-consumer.h> 17 #include <linux/pci.h> 18 #include <linux/spi/flash.h> 19 #include <linux/spi/spi.h> 20 21 #define CP500 "cp500" 22 23 #define PCI_VENDOR_ID_KEBA 0xCEBA 24 #define PCI_DEVICE_ID_KEBA_CP035 0x2706 25 #define PCI_DEVICE_ID_KEBA_CP505 0x2703 26 #define PCI_DEVICE_ID_KEBA_CP520 0x2696 27 28 #define CP500_SYS_BAR 0 29 #define CP500_ECM_BAR 1 30 31 /* BAR 0 registers */ 32 #define CP500_VERSION_REG 0x00 33 #define CP500_RECONFIG_REG 0x11 /* upper 8-bits of STARTUP register */ 34 #define CP500_AXI_REG 0x40 35 36 /* Bits in BUILD_REG */ 37 #define CP500_BUILD_TEST 0x8000 /* FPGA test version */ 38 39 /* Bits in RECONFIG_REG */ 40 #define CP500_RECFG_REQ 0x01 /* reconfigure FPGA on next reset */ 41 42 /* MSIX */ 43 #define CP500_AXI_MSIX 3 44 #define CP500_NUM_MSIX 8 45 #define CP500_NUM_MSIX_NO_MMI 2 46 #define CP500_NUM_MSIX_NO_AXI 3 47 48 /* EEPROM */ 49 #define CP500_HW_CPU_EEPROM_NAME "cp500_cpu_eeprom" 50 #define CP500_EEPROM_DA_OFFSET 0x016F 51 #define CP500_EEPROM_DA_ESC_TYPE_MASK 0x01 52 #define CP500_EEPROM_ESC_LAN9252 0x00 53 #define CP500_EEPROM_ESC_ET1100 0x01 54 55 /* SPI flash running at full speed */ 56 #define CP500_FLASH_HZ (33 * 1000 * 1000) 57 58 /* LAN9252 */ 59 #define CP500_LAN9252_HZ (10 * 1000 * 1000) 60 61 #define CP500_IS_CP035(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP035) 62 #define CP500_IS_CP505(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP505) 63 #define CP500_IS_CP520(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP520) 64 65 struct cp500_dev_info { 66 off_t offset; 67 size_t size; 68 }; 69 70 struct cp500_devs { 71 struct cp500_dev_info startup; 72 struct cp500_dev_info spi; 73 struct cp500_dev_info i2c; 74 }; 75 76 /* list of devices within FPGA of CP035 family (CP035, CP056, CP057) */ 77 static struct cp500_devs cp035_devices = { 78 .startup = { 0x0000, SZ_4K }, 79 .spi = { 0x1000, SZ_4K }, 80 .i2c = { 0x4000, SZ_4K }, 81 }; 82 83 /* list of devices within FPGA of CP505 family (CP503, CP505, CP507) */ 84 static struct cp500_devs cp505_devices = { 85 .startup = { 0x0000, SZ_4K }, 86 .spi = { 0x4000, SZ_4K }, 87 .i2c = { 0x5000, SZ_4K }, 88 }; 89 90 /* list of devices within FPGA of CP520 family (CP520, CP530) */ 91 static struct cp500_devs cp520_devices = { 92 .startup = { 0x0000, SZ_4K }, 93 .spi = { 0x4000, SZ_4K }, 94 .i2c = { 0x5000, SZ_4K }, 95 }; 96 97 struct cp500 { 98 struct pci_dev *pci_dev; 99 struct cp500_devs *devs; 100 int msix_num; 101 struct { 102 int major; 103 int minor; 104 int build; 105 } version; 106 struct notifier_block nvmem_notifier; 107 atomic_t nvmem_notified; 108 109 /* system FPGA BAR */ 110 resource_size_t sys_hwbase; 111 struct keba_spi_auxdev *spi; 112 struct keba_i2c_auxdev *i2c; 113 114 /* ECM EtherCAT BAR */ 115 resource_size_t ecm_hwbase; 116 117 void __iomem *system_startup_addr; 118 }; 119 120 /* I2C devices */ 121 #define CP500_EEPROM_ADDR 0x50 122 static struct i2c_board_info cp500_i2c_info[] = { 123 { /* temperature sensor */ 124 I2C_BOARD_INFO("emc1403", 0x4c), 125 }, 126 { /* 127 * CPU EEPROM 128 * CP035 family: CPU board 129 * CP505 family: bridge board 130 * CP520 family: carrier board 131 */ 132 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR), 133 .dev_name = CP500_HW_CPU_EEPROM_NAME, 134 }, 135 { /* interface board EEPROM */ 136 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 1), 137 }, 138 { /* 139 * EEPROM (optional) 140 * CP505 family: CPU board 141 * CP520 family: MMI board 142 */ 143 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 2), 144 }, 145 { /* extension module 0 EEPROM (optional) */ 146 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 3), 147 }, 148 { /* extension module 1 EEPROM (optional) */ 149 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 4), 150 }, 151 { /* extension module 2 EEPROM (optional) */ 152 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 5), 153 }, 154 { /* extension module 3 EEPROM (optional) */ 155 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 6), 156 } 157 }; 158 159 /* SPI devices */ 160 static struct mtd_partition cp500_partitions[] = { 161 { 162 .name = "system-flash-parts", 163 .size = MTDPART_SIZ_FULL, 164 .offset = 0, 165 .mask_flags = 0 166 } 167 }; 168 static const struct flash_platform_data cp500_w25q32 = { 169 .type = "w25q32", 170 .name = "system-flash", 171 .parts = cp500_partitions, 172 .nr_parts = ARRAY_SIZE(cp500_partitions), 173 }; 174 static const struct flash_platform_data cp500_m25p16 = { 175 .type = "m25p16", 176 .name = "system-flash", 177 .parts = cp500_partitions, 178 .nr_parts = ARRAY_SIZE(cp500_partitions), 179 }; 180 static struct spi_board_info cp500_spi_info[] = { 181 { /* system FPGA configuration bitstream flash */ 182 .modalias = "m25p80", 183 .platform_data = &cp500_m25p16, 184 .max_speed_hz = CP500_FLASH_HZ, 185 .chip_select = 0, 186 .mode = SPI_MODE_3, 187 }, { /* LAN9252 EtherCAT slave controller */ 188 .modalias = "lan9252", 189 .platform_data = NULL, 190 .max_speed_hz = CP500_LAN9252_HZ, 191 .chip_select = 1, 192 .mode = SPI_MODE_3, 193 } 194 }; 195 196 static ssize_t cp500_get_fpga_version(struct cp500 *cp500, char *buf, 197 size_t max_len) 198 { 199 int n; 200 201 if (CP500_IS_CP035(cp500)) 202 n = scnprintf(buf, max_len, "CP035"); 203 else if (CP500_IS_CP505(cp500)) 204 n = scnprintf(buf, max_len, "CP505"); 205 else 206 n = scnprintf(buf, max_len, "CP500"); 207 208 n += scnprintf(buf + n, max_len - n, "_FPGA_%d.%02d", 209 cp500->version.major, cp500->version.minor); 210 211 /* test versions have test bit set */ 212 if (cp500->version.build & CP500_BUILD_TEST) 213 n += scnprintf(buf + n, max_len - n, "Test%d", 214 cp500->version.build & ~CP500_BUILD_TEST); 215 216 n += scnprintf(buf + n, max_len - n, "\n"); 217 218 return n; 219 } 220 221 static ssize_t version_show(struct device *dev, struct device_attribute *attr, 222 char *buf) 223 { 224 struct cp500 *cp500 = dev_get_drvdata(dev); 225 226 return cp500_get_fpga_version(cp500, buf, PAGE_SIZE); 227 } 228 static DEVICE_ATTR_RO(version); 229 230 static ssize_t keep_cfg_show(struct device *dev, struct device_attribute *attr, 231 char *buf) 232 { 233 struct cp500 *cp500 = dev_get_drvdata(dev); 234 unsigned long keep_cfg = 1; 235 236 /* 237 * FPGA configuration stream is kept during reset when RECONFIG bit is 238 * zero 239 */ 240 if (ioread8(cp500->system_startup_addr + CP500_RECONFIG_REG) & 241 CP500_RECFG_REQ) 242 keep_cfg = 0; 243 244 return sysfs_emit(buf, "%lu\n", keep_cfg); 245 } 246 247 static ssize_t keep_cfg_store(struct device *dev, struct device_attribute *attr, 248 const char *buf, size_t count) 249 { 250 struct cp500 *cp500 = dev_get_drvdata(dev); 251 unsigned long keep_cfg; 252 253 if (kstrtoul(buf, 10, &keep_cfg) < 0) 254 return -EINVAL; 255 256 /* 257 * In normal operation "keep_cfg" is "1". This means that the FPGA keeps 258 * its configuration stream during a reset. 259 * In case of a firmware update of the FPGA, the configuration stream 260 * needs to be reloaded. This can be done without a powercycle by 261 * writing a "0" into the "keep_cfg" attribute. After a reset/reboot th 262 * new configuration stream will be loaded. 263 */ 264 if (keep_cfg) 265 iowrite8(0, cp500->system_startup_addr + CP500_RECONFIG_REG); 266 else 267 iowrite8(CP500_RECFG_REQ, 268 cp500->system_startup_addr + CP500_RECONFIG_REG); 269 270 return count; 271 } 272 static DEVICE_ATTR_RW(keep_cfg); 273 274 static struct attribute *cp500_attrs[] = { 275 &dev_attr_version.attr, 276 &dev_attr_keep_cfg.attr, 277 NULL 278 }; 279 ATTRIBUTE_GROUPS(cp500); 280 281 static void cp500_i2c_release(struct device *dev) 282 { 283 struct keba_i2c_auxdev *i2c = 284 container_of(dev, struct keba_i2c_auxdev, auxdev.dev); 285 286 kfree(i2c); 287 } 288 289 static int cp500_register_i2c(struct cp500 *cp500) 290 { 291 int ret; 292 293 cp500->i2c = kzalloc(sizeof(*cp500->i2c), GFP_KERNEL); 294 if (!cp500->i2c) 295 return -ENOMEM; 296 297 cp500->i2c->auxdev.name = "i2c"; 298 cp500->i2c->auxdev.id = 0; 299 cp500->i2c->auxdev.dev.release = cp500_i2c_release; 300 cp500->i2c->auxdev.dev.parent = &cp500->pci_dev->dev; 301 cp500->i2c->io = (struct resource) { 302 /* I2C register area */ 303 .start = (resource_size_t) cp500->sys_hwbase + 304 cp500->devs->i2c.offset, 305 .end = (resource_size_t) cp500->sys_hwbase + 306 cp500->devs->i2c.offset + 307 cp500->devs->i2c.size - 1, 308 .flags = IORESOURCE_MEM, 309 }; 310 cp500->i2c->info_size = ARRAY_SIZE(cp500_i2c_info); 311 cp500->i2c->info = cp500_i2c_info; 312 313 ret = auxiliary_device_init(&cp500->i2c->auxdev); 314 if (ret) { 315 kfree(cp500->i2c); 316 cp500->i2c = NULL; 317 318 return ret; 319 } 320 ret = __auxiliary_device_add(&cp500->i2c->auxdev, "keba"); 321 if (ret) { 322 auxiliary_device_uninit(&cp500->i2c->auxdev); 323 cp500->i2c = NULL; 324 325 return ret; 326 } 327 328 return 0; 329 } 330 331 static void cp500_spi_release(struct device *dev) 332 { 333 struct keba_spi_auxdev *spi = 334 container_of(dev, struct keba_spi_auxdev, auxdev.dev); 335 336 kfree(spi); 337 } 338 339 static int cp500_register_spi(struct cp500 *cp500, u8 esc_type) 340 { 341 int info_size; 342 int ret; 343 344 cp500->spi = kzalloc(sizeof(*cp500->spi), GFP_KERNEL); 345 if (!cp500->spi) 346 return -ENOMEM; 347 348 if (CP500_IS_CP035(cp500)) 349 cp500_spi_info[0].platform_data = &cp500_w25q32; 350 if (esc_type == CP500_EEPROM_ESC_LAN9252) 351 info_size = ARRAY_SIZE(cp500_spi_info); 352 else 353 info_size = ARRAY_SIZE(cp500_spi_info) - 1; 354 355 cp500->spi->auxdev.name = "spi"; 356 cp500->spi->auxdev.id = 0; 357 cp500->spi->auxdev.dev.release = cp500_spi_release; 358 cp500->spi->auxdev.dev.parent = &cp500->pci_dev->dev; 359 cp500->spi->io = (struct resource) { 360 /* SPI register area */ 361 .start = (resource_size_t) cp500->sys_hwbase + 362 cp500->devs->spi.offset, 363 .end = (resource_size_t) cp500->sys_hwbase + 364 cp500->devs->spi.offset + 365 cp500->devs->spi.size - 1, 366 .flags = IORESOURCE_MEM, 367 }; 368 cp500->spi->info_size = info_size; 369 cp500->spi->info = cp500_spi_info; 370 371 ret = auxiliary_device_init(&cp500->spi->auxdev); 372 if (ret) { 373 kfree(cp500->spi); 374 cp500->spi = NULL; 375 376 return ret; 377 } 378 ret = __auxiliary_device_add(&cp500->spi->auxdev, "keba"); 379 if (ret) { 380 auxiliary_device_uninit(&cp500->spi->auxdev); 381 cp500->spi = NULL; 382 383 return ret; 384 } 385 386 return 0; 387 } 388 389 static int cp500_nvmem_match(struct device *dev, const void *data) 390 { 391 const struct cp500 *cp500 = data; 392 struct i2c_client *client; 393 394 /* match only CPU EEPROM below the cp500 device */ 395 dev = dev->parent; 396 client = i2c_verify_client(dev); 397 if (!client || client->addr != CP500_EEPROM_ADDR) 398 return 0; 399 while ((dev = dev->parent)) 400 if (dev == &cp500->pci_dev->dev) 401 return 1; 402 403 return 0; 404 } 405 406 static int cp500_nvmem(struct notifier_block *nb, unsigned long action, 407 void *data) 408 { 409 struct nvmem_device *nvmem; 410 struct cp500 *cp500; 411 struct device *dev; 412 int notified; 413 u8 esc_type; 414 int ret; 415 416 if (action != NVMEM_ADD) 417 return NOTIFY_DONE; 418 cp500 = container_of(nb, struct cp500, nvmem_notifier); 419 dev = &cp500->pci_dev->dev; 420 421 /* process CPU EEPROM content only once */ 422 notified = atomic_read(&cp500->nvmem_notified); 423 if (notified) 424 return NOTIFY_DONE; 425 nvmem = nvmem_device_find(cp500, cp500_nvmem_match); 426 if (IS_ERR_OR_NULL(nvmem)) 427 return NOTIFY_DONE; 428 if (!atomic_try_cmpxchg_relaxed(&cp500->nvmem_notified, ¬ified, 1)) { 429 nvmem_device_put(nvmem); 430 431 return NOTIFY_DONE; 432 } 433 434 ret = nvmem_device_read(nvmem, CP500_EEPROM_DA_OFFSET, sizeof(esc_type), 435 (void *)&esc_type); 436 nvmem_device_put(nvmem); 437 if (ret != sizeof(esc_type)) { 438 dev_warn(dev, "Failed to read device assembly!\n"); 439 440 return NOTIFY_DONE; 441 } 442 esc_type &= CP500_EEPROM_DA_ESC_TYPE_MASK; 443 444 if (cp500_register_spi(cp500, esc_type)) 445 dev_warn(dev, "Failed to register SPI!\n"); 446 447 return NOTIFY_OK; 448 } 449 450 static void cp500_register_auxiliary_devs(struct cp500 *cp500) 451 { 452 struct device *dev = &cp500->pci_dev->dev; 453 454 if (cp500_register_i2c(cp500)) 455 dev_warn(dev, "Failed to register I2C!\n"); 456 } 457 458 static void cp500_unregister_dev(struct auxiliary_device *auxdev) 459 { 460 auxiliary_device_delete(auxdev); 461 auxiliary_device_uninit(auxdev); 462 } 463 464 static void cp500_unregister_auxiliary_devs(struct cp500 *cp500) 465 { 466 if (cp500->spi) { 467 cp500_unregister_dev(&cp500->spi->auxdev); 468 cp500->spi = NULL; 469 } 470 if (cp500->i2c) { 471 cp500_unregister_dev(&cp500->i2c->auxdev); 472 cp500->i2c = NULL; 473 } 474 } 475 476 static irqreturn_t cp500_axi_handler(int irq, void *dev) 477 { 478 struct cp500 *cp500 = dev; 479 u32 axi_address = ioread32(cp500->system_startup_addr + CP500_AXI_REG); 480 481 /* 482 * FPGA signals AXI response error, print AXI address to indicate which 483 * IP core was affected 484 */ 485 dev_err(&cp500->pci_dev->dev, "AXI response error at 0x%08x\n", 486 axi_address); 487 488 return IRQ_HANDLED; 489 } 490 491 static int cp500_enable(struct cp500 *cp500) 492 { 493 int axi_irq = -1; 494 int ret; 495 496 if (cp500->msix_num > CP500_NUM_MSIX_NO_AXI) { 497 axi_irq = pci_irq_vector(cp500->pci_dev, CP500_AXI_MSIX); 498 ret = request_irq(axi_irq, cp500_axi_handler, 0, 499 CP500, cp500); 500 if (ret != 0) { 501 dev_err(&cp500->pci_dev->dev, 502 "Failed to register AXI response error!\n"); 503 return ret; 504 } 505 } 506 507 return 0; 508 } 509 510 static void cp500_disable(struct cp500 *cp500) 511 { 512 int axi_irq; 513 514 if (cp500->msix_num > CP500_NUM_MSIX_NO_AXI) { 515 axi_irq = pci_irq_vector(cp500->pci_dev, CP500_AXI_MSIX); 516 free_irq(axi_irq, cp500); 517 } 518 } 519 520 static int cp500_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) 521 { 522 struct device *dev = &pci_dev->dev; 523 struct resource startup; 524 struct cp500 *cp500; 525 u32 cp500_vers; 526 char buf[64]; 527 int ret; 528 529 cp500 = devm_kzalloc(dev, sizeof(*cp500), GFP_KERNEL); 530 if (!cp500) 531 return -ENOMEM; 532 cp500->pci_dev = pci_dev; 533 cp500->sys_hwbase = pci_resource_start(pci_dev, CP500_SYS_BAR); 534 cp500->ecm_hwbase = pci_resource_start(pci_dev, CP500_ECM_BAR); 535 if (!cp500->sys_hwbase || !cp500->ecm_hwbase) 536 return -ENODEV; 537 538 if (CP500_IS_CP035(cp500)) 539 cp500->devs = &cp035_devices; 540 else if (CP500_IS_CP505(cp500)) 541 cp500->devs = &cp505_devices; 542 else if (CP500_IS_CP520(cp500)) 543 cp500->devs = &cp520_devices; 544 else 545 return -ENODEV; 546 547 ret = pci_enable_device(pci_dev); 548 if (ret) 549 return ret; 550 pci_set_master(pci_dev); 551 552 startup = *pci_resource_n(pci_dev, CP500_SYS_BAR); 553 startup.end = startup.start + cp500->devs->startup.size - 1; 554 cp500->system_startup_addr = devm_ioremap_resource(&pci_dev->dev, 555 &startup); 556 if (IS_ERR(cp500->system_startup_addr)) { 557 ret = PTR_ERR(cp500->system_startup_addr); 558 goto out_disable; 559 } 560 561 cp500->msix_num = pci_alloc_irq_vectors(pci_dev, CP500_NUM_MSIX_NO_MMI, 562 CP500_NUM_MSIX, PCI_IRQ_MSIX); 563 if (cp500->msix_num < CP500_NUM_MSIX_NO_MMI) { 564 dev_err(&pci_dev->dev, 565 "Hardware does not support enough MSI-X interrupts\n"); 566 ret = -ENODEV; 567 goto out_disable; 568 } 569 570 cp500_vers = ioread32(cp500->system_startup_addr + CP500_VERSION_REG); 571 cp500->version.major = (cp500_vers & 0xff); 572 cp500->version.minor = (cp500_vers >> 8) & 0xff; 573 cp500->version.build = (cp500_vers >> 16) & 0xffff; 574 cp500_get_fpga_version(cp500, buf, sizeof(buf)); 575 576 dev_info(&pci_dev->dev, "FPGA version %s", buf); 577 578 pci_set_drvdata(pci_dev, cp500); 579 580 cp500->nvmem_notifier.notifier_call = cp500_nvmem; 581 ret = nvmem_register_notifier(&cp500->nvmem_notifier); 582 if (ret != 0) 583 goto out_free_irq; 584 585 ret = cp500_enable(cp500); 586 if (ret != 0) 587 goto out_unregister_nvmem; 588 589 cp500_register_auxiliary_devs(cp500); 590 591 return 0; 592 593 out_unregister_nvmem: 594 nvmem_unregister_notifier(&cp500->nvmem_notifier); 595 out_free_irq: 596 pci_free_irq_vectors(pci_dev); 597 out_disable: 598 pci_clear_master(pci_dev); 599 pci_disable_device(pci_dev); 600 601 return ret; 602 } 603 604 static void cp500_remove(struct pci_dev *pci_dev) 605 { 606 struct cp500 *cp500 = pci_get_drvdata(pci_dev); 607 608 cp500_unregister_auxiliary_devs(cp500); 609 610 cp500_disable(cp500); 611 612 nvmem_unregister_notifier(&cp500->nvmem_notifier); 613 614 pci_set_drvdata(pci_dev, 0); 615 616 pci_free_irq_vectors(pci_dev); 617 618 pci_clear_master(pci_dev); 619 pci_disable_device(pci_dev); 620 } 621 622 static struct pci_device_id cp500_ids[] = { 623 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP035) }, 624 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP505) }, 625 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP520) }, 626 { } 627 }; 628 MODULE_DEVICE_TABLE(pci, cp500_ids); 629 630 static struct pci_driver cp500_driver = { 631 .name = CP500, 632 .id_table = cp500_ids, 633 .probe = cp500_probe, 634 .remove = cp500_remove, 635 .dev_groups = cp500_groups, 636 }; 637 module_pci_driver(cp500_driver); 638 639 MODULE_AUTHOR("Gerhard Engleder <eg@keba.com>"); 640 MODULE_DESCRIPTION("KEBA CP500 system FPGA driver"); 641 MODULE_LICENSE("GPL"); 642