1 // SPDX-License-Identifier: GPL-2.0 2 /* 3 * Copyright (C) KEBA Industrial Automation Gmbh 2024 4 * 5 * Driver for KEBA system FPGA 6 * 7 * The KEBA system FPGA implements various devices. This driver registers 8 * auxiliary devices for every device within the FPGA. 9 */ 10 11 #include <linux/device.h> 12 #include <linux/i2c.h> 13 #include <linux/misc/keba.h> 14 #include <linux/module.h> 15 #include <linux/mtd/partitions.h> 16 #include <linux/nvmem-consumer.h> 17 #include <linux/nvmem-provider.h> 18 #include <linux/pci.h> 19 #include <linux/spi/flash.h> 20 #include <linux/spi/spi.h> 21 22 #define CP500 "cp500" 23 24 #define PCI_VENDOR_ID_KEBA 0xCEBA 25 #define PCI_DEVICE_ID_KEBA_CP035 0x2706 26 #define PCI_DEVICE_ID_KEBA_CP505 0x2703 27 #define PCI_DEVICE_ID_KEBA_CP520 0x2696 28 29 #define CP500_SYS_BAR 0 30 #define CP500_ECM_BAR 1 31 32 /* BAR 0 registers */ 33 #define CP500_VERSION_REG 0x00 34 #define CP500_RECONFIG_REG 0x11 /* upper 8-bits of STARTUP register */ 35 #define CP500_PRESENT_REG 0x20 36 #define CP500_AXI_REG 0x40 37 38 /* Bits in BUILD_REG */ 39 #define CP500_BUILD_TEST 0x8000 /* FPGA test version */ 40 41 /* Bits in RECONFIG_REG */ 42 #define CP500_RECFG_REQ 0x01 /* reconfigure FPGA on next reset */ 43 44 /* Bits in PRESENT_REG */ 45 #define CP500_PRESENT_FAN0 0x01 46 47 /* MSIX */ 48 #define CP500_AXI_MSIX 3 49 #define CP500_RFB_UART_MSIX 4 50 #define CP500_DEBUG_UART_MSIX 5 51 #define CP500_SI1_UART_MSIX 6 52 #define CP500_NUM_MSIX 8 53 #define CP500_NUM_MSIX_NO_MMI 2 54 #define CP500_NUM_MSIX_NO_AXI 3 55 56 /* EEPROM */ 57 #define CP500_EEPROM_DA_OFFSET 0x016F 58 #define CP500_EEPROM_DA_ESC_TYPE_MASK 0x01 59 #define CP500_EEPROM_ESC_LAN9252 0x00 60 #define CP500_EEPROM_ESC_ET1100 0x01 61 #define CP500_EEPROM_CPU_NAME "cpu_eeprom" 62 #define CP500_EEPROM_CPU_OFFSET 0 63 #define CP500_EEPROM_CPU_SIZE 3072 64 #define CP500_EEPROM_USER_NAME "user_eeprom" 65 #define CP500_EEPROM_USER_OFFSET 3072 66 #define CP500_EEPROM_USER_SIZE 1024 67 68 /* SPI flash running at full speed */ 69 #define CP500_FLASH_HZ (33 * 1000 * 1000) 70 71 /* LAN9252 */ 72 #define CP500_LAN9252_HZ (10 * 1000 * 1000) 73 74 #define CP500_IS_CP035(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP035) 75 #define CP500_IS_CP505(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP505) 76 #define CP500_IS_CP520(dev) ((dev)->pci_dev->device == PCI_DEVICE_ID_KEBA_CP520) 77 78 struct cp500_dev_info { 79 off_t offset; 80 size_t size; 81 unsigned int msix; 82 }; 83 84 struct cp500_devs { 85 struct cp500_dev_info startup; 86 struct cp500_dev_info spi; 87 struct cp500_dev_info i2c; 88 struct cp500_dev_info fan; 89 struct cp500_dev_info batt; 90 struct cp500_dev_info uart0_rfb; 91 struct cp500_dev_info uart1_dbg; 92 struct cp500_dev_info uart2_si1; 93 }; 94 95 /* list of devices within FPGA of CP035 family (CP035, CP056, CP057) */ 96 static struct cp500_devs cp035_devices = { 97 .startup = { 0x0000, SZ_4K }, 98 .spi = { 0x1000, SZ_4K }, 99 .i2c = { 0x4000, SZ_4K }, 100 .fan = { 0x9000, SZ_4K }, 101 .batt = { 0xA000, SZ_4K }, 102 .uart0_rfb = { 0xB000, SZ_4K, CP500_RFB_UART_MSIX }, 103 .uart2_si1 = { 0xD000, SZ_4K, CP500_SI1_UART_MSIX }, 104 }; 105 106 /* list of devices within FPGA of CP505 family (CP503, CP505, CP507) */ 107 static struct cp500_devs cp505_devices = { 108 .startup = { 0x0000, SZ_4K }, 109 .spi = { 0x4000, SZ_4K }, 110 .i2c = { 0x5000, SZ_4K }, 111 .fan = { 0x9000, SZ_4K }, 112 .batt = { 0xA000, SZ_4K }, 113 .uart0_rfb = { 0xB000, SZ_4K, CP500_RFB_UART_MSIX }, 114 .uart2_si1 = { 0xD000, SZ_4K, CP500_SI1_UART_MSIX }, 115 }; 116 117 /* list of devices within FPGA of CP520 family (CP520, CP530) */ 118 static struct cp500_devs cp520_devices = { 119 .startup = { 0x0000, SZ_4K }, 120 .spi = { 0x4000, SZ_4K }, 121 .i2c = { 0x5000, SZ_4K }, 122 .fan = { 0x8000, SZ_4K }, 123 .batt = { 0x9000, SZ_4K }, 124 .uart0_rfb = { 0xC000, SZ_4K, CP500_RFB_UART_MSIX }, 125 .uart1_dbg = { 0xD000, SZ_4K, CP500_DEBUG_UART_MSIX }, 126 }; 127 128 struct cp500_nvmem { 129 struct nvmem_device *nvmem; 130 unsigned int offset; 131 }; 132 133 struct cp500 { 134 struct pci_dev *pci_dev; 135 struct cp500_devs *devs; 136 int msix_num; 137 struct { 138 int major; 139 int minor; 140 int build; 141 } version; 142 struct notifier_block nvmem_notifier; 143 atomic_t nvmem_notified; 144 145 /* system FPGA BAR */ 146 resource_size_t sys_hwbase; 147 struct keba_spi_auxdev *spi; 148 struct keba_i2c_auxdev *i2c; 149 struct keba_fan_auxdev *fan; 150 struct keba_batt_auxdev *batt; 151 struct keba_uart_auxdev *uart0_rfb; 152 struct keba_uart_auxdev *uart1_dbg; 153 struct keba_uart_auxdev *uart2_si1; 154 155 /* ECM EtherCAT BAR */ 156 resource_size_t ecm_hwbase; 157 158 /* NVMEM devices */ 159 struct cp500_nvmem nvmem_cpu; 160 struct cp500_nvmem nvmem_user; 161 162 void __iomem *system_startup_addr; 163 }; 164 165 /* I2C devices */ 166 #define CP500_EEPROM_ADDR 0x50 167 static struct i2c_board_info cp500_i2c_info[] = { 168 { /* temperature sensor */ 169 I2C_BOARD_INFO("emc1403", 0x4c), 170 }, 171 { /* 172 * CPU EEPROM 173 * CP035 family: CPU board 174 * CP505 family: bridge board 175 * CP520 family: carrier board 176 */ 177 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR), 178 }, 179 { /* interface board EEPROM */ 180 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 1), 181 }, 182 { /* 183 * EEPROM (optional) 184 * CP505 family: CPU board 185 * CP520 family: MMI board 186 */ 187 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 2), 188 }, 189 { /* extension module 0 EEPROM (optional) */ 190 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 3), 191 }, 192 { /* extension module 1 EEPROM (optional) */ 193 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 4), 194 }, 195 { /* extension module 2 EEPROM (optional) */ 196 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 5), 197 }, 198 { /* extension module 3 EEPROM (optional) */ 199 I2C_BOARD_INFO("24c32", CP500_EEPROM_ADDR + 6), 200 } 201 }; 202 203 /* SPI devices */ 204 static struct mtd_partition cp500_partitions[] = { 205 { 206 .name = "system-flash-parts", 207 .size = MTDPART_SIZ_FULL, 208 .offset = 0, 209 .mask_flags = 0 210 } 211 }; 212 static const struct flash_platform_data cp500_w25q32 = { 213 .type = "w25q32", 214 .name = "system-flash", 215 .parts = cp500_partitions, 216 .nr_parts = ARRAY_SIZE(cp500_partitions), 217 }; 218 static const struct flash_platform_data cp500_m25p16 = { 219 .type = "m25p16", 220 .name = "system-flash", 221 .parts = cp500_partitions, 222 .nr_parts = ARRAY_SIZE(cp500_partitions), 223 }; 224 static struct spi_board_info cp500_spi_info[] = { 225 { /* system FPGA configuration bitstream flash */ 226 .modalias = "m25p80", 227 .platform_data = &cp500_m25p16, 228 .max_speed_hz = CP500_FLASH_HZ, 229 .chip_select = 0, 230 .mode = SPI_MODE_3, 231 }, { /* LAN9252 EtherCAT slave controller */ 232 .modalias = "lan9252", 233 .platform_data = NULL, 234 .max_speed_hz = CP500_LAN9252_HZ, 235 .chip_select = 1, 236 .mode = SPI_MODE_3, 237 } 238 }; 239 240 static ssize_t cp500_get_fpga_version(struct cp500 *cp500, char *buf, 241 size_t max_len) 242 { 243 int n; 244 245 if (CP500_IS_CP035(cp500)) 246 n = scnprintf(buf, max_len, "CP035"); 247 else if (CP500_IS_CP505(cp500)) 248 n = scnprintf(buf, max_len, "CP505"); 249 else 250 n = scnprintf(buf, max_len, "CP500"); 251 252 n += scnprintf(buf + n, max_len - n, "_FPGA_%d.%02d", 253 cp500->version.major, cp500->version.minor); 254 255 /* test versions have test bit set */ 256 if (cp500->version.build & CP500_BUILD_TEST) 257 n += scnprintf(buf + n, max_len - n, "Test%d", 258 cp500->version.build & ~CP500_BUILD_TEST); 259 260 n += scnprintf(buf + n, max_len - n, "\n"); 261 262 return n; 263 } 264 265 static ssize_t version_show(struct device *dev, struct device_attribute *attr, 266 char *buf) 267 { 268 struct cp500 *cp500 = dev_get_drvdata(dev); 269 270 return cp500_get_fpga_version(cp500, buf, PAGE_SIZE); 271 } 272 static DEVICE_ATTR_RO(version); 273 274 static ssize_t keep_cfg_show(struct device *dev, struct device_attribute *attr, 275 char *buf) 276 { 277 struct cp500 *cp500 = dev_get_drvdata(dev); 278 unsigned long keep_cfg = 1; 279 280 /* 281 * FPGA configuration stream is kept during reset when RECONFIG bit is 282 * zero 283 */ 284 if (ioread8(cp500->system_startup_addr + CP500_RECONFIG_REG) & 285 CP500_RECFG_REQ) 286 keep_cfg = 0; 287 288 return sysfs_emit(buf, "%lu\n", keep_cfg); 289 } 290 291 static ssize_t keep_cfg_store(struct device *dev, struct device_attribute *attr, 292 const char *buf, size_t count) 293 { 294 struct cp500 *cp500 = dev_get_drvdata(dev); 295 unsigned long keep_cfg; 296 297 if (kstrtoul(buf, 10, &keep_cfg) < 0) 298 return -EINVAL; 299 300 /* 301 * In normal operation "keep_cfg" is "1". This means that the FPGA keeps 302 * its configuration stream during a reset. 303 * In case of a firmware update of the FPGA, the configuration stream 304 * needs to be reloaded. This can be done without a powercycle by 305 * writing a "0" into the "keep_cfg" attribute. After a reset/reboot th 306 * new configuration stream will be loaded. 307 */ 308 if (keep_cfg) 309 iowrite8(0, cp500->system_startup_addr + CP500_RECONFIG_REG); 310 else 311 iowrite8(CP500_RECFG_REQ, 312 cp500->system_startup_addr + CP500_RECONFIG_REG); 313 314 return count; 315 } 316 static DEVICE_ATTR_RW(keep_cfg); 317 318 static struct attribute *cp500_attrs[] = { 319 &dev_attr_version.attr, 320 &dev_attr_keep_cfg.attr, 321 NULL 322 }; 323 ATTRIBUTE_GROUPS(cp500); 324 325 static void cp500_i2c_release(struct device *dev) 326 { 327 struct keba_i2c_auxdev *i2c = 328 container_of(dev, struct keba_i2c_auxdev, auxdev.dev); 329 330 kfree(i2c); 331 } 332 333 static int cp500_register_i2c(struct cp500 *cp500) 334 { 335 int ret; 336 337 cp500->i2c = kzalloc(sizeof(*cp500->i2c), GFP_KERNEL); 338 if (!cp500->i2c) 339 return -ENOMEM; 340 341 cp500->i2c->auxdev.name = "i2c"; 342 cp500->i2c->auxdev.id = 0; 343 cp500->i2c->auxdev.dev.release = cp500_i2c_release; 344 cp500->i2c->auxdev.dev.parent = &cp500->pci_dev->dev; 345 cp500->i2c->io = (struct resource) { 346 /* I2C register area */ 347 .start = (resource_size_t) cp500->sys_hwbase + 348 cp500->devs->i2c.offset, 349 .end = (resource_size_t) cp500->sys_hwbase + 350 cp500->devs->i2c.offset + 351 cp500->devs->i2c.size - 1, 352 .flags = IORESOURCE_MEM, 353 }; 354 cp500->i2c->info_size = ARRAY_SIZE(cp500_i2c_info); 355 cp500->i2c->info = cp500_i2c_info; 356 357 ret = auxiliary_device_init(&cp500->i2c->auxdev); 358 if (ret) { 359 kfree(cp500->i2c); 360 cp500->i2c = NULL; 361 362 return ret; 363 } 364 ret = __auxiliary_device_add(&cp500->i2c->auxdev, "keba"); 365 if (ret) { 366 auxiliary_device_uninit(&cp500->i2c->auxdev); 367 cp500->i2c = NULL; 368 369 return ret; 370 } 371 372 return 0; 373 } 374 375 static void cp500_spi_release(struct device *dev) 376 { 377 struct keba_spi_auxdev *spi = 378 container_of(dev, struct keba_spi_auxdev, auxdev.dev); 379 380 kfree(spi); 381 } 382 383 static int cp500_register_spi(struct cp500 *cp500, u8 esc_type) 384 { 385 int info_size; 386 int ret; 387 388 cp500->spi = kzalloc(sizeof(*cp500->spi), GFP_KERNEL); 389 if (!cp500->spi) 390 return -ENOMEM; 391 392 if (CP500_IS_CP035(cp500)) 393 cp500_spi_info[0].platform_data = &cp500_w25q32; 394 if (esc_type == CP500_EEPROM_ESC_LAN9252) 395 info_size = ARRAY_SIZE(cp500_spi_info); 396 else 397 info_size = ARRAY_SIZE(cp500_spi_info) - 1; 398 399 cp500->spi->auxdev.name = "spi"; 400 cp500->spi->auxdev.id = 0; 401 cp500->spi->auxdev.dev.release = cp500_spi_release; 402 cp500->spi->auxdev.dev.parent = &cp500->pci_dev->dev; 403 cp500->spi->io = (struct resource) { 404 /* SPI register area */ 405 .start = (resource_size_t) cp500->sys_hwbase + 406 cp500->devs->spi.offset, 407 .end = (resource_size_t) cp500->sys_hwbase + 408 cp500->devs->spi.offset + 409 cp500->devs->spi.size - 1, 410 .flags = IORESOURCE_MEM, 411 }; 412 cp500->spi->info_size = info_size; 413 cp500->spi->info = cp500_spi_info; 414 415 ret = auxiliary_device_init(&cp500->spi->auxdev); 416 if (ret) { 417 kfree(cp500->spi); 418 cp500->spi = NULL; 419 420 return ret; 421 } 422 ret = __auxiliary_device_add(&cp500->spi->auxdev, "keba"); 423 if (ret) { 424 auxiliary_device_uninit(&cp500->spi->auxdev); 425 cp500->spi = NULL; 426 427 return ret; 428 } 429 430 return 0; 431 } 432 433 static void cp500_fan_release(struct device *dev) 434 { 435 struct keba_fan_auxdev *fan = 436 container_of(dev, struct keba_fan_auxdev, auxdev.dev); 437 438 kfree(fan); 439 } 440 441 static int cp500_register_fan(struct cp500 *cp500) 442 { 443 int ret; 444 445 cp500->fan = kzalloc(sizeof(*cp500->fan), GFP_KERNEL); 446 if (!cp500->fan) 447 return -ENOMEM; 448 449 cp500->fan->auxdev.name = "fan"; 450 cp500->fan->auxdev.id = 0; 451 cp500->fan->auxdev.dev.release = cp500_fan_release; 452 cp500->fan->auxdev.dev.parent = &cp500->pci_dev->dev; 453 cp500->fan->io = (struct resource) { 454 /* fan register area */ 455 .start = (resource_size_t) cp500->sys_hwbase + 456 cp500->devs->fan.offset, 457 .end = (resource_size_t) cp500->sys_hwbase + 458 cp500->devs->fan.offset + 459 cp500->devs->fan.size - 1, 460 .flags = IORESOURCE_MEM, 461 }; 462 463 ret = auxiliary_device_init(&cp500->fan->auxdev); 464 if (ret) { 465 kfree(cp500->fan); 466 cp500->fan = NULL; 467 468 return ret; 469 } 470 ret = __auxiliary_device_add(&cp500->fan->auxdev, "keba"); 471 if (ret) { 472 auxiliary_device_uninit(&cp500->fan->auxdev); 473 cp500->fan = NULL; 474 475 return ret; 476 } 477 478 return 0; 479 } 480 481 static void cp500_batt_release(struct device *dev) 482 { 483 struct keba_batt_auxdev *fan = 484 container_of(dev, struct keba_batt_auxdev, auxdev.dev); 485 486 kfree(fan); 487 } 488 489 static int cp500_register_batt(struct cp500 *cp500) 490 { 491 int ret; 492 493 cp500->batt = kzalloc(sizeof(*cp500->batt), GFP_KERNEL); 494 if (!cp500->batt) 495 return -ENOMEM; 496 497 cp500->batt->auxdev.name = "batt"; 498 cp500->batt->auxdev.id = 0; 499 cp500->batt->auxdev.dev.release = cp500_batt_release; 500 cp500->batt->auxdev.dev.parent = &cp500->pci_dev->dev; 501 cp500->batt->io = (struct resource) { 502 /* battery register area */ 503 .start = (resource_size_t) cp500->sys_hwbase + 504 cp500->devs->batt.offset, 505 .end = (resource_size_t) cp500->sys_hwbase + 506 cp500->devs->batt.offset + 507 cp500->devs->batt.size - 1, 508 .flags = IORESOURCE_MEM, 509 }; 510 511 ret = auxiliary_device_init(&cp500->batt->auxdev); 512 if (ret) { 513 kfree(cp500->batt); 514 cp500->batt = NULL; 515 516 return ret; 517 } 518 ret = __auxiliary_device_add(&cp500->batt->auxdev, "keba"); 519 if (ret) { 520 auxiliary_device_uninit(&cp500->batt->auxdev); 521 cp500->batt = NULL; 522 523 return ret; 524 } 525 526 return 0; 527 } 528 529 static void cp500_uart_release(struct device *dev) 530 { 531 struct keba_uart_auxdev *uart = 532 container_of(dev, struct keba_uart_auxdev, auxdev.dev); 533 534 kfree(uart); 535 } 536 537 static int cp500_register_uart(struct cp500 *cp500, 538 struct keba_uart_auxdev **uart, const char *name, 539 struct cp500_dev_info *info, unsigned int irq) 540 { 541 int ret; 542 543 *uart = kzalloc(sizeof(**uart), GFP_KERNEL); 544 if (!*uart) 545 return -ENOMEM; 546 547 (*uart)->auxdev.name = name; 548 (*uart)->auxdev.id = 0; 549 (*uart)->auxdev.dev.release = cp500_uart_release; 550 (*uart)->auxdev.dev.parent = &cp500->pci_dev->dev; 551 (*uart)->io = (struct resource) { 552 /* UART register area */ 553 .start = (resource_size_t) cp500->sys_hwbase + info->offset, 554 .end = (resource_size_t) cp500->sys_hwbase + info->offset + 555 info->size - 1, 556 .flags = IORESOURCE_MEM, 557 }; 558 (*uart)->irq = irq; 559 560 ret = auxiliary_device_init(&(*uart)->auxdev); 561 if (ret) { 562 kfree(*uart); 563 *uart = NULL; 564 565 return ret; 566 } 567 ret = __auxiliary_device_add(&(*uart)->auxdev, "keba"); 568 if (ret) { 569 auxiliary_device_uninit(&(*uart)->auxdev); 570 *uart = NULL; 571 572 return ret; 573 } 574 575 return 0; 576 } 577 578 static int cp500_nvmem_read(void *priv, unsigned int offset, void *val, 579 size_t bytes) 580 { 581 struct cp500_nvmem *nvmem = priv; 582 int ret; 583 584 ret = nvmem_device_read(nvmem->nvmem, nvmem->offset + offset, bytes, 585 val); 586 if (ret != bytes) 587 return ret; 588 589 return 0; 590 } 591 592 static int cp500_nvmem_write(void *priv, unsigned int offset, void *val, 593 size_t bytes) 594 { 595 struct cp500_nvmem *nvmem = priv; 596 int ret; 597 598 ret = nvmem_device_write(nvmem->nvmem, nvmem->offset + offset, bytes, 599 val); 600 if (ret != bytes) 601 return ret; 602 603 return 0; 604 } 605 606 static int cp500_nvmem_register(struct cp500 *cp500, struct nvmem_device *nvmem) 607 { 608 struct device *dev = &cp500->pci_dev->dev; 609 struct nvmem_config nvmem_config = {}; 610 struct nvmem_device *tmp; 611 612 /* 613 * The main EEPROM of CP500 devices is logically split into two EEPROMs. 614 * The first logical EEPROM with 3 kB contains the type label which is 615 * programmed during production of the device. The second logical EEPROM 616 * with 1 kB is not programmed during production and can be used for 617 * arbitrary user data. 618 */ 619 620 nvmem_config.dev = dev; 621 nvmem_config.owner = THIS_MODULE; 622 nvmem_config.id = NVMEM_DEVID_NONE; 623 nvmem_config.type = NVMEM_TYPE_EEPROM; 624 nvmem_config.root_only = true; 625 nvmem_config.reg_read = cp500_nvmem_read; 626 nvmem_config.reg_write = cp500_nvmem_write; 627 628 cp500->nvmem_cpu.nvmem = nvmem; 629 cp500->nvmem_cpu.offset = CP500_EEPROM_CPU_OFFSET; 630 nvmem_config.name = CP500_EEPROM_CPU_NAME; 631 nvmem_config.size = CP500_EEPROM_CPU_SIZE; 632 nvmem_config.priv = &cp500->nvmem_cpu; 633 tmp = devm_nvmem_register(dev, &nvmem_config); 634 if (IS_ERR(tmp)) 635 return PTR_ERR(tmp); 636 637 cp500->nvmem_user.nvmem = nvmem; 638 cp500->nvmem_user.offset = CP500_EEPROM_USER_OFFSET; 639 nvmem_config.name = CP500_EEPROM_USER_NAME; 640 nvmem_config.size = CP500_EEPROM_USER_SIZE; 641 nvmem_config.priv = &cp500->nvmem_user; 642 tmp = devm_nvmem_register(dev, &nvmem_config); 643 if (IS_ERR(tmp)) 644 return PTR_ERR(tmp); 645 646 return 0; 647 } 648 649 static int cp500_nvmem_match(struct device *dev, const void *data) 650 { 651 const struct cp500 *cp500 = data; 652 struct i2c_client *client; 653 654 /* match only CPU EEPROM below the cp500 device */ 655 dev = dev->parent; 656 client = i2c_verify_client(dev); 657 if (!client || client->addr != CP500_EEPROM_ADDR) 658 return 0; 659 while ((dev = dev->parent)) 660 if (dev == &cp500->pci_dev->dev) 661 return 1; 662 663 return 0; 664 } 665 666 static void cp500_devm_nvmem_put(void *data) 667 { 668 struct nvmem_device *nvmem = data; 669 670 nvmem_device_put(nvmem); 671 } 672 673 static int cp500_nvmem(struct notifier_block *nb, unsigned long action, 674 void *data) 675 { 676 struct nvmem_device *nvmem; 677 struct cp500 *cp500; 678 struct device *dev; 679 int notified; 680 u8 esc_type; 681 int ret; 682 683 if (action != NVMEM_ADD) 684 return NOTIFY_DONE; 685 cp500 = container_of(nb, struct cp500, nvmem_notifier); 686 dev = &cp500->pci_dev->dev; 687 688 /* process CPU EEPROM content only once */ 689 notified = atomic_read(&cp500->nvmem_notified); 690 if (notified) 691 return NOTIFY_DONE; 692 nvmem = nvmem_device_find(cp500, cp500_nvmem_match); 693 if (IS_ERR_OR_NULL(nvmem)) 694 return NOTIFY_DONE; 695 if (!atomic_try_cmpxchg_relaxed(&cp500->nvmem_notified, ¬ified, 1)) { 696 nvmem_device_put(nvmem); 697 698 return NOTIFY_DONE; 699 } 700 701 ret = devm_add_action_or_reset(dev, cp500_devm_nvmem_put, nvmem); 702 if (ret) 703 return ret; 704 705 ret = cp500_nvmem_register(cp500, nvmem); 706 if (ret) 707 return ret; 708 709 ret = nvmem_device_read(nvmem, CP500_EEPROM_DA_OFFSET, sizeof(esc_type), 710 (void *)&esc_type); 711 if (ret != sizeof(esc_type)) { 712 dev_warn(dev, "Failed to read device assembly!\n"); 713 714 return NOTIFY_DONE; 715 } 716 esc_type &= CP500_EEPROM_DA_ESC_TYPE_MASK; 717 718 if (cp500_register_spi(cp500, esc_type)) 719 dev_warn(dev, "Failed to register SPI!\n"); 720 721 return NOTIFY_OK; 722 } 723 724 static void cp500_register_auxiliary_devs(struct cp500 *cp500) 725 { 726 struct device *dev = &cp500->pci_dev->dev; 727 u8 present = ioread8(cp500->system_startup_addr + CP500_PRESENT_REG); 728 729 if (cp500_register_i2c(cp500)) 730 dev_warn(dev, "Failed to register I2C!\n"); 731 if (present & CP500_PRESENT_FAN0) 732 if (cp500_register_fan(cp500)) 733 dev_warn(dev, "Failed to register fan!\n"); 734 if (cp500_register_batt(cp500)) 735 dev_warn(dev, "Failed to register battery!\n"); 736 if (cp500->devs->uart0_rfb.size && 737 cp500->devs->uart0_rfb.msix < cp500->msix_num) { 738 int irq = pci_irq_vector(cp500->pci_dev, 739 cp500->devs->uart0_rfb.msix); 740 741 if (cp500_register_uart(cp500, &cp500->uart0_rfb, "rs485-uart", 742 &cp500->devs->uart0_rfb, irq)) 743 dev_warn(dev, "Failed to register RFB UART!\n"); 744 } 745 if (cp500->devs->uart1_dbg.size && 746 cp500->devs->uart1_dbg.msix < cp500->msix_num) { 747 int irq = pci_irq_vector(cp500->pci_dev, 748 cp500->devs->uart1_dbg.msix); 749 750 if (cp500_register_uart(cp500, &cp500->uart1_dbg, "rs232-uart", 751 &cp500->devs->uart1_dbg, irq)) 752 dev_warn(dev, "Failed to register debug UART!\n"); 753 } 754 if (cp500->devs->uart2_si1.size && 755 cp500->devs->uart2_si1.msix < cp500->msix_num) { 756 int irq = pci_irq_vector(cp500->pci_dev, 757 cp500->devs->uart2_si1.msix); 758 759 if (cp500_register_uart(cp500, &cp500->uart2_si1, "uart", 760 &cp500->devs->uart2_si1, irq)) 761 dev_warn(dev, "Failed to register SI1 UART!\n"); 762 } 763 } 764 765 static void cp500_unregister_dev(struct auxiliary_device *auxdev) 766 { 767 auxiliary_device_delete(auxdev); 768 auxiliary_device_uninit(auxdev); 769 } 770 771 static void cp500_unregister_auxiliary_devs(struct cp500 *cp500) 772 { 773 if (cp500->spi) { 774 cp500_unregister_dev(&cp500->spi->auxdev); 775 cp500->spi = NULL; 776 } 777 if (cp500->i2c) { 778 cp500_unregister_dev(&cp500->i2c->auxdev); 779 cp500->i2c = NULL; 780 } 781 if (cp500->fan) { 782 cp500_unregister_dev(&cp500->fan->auxdev); 783 cp500->fan = NULL; 784 } 785 if (cp500->batt) { 786 cp500_unregister_dev(&cp500->batt->auxdev); 787 cp500->batt = NULL; 788 } 789 if (cp500->uart0_rfb) { 790 cp500_unregister_dev(&cp500->uart0_rfb->auxdev); 791 cp500->uart0_rfb = NULL; 792 } 793 if (cp500->uart1_dbg) { 794 cp500_unregister_dev(&cp500->uart1_dbg->auxdev); 795 cp500->uart1_dbg = NULL; 796 } 797 if (cp500->uart2_si1) { 798 cp500_unregister_dev(&cp500->uart2_si1->auxdev); 799 cp500->uart2_si1 = NULL; 800 } 801 } 802 803 static irqreturn_t cp500_axi_handler(int irq, void *dev) 804 { 805 struct cp500 *cp500 = dev; 806 u32 axi_address = ioread32(cp500->system_startup_addr + CP500_AXI_REG); 807 808 /* 809 * FPGA signals AXI response error, print AXI address to indicate which 810 * IP core was affected 811 */ 812 dev_err(&cp500->pci_dev->dev, "AXI response error at 0x%08x\n", 813 axi_address); 814 815 return IRQ_HANDLED; 816 } 817 818 static int cp500_enable(struct cp500 *cp500) 819 { 820 int axi_irq = -1; 821 int ret; 822 823 if (cp500->msix_num > CP500_NUM_MSIX_NO_AXI) { 824 axi_irq = pci_irq_vector(cp500->pci_dev, CP500_AXI_MSIX); 825 ret = request_irq(axi_irq, cp500_axi_handler, 0, 826 CP500, cp500); 827 if (ret != 0) { 828 dev_err(&cp500->pci_dev->dev, 829 "Failed to register AXI response error!\n"); 830 return ret; 831 } 832 } 833 834 return 0; 835 } 836 837 static void cp500_disable(struct cp500 *cp500) 838 { 839 int axi_irq; 840 841 if (cp500->msix_num > CP500_NUM_MSIX_NO_AXI) { 842 axi_irq = pci_irq_vector(cp500->pci_dev, CP500_AXI_MSIX); 843 free_irq(axi_irq, cp500); 844 } 845 } 846 847 static int cp500_probe(struct pci_dev *pci_dev, const struct pci_device_id *id) 848 { 849 struct device *dev = &pci_dev->dev; 850 struct resource startup; 851 struct cp500 *cp500; 852 u32 cp500_vers; 853 char buf[64]; 854 int ret; 855 856 cp500 = devm_kzalloc(dev, sizeof(*cp500), GFP_KERNEL); 857 if (!cp500) 858 return -ENOMEM; 859 cp500->pci_dev = pci_dev; 860 cp500->sys_hwbase = pci_resource_start(pci_dev, CP500_SYS_BAR); 861 cp500->ecm_hwbase = pci_resource_start(pci_dev, CP500_ECM_BAR); 862 if (!cp500->sys_hwbase || !cp500->ecm_hwbase) 863 return -ENODEV; 864 865 if (CP500_IS_CP035(cp500)) 866 cp500->devs = &cp035_devices; 867 else if (CP500_IS_CP505(cp500)) 868 cp500->devs = &cp505_devices; 869 else if (CP500_IS_CP520(cp500)) 870 cp500->devs = &cp520_devices; 871 else 872 return -ENODEV; 873 874 ret = pci_enable_device(pci_dev); 875 if (ret) 876 return ret; 877 pci_set_master(pci_dev); 878 879 startup = *pci_resource_n(pci_dev, CP500_SYS_BAR); 880 startup.end = startup.start + cp500->devs->startup.size - 1; 881 cp500->system_startup_addr = devm_ioremap_resource(&pci_dev->dev, 882 &startup); 883 if (IS_ERR(cp500->system_startup_addr)) { 884 ret = PTR_ERR(cp500->system_startup_addr); 885 goto out_disable; 886 } 887 888 cp500->msix_num = pci_alloc_irq_vectors(pci_dev, CP500_NUM_MSIX_NO_MMI, 889 CP500_NUM_MSIX, PCI_IRQ_MSIX); 890 if (cp500->msix_num < CP500_NUM_MSIX_NO_MMI) { 891 dev_err(&pci_dev->dev, 892 "Hardware does not support enough MSI-X interrupts\n"); 893 ret = -ENODEV; 894 goto out_disable; 895 } 896 897 cp500_vers = ioread32(cp500->system_startup_addr + CP500_VERSION_REG); 898 cp500->version.major = (cp500_vers & 0xff); 899 cp500->version.minor = (cp500_vers >> 8) & 0xff; 900 cp500->version.build = (cp500_vers >> 16) & 0xffff; 901 cp500_get_fpga_version(cp500, buf, sizeof(buf)); 902 903 dev_info(&pci_dev->dev, "FPGA version %s", buf); 904 905 pci_set_drvdata(pci_dev, cp500); 906 907 cp500->nvmem_notifier.notifier_call = cp500_nvmem; 908 ret = nvmem_register_notifier(&cp500->nvmem_notifier); 909 if (ret != 0) 910 goto out_free_irq; 911 912 ret = cp500_enable(cp500); 913 if (ret != 0) 914 goto out_unregister_nvmem; 915 916 cp500_register_auxiliary_devs(cp500); 917 918 return 0; 919 920 out_unregister_nvmem: 921 nvmem_unregister_notifier(&cp500->nvmem_notifier); 922 out_free_irq: 923 pci_free_irq_vectors(pci_dev); 924 out_disable: 925 pci_clear_master(pci_dev); 926 pci_disable_device(pci_dev); 927 928 return ret; 929 } 930 931 static void cp500_remove(struct pci_dev *pci_dev) 932 { 933 struct cp500 *cp500 = pci_get_drvdata(pci_dev); 934 935 cp500_unregister_auxiliary_devs(cp500); 936 937 cp500_disable(cp500); 938 939 nvmem_unregister_notifier(&cp500->nvmem_notifier); 940 941 pci_set_drvdata(pci_dev, 0); 942 943 pci_free_irq_vectors(pci_dev); 944 945 pci_clear_master(pci_dev); 946 pci_disable_device(pci_dev); 947 } 948 949 static struct pci_device_id cp500_ids[] = { 950 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP035) }, 951 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP505) }, 952 { PCI_DEVICE(PCI_VENDOR_ID_KEBA, PCI_DEVICE_ID_KEBA_CP520) }, 953 { } 954 }; 955 MODULE_DEVICE_TABLE(pci, cp500_ids); 956 957 static struct pci_driver cp500_driver = { 958 .name = CP500, 959 .id_table = cp500_ids, 960 .probe = cp500_probe, 961 .remove = cp500_remove, 962 .dev_groups = cp500_groups, 963 }; 964 module_pci_driver(cp500_driver); 965 966 MODULE_AUTHOR("Gerhard Engleder <eg@keba.com>"); 967 MODULE_DESCRIPTION("KEBA CP500 system FPGA driver"); 968 MODULE_LICENSE("GPL"); 969