1*8bf5e849SAlexander Usyskin /* SPDX-License-Identifier: GPL-2.0 */ 2*8bf5e849SAlexander Usyskin /* Copyright (C) 2023-2026 Intel Corporation */ 3*8bf5e849SAlexander Usyskin #ifndef _ISSEI_HW_HECI_H_ 4*8bf5e849SAlexander Usyskin #define _ISSEI_HW_HECI_H_ 5*8bf5e849SAlexander Usyskin #include <linux/irqreturn.h> 6*8bf5e849SAlexander Usyskin #include <linux/spinlock.h> 7*8bf5e849SAlexander Usyskin #include <linux/types.h> 8*8bf5e849SAlexander Usyskin 9*8bf5e849SAlexander Usyskin #include "issei_dev.h" 10*8bf5e849SAlexander Usyskin 11*8bf5e849SAlexander Usyskin /* 12*8bf5e849SAlexander Usyskin * hw_heci_cfg - issei heci device configuration 13*8bf5e849SAlexander Usyskin * 14*8bf5e849SAlexander Usyskin * @dma_length: DMA area length 15*8bf5e849SAlexander Usyskin */ 16*8bf5e849SAlexander Usyskin struct hw_heci_cfg { 17*8bf5e849SAlexander Usyskin const struct issei_dma_length dma_length; 18*8bf5e849SAlexander Usyskin }; 19*8bf5e849SAlexander Usyskin 20*8bf5e849SAlexander Usyskin /** 21*8bf5e849SAlexander Usyskin * struct issei_heci_hw - issei heci hw specific data 22*8bf5e849SAlexander Usyskin * 23*8bf5e849SAlexander Usyskin * @cfg: per device generation config and ops 24*8bf5e849SAlexander Usyskin * @mem_addr: io memory address 25*8bf5e849SAlexander Usyskin * @irq: device irq number 26*8bf5e849SAlexander Usyskin * @access_lock: spinlock to protect hw access 27*8bf5e849SAlexander Usyskin * @hbuf_depth: depth of hardware host/write buffer in slots 28*8bf5e849SAlexander Usyskin */ 29*8bf5e849SAlexander Usyskin struct issei_heci_hw { 30*8bf5e849SAlexander Usyskin const struct hw_heci_cfg *cfg; 31*8bf5e849SAlexander Usyskin void __iomem *mem_addr; 32*8bf5e849SAlexander Usyskin int irq; 33*8bf5e849SAlexander Usyskin spinlock_t access_lock; 34*8bf5e849SAlexander Usyskin u8 hbuf_depth; 35*8bf5e849SAlexander Usyskin }; 36*8bf5e849SAlexander Usyskin 37*8bf5e849SAlexander Usyskin #define to_heci_hw(dev) ((struct issei_heci_hw *)(dev)->hw) 38*8bf5e849SAlexander Usyskin 39*8bf5e849SAlexander Usyskin const struct hw_heci_cfg *issei_heci_get_cfg(kernel_ulong_t idx); 40*8bf5e849SAlexander Usyskin const struct issei_hw_ops *issei_heci_get_ops(void); 41*8bf5e849SAlexander Usyskin 42*8bf5e849SAlexander Usyskin void issei_heci_dev_init(struct issei_device *idev, 43*8bf5e849SAlexander Usyskin void __iomem *mem_addr, const struct hw_heci_cfg *cfg); 44*8bf5e849SAlexander Usyskin 45*8bf5e849SAlexander Usyskin irqreturn_t issei_heci_irq_quick_handler(int irq, void *dev_id); 46*8bf5e849SAlexander Usyskin 47*8bf5e849SAlexander Usyskin #endif /* _ISSEI_HW_HECI_H_ */ 48