1 /** 2 * IBM Accelerator Family 'GenWQE' 3 * 4 * (C) Copyright IBM Corp. 2013 5 * 6 * Author: Frank Haverkamp <haver@linux.vnet.ibm.com> 7 * Author: Joerg-Stephan Vogt <jsvogt@de.ibm.com> 8 * Author: Michael Jung <mijung@gmx.net> 9 * Author: Michael Ruettger <michael@ibmra.de> 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License (version 2 only) 13 * as published by the Free Software Foundation. 14 * 15 * This program is distributed in the hope that it will be useful, 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 * GNU General Public License for more details. 19 */ 20 21 /* 22 * Module initialization and PCIe setup. Card health monitoring and 23 * recovery functionality. Character device creation and deletion are 24 * controlled from here. 25 */ 26 27 #include <linux/module.h> 28 #include <linux/types.h> 29 #include <linux/pci.h> 30 #include <linux/err.h> 31 #include <linux/aer.h> 32 #include <linux/string.h> 33 #include <linux/sched.h> 34 #include <linux/wait.h> 35 #include <linux/delay.h> 36 #include <linux/dma-mapping.h> 37 #include <linux/module.h> 38 #include <linux/notifier.h> 39 #include <linux/device.h> 40 #include <linux/log2.h> 41 42 #include "card_base.h" 43 #include "card_ddcb.h" 44 45 MODULE_AUTHOR("Frank Haverkamp <haver@linux.vnet.ibm.com>"); 46 MODULE_AUTHOR("Michael Ruettger <michael@ibmra.de>"); 47 MODULE_AUTHOR("Joerg-Stephan Vogt <jsvogt@de.ibm.com>"); 48 MODULE_AUTHOR("Michael Jung <mijung@gmx.net>"); 49 50 MODULE_DESCRIPTION("GenWQE Card"); 51 MODULE_VERSION(DRV_VERSION); 52 MODULE_LICENSE("GPL"); 53 54 static char genwqe_driver_name[] = GENWQE_DEVNAME; 55 static struct class *class_genwqe; 56 static struct dentry *debugfs_genwqe; 57 static struct genwqe_dev *genwqe_devices[GENWQE_CARD_NO_MAX]; 58 59 /* PCI structure for identifying device by PCI vendor and device ID */ 60 static const struct pci_device_id genwqe_device_table[] = { 61 { .vendor = PCI_VENDOR_ID_IBM, 62 .device = PCI_DEVICE_GENWQE, 63 .subvendor = PCI_SUBVENDOR_ID_IBM, 64 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5, 65 .class = (PCI_CLASSCODE_GENWQE5 << 8), 66 .class_mask = ~0, 67 .driver_data = 0 }, 68 69 /* Initial SR-IOV bring-up image */ 70 { .vendor = PCI_VENDOR_ID_IBM, 71 .device = PCI_DEVICE_GENWQE, 72 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV, 73 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_SRIOV, 74 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8), 75 .class_mask = ~0, 76 .driver_data = 0 }, 77 78 { .vendor = PCI_VENDOR_ID_IBM, /* VF Vendor ID */ 79 .device = 0x0000, /* VF Device ID */ 80 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV, 81 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_SRIOV, 82 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8), 83 .class_mask = ~0, 84 .driver_data = 0 }, 85 86 /* Fixed up image */ 87 { .vendor = PCI_VENDOR_ID_IBM, 88 .device = PCI_DEVICE_GENWQE, 89 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV, 90 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5, 91 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8), 92 .class_mask = ~0, 93 .driver_data = 0 }, 94 95 { .vendor = PCI_VENDOR_ID_IBM, /* VF Vendor ID */ 96 .device = 0x0000, /* VF Device ID */ 97 .subvendor = PCI_SUBVENDOR_ID_IBM_SRIOV, 98 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5, 99 .class = (PCI_CLASSCODE_GENWQE5_SRIOV << 8), 100 .class_mask = ~0, 101 .driver_data = 0 }, 102 103 /* Even one more ... */ 104 { .vendor = PCI_VENDOR_ID_IBM, 105 .device = PCI_DEVICE_GENWQE, 106 .subvendor = PCI_SUBVENDOR_ID_IBM, 107 .subdevice = PCI_SUBSYSTEM_ID_GENWQE5_NEW, 108 .class = (PCI_CLASSCODE_GENWQE5 << 8), 109 .class_mask = ~0, 110 .driver_data = 0 }, 111 112 { 0, } /* 0 terminated list. */ 113 }; 114 115 MODULE_DEVICE_TABLE(pci, genwqe_device_table); 116 117 /** 118 * genwqe_dev_alloc() - Create and prepare a new card descriptor 119 * 120 * Return: Pointer to card descriptor, or ERR_PTR(err) on error 121 */ 122 static struct genwqe_dev *genwqe_dev_alloc(void) 123 { 124 unsigned int i = 0, j; 125 struct genwqe_dev *cd; 126 127 for (i = 0; i < GENWQE_CARD_NO_MAX; i++) { 128 if (genwqe_devices[i] == NULL) 129 break; 130 } 131 if (i >= GENWQE_CARD_NO_MAX) 132 return ERR_PTR(-ENODEV); 133 134 cd = kzalloc(sizeof(struct genwqe_dev), GFP_KERNEL); 135 if (!cd) 136 return ERR_PTR(-ENOMEM); 137 138 cd->card_idx = i; 139 cd->class_genwqe = class_genwqe; 140 cd->debugfs_genwqe = debugfs_genwqe; 141 142 /* 143 * This comes from kernel config option and can be overritten via 144 * debugfs. 145 */ 146 cd->use_platform_recovery = CONFIG_GENWQE_PLATFORM_ERROR_RECOVERY; 147 148 init_waitqueue_head(&cd->queue_waitq); 149 150 spin_lock_init(&cd->file_lock); 151 INIT_LIST_HEAD(&cd->file_list); 152 153 cd->card_state = GENWQE_CARD_UNUSED; 154 spin_lock_init(&cd->print_lock); 155 156 cd->ddcb_software_timeout = genwqe_ddcb_software_timeout; 157 cd->kill_timeout = genwqe_kill_timeout; 158 159 for (j = 0; j < GENWQE_MAX_VFS; j++) 160 cd->vf_jobtimeout_msec[j] = genwqe_vf_jobtimeout_msec; 161 162 genwqe_devices[i] = cd; 163 return cd; 164 } 165 166 static void genwqe_dev_free(struct genwqe_dev *cd) 167 { 168 if (!cd) 169 return; 170 171 genwqe_devices[cd->card_idx] = NULL; 172 kfree(cd); 173 } 174 175 /** 176 * genwqe_bus_reset() - Card recovery 177 * 178 * pci_reset_function() will recover the device and ensure that the 179 * registers are accessible again when it completes with success. If 180 * not, the card will stay dead and registers will be unaccessible 181 * still. 182 */ 183 static int genwqe_bus_reset(struct genwqe_dev *cd) 184 { 185 int bars, rc = 0; 186 struct pci_dev *pci_dev = cd->pci_dev; 187 void __iomem *mmio; 188 189 if (cd->err_inject & GENWQE_INJECT_BUS_RESET_FAILURE) 190 return -EIO; 191 192 mmio = cd->mmio; 193 cd->mmio = NULL; 194 pci_iounmap(pci_dev, mmio); 195 196 bars = pci_select_bars(pci_dev, IORESOURCE_MEM); 197 pci_release_selected_regions(pci_dev, bars); 198 199 /* 200 * Firmware/BIOS might change memory mapping during bus reset. 201 * Settings like enable bus-mastering, ... are backuped and 202 * restored by the pci_reset_function(). 203 */ 204 dev_dbg(&pci_dev->dev, "[%s] pci_reset function ...\n", __func__); 205 rc = pci_reset_function(pci_dev); 206 if (rc) { 207 dev_err(&pci_dev->dev, 208 "[%s] err: failed reset func (rc %d)\n", __func__, rc); 209 return rc; 210 } 211 dev_dbg(&pci_dev->dev, "[%s] done with rc=%d\n", __func__, rc); 212 213 /* 214 * Here is the right spot to clear the register read 215 * failure. pci_bus_reset() does this job in real systems. 216 */ 217 cd->err_inject &= ~(GENWQE_INJECT_HARDWARE_FAILURE | 218 GENWQE_INJECT_GFIR_FATAL | 219 GENWQE_INJECT_GFIR_INFO); 220 221 rc = pci_request_selected_regions(pci_dev, bars, genwqe_driver_name); 222 if (rc) { 223 dev_err(&pci_dev->dev, 224 "[%s] err: request bars failed (%d)\n", __func__, rc); 225 return -EIO; 226 } 227 228 cd->mmio = pci_iomap(pci_dev, 0, 0); 229 if (cd->mmio == NULL) { 230 dev_err(&pci_dev->dev, 231 "[%s] err: mapping BAR0 failed\n", __func__); 232 return -ENOMEM; 233 } 234 return 0; 235 } 236 237 /* 238 * Hardware circumvention section. Certain bitstreams in our test-lab 239 * had different kinds of problems. Here is where we adjust those 240 * bitstreams to function will with this version of our device driver. 241 * 242 * Thise circumventions are applied to the physical function only. 243 * The magical numbers below are identifying development/manufacturing 244 * versions of the bitstream used on the card. 245 * 246 * Turn off error reporting for old/manufacturing images. 247 */ 248 249 bool genwqe_need_err_masking(struct genwqe_dev *cd) 250 { 251 return (cd->slu_unitcfg & 0xFFFF0ull) < 0x32170ull; 252 } 253 254 static void genwqe_tweak_hardware(struct genwqe_dev *cd) 255 { 256 struct pci_dev *pci_dev = cd->pci_dev; 257 258 /* Mask FIRs for development images */ 259 if (((cd->slu_unitcfg & 0xFFFF0ull) >= 0x32000ull) && 260 ((cd->slu_unitcfg & 0xFFFF0ull) <= 0x33250ull)) { 261 dev_warn(&pci_dev->dev, 262 "FIRs masked due to bitstream %016llx.%016llx\n", 263 cd->slu_unitcfg, cd->app_unitcfg); 264 265 __genwqe_writeq(cd, IO_APP_SEC_LEM_DEBUG_OVR, 266 0xFFFFFFFFFFFFFFFFull); 267 268 __genwqe_writeq(cd, IO_APP_ERR_ACT_MASK, 269 0x0000000000000000ull); 270 } 271 } 272 273 /** 274 * genwqe_recovery_on_fatal_gfir_required() - Version depended actions 275 * 276 * Bitstreams older than 2013-02-17 have a bug where fatal GFIRs must 277 * be ignored. This is e.g. true for the bitstream we gave to the card 278 * manufacturer, but also for some old bitstreams we released to our 279 * test-lab. 280 */ 281 int genwqe_recovery_on_fatal_gfir_required(struct genwqe_dev *cd) 282 { 283 return (cd->slu_unitcfg & 0xFFFF0ull) >= 0x32170ull; 284 } 285 286 int genwqe_flash_readback_fails(struct genwqe_dev *cd) 287 { 288 return (cd->slu_unitcfg & 0xFFFF0ull) < 0x32170ull; 289 } 290 291 /** 292 * genwqe_T_psec() - Calculate PF/VF timeout register content 293 * 294 * Note: From a design perspective it turned out to be a bad idea to 295 * use codes here to specifiy the frequency/speed values. An old 296 * driver cannot understand new codes and is therefore always a 297 * problem. Better is to measure out the value or put the 298 * speed/frequency directly into a register which is always a valid 299 * value for old as well as for new software. 300 */ 301 /* T = 1/f */ 302 static int genwqe_T_psec(struct genwqe_dev *cd) 303 { 304 u16 speed; /* 1/f -> 250, 200, 166, 175 */ 305 static const int T[] = { 4000, 5000, 6000, 5714 }; 306 307 speed = (u16)((cd->slu_unitcfg >> 28) & 0x0full); 308 if (speed >= ARRAY_SIZE(T)) 309 return -1; /* illegal value */ 310 311 return T[speed]; 312 } 313 314 /** 315 * genwqe_setup_pf_jtimer() - Setup PF hardware timeouts for DDCB execution 316 * 317 * Do this _after_ card_reset() is called. Otherwise the values will 318 * vanish. The settings need to be done when the queues are inactive. 319 * 320 * The max. timeout value is 2^(10+x) * T (6ns for 166MHz) * 15/16. 321 * The min. timeout value is 2^(10+x) * T (6ns for 166MHz) * 14/16. 322 */ 323 static bool genwqe_setup_pf_jtimer(struct genwqe_dev *cd) 324 { 325 u32 T = genwqe_T_psec(cd); 326 u64 x; 327 328 if (genwqe_pf_jobtimeout_msec == 0) 329 return false; 330 331 /* PF: large value needed, flash update 2sec per block */ 332 x = ilog2(genwqe_pf_jobtimeout_msec * 333 16000000000uL/(T * 15)) - 10; 334 335 genwqe_write_vreg(cd, IO_SLC_VF_APPJOB_TIMEOUT, 336 0xff00 | (x & 0xff), 0); 337 return true; 338 } 339 340 /** 341 * genwqe_setup_vf_jtimer() - Setup VF hardware timeouts for DDCB execution 342 */ 343 static bool genwqe_setup_vf_jtimer(struct genwqe_dev *cd) 344 { 345 struct pci_dev *pci_dev = cd->pci_dev; 346 unsigned int vf; 347 u32 T = genwqe_T_psec(cd); 348 u64 x; 349 int totalvfs; 350 351 totalvfs = pci_sriov_get_totalvfs(pci_dev); 352 if (totalvfs <= 0) 353 return false; 354 355 for (vf = 0; vf < totalvfs; vf++) { 356 357 if (cd->vf_jobtimeout_msec[vf] == 0) 358 continue; 359 360 x = ilog2(cd->vf_jobtimeout_msec[vf] * 361 16000000000uL/(T * 15)) - 10; 362 363 genwqe_write_vreg(cd, IO_SLC_VF_APPJOB_TIMEOUT, 364 0xff00 | (x & 0xff), vf + 1); 365 } 366 return true; 367 } 368 369 static int genwqe_ffdc_buffs_alloc(struct genwqe_dev *cd) 370 { 371 unsigned int type, e = 0; 372 373 for (type = 0; type < GENWQE_DBG_UNITS; type++) { 374 switch (type) { 375 case GENWQE_DBG_UNIT0: 376 e = genwqe_ffdc_buff_size(cd, 0); 377 break; 378 case GENWQE_DBG_UNIT1: 379 e = genwqe_ffdc_buff_size(cd, 1); 380 break; 381 case GENWQE_DBG_UNIT2: 382 e = genwqe_ffdc_buff_size(cd, 2); 383 break; 384 case GENWQE_DBG_REGS: 385 e = GENWQE_FFDC_REGS; 386 break; 387 } 388 389 /* currently support only the debug units mentioned here */ 390 cd->ffdc[type].entries = e; 391 cd->ffdc[type].regs = 392 kmalloc_array(e, sizeof(struct genwqe_reg), 393 GFP_KERNEL); 394 /* 395 * regs == NULL is ok, the using code treats this as no regs, 396 * Printing warning is ok in this case. 397 */ 398 } 399 return 0; 400 } 401 402 static void genwqe_ffdc_buffs_free(struct genwqe_dev *cd) 403 { 404 unsigned int type; 405 406 for (type = 0; type < GENWQE_DBG_UNITS; type++) { 407 kfree(cd->ffdc[type].regs); 408 cd->ffdc[type].regs = NULL; 409 } 410 } 411 412 static int genwqe_read_ids(struct genwqe_dev *cd) 413 { 414 int err = 0; 415 int slu_id; 416 struct pci_dev *pci_dev = cd->pci_dev; 417 418 cd->slu_unitcfg = __genwqe_readq(cd, IO_SLU_UNITCFG); 419 if (cd->slu_unitcfg == IO_ILLEGAL_VALUE) { 420 dev_err(&pci_dev->dev, 421 "err: SLUID=%016llx\n", cd->slu_unitcfg); 422 err = -EIO; 423 goto out_err; 424 } 425 426 slu_id = genwqe_get_slu_id(cd); 427 if (slu_id < GENWQE_SLU_ARCH_REQ || slu_id == 0xff) { 428 dev_err(&pci_dev->dev, 429 "err: incompatible SLU Architecture %u\n", slu_id); 430 err = -ENOENT; 431 goto out_err; 432 } 433 434 cd->app_unitcfg = __genwqe_readq(cd, IO_APP_UNITCFG); 435 if (cd->app_unitcfg == IO_ILLEGAL_VALUE) { 436 dev_err(&pci_dev->dev, 437 "err: APPID=%016llx\n", cd->app_unitcfg); 438 err = -EIO; 439 goto out_err; 440 } 441 genwqe_read_app_id(cd, cd->app_name, sizeof(cd->app_name)); 442 443 /* 444 * Is access to all registers possible? If we are a VF the 445 * answer is obvious. If we run fully virtualized, we need to 446 * check if we can access all registers. If we do not have 447 * full access we will cause an UR and some informational FIRs 448 * in the PF, but that should not harm. 449 */ 450 if (pci_dev->is_virtfn) 451 cd->is_privileged = 0; 452 else 453 cd->is_privileged = (__genwqe_readq(cd, IO_SLU_BITSTREAM) 454 != IO_ILLEGAL_VALUE); 455 456 out_err: 457 return err; 458 } 459 460 static int genwqe_start(struct genwqe_dev *cd) 461 { 462 int err; 463 struct pci_dev *pci_dev = cd->pci_dev; 464 465 err = genwqe_read_ids(cd); 466 if (err) 467 return err; 468 469 if (genwqe_is_privileged(cd)) { 470 /* do this after the tweaks. alloc fail is acceptable */ 471 genwqe_ffdc_buffs_alloc(cd); 472 genwqe_stop_traps(cd); 473 474 /* Collect registers e.g. FIRs, UNITIDs, traces ... */ 475 genwqe_read_ffdc_regs(cd, cd->ffdc[GENWQE_DBG_REGS].regs, 476 cd->ffdc[GENWQE_DBG_REGS].entries, 0); 477 478 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT0, 479 cd->ffdc[GENWQE_DBG_UNIT0].regs, 480 cd->ffdc[GENWQE_DBG_UNIT0].entries); 481 482 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT1, 483 cd->ffdc[GENWQE_DBG_UNIT1].regs, 484 cd->ffdc[GENWQE_DBG_UNIT1].entries); 485 486 genwqe_ffdc_buff_read(cd, GENWQE_DBG_UNIT2, 487 cd->ffdc[GENWQE_DBG_UNIT2].regs, 488 cd->ffdc[GENWQE_DBG_UNIT2].entries); 489 490 genwqe_start_traps(cd); 491 492 if (cd->card_state == GENWQE_CARD_FATAL_ERROR) { 493 dev_warn(&pci_dev->dev, 494 "[%s] chip reload/recovery!\n", __func__); 495 496 /* 497 * Stealth Mode: Reload chip on either hot 498 * reset or PERST. 499 */ 500 cd->softreset = 0x7Cull; 501 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, 502 cd->softreset); 503 504 err = genwqe_bus_reset(cd); 505 if (err != 0) { 506 dev_err(&pci_dev->dev, 507 "[%s] err: bus reset failed!\n", 508 __func__); 509 goto out; 510 } 511 512 /* 513 * Re-read the IDs because 514 * it could happen that the bitstream load 515 * failed! 516 */ 517 err = genwqe_read_ids(cd); 518 if (err) 519 goto out; 520 } 521 } 522 523 err = genwqe_setup_service_layer(cd); /* does a reset to the card */ 524 if (err != 0) { 525 dev_err(&pci_dev->dev, 526 "[%s] err: could not setup servicelayer!\n", __func__); 527 err = -ENODEV; 528 goto out; 529 } 530 531 if (genwqe_is_privileged(cd)) { /* code is running _after_ reset */ 532 genwqe_tweak_hardware(cd); 533 534 genwqe_setup_pf_jtimer(cd); 535 genwqe_setup_vf_jtimer(cd); 536 } 537 538 err = genwqe_device_create(cd); 539 if (err < 0) { 540 dev_err(&pci_dev->dev, 541 "err: chdev init failed! (err=%d)\n", err); 542 goto out_release_service_layer; 543 } 544 return 0; 545 546 out_release_service_layer: 547 genwqe_release_service_layer(cd); 548 out: 549 if (genwqe_is_privileged(cd)) 550 genwqe_ffdc_buffs_free(cd); 551 return -EIO; 552 } 553 554 /** 555 * genwqe_stop() - Stop card operation 556 * 557 * Recovery notes: 558 * As long as genwqe_thread runs we might access registers during 559 * error data capture. Same is with the genwqe_health_thread. 560 * When genwqe_bus_reset() fails this function might called two times: 561 * first by the genwqe_health_thread() and later by genwqe_remove() to 562 * unbind the device. We must be able to survive that. 563 * 564 * This function must be robust enough to be called twice. 565 */ 566 static int genwqe_stop(struct genwqe_dev *cd) 567 { 568 genwqe_finish_queue(cd); /* no register access */ 569 genwqe_device_remove(cd); /* device removed, procs killed */ 570 genwqe_release_service_layer(cd); /* here genwqe_thread is stopped */ 571 572 if (genwqe_is_privileged(cd)) { 573 pci_disable_sriov(cd->pci_dev); /* access pci config space */ 574 genwqe_ffdc_buffs_free(cd); 575 } 576 577 return 0; 578 } 579 580 /** 581 * genwqe_recover_card() - Try to recover the card if it is possible 582 * 583 * If fatal_err is set no register access is possible anymore. It is 584 * likely that genwqe_start fails in that situation. Proper error 585 * handling is required in this case. 586 * 587 * genwqe_bus_reset() will cause the pci code to call genwqe_remove() 588 * and later genwqe_probe() for all virtual functions. 589 */ 590 static int genwqe_recover_card(struct genwqe_dev *cd, int fatal_err) 591 { 592 int rc; 593 struct pci_dev *pci_dev = cd->pci_dev; 594 595 genwqe_stop(cd); 596 597 /* 598 * Make sure chip is not reloaded to maintain FFDC. Write SLU 599 * Reset Register, CPLDReset field to 0. 600 */ 601 if (!fatal_err) { 602 cd->softreset = 0x70ull; 603 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, cd->softreset); 604 } 605 606 rc = genwqe_bus_reset(cd); 607 if (rc != 0) { 608 dev_err(&pci_dev->dev, 609 "[%s] err: card recovery impossible!\n", __func__); 610 return rc; 611 } 612 613 rc = genwqe_start(cd); 614 if (rc < 0) { 615 dev_err(&pci_dev->dev, 616 "[%s] err: failed to launch device!\n", __func__); 617 return rc; 618 } 619 return 0; 620 } 621 622 static int genwqe_health_check_cond(struct genwqe_dev *cd, u64 *gfir) 623 { 624 *gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR); 625 return (*gfir & GFIR_ERR_TRIGGER) && 626 genwqe_recovery_on_fatal_gfir_required(cd); 627 } 628 629 /** 630 * genwqe_fir_checking() - Check the fault isolation registers of the card 631 * 632 * If this code works ok, can be tried out with help of the genwqe_poke tool: 633 * sudo ./tools/genwqe_poke 0x8 0xfefefefefef 634 * 635 * Now the relevant FIRs/sFIRs should be printed out and the driver should 636 * invoke recovery (devices are removed and readded). 637 */ 638 static u64 genwqe_fir_checking(struct genwqe_dev *cd) 639 { 640 int j, iterations = 0; 641 u64 mask, fir, fec, uid, gfir, gfir_masked, sfir, sfec; 642 u32 fir_addr, fir_clr_addr, fec_addr, sfir_addr, sfec_addr; 643 struct pci_dev *pci_dev = cd->pci_dev; 644 645 healthMonitor: 646 iterations++; 647 if (iterations > 16) { 648 dev_err(&pci_dev->dev, "* exit looping after %d times\n", 649 iterations); 650 goto fatal_error; 651 } 652 653 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR); 654 if (gfir != 0x0) 655 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n", 656 IO_SLC_CFGREG_GFIR, gfir); 657 if (gfir == IO_ILLEGAL_VALUE) 658 goto fatal_error; 659 660 /* 661 * Avoid printing when to GFIR bit is on prevents contignous 662 * printout e.g. for the following bug: 663 * FIR set without a 2ndary FIR/FIR cannot be cleared 664 * Comment out the following if to get the prints: 665 */ 666 if (gfir == 0) 667 return 0; 668 669 gfir_masked = gfir & GFIR_ERR_TRIGGER; /* fatal errors */ 670 671 for (uid = 0; uid < GENWQE_MAX_UNITS; uid++) { /* 0..2 in zEDC */ 672 673 /* read the primary FIR (pfir) */ 674 fir_addr = (uid << 24) + 0x08; 675 fir = __genwqe_readq(cd, fir_addr); 676 if (fir == 0x0) 677 continue; /* no error in this unit */ 678 679 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n", fir_addr, fir); 680 if (fir == IO_ILLEGAL_VALUE) 681 goto fatal_error; 682 683 /* read primary FEC */ 684 fec_addr = (uid << 24) + 0x18; 685 fec = __genwqe_readq(cd, fec_addr); 686 687 dev_err(&pci_dev->dev, "* 0x%08x 0x%016llx\n", fec_addr, fec); 688 if (fec == IO_ILLEGAL_VALUE) 689 goto fatal_error; 690 691 for (j = 0, mask = 1ULL; j < 64; j++, mask <<= 1) { 692 693 /* secondary fir empty, skip it */ 694 if ((fir & mask) == 0x0) 695 continue; 696 697 sfir_addr = (uid << 24) + 0x100 + 0x08 * j; 698 sfir = __genwqe_readq(cd, sfir_addr); 699 700 if (sfir == IO_ILLEGAL_VALUE) 701 goto fatal_error; 702 dev_err(&pci_dev->dev, 703 "* 0x%08x 0x%016llx\n", sfir_addr, sfir); 704 705 sfec_addr = (uid << 24) + 0x300 + 0x08 * j; 706 sfec = __genwqe_readq(cd, sfec_addr); 707 708 if (sfec == IO_ILLEGAL_VALUE) 709 goto fatal_error; 710 dev_err(&pci_dev->dev, 711 "* 0x%08x 0x%016llx\n", sfec_addr, sfec); 712 713 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR); 714 if (gfir == IO_ILLEGAL_VALUE) 715 goto fatal_error; 716 717 /* gfir turned on during routine! get out and 718 start over. */ 719 if ((gfir_masked == 0x0) && 720 (gfir & GFIR_ERR_TRIGGER)) { 721 goto healthMonitor; 722 } 723 724 /* do not clear if we entered with a fatal gfir */ 725 if (gfir_masked == 0x0) { 726 727 /* NEW clear by mask the logged bits */ 728 sfir_addr = (uid << 24) + 0x100 + 0x08 * j; 729 __genwqe_writeq(cd, sfir_addr, sfir); 730 731 dev_dbg(&pci_dev->dev, 732 "[HM] Clearing 2ndary FIR 0x%08x with 0x%016llx\n", 733 sfir_addr, sfir); 734 735 /* 736 * note, these cannot be error-Firs 737 * since gfir_masked is 0 after sfir 738 * was read. Also, it is safe to do 739 * this write if sfir=0. Still need to 740 * clear the primary. This just means 741 * there is no secondary FIR. 742 */ 743 744 /* clear by mask the logged bit. */ 745 fir_clr_addr = (uid << 24) + 0x10; 746 __genwqe_writeq(cd, fir_clr_addr, mask); 747 748 dev_dbg(&pci_dev->dev, 749 "[HM] Clearing primary FIR 0x%08x with 0x%016llx\n", 750 fir_clr_addr, mask); 751 } 752 } 753 } 754 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR); 755 if (gfir == IO_ILLEGAL_VALUE) 756 goto fatal_error; 757 758 if ((gfir_masked == 0x0) && (gfir & GFIR_ERR_TRIGGER)) { 759 /* 760 * Check once more that it didn't go on after all the 761 * FIRS were cleared. 762 */ 763 dev_dbg(&pci_dev->dev, "ACK! Another FIR! Recursing %d!\n", 764 iterations); 765 goto healthMonitor; 766 } 767 return gfir_masked; 768 769 fatal_error: 770 return IO_ILLEGAL_VALUE; 771 } 772 773 /** 774 * genwqe_pci_fundamental_reset() - trigger a PCIe fundamental reset on the slot 775 * 776 * Note: pci_set_pcie_reset_state() is not implemented on all archs, so this 777 * reset method will not work in all cases. 778 * 779 * Return: 0 on success or error code from pci_set_pcie_reset_state() 780 */ 781 static int genwqe_pci_fundamental_reset(struct pci_dev *pci_dev) 782 { 783 int rc; 784 785 /* 786 * lock pci config space access from userspace, 787 * save state and issue PCIe fundamental reset 788 */ 789 pci_cfg_access_lock(pci_dev); 790 pci_save_state(pci_dev); 791 rc = pci_set_pcie_reset_state(pci_dev, pcie_warm_reset); 792 if (!rc) { 793 /* keep PCIe reset asserted for 250ms */ 794 msleep(250); 795 pci_set_pcie_reset_state(pci_dev, pcie_deassert_reset); 796 /* Wait for 2s to reload flash and train the link */ 797 msleep(2000); 798 } 799 pci_restore_state(pci_dev); 800 pci_cfg_access_unlock(pci_dev); 801 return rc; 802 } 803 804 805 static int genwqe_platform_recovery(struct genwqe_dev *cd) 806 { 807 struct pci_dev *pci_dev = cd->pci_dev; 808 int rc; 809 810 dev_info(&pci_dev->dev, 811 "[%s] resetting card for error recovery\n", __func__); 812 813 /* Clear out error injection flags */ 814 cd->err_inject &= ~(GENWQE_INJECT_HARDWARE_FAILURE | 815 GENWQE_INJECT_GFIR_FATAL | 816 GENWQE_INJECT_GFIR_INFO); 817 818 genwqe_stop(cd); 819 820 /* Try recoverying the card with fundamental reset */ 821 rc = genwqe_pci_fundamental_reset(pci_dev); 822 if (!rc) { 823 rc = genwqe_start(cd); 824 if (!rc) 825 dev_info(&pci_dev->dev, 826 "[%s] card recovered\n", __func__); 827 else 828 dev_err(&pci_dev->dev, 829 "[%s] err: cannot start card services! (err=%d)\n", 830 __func__, rc); 831 } else { 832 dev_err(&pci_dev->dev, 833 "[%s] card reset failed\n", __func__); 834 } 835 836 return rc; 837 } 838 839 /* 840 * genwqe_reload_bistream() - reload card bitstream 841 * 842 * Set the appropriate register and call fundamental reset to reaload the card 843 * bitstream. 844 * 845 * Return: 0 on success, error code otherwise 846 */ 847 static int genwqe_reload_bistream(struct genwqe_dev *cd) 848 { 849 struct pci_dev *pci_dev = cd->pci_dev; 850 int rc; 851 852 dev_info(&pci_dev->dev, 853 "[%s] resetting card for bitstream reload\n", 854 __func__); 855 856 genwqe_stop(cd); 857 858 /* 859 * Cause a CPLD reprogram with the 'next_bitstream' 860 * partition on PCIe hot or fundamental reset 861 */ 862 __genwqe_writeq(cd, IO_SLC_CFGREG_SOFTRESET, 863 (cd->softreset & 0xcull) | 0x70ull); 864 865 rc = genwqe_pci_fundamental_reset(pci_dev); 866 if (rc) { 867 /* 868 * A fundamental reset failure can be caused 869 * by lack of support on the arch, so we just 870 * log the error and try to start the card 871 * again. 872 */ 873 dev_err(&pci_dev->dev, 874 "[%s] err: failed to reset card for bitstream reload\n", 875 __func__); 876 } 877 878 rc = genwqe_start(cd); 879 if (rc) { 880 dev_err(&pci_dev->dev, 881 "[%s] err: cannot start card services! (err=%d)\n", 882 __func__, rc); 883 return rc; 884 } 885 dev_info(&pci_dev->dev, 886 "[%s] card reloaded\n", __func__); 887 return 0; 888 } 889 890 891 /** 892 * genwqe_health_thread() - Health checking thread 893 * 894 * This thread is only started for the PF of the card. 895 * 896 * This thread monitors the health of the card. A critical situation 897 * is when we read registers which contain -1 (IO_ILLEGAL_VALUE). In 898 * this case we need to be recovered from outside. Writing to 899 * registers will very likely not work either. 900 * 901 * This thread must only exit if kthread_should_stop() becomes true. 902 * 903 * Condition for the health-thread to trigger: 904 * a) when a kthread_stop() request comes in or 905 * b) a critical GFIR occured 906 * 907 * Informational GFIRs are checked and potentially printed in 908 * health_check_interval seconds. 909 */ 910 static int genwqe_health_thread(void *data) 911 { 912 int rc, should_stop = 0; 913 struct genwqe_dev *cd = data; 914 struct pci_dev *pci_dev = cd->pci_dev; 915 u64 gfir, gfir_masked, slu_unitcfg, app_unitcfg; 916 917 health_thread_begin: 918 while (!kthread_should_stop()) { 919 rc = wait_event_interruptible_timeout(cd->health_waitq, 920 (genwqe_health_check_cond(cd, &gfir) || 921 (should_stop = kthread_should_stop())), 922 genwqe_health_check_interval * HZ); 923 924 if (should_stop) 925 break; 926 927 if (gfir == IO_ILLEGAL_VALUE) { 928 dev_err(&pci_dev->dev, 929 "[%s] GFIR=%016llx\n", __func__, gfir); 930 goto fatal_error; 931 } 932 933 slu_unitcfg = __genwqe_readq(cd, IO_SLU_UNITCFG); 934 if (slu_unitcfg == IO_ILLEGAL_VALUE) { 935 dev_err(&pci_dev->dev, 936 "[%s] SLU_UNITCFG=%016llx\n", 937 __func__, slu_unitcfg); 938 goto fatal_error; 939 } 940 941 app_unitcfg = __genwqe_readq(cd, IO_APP_UNITCFG); 942 if (app_unitcfg == IO_ILLEGAL_VALUE) { 943 dev_err(&pci_dev->dev, 944 "[%s] APP_UNITCFG=%016llx\n", 945 __func__, app_unitcfg); 946 goto fatal_error; 947 } 948 949 gfir = __genwqe_readq(cd, IO_SLC_CFGREG_GFIR); 950 if (gfir == IO_ILLEGAL_VALUE) { 951 dev_err(&pci_dev->dev, 952 "[%s] %s: GFIR=%016llx\n", __func__, 953 (gfir & GFIR_ERR_TRIGGER) ? "err" : "info", 954 gfir); 955 goto fatal_error; 956 } 957 958 gfir_masked = genwqe_fir_checking(cd); 959 if (gfir_masked == IO_ILLEGAL_VALUE) 960 goto fatal_error; 961 962 /* 963 * GFIR ErrorTrigger bits set => reset the card! 964 * Never do this for old/manufacturing images! 965 */ 966 if ((gfir_masked) && !cd->skip_recovery && 967 genwqe_recovery_on_fatal_gfir_required(cd)) { 968 969 cd->card_state = GENWQE_CARD_FATAL_ERROR; 970 971 rc = genwqe_recover_card(cd, 0); 972 if (rc < 0) { 973 /* FIXME Card is unusable and needs unbind! */ 974 goto fatal_error; 975 } 976 } 977 978 if (cd->card_state == GENWQE_CARD_RELOAD_BITSTREAM) { 979 /* Userspace requested card bitstream reload */ 980 rc = genwqe_reload_bistream(cd); 981 if (rc) 982 goto fatal_error; 983 } 984 985 cd->last_gfir = gfir; 986 cond_resched(); 987 } 988 989 return 0; 990 991 fatal_error: 992 if (cd->use_platform_recovery) { 993 /* 994 * Since we use raw accessors, EEH errors won't be detected 995 * by the platform until we do a non-raw MMIO or config space 996 * read 997 */ 998 readq(cd->mmio + IO_SLC_CFGREG_GFIR); 999 1000 /* We do nothing if the card is going over PCI recovery */ 1001 if (pci_channel_offline(pci_dev)) 1002 return -EIO; 1003 1004 /* 1005 * If it's supported by the platform, we try a fundamental reset 1006 * to recover from a fatal error. Otherwise, we continue to wait 1007 * for an external recovery procedure to take care of it. 1008 */ 1009 rc = genwqe_platform_recovery(cd); 1010 if (!rc) 1011 goto health_thread_begin; 1012 } 1013 1014 dev_err(&pci_dev->dev, 1015 "[%s] card unusable. Please trigger unbind!\n", __func__); 1016 1017 /* Bring down logical devices to inform user space via udev remove. */ 1018 cd->card_state = GENWQE_CARD_FATAL_ERROR; 1019 genwqe_stop(cd); 1020 1021 /* genwqe_bus_reset failed(). Now wait for genwqe_remove(). */ 1022 while (!kthread_should_stop()) 1023 cond_resched(); 1024 1025 return -EIO; 1026 } 1027 1028 static int genwqe_health_check_start(struct genwqe_dev *cd) 1029 { 1030 int rc; 1031 1032 if (genwqe_health_check_interval <= 0) 1033 return 0; /* valid for disabling the service */ 1034 1035 /* moved before request_irq() */ 1036 /* init_waitqueue_head(&cd->health_waitq); */ 1037 1038 cd->health_thread = kthread_run(genwqe_health_thread, cd, 1039 GENWQE_DEVNAME "%d_health", 1040 cd->card_idx); 1041 if (IS_ERR(cd->health_thread)) { 1042 rc = PTR_ERR(cd->health_thread); 1043 cd->health_thread = NULL; 1044 return rc; 1045 } 1046 return 0; 1047 } 1048 1049 static int genwqe_health_thread_running(struct genwqe_dev *cd) 1050 { 1051 return cd->health_thread != NULL; 1052 } 1053 1054 static int genwqe_health_check_stop(struct genwqe_dev *cd) 1055 { 1056 int rc; 1057 1058 if (!genwqe_health_thread_running(cd)) 1059 return -EIO; 1060 1061 rc = kthread_stop(cd->health_thread); 1062 cd->health_thread = NULL; 1063 return 0; 1064 } 1065 1066 /** 1067 * genwqe_pci_setup() - Allocate PCIe related resources for our card 1068 */ 1069 static int genwqe_pci_setup(struct genwqe_dev *cd) 1070 { 1071 int err, bars; 1072 struct pci_dev *pci_dev = cd->pci_dev; 1073 1074 bars = pci_select_bars(pci_dev, IORESOURCE_MEM); 1075 err = pci_enable_device_mem(pci_dev); 1076 if (err) { 1077 dev_err(&pci_dev->dev, 1078 "err: failed to enable pci memory (err=%d)\n", err); 1079 goto err_out; 1080 } 1081 1082 /* Reserve PCI I/O and memory resources */ 1083 err = pci_request_selected_regions(pci_dev, bars, genwqe_driver_name); 1084 if (err) { 1085 dev_err(&pci_dev->dev, 1086 "[%s] err: request bars failed (%d)\n", __func__, err); 1087 err = -EIO; 1088 goto err_disable_device; 1089 } 1090 1091 /* check for 64-bit DMA address supported (DAC) */ 1092 if (!pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64))) { 1093 err = pci_set_consistent_dma_mask(pci_dev, DMA_BIT_MASK(64)); 1094 if (err) { 1095 dev_err(&pci_dev->dev, 1096 "err: DMA64 consistent mask error\n"); 1097 err = -EIO; 1098 goto out_release_resources; 1099 } 1100 /* check for 32-bit DMA address supported (SAC) */ 1101 } else if (!pci_set_dma_mask(pci_dev, DMA_BIT_MASK(32))) { 1102 err = pci_set_consistent_dma_mask(pci_dev, DMA_BIT_MASK(32)); 1103 if (err) { 1104 dev_err(&pci_dev->dev, 1105 "err: DMA32 consistent mask error\n"); 1106 err = -EIO; 1107 goto out_release_resources; 1108 } 1109 } else { 1110 dev_err(&pci_dev->dev, 1111 "err: neither DMA32 nor DMA64 supported\n"); 1112 err = -EIO; 1113 goto out_release_resources; 1114 } 1115 1116 pci_set_master(pci_dev); 1117 pci_enable_pcie_error_reporting(pci_dev); 1118 1119 /* EEH recovery requires PCIe fundamental reset */ 1120 pci_dev->needs_freset = 1; 1121 1122 /* request complete BAR-0 space (length = 0) */ 1123 cd->mmio_len = pci_resource_len(pci_dev, 0); 1124 cd->mmio = pci_iomap(pci_dev, 0, 0); 1125 if (cd->mmio == NULL) { 1126 dev_err(&pci_dev->dev, 1127 "[%s] err: mapping BAR0 failed\n", __func__); 1128 err = -ENOMEM; 1129 goto out_release_resources; 1130 } 1131 1132 cd->num_vfs = pci_sriov_get_totalvfs(pci_dev); 1133 if (cd->num_vfs < 0) 1134 cd->num_vfs = 0; 1135 1136 err = genwqe_read_ids(cd); 1137 if (err) 1138 goto out_iounmap; 1139 1140 return 0; 1141 1142 out_iounmap: 1143 pci_iounmap(pci_dev, cd->mmio); 1144 out_release_resources: 1145 pci_release_selected_regions(pci_dev, bars); 1146 err_disable_device: 1147 pci_disable_device(pci_dev); 1148 err_out: 1149 return err; 1150 } 1151 1152 /** 1153 * genwqe_pci_remove() - Free PCIe related resources for our card 1154 */ 1155 static void genwqe_pci_remove(struct genwqe_dev *cd) 1156 { 1157 int bars; 1158 struct pci_dev *pci_dev = cd->pci_dev; 1159 1160 if (cd->mmio) 1161 pci_iounmap(pci_dev, cd->mmio); 1162 1163 bars = pci_select_bars(pci_dev, IORESOURCE_MEM); 1164 pci_release_selected_regions(pci_dev, bars); 1165 pci_disable_device(pci_dev); 1166 } 1167 1168 /** 1169 * genwqe_probe() - Device initialization 1170 * @pdev: PCI device information struct 1171 * 1172 * Callable for multiple cards. This function is called on bind. 1173 * 1174 * Return: 0 if succeeded, < 0 when failed 1175 */ 1176 static int genwqe_probe(struct pci_dev *pci_dev, 1177 const struct pci_device_id *id) 1178 { 1179 int err; 1180 struct genwqe_dev *cd; 1181 1182 genwqe_init_crc32(); 1183 1184 cd = genwqe_dev_alloc(); 1185 if (IS_ERR(cd)) { 1186 dev_err(&pci_dev->dev, "err: could not alloc mem (err=%d)!\n", 1187 (int)PTR_ERR(cd)); 1188 return PTR_ERR(cd); 1189 } 1190 1191 dev_set_drvdata(&pci_dev->dev, cd); 1192 cd->pci_dev = pci_dev; 1193 1194 err = genwqe_pci_setup(cd); 1195 if (err < 0) { 1196 dev_err(&pci_dev->dev, 1197 "err: problems with PCI setup (err=%d)\n", err); 1198 goto out_free_dev; 1199 } 1200 1201 err = genwqe_start(cd); 1202 if (err < 0) { 1203 dev_err(&pci_dev->dev, 1204 "err: cannot start card services! (err=%d)\n", err); 1205 goto out_pci_remove; 1206 } 1207 1208 if (genwqe_is_privileged(cd)) { 1209 err = genwqe_health_check_start(cd); 1210 if (err < 0) { 1211 dev_err(&pci_dev->dev, 1212 "err: cannot start health checking! (err=%d)\n", 1213 err); 1214 goto out_stop_services; 1215 } 1216 } 1217 return 0; 1218 1219 out_stop_services: 1220 genwqe_stop(cd); 1221 out_pci_remove: 1222 genwqe_pci_remove(cd); 1223 out_free_dev: 1224 genwqe_dev_free(cd); 1225 return err; 1226 } 1227 1228 /** 1229 * genwqe_remove() - Called when device is removed (hot-plugable) 1230 * 1231 * Or when driver is unloaded respecitively when unbind is done. 1232 */ 1233 static void genwqe_remove(struct pci_dev *pci_dev) 1234 { 1235 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev); 1236 1237 genwqe_health_check_stop(cd); 1238 1239 /* 1240 * genwqe_stop() must survive if it is called twice 1241 * sequentially. This happens when the health thread calls it 1242 * and fails on genwqe_bus_reset(). 1243 */ 1244 genwqe_stop(cd); 1245 genwqe_pci_remove(cd); 1246 genwqe_dev_free(cd); 1247 } 1248 1249 /* 1250 * genwqe_err_error_detected() - Error detection callback 1251 * 1252 * This callback is called by the PCI subsystem whenever a PCI bus 1253 * error is detected. 1254 */ 1255 static pci_ers_result_t genwqe_err_error_detected(struct pci_dev *pci_dev, 1256 enum pci_channel_state state) 1257 { 1258 struct genwqe_dev *cd; 1259 1260 dev_err(&pci_dev->dev, "[%s] state=%d\n", __func__, state); 1261 1262 cd = dev_get_drvdata(&pci_dev->dev); 1263 if (cd == NULL) 1264 return PCI_ERS_RESULT_DISCONNECT; 1265 1266 /* Stop the card */ 1267 genwqe_health_check_stop(cd); 1268 genwqe_stop(cd); 1269 1270 /* 1271 * On permanent failure, the PCI code will call device remove 1272 * after the return of this function. 1273 * genwqe_stop() can be called twice. 1274 */ 1275 if (state == pci_channel_io_perm_failure) { 1276 return PCI_ERS_RESULT_DISCONNECT; 1277 } else { 1278 genwqe_pci_remove(cd); 1279 return PCI_ERS_RESULT_NEED_RESET; 1280 } 1281 } 1282 1283 static pci_ers_result_t genwqe_err_slot_reset(struct pci_dev *pci_dev) 1284 { 1285 int rc; 1286 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev); 1287 1288 rc = genwqe_pci_setup(cd); 1289 if (!rc) { 1290 return PCI_ERS_RESULT_RECOVERED; 1291 } else { 1292 dev_err(&pci_dev->dev, 1293 "err: problems with PCI setup (err=%d)\n", rc); 1294 return PCI_ERS_RESULT_DISCONNECT; 1295 } 1296 } 1297 1298 static pci_ers_result_t genwqe_err_result_none(struct pci_dev *dev) 1299 { 1300 return PCI_ERS_RESULT_NONE; 1301 } 1302 1303 static void genwqe_err_resume(struct pci_dev *pci_dev) 1304 { 1305 int rc; 1306 struct genwqe_dev *cd = dev_get_drvdata(&pci_dev->dev); 1307 1308 rc = genwqe_start(cd); 1309 if (!rc) { 1310 rc = genwqe_health_check_start(cd); 1311 if (rc) 1312 dev_err(&pci_dev->dev, 1313 "err: cannot start health checking! (err=%d)\n", 1314 rc); 1315 } else { 1316 dev_err(&pci_dev->dev, 1317 "err: cannot start card services! (err=%d)\n", rc); 1318 } 1319 } 1320 1321 static int genwqe_sriov_configure(struct pci_dev *dev, int numvfs) 1322 { 1323 int rc; 1324 struct genwqe_dev *cd = dev_get_drvdata(&dev->dev); 1325 1326 if (numvfs > 0) { 1327 genwqe_setup_vf_jtimer(cd); 1328 rc = pci_enable_sriov(dev, numvfs); 1329 if (rc < 0) 1330 return rc; 1331 return numvfs; 1332 } 1333 if (numvfs == 0) { 1334 pci_disable_sriov(dev); 1335 return 0; 1336 } 1337 return 0; 1338 } 1339 1340 static struct pci_error_handlers genwqe_err_handler = { 1341 .error_detected = genwqe_err_error_detected, 1342 .mmio_enabled = genwqe_err_result_none, 1343 .link_reset = genwqe_err_result_none, 1344 .slot_reset = genwqe_err_slot_reset, 1345 .resume = genwqe_err_resume, 1346 }; 1347 1348 static struct pci_driver genwqe_driver = { 1349 .name = genwqe_driver_name, 1350 .id_table = genwqe_device_table, 1351 .probe = genwqe_probe, 1352 .remove = genwqe_remove, 1353 .sriov_configure = genwqe_sriov_configure, 1354 .err_handler = &genwqe_err_handler, 1355 }; 1356 1357 /** 1358 * genwqe_init_module() - Driver registration and initialization 1359 */ 1360 static int __init genwqe_init_module(void) 1361 { 1362 int rc; 1363 1364 class_genwqe = class_create(THIS_MODULE, GENWQE_DEVNAME); 1365 if (IS_ERR(class_genwqe)) { 1366 pr_err("[%s] create class failed\n", __func__); 1367 return -ENOMEM; 1368 } 1369 1370 debugfs_genwqe = debugfs_create_dir(GENWQE_DEVNAME, NULL); 1371 if (!debugfs_genwqe) { 1372 rc = -ENOMEM; 1373 goto err_out; 1374 } 1375 1376 rc = pci_register_driver(&genwqe_driver); 1377 if (rc != 0) { 1378 pr_err("[%s] pci_reg_driver (rc=%d)\n", __func__, rc); 1379 goto err_out0; 1380 } 1381 1382 return rc; 1383 1384 err_out0: 1385 debugfs_remove(debugfs_genwqe); 1386 err_out: 1387 class_destroy(class_genwqe); 1388 return rc; 1389 } 1390 1391 /** 1392 * genwqe_exit_module() - Driver exit 1393 */ 1394 static void __exit genwqe_exit_module(void) 1395 { 1396 pci_unregister_driver(&genwqe_driver); 1397 debugfs_remove(debugfs_genwqe); 1398 class_destroy(class_genwqe); 1399 } 1400 1401 module_init(genwqe_init_module); 1402 module_exit(genwqe_exit_module); 1403