1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * at24.c - handle most I2C EEPROMs 4 * 5 * Copyright (C) 2005-2007 David Brownell 6 * Copyright (C) 2008 Wolfram Sang, Pengutronix 7 */ 8 9 #include <linux/acpi.h> 10 #include <linux/bitops.h> 11 #include <linux/capability.h> 12 #include <linux/delay.h> 13 #include <linux/i2c.h> 14 #include <linux/init.h> 15 #include <linux/jiffies.h> 16 #include <linux/kernel.h> 17 #include <linux/mod_devicetable.h> 18 #include <linux/module.h> 19 #include <linux/mutex.h> 20 #include <linux/nvmem-provider.h> 21 #include <linux/of_device.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/property.h> 24 #include <linux/regmap.h> 25 #include <linux/regulator/consumer.h> 26 #include <linux/slab.h> 27 28 /* Address pointer is 16 bit. */ 29 #define AT24_FLAG_ADDR16 BIT(7) 30 /* sysfs-entry will be read-only. */ 31 #define AT24_FLAG_READONLY BIT(6) 32 /* sysfs-entry will be world-readable. */ 33 #define AT24_FLAG_IRUGO BIT(5) 34 /* Take always 8 addresses (24c00). */ 35 #define AT24_FLAG_TAKE8ADDR BIT(4) 36 /* Factory-programmed serial number. */ 37 #define AT24_FLAG_SERIAL BIT(3) 38 /* Factory-programmed mac address. */ 39 #define AT24_FLAG_MAC BIT(2) 40 /* Does not auto-rollover reads to the next slave address. */ 41 #define AT24_FLAG_NO_RDROL BIT(1) 42 43 /* 44 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. 45 * Differences between different vendor product lines (like Atmel AT24C or 46 * MicroChip 24LC, etc) won't much matter for typical read/write access. 47 * There are also I2C RAM chips, likewise interchangeable. One example 48 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). 49 * 50 * However, misconfiguration can lose data. "Set 16-bit memory address" 51 * to a part with 8-bit addressing will overwrite data. Writing with too 52 * big a page size also loses data. And it's not safe to assume that the 53 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC 54 * uses 0x51, for just one example. 55 * 56 * Accordingly, explicit board-specific configuration data should be used 57 * in almost all cases. (One partial exception is an SMBus used to access 58 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) 59 * 60 * So this driver uses "new style" I2C driver binding, expecting to be 61 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or 62 * similar kernel-resident tables; or, configuration data coming from 63 * a bootloader. 64 * 65 * Other than binding model, current differences from "eeprom" driver are 66 * that this one handles write access and isn't restricted to 24c02 devices. 67 * It also handles larger devices (32 kbit and up) with two-byte addresses, 68 * which won't work on pure SMBus systems. 69 */ 70 71 struct at24_data { 72 /* 73 * Lock protects against activities from other Linux tasks, 74 * but not from changes by other I2C masters. 75 */ 76 struct mutex lock; 77 78 unsigned int write_max; 79 unsigned int num_addresses; 80 unsigned int offset_adj; 81 82 u32 byte_len; 83 u16 page_size; 84 u8 flags; 85 86 struct nvmem_device *nvmem; 87 struct regulator *vcc_reg; 88 void (*read_post)(unsigned int off, char *buf, size_t count); 89 90 /* 91 * Some chips tie up multiple I2C addresses; dummy devices reserve 92 * them for us. 93 */ 94 u8 bank_addr_shift; 95 struct regmap *client_regmaps[] __counted_by(num_addresses); 96 }; 97 98 /* 99 * This parameter is to help this driver avoid blocking other drivers out 100 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C 101 * clock, one 256 byte read takes about 1/43 second which is excessive; 102 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and 103 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. 104 * 105 * This value is forced to be a power of two so that writes align on pages. 106 */ 107 static unsigned int at24_io_limit = 128; 108 module_param_named(io_limit, at24_io_limit, uint, 0); 109 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); 110 111 /* 112 * Specs often allow 5 msec for a page write, sometimes 20 msec; 113 * it's important to recover from write timeouts. 114 */ 115 static unsigned int at24_write_timeout = 25; 116 module_param_named(write_timeout, at24_write_timeout, uint, 0); 117 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); 118 119 struct at24_chip_data { 120 u32 byte_len; 121 u8 flags; 122 u8 bank_addr_shift; 123 void (*read_post)(unsigned int off, char *buf, size_t count); 124 }; 125 126 #define AT24_CHIP_DATA(_name, _len, _flags) \ 127 static const struct at24_chip_data _name = { \ 128 .byte_len = _len, .flags = _flags, \ 129 } 130 131 #define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \ 132 static const struct at24_chip_data _name = { \ 133 .byte_len = _len, .flags = _flags, \ 134 .read_post = _read_post, \ 135 } 136 137 #define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \ 138 static const struct at24_chip_data _name = { \ 139 .byte_len = _len, .flags = _flags, \ 140 .bank_addr_shift = _bank_addr_shift \ 141 } 142 143 static void at24_read_post_vaio(unsigned int off, char *buf, size_t count) 144 { 145 int i; 146 147 if (capable(CAP_SYS_ADMIN)) 148 return; 149 150 /* 151 * Hide VAIO private settings to regular users: 152 * - BIOS passwords: bytes 0x00 to 0x0f 153 * - UUID: bytes 0x10 to 0x1f 154 * - Serial number: 0xc0 to 0xdf 155 */ 156 for (i = 0; i < count; i++) { 157 if ((off + i <= 0x1f) || 158 (off + i >= 0xc0 && off + i <= 0xdf)) 159 buf[i] = 0; 160 } 161 } 162 163 /* needs 8 addresses as A0-A2 are ignored */ 164 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); 165 /* old variants can't be handled with this generic entry! */ 166 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); 167 AT24_CHIP_DATA(at24_data_24cs01, 16, 168 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 169 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); 170 AT24_CHIP_DATA(at24_data_24cs02, 16, 171 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 172 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, 173 AT24_FLAG_MAC | AT24_FLAG_READONLY); 174 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, 175 AT24_FLAG_MAC | AT24_FLAG_READONLY); 176 /* spd is a 24c02 in memory DIMMs */ 177 AT24_CHIP_DATA(at24_data_spd, 2048 / 8, 178 AT24_FLAG_READONLY | AT24_FLAG_IRUGO); 179 /* 24c02_vaio is a 24c02 on some Sony laptops */ 180 AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8, 181 AT24_FLAG_READONLY | AT24_FLAG_IRUGO, 182 at24_read_post_vaio); 183 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); 184 AT24_CHIP_DATA(at24_data_24cs04, 16, 185 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 186 /* 24rf08 quirk is handled at i2c-core */ 187 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); 188 AT24_CHIP_DATA(at24_data_24cs08, 16, 189 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 190 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); 191 AT24_CHIP_DATA(at24_data_24cs16, 16, 192 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 193 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); 194 /* M24C32-D Additional Write lockable page (M24C32-D order codes) */ 195 AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16); 196 AT24_CHIP_DATA(at24_data_24cs32, 16, 197 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 198 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); 199 /* M24C64-D Additional Write lockable page (M24C64-D order codes) */ 200 AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16); 201 AT24_CHIP_DATA(at24_data_24cs64, 16, 202 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 203 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); 204 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); 205 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); 206 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); 207 AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2); 208 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); 209 /* identical to 24c08 ? */ 210 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); 211 212 static const struct i2c_device_id at24_ids[] = { 213 { "24c00", (kernel_ulong_t)&at24_data_24c00 }, 214 { "24c01", (kernel_ulong_t)&at24_data_24c01 }, 215 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, 216 { "24c02", (kernel_ulong_t)&at24_data_24c02 }, 217 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, 218 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, 219 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, 220 { "spd", (kernel_ulong_t)&at24_data_spd }, 221 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, 222 { "24c04", (kernel_ulong_t)&at24_data_24c04 }, 223 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, 224 { "24c08", (kernel_ulong_t)&at24_data_24c08 }, 225 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, 226 { "24c16", (kernel_ulong_t)&at24_data_24c16 }, 227 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, 228 { "24c32", (kernel_ulong_t)&at24_data_24c32 }, 229 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp }, 230 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, 231 { "24c64", (kernel_ulong_t)&at24_data_24c64 }, 232 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp }, 233 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, 234 { "24c128", (kernel_ulong_t)&at24_data_24c128 }, 235 { "24c256", (kernel_ulong_t)&at24_data_24c256 }, 236 { "24c512", (kernel_ulong_t)&at24_data_24c512 }, 237 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, 238 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 }, 239 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 }, 240 { "at24", 0 }, 241 { /* END OF LIST */ } 242 }; 243 MODULE_DEVICE_TABLE(i2c, at24_ids); 244 245 static const struct of_device_id at24_of_match[] = { 246 { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, 247 { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, 248 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, 249 { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, 250 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, 251 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, 252 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, 253 { .compatible = "atmel,spd", .data = &at24_data_spd }, 254 { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, 255 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, 256 { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, 257 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, 258 { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, 259 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, 260 { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, 261 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp }, 262 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, 263 { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, 264 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp }, 265 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, 266 { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, 267 { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, 268 { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, 269 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, 270 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 }, 271 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, 272 { /* END OF LIST */ }, 273 }; 274 MODULE_DEVICE_TABLE(of, at24_of_match); 275 276 static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = { 277 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, 278 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 }, 279 { /* END OF LIST */ } 280 }; 281 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); 282 283 /* 284 * This routine supports chips which consume multiple I2C addresses. It 285 * computes the addressing information to be used for a given r/w request. 286 * Assumes that sanity checks for offset happened at sysfs-layer. 287 * 288 * Slave address and byte offset derive from the offset. Always 289 * set the byte address; on a multi-master board, another master 290 * may have changed the chip's "current" address pointer. 291 */ 292 static struct regmap *at24_translate_offset(struct at24_data *at24, 293 unsigned int *offset) 294 { 295 unsigned int i; 296 297 if (at24->flags & AT24_FLAG_ADDR16) { 298 i = *offset >> 16; 299 *offset &= 0xffff; 300 } else { 301 i = *offset >> 8; 302 *offset &= 0xff; 303 } 304 305 return at24->client_regmaps[i]; 306 } 307 308 static struct device *at24_base_client_dev(struct at24_data *at24) 309 { 310 return regmap_get_device(at24->client_regmaps[0]); 311 } 312 313 static size_t at24_adjust_read_count(struct at24_data *at24, 314 unsigned int offset, size_t count) 315 { 316 unsigned int bits; 317 size_t remainder; 318 319 /* 320 * In case of multi-address chips that don't rollover reads to 321 * the next slave address: truncate the count to the slave boundary, 322 * so that the read never straddles slaves. 323 */ 324 if (at24->flags & AT24_FLAG_NO_RDROL) { 325 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; 326 remainder = BIT(bits) - offset; 327 if (count > remainder) 328 count = remainder; 329 } 330 331 if (count > at24_io_limit) 332 count = at24_io_limit; 333 334 return count; 335 } 336 337 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, 338 unsigned int offset, size_t count) 339 { 340 unsigned long timeout, read_time; 341 struct regmap *regmap; 342 int ret; 343 344 regmap = at24_translate_offset(at24, &offset); 345 count = at24_adjust_read_count(at24, offset, count); 346 347 /* adjust offset for mac and serial read ops */ 348 offset += at24->offset_adj; 349 350 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 351 do { 352 /* 353 * The timestamp shall be taken before the actual operation 354 * to avoid a premature timeout in case of high CPU load. 355 */ 356 read_time = jiffies; 357 358 ret = regmap_bulk_read(regmap, offset, buf, count); 359 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n", 360 count, offset, ret, jiffies); 361 if (!ret) 362 return count; 363 364 usleep_range(1000, 1500); 365 } while (time_before(read_time, timeout)); 366 367 return -ETIMEDOUT; 368 } 369 370 /* 371 * Note that if the hardware write-protect pin is pulled high, the whole 372 * chip is normally write protected. But there are plenty of product 373 * variants here, including OTP fuses and partial chip protect. 374 * 375 * We only use page mode writes; the alternative is sloooow. These routines 376 * write at most one page. 377 */ 378 379 static size_t at24_adjust_write_count(struct at24_data *at24, 380 unsigned int offset, size_t count) 381 { 382 unsigned int next_page; 383 384 /* write_max is at most a page */ 385 if (count > at24->write_max) 386 count = at24->write_max; 387 388 /* Never roll over backwards, to the start of this page */ 389 next_page = roundup(offset + 1, at24->page_size); 390 if (offset + count > next_page) 391 count = next_page - offset; 392 393 return count; 394 } 395 396 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, 397 unsigned int offset, size_t count) 398 { 399 unsigned long timeout, write_time; 400 struct regmap *regmap; 401 int ret; 402 403 regmap = at24_translate_offset(at24, &offset); 404 count = at24_adjust_write_count(at24, offset, count); 405 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 406 407 do { 408 /* 409 * The timestamp shall be taken before the actual operation 410 * to avoid a premature timeout in case of high CPU load. 411 */ 412 write_time = jiffies; 413 414 ret = regmap_bulk_write(regmap, offset, buf, count); 415 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n", 416 count, offset, ret, jiffies); 417 if (!ret) 418 return count; 419 420 usleep_range(1000, 1500); 421 } while (time_before(write_time, timeout)); 422 423 return -ETIMEDOUT; 424 } 425 426 static int at24_read(void *priv, unsigned int off, void *val, size_t count) 427 { 428 struct at24_data *at24; 429 struct device *dev; 430 char *buf = val; 431 int i, ret; 432 433 at24 = priv; 434 dev = at24_base_client_dev(at24); 435 436 if (unlikely(!count)) 437 return count; 438 439 if (off + count > at24->byte_len) 440 return -EINVAL; 441 442 ret = pm_runtime_resume_and_get(dev); 443 if (ret) 444 return ret; 445 /* 446 * Read data from chip, protecting against concurrent updates 447 * from this host, but not from other I2C masters. 448 */ 449 mutex_lock(&at24->lock); 450 451 for (i = 0; count; i += ret, count -= ret) { 452 ret = at24_regmap_read(at24, buf + i, off + i, count); 453 if (ret < 0) { 454 mutex_unlock(&at24->lock); 455 pm_runtime_put(dev); 456 return ret; 457 } 458 } 459 460 mutex_unlock(&at24->lock); 461 462 pm_runtime_put(dev); 463 464 if (unlikely(at24->read_post)) 465 at24->read_post(off, buf, i); 466 467 return 0; 468 } 469 470 static int at24_write(void *priv, unsigned int off, void *val, size_t count) 471 { 472 struct at24_data *at24; 473 struct device *dev; 474 char *buf = val; 475 int ret; 476 477 at24 = priv; 478 dev = at24_base_client_dev(at24); 479 480 if (unlikely(!count)) 481 return -EINVAL; 482 483 if (off + count > at24->byte_len) 484 return -EINVAL; 485 486 ret = pm_runtime_resume_and_get(dev); 487 if (ret) 488 return ret; 489 /* 490 * Write data to chip, protecting against concurrent updates 491 * from this host, but not from other I2C masters. 492 */ 493 mutex_lock(&at24->lock); 494 495 while (count) { 496 ret = at24_regmap_write(at24, buf, off, count); 497 if (ret < 0) { 498 mutex_unlock(&at24->lock); 499 pm_runtime_put(dev); 500 return ret; 501 } 502 buf += ret; 503 off += ret; 504 count -= ret; 505 } 506 507 mutex_unlock(&at24->lock); 508 509 pm_runtime_put(dev); 510 511 return 0; 512 } 513 514 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, 515 struct i2c_client *base_client, 516 struct regmap_config *regmap_config) 517 { 518 struct i2c_client *dummy_client; 519 struct regmap *regmap; 520 521 dummy_client = devm_i2c_new_dummy_device(&base_client->dev, 522 base_client->adapter, 523 base_client->addr + 524 (index << at24->bank_addr_shift)); 525 if (IS_ERR(dummy_client)) 526 return PTR_ERR(dummy_client); 527 528 regmap = devm_regmap_init_i2c(dummy_client, regmap_config); 529 if (IS_ERR(regmap)) 530 return PTR_ERR(regmap); 531 532 at24->client_regmaps[index] = regmap; 533 534 return 0; 535 } 536 537 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) 538 { 539 if (flags & AT24_FLAG_MAC) { 540 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ 541 return 0xa0 - byte_len; 542 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { 543 /* 544 * For 16 bit address pointers, the word address must contain 545 * a '10' sequence in bits 11 and 10 regardless of the 546 * intended position of the address pointer. 547 */ 548 return 0x0800; 549 } else if (flags & AT24_FLAG_SERIAL) { 550 /* 551 * Otherwise the word address must begin with a '10' sequence, 552 * regardless of the intended address. 553 */ 554 return 0x0080; 555 } else { 556 return 0; 557 } 558 } 559 560 static void at24_probe_temp_sensor(struct i2c_client *client) 561 { 562 struct at24_data *at24 = i2c_get_clientdata(client); 563 struct i2c_board_info info = { .type = "jc42" }; 564 int ret; 565 u8 val; 566 567 /* 568 * Byte 2 has value 11 for DDR3, earlier versions don't 569 * support the thermal sensor present flag 570 */ 571 ret = at24_read(at24, 2, &val, 1); 572 if (ret || val != 11) 573 return; 574 575 /* Byte 32, bit 7 is set if temp sensor is present */ 576 ret = at24_read(at24, 32, &val, 1); 577 if (ret || !(val & BIT(7))) 578 return; 579 580 info.addr = 0x18 | (client->addr & 7); 581 582 i2c_new_client_device(client->adapter, &info); 583 } 584 585 static int at24_probe(struct i2c_client *client) 586 { 587 struct regmap_config regmap_config = { }; 588 struct nvmem_config nvmem_config = { }; 589 u32 byte_len, page_size, flags, addrw; 590 const struct at24_chip_data *cdata; 591 struct device *dev = &client->dev; 592 bool i2c_fn_i2c, i2c_fn_block; 593 unsigned int i, num_addresses; 594 struct at24_data *at24; 595 bool full_power; 596 struct regmap *regmap; 597 bool writable; 598 u8 test_byte; 599 int err; 600 601 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); 602 i2c_fn_block = i2c_check_functionality(client->adapter, 603 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); 604 605 cdata = i2c_get_match_data(client); 606 if (!cdata) 607 return -ENODEV; 608 609 err = device_property_read_u32(dev, "pagesize", &page_size); 610 if (err) 611 /* 612 * This is slow, but we can't know all eeproms, so we better 613 * play safe. Specifying custom eeprom-types via device tree 614 * or properties is recommended anyhow. 615 */ 616 page_size = 1; 617 618 flags = cdata->flags; 619 if (device_property_present(dev, "read-only")) 620 flags |= AT24_FLAG_READONLY; 621 if (device_property_present(dev, "no-read-rollover")) 622 flags |= AT24_FLAG_NO_RDROL; 623 624 err = device_property_read_u32(dev, "address-width", &addrw); 625 if (!err) { 626 switch (addrw) { 627 case 8: 628 if (flags & AT24_FLAG_ADDR16) 629 dev_warn(dev, 630 "Override address width to be 8, while default is 16\n"); 631 flags &= ~AT24_FLAG_ADDR16; 632 break; 633 case 16: 634 flags |= AT24_FLAG_ADDR16; 635 break; 636 default: 637 dev_warn(dev, "Bad \"address-width\" property: %u\n", 638 addrw); 639 } 640 } 641 642 err = device_property_read_u32(dev, "size", &byte_len); 643 if (err) 644 byte_len = cdata->byte_len; 645 646 if (!i2c_fn_i2c && !i2c_fn_block) 647 page_size = 1; 648 649 if (!page_size) { 650 dev_err(dev, "page_size must not be 0!\n"); 651 return -EINVAL; 652 } 653 654 if (!is_power_of_2(page_size)) 655 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); 656 657 err = device_property_read_u32(dev, "num-addresses", &num_addresses); 658 if (err) { 659 if (flags & AT24_FLAG_TAKE8ADDR) 660 num_addresses = 8; 661 else 662 num_addresses = DIV_ROUND_UP(byte_len, 663 (flags & AT24_FLAG_ADDR16) ? 65536 : 256); 664 } 665 666 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { 667 dev_err(dev, 668 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); 669 return -EINVAL; 670 } 671 672 regmap_config.val_bits = 8; 673 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; 674 regmap_config.disable_locking = true; 675 676 regmap = devm_regmap_init_i2c(client, ®map_config); 677 if (IS_ERR(regmap)) 678 return PTR_ERR(regmap); 679 680 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses), 681 GFP_KERNEL); 682 if (!at24) 683 return -ENOMEM; 684 685 mutex_init(&at24->lock); 686 at24->byte_len = byte_len; 687 at24->page_size = page_size; 688 at24->flags = flags; 689 at24->read_post = cdata->read_post; 690 at24->bank_addr_shift = cdata->bank_addr_shift; 691 at24->num_addresses = num_addresses; 692 at24->offset_adj = at24_get_offset_adj(flags, byte_len); 693 at24->client_regmaps[0] = regmap; 694 695 at24->vcc_reg = devm_regulator_get(dev, "vcc"); 696 if (IS_ERR(at24->vcc_reg)) 697 return PTR_ERR(at24->vcc_reg); 698 699 writable = !(flags & AT24_FLAG_READONLY); 700 if (writable) { 701 at24->write_max = min_t(unsigned int, 702 page_size, at24_io_limit); 703 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) 704 at24->write_max = I2C_SMBUS_BLOCK_MAX; 705 } 706 707 /* use dummy devices for multiple-address chips */ 708 for (i = 1; i < num_addresses; i++) { 709 err = at24_make_dummy_client(at24, i, client, ®map_config); 710 if (err) 711 return err; 712 } 713 714 /* 715 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the 716 * label property is set as some platform can have multiple eeproms 717 * with same label and we can not register each of those with same 718 * label. Failing to register those eeproms trigger cascade failure 719 * on such platform. 720 */ 721 nvmem_config.id = NVMEM_DEVID_AUTO; 722 723 if (device_property_present(dev, "label")) { 724 err = device_property_read_string(dev, "label", 725 &nvmem_config.name); 726 if (err) 727 return err; 728 } else { 729 nvmem_config.name = dev_name(dev); 730 } 731 732 nvmem_config.type = NVMEM_TYPE_EEPROM; 733 nvmem_config.dev = dev; 734 nvmem_config.read_only = !writable; 735 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO); 736 nvmem_config.owner = THIS_MODULE; 737 nvmem_config.compat = true; 738 nvmem_config.base_dev = dev; 739 nvmem_config.reg_read = at24_read; 740 nvmem_config.reg_write = at24_write; 741 nvmem_config.priv = at24; 742 nvmem_config.stride = 1; 743 nvmem_config.word_size = 1; 744 nvmem_config.size = byte_len; 745 746 i2c_set_clientdata(client, at24); 747 748 full_power = acpi_dev_state_d0(&client->dev); 749 if (full_power) { 750 err = regulator_enable(at24->vcc_reg); 751 if (err) { 752 dev_err(dev, "Failed to enable vcc regulator\n"); 753 return err; 754 } 755 756 pm_runtime_set_active(dev); 757 } 758 pm_runtime_enable(dev); 759 760 at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 761 if (IS_ERR(at24->nvmem)) { 762 pm_runtime_disable(dev); 763 if (!pm_runtime_status_suspended(dev)) 764 regulator_disable(at24->vcc_reg); 765 return dev_err_probe(dev, PTR_ERR(at24->nvmem), 766 "failed to register nvmem\n"); 767 } 768 769 /* 770 * Perform a one-byte test read to verify that the chip is functional, 771 * unless powering on the device is to be avoided during probe (i.e. 772 * it's powered off right now). 773 */ 774 if (full_power) { 775 err = at24_read(at24, 0, &test_byte, 1); 776 if (err) { 777 pm_runtime_disable(dev); 778 if (!pm_runtime_status_suspended(dev)) 779 regulator_disable(at24->vcc_reg); 780 return -ENODEV; 781 } 782 } 783 784 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */ 785 if (cdata == &at24_data_spd) 786 at24_probe_temp_sensor(client); 787 788 pm_runtime_idle(dev); 789 790 if (writable) 791 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n", 792 byte_len, client->name, at24->write_max); 793 else 794 dev_info(dev, "%u byte %s EEPROM, read-only\n", 795 byte_len, client->name); 796 797 return 0; 798 } 799 800 static void at24_remove(struct i2c_client *client) 801 { 802 struct at24_data *at24 = i2c_get_clientdata(client); 803 804 pm_runtime_disable(&client->dev); 805 if (acpi_dev_state_d0(&client->dev)) { 806 if (!pm_runtime_status_suspended(&client->dev)) 807 regulator_disable(at24->vcc_reg); 808 pm_runtime_set_suspended(&client->dev); 809 } 810 } 811 812 static int __maybe_unused at24_suspend(struct device *dev) 813 { 814 struct i2c_client *client = to_i2c_client(dev); 815 struct at24_data *at24 = i2c_get_clientdata(client); 816 817 return regulator_disable(at24->vcc_reg); 818 } 819 820 static int __maybe_unused at24_resume(struct device *dev) 821 { 822 struct i2c_client *client = to_i2c_client(dev); 823 struct at24_data *at24 = i2c_get_clientdata(client); 824 825 return regulator_enable(at24->vcc_reg); 826 } 827 828 static const struct dev_pm_ops at24_pm_ops = { 829 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 830 pm_runtime_force_resume) 831 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL) 832 }; 833 834 static struct i2c_driver at24_driver = { 835 .driver = { 836 .name = "at24", 837 .pm = &at24_pm_ops, 838 .of_match_table = at24_of_match, 839 .acpi_match_table = ACPI_PTR(at24_acpi_ids), 840 }, 841 .probe = at24_probe, 842 .remove = at24_remove, 843 .id_table = at24_ids, 844 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE, 845 }; 846 847 static int __init at24_init(void) 848 { 849 if (!at24_io_limit) { 850 pr_err("at24: at24_io_limit must not be 0!\n"); 851 return -EINVAL; 852 } 853 854 at24_io_limit = rounddown_pow_of_two(at24_io_limit); 855 return i2c_add_driver(&at24_driver); 856 } 857 module_init(at24_init); 858 859 static void __exit at24_exit(void) 860 { 861 i2c_del_driver(&at24_driver); 862 } 863 module_exit(at24_exit); 864 865 MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); 866 MODULE_AUTHOR("David Brownell and Wolfram Sang"); 867 MODULE_LICENSE("GPL"); 868