xref: /linux/drivers/misc/eeprom/at24.c (revision 80d443e8876602be2c130f79c4de81e12e2a700d)
1 /*
2  * at24.c - handle most I2C EEPROMs
3  *
4  * Copyright (C) 2005-2007 David Brownell
5  * Copyright (C) 2008 Wolfram Sang, Pengutronix
6  *
7  * This program is free software; you can redistribute it and/or modify
8  * it under the terms of the GNU General Public License as published by
9  * the Free Software Foundation; either version 2 of the License, or
10  * (at your option) any later version.
11  */
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/mutex.h>
18 #include <linux/mod_devicetable.h>
19 #include <linux/log2.h>
20 #include <linux/bitops.h>
21 #include <linux/jiffies.h>
22 #include <linux/of.h>
23 #include <linux/acpi.h>
24 #include <linux/i2c.h>
25 #include <linux/nvmem-provider.h>
26 #include <linux/platform_data/at24.h>
27 
28 /*
29  * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
30  * Differences between different vendor product lines (like Atmel AT24C or
31  * MicroChip 24LC, etc) won't much matter for typical read/write access.
32  * There are also I2C RAM chips, likewise interchangeable. One example
33  * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
34  *
35  * However, misconfiguration can lose data. "Set 16-bit memory address"
36  * to a part with 8-bit addressing will overwrite data. Writing with too
37  * big a page size also loses data. And it's not safe to assume that the
38  * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
39  * uses 0x51, for just one example.
40  *
41  * Accordingly, explicit board-specific configuration data should be used
42  * in almost all cases. (One partial exception is an SMBus used to access
43  * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
44  *
45  * So this driver uses "new style" I2C driver binding, expecting to be
46  * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
47  * similar kernel-resident tables; or, configuration data coming from
48  * a bootloader.
49  *
50  * Other than binding model, current differences from "eeprom" driver are
51  * that this one handles write access and isn't restricted to 24c02 devices.
52  * It also handles larger devices (32 kbit and up) with two-byte addresses,
53  * which won't work on pure SMBus systems.
54  */
55 
56 struct at24_data {
57 	struct at24_platform_data chip;
58 	int use_smbus;
59 	int use_smbus_write;
60 
61 	ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t);
62 	ssize_t (*write_func)(struct at24_data *,
63 			      const char *, unsigned int, size_t);
64 
65 	/*
66 	 * Lock protects against activities from other Linux tasks,
67 	 * but not from changes by other I2C masters.
68 	 */
69 	struct mutex lock;
70 
71 	u8 *writebuf;
72 	unsigned write_max;
73 	unsigned num_addresses;
74 
75 	struct nvmem_config nvmem_config;
76 	struct nvmem_device *nvmem;
77 
78 	/*
79 	 * Some chips tie up multiple I2C addresses; dummy devices reserve
80 	 * them for us, and we'll use them with SMBus calls.
81 	 */
82 	struct i2c_client *client[];
83 };
84 
85 /*
86  * This parameter is to help this driver avoid blocking other drivers out
87  * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
88  * clock, one 256 byte read takes about 1/43 second which is excessive;
89  * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
90  * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
91  *
92  * This value is forced to be a power of two so that writes align on pages.
93  */
94 static unsigned io_limit = 128;
95 module_param(io_limit, uint, 0);
96 MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)");
97 
98 /*
99  * Specs often allow 5 msec for a page write, sometimes 20 msec;
100  * it's important to recover from write timeouts.
101  */
102 static unsigned write_timeout = 25;
103 module_param(write_timeout, uint, 0);
104 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)");
105 
106 #define AT24_SIZE_BYTELEN 5
107 #define AT24_SIZE_FLAGS 8
108 
109 #define AT24_BITMASK(x) (BIT(x) - 1)
110 
111 /* create non-zero magic value for given eeprom parameters */
112 #define AT24_DEVICE_MAGIC(_len, _flags) 		\
113 	((1 << AT24_SIZE_FLAGS | (_flags)) 		\
114 	    << AT24_SIZE_BYTELEN | ilog2(_len))
115 
116 /*
117  * Both reads and writes fail if the previous write didn't complete yet. This
118  * macro loops a few times waiting at least long enough for one entire page
119  * write to work while making sure that at least one iteration is run before
120  * checking the break condition.
121  *
122  * It takes two parameters: a variable in which the future timeout in jiffies
123  * will be stored and a temporary variable holding the time of the last
124  * iteration of processing the request. Both should be unsigned integers
125  * holding at least 32 bits.
126  */
127 #define loop_until_timeout(tout, op_time)				\
128 	for (tout = jiffies + msecs_to_jiffies(write_timeout), op_time = 0; \
129 	     op_time ? time_before(op_time, tout) : true;		\
130 	     usleep_range(1000, 1500), op_time = jiffies)
131 
132 static const struct i2c_device_id at24_ids[] = {
133 	/* needs 8 addresses as A0-A2 are ignored */
134 	{ "24c00",	AT24_DEVICE_MAGIC(128 / 8,	AT24_FLAG_TAKE8ADDR) },
135 	/* old variants can't be handled with this generic entry! */
136 	{ "24c01",	AT24_DEVICE_MAGIC(1024 / 8,	0) },
137 	{ "24cs01",	AT24_DEVICE_MAGIC(16,
138 				AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
139 	{ "24c02",	AT24_DEVICE_MAGIC(2048 / 8,	0) },
140 	{ "24cs02",	AT24_DEVICE_MAGIC(16,
141 				AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
142 	{ "24mac402",	AT24_DEVICE_MAGIC(48 / 8,
143 				AT24_FLAG_MAC | AT24_FLAG_READONLY) },
144 	{ "24mac602",	AT24_DEVICE_MAGIC(64 / 8,
145 				AT24_FLAG_MAC | AT24_FLAG_READONLY) },
146 	/* spd is a 24c02 in memory DIMMs */
147 	{ "spd",	AT24_DEVICE_MAGIC(2048 / 8,
148 				AT24_FLAG_READONLY | AT24_FLAG_IRUGO) },
149 	{ "24c04",	AT24_DEVICE_MAGIC(4096 / 8,	0) },
150 	{ "24cs04",	AT24_DEVICE_MAGIC(16,
151 				AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
152 	/* 24rf08 quirk is handled at i2c-core */
153 	{ "24c08",	AT24_DEVICE_MAGIC(8192 / 8,	0) },
154 	{ "24cs08",	AT24_DEVICE_MAGIC(16,
155 				AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
156 	{ "24c16",	AT24_DEVICE_MAGIC(16384 / 8,	0) },
157 	{ "24cs16",	AT24_DEVICE_MAGIC(16,
158 				AT24_FLAG_SERIAL | AT24_FLAG_READONLY) },
159 	{ "24c32",	AT24_DEVICE_MAGIC(32768 / 8,	AT24_FLAG_ADDR16) },
160 	{ "24cs32",	AT24_DEVICE_MAGIC(16,
161 				AT24_FLAG_ADDR16 |
162 				AT24_FLAG_SERIAL |
163 				AT24_FLAG_READONLY) },
164 	{ "24c64",	AT24_DEVICE_MAGIC(65536 / 8,	AT24_FLAG_ADDR16) },
165 	{ "24cs64",	AT24_DEVICE_MAGIC(16,
166 				AT24_FLAG_ADDR16 |
167 				AT24_FLAG_SERIAL |
168 				AT24_FLAG_READONLY) },
169 	{ "24c128",	AT24_DEVICE_MAGIC(131072 / 8,	AT24_FLAG_ADDR16) },
170 	{ "24c256",	AT24_DEVICE_MAGIC(262144 / 8,	AT24_FLAG_ADDR16) },
171 	{ "24c512",	AT24_DEVICE_MAGIC(524288 / 8,	AT24_FLAG_ADDR16) },
172 	{ "24c1024",	AT24_DEVICE_MAGIC(1048576 / 8,	AT24_FLAG_ADDR16) },
173 	{ "at24", 0 },
174 	{ /* END OF LIST */ }
175 };
176 MODULE_DEVICE_TABLE(i2c, at24_ids);
177 
178 static const struct acpi_device_id at24_acpi_ids[] = {
179 	{ "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) },
180 	{ }
181 };
182 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
183 
184 /*-------------------------------------------------------------------------*/
185 
186 /*
187  * This routine supports chips which consume multiple I2C addresses. It
188  * computes the addressing information to be used for a given r/w request.
189  * Assumes that sanity checks for offset happened at sysfs-layer.
190  *
191  * Slave address and byte offset derive from the offset. Always
192  * set the byte address; on a multi-master board, another master
193  * may have changed the chip's "current" address pointer.
194  *
195  * REVISIT some multi-address chips don't rollover page reads to
196  * the next slave address, so we may need to truncate the count.
197  * Those chips might need another quirk flag.
198  *
199  * If the real hardware used four adjacent 24c02 chips and that
200  * were misconfigured as one 24c08, that would be a similar effect:
201  * one "eeprom" file not four, but larger reads would fail when
202  * they crossed certain pages.
203  */
204 static struct i2c_client *at24_translate_offset(struct at24_data *at24,
205 						unsigned int *offset)
206 {
207 	unsigned i;
208 
209 	if (at24->chip.flags & AT24_FLAG_ADDR16) {
210 		i = *offset >> 16;
211 		*offset &= 0xffff;
212 	} else {
213 		i = *offset >> 8;
214 		*offset &= 0xff;
215 	}
216 
217 	return at24->client[i];
218 }
219 
220 static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf,
221 				      unsigned int offset, size_t count)
222 {
223 	unsigned long timeout, read_time;
224 	struct i2c_client *client;
225 	int status;
226 
227 	client = at24_translate_offset(at24, &offset);
228 
229 	if (count > io_limit)
230 		count = io_limit;
231 
232 	/* Smaller eeproms can work given some SMBus extension calls */
233 	if (count > I2C_SMBUS_BLOCK_MAX)
234 		count = I2C_SMBUS_BLOCK_MAX;
235 
236 	loop_until_timeout(timeout, read_time) {
237 		status = i2c_smbus_read_i2c_block_data_or_emulated(client,
238 								   offset,
239 								   count, buf);
240 
241 		dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
242 				count, offset, status, jiffies);
243 
244 		if (status == count)
245 			return count;
246 	}
247 
248 	return -ETIMEDOUT;
249 }
250 
251 static ssize_t at24_eeprom_read_i2c(struct at24_data *at24, char *buf,
252 				    unsigned int offset, size_t count)
253 {
254 	unsigned long timeout, read_time;
255 	struct i2c_client *client;
256 	struct i2c_msg msg[2];
257 	int status, i;
258 	u8 msgbuf[2];
259 
260 	memset(msg, 0, sizeof(msg));
261 	client = at24_translate_offset(at24, &offset);
262 
263 	if (count > io_limit)
264 		count = io_limit;
265 
266 	/*
267 	 * When we have a better choice than SMBus calls, use a combined I2C
268 	 * message. Write address; then read up to io_limit data bytes. Note
269 	 * that read page rollover helps us here (unlike writes). msgbuf is
270 	 * u8 and will cast to our needs.
271 	 */
272 	i = 0;
273 	if (at24->chip.flags & AT24_FLAG_ADDR16)
274 		msgbuf[i++] = offset >> 8;
275 	msgbuf[i++] = offset;
276 
277 	msg[0].addr = client->addr;
278 	msg[0].buf = msgbuf;
279 	msg[0].len = i;
280 
281 	msg[1].addr = client->addr;
282 	msg[1].flags = I2C_M_RD;
283 	msg[1].buf = buf;
284 	msg[1].len = count;
285 
286 	loop_until_timeout(timeout, read_time) {
287 		status = i2c_transfer(client->adapter, msg, 2);
288 		if (status == 2)
289 			status = count;
290 
291 		dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
292 				count, offset, status, jiffies);
293 
294 		if (status == count)
295 			return count;
296 	}
297 
298 	return -ETIMEDOUT;
299 }
300 
301 static ssize_t at24_eeprom_read_serial(struct at24_data *at24, char *buf,
302 				       unsigned int offset, size_t count)
303 {
304 	unsigned long timeout, read_time;
305 	struct i2c_client *client;
306 	struct i2c_msg msg[2];
307 	u8 addrbuf[2];
308 	int status;
309 
310 	client = at24_translate_offset(at24, &offset);
311 
312 	memset(msg, 0, sizeof(msg));
313 	msg[0].addr = client->addr;
314 	msg[0].buf = addrbuf;
315 
316 	/*
317 	 * The address pointer of the device is shared between the regular
318 	 * EEPROM array and the serial number block. The dummy write (part of
319 	 * the sequential read protocol) ensures the address pointer is reset
320 	 * to the desired position.
321 	 */
322 	if (at24->chip.flags & AT24_FLAG_ADDR16) {
323 		/*
324 		 * For 16 bit address pointers, the word address must contain
325 		 * a '10' sequence in bits 11 and 10 regardless of the
326 		 * intended position of the address pointer.
327 		 */
328 		addrbuf[0] = 0x08;
329 		addrbuf[1] = offset;
330 		msg[0].len = 2;
331 	} else {
332 		/*
333 		 * Otherwise the word address must begin with a '10' sequence,
334 		 * regardless of the intended address.
335 		 */
336 		addrbuf[0] = 0x80 + offset;
337 		msg[0].len = 1;
338 	}
339 
340 	msg[1].addr = client->addr;
341 	msg[1].flags = I2C_M_RD;
342 	msg[1].buf = buf;
343 	msg[1].len = count;
344 
345 	loop_until_timeout(timeout, read_time) {
346 		status = i2c_transfer(client->adapter, msg, 2);
347 		if (status == 2)
348 			return count;
349 	}
350 
351 	return -ETIMEDOUT;
352 }
353 
354 static ssize_t at24_eeprom_read_mac(struct at24_data *at24, char *buf,
355 				    unsigned int offset, size_t count)
356 {
357 	unsigned long timeout, read_time;
358 	struct i2c_client *client;
359 	struct i2c_msg msg[2];
360 	u8 addrbuf[2];
361 	int status;
362 
363 	client = at24_translate_offset(at24, &offset);
364 
365 	memset(msg, 0, sizeof(msg));
366 	msg[0].addr = client->addr;
367 	msg[0].buf = addrbuf;
368 	addrbuf[0] = 0x90 + offset;
369 	msg[0].len = 1;
370 	msg[1].addr = client->addr;
371 	msg[1].flags = I2C_M_RD;
372 	msg[1].buf = buf;
373 	msg[1].len = count;
374 
375 	loop_until_timeout(timeout, read_time) {
376 		status = i2c_transfer(client->adapter, msg, 2);
377 		if (status == 2)
378 			return count;
379 	}
380 
381 	return -ETIMEDOUT;
382 }
383 
384 /*
385  * Note that if the hardware write-protect pin is pulled high, the whole
386  * chip is normally write protected. But there are plenty of product
387  * variants here, including OTP fuses and partial chip protect.
388  *
389  * We only use page mode writes; the alternative is sloooow. These routines
390  * write at most one page.
391  */
392 
393 static size_t at24_adjust_write_count(struct at24_data *at24,
394 				      unsigned int offset, size_t count)
395 {
396 	unsigned next_page;
397 
398 	/* write_max is at most a page */
399 	if (count > at24->write_max)
400 		count = at24->write_max;
401 
402 	/* Never roll over backwards, to the start of this page */
403 	next_page = roundup(offset + 1, at24->chip.page_size);
404 	if (offset + count > next_page)
405 		count = next_page - offset;
406 
407 	return count;
408 }
409 
410 static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24,
411 					     const char *buf,
412 					     unsigned int offset, size_t count)
413 {
414 	unsigned long timeout, write_time;
415 	struct i2c_client *client;
416 	ssize_t status = 0;
417 
418 	client = at24_translate_offset(at24, &offset);
419 	count = at24_adjust_write_count(at24, offset, count);
420 
421 	loop_until_timeout(timeout, write_time) {
422 		status = i2c_smbus_write_i2c_block_data(client,
423 							offset, count, buf);
424 		if (status == 0)
425 			status = count;
426 
427 		dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
428 				count, offset, status, jiffies);
429 
430 		if (status == count)
431 			return count;
432 	}
433 
434 	return -ETIMEDOUT;
435 }
436 
437 static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24,
438 					    const char *buf,
439 					    unsigned int offset, size_t count)
440 {
441 	unsigned long timeout, write_time;
442 	struct i2c_client *client;
443 	ssize_t status = 0;
444 
445 	client = at24_translate_offset(at24, &offset);
446 
447 	loop_until_timeout(timeout, write_time) {
448 		status = i2c_smbus_write_byte_data(client, offset, buf[0]);
449 		if (status == 0)
450 			status = count;
451 
452 		dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
453 				count, offset, status, jiffies);
454 
455 		if (status == count)
456 			return count;
457 	}
458 
459 	return -ETIMEDOUT;
460 }
461 
462 static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf,
463 				     unsigned int offset, size_t count)
464 {
465 	unsigned long timeout, write_time;
466 	struct i2c_client *client;
467 	struct i2c_msg msg;
468 	ssize_t status = 0;
469 	int i = 0;
470 
471 	client = at24_translate_offset(at24, &offset);
472 	count = at24_adjust_write_count(at24, offset, count);
473 
474 	msg.addr = client->addr;
475 	msg.flags = 0;
476 
477 	/* msg.buf is u8 and casts will mask the values */
478 	msg.buf = at24->writebuf;
479 	if (at24->chip.flags & AT24_FLAG_ADDR16)
480 		msg.buf[i++] = offset >> 8;
481 
482 	msg.buf[i++] = offset;
483 	memcpy(&msg.buf[i], buf, count);
484 	msg.len = i + count;
485 
486 	loop_until_timeout(timeout, write_time) {
487 		status = i2c_transfer(client->adapter, &msg, 1);
488 		if (status == 1)
489 			status = count;
490 
491 		dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n",
492 				count, offset, status, jiffies);
493 
494 		if (status == count)
495 			return count;
496 	}
497 
498 	return -ETIMEDOUT;
499 }
500 
501 static int at24_read(void *priv, unsigned int off, void *val, size_t count)
502 {
503 	struct at24_data *at24 = priv;
504 	char *buf = val;
505 
506 	if (unlikely(!count))
507 		return count;
508 
509 	/*
510 	 * Read data from chip, protecting against concurrent updates
511 	 * from this host, but not from other I2C masters.
512 	 */
513 	mutex_lock(&at24->lock);
514 
515 	while (count) {
516 		int	status;
517 
518 		status = at24->read_func(at24, buf, off, count);
519 		if (status < 0) {
520 			mutex_unlock(&at24->lock);
521 			return status;
522 		}
523 		buf += status;
524 		off += status;
525 		count -= status;
526 	}
527 
528 	mutex_unlock(&at24->lock);
529 
530 	return 0;
531 }
532 
533 static int at24_write(void *priv, unsigned int off, void *val, size_t count)
534 {
535 	struct at24_data *at24 = priv;
536 	char *buf = val;
537 
538 	if (unlikely(!count))
539 		return -EINVAL;
540 
541 	/*
542 	 * Write data to chip, protecting against concurrent updates
543 	 * from this host, but not from other I2C masters.
544 	 */
545 	mutex_lock(&at24->lock);
546 
547 	while (count) {
548 		int status;
549 
550 		status = at24->write_func(at24, buf, off, count);
551 		if (status < 0) {
552 			mutex_unlock(&at24->lock);
553 			return status;
554 		}
555 		buf += status;
556 		off += status;
557 		count -= status;
558 	}
559 
560 	mutex_unlock(&at24->lock);
561 
562 	return 0;
563 }
564 
565 #ifdef CONFIG_OF
566 static void at24_get_ofdata(struct i2c_client *client,
567 			    struct at24_platform_data *chip)
568 {
569 	const __be32 *val;
570 	struct device_node *node = client->dev.of_node;
571 
572 	if (node) {
573 		if (of_get_property(node, "read-only", NULL))
574 			chip->flags |= AT24_FLAG_READONLY;
575 		val = of_get_property(node, "pagesize", NULL);
576 		if (val)
577 			chip->page_size = be32_to_cpup(val);
578 	}
579 }
580 #else
581 static void at24_get_ofdata(struct i2c_client *client,
582 			    struct at24_platform_data *chip)
583 { }
584 #endif /* CONFIG_OF */
585 
586 static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id)
587 {
588 	struct at24_platform_data chip;
589 	kernel_ulong_t magic = 0;
590 	bool writable;
591 	int use_smbus = 0;
592 	int use_smbus_write = 0;
593 	struct at24_data *at24;
594 	int err;
595 	unsigned i, num_addresses;
596 	u8 test_byte;
597 
598 	if (client->dev.platform_data) {
599 		chip = *(struct at24_platform_data *)client->dev.platform_data;
600 	} else {
601 		if (id) {
602 			magic = id->driver_data;
603 		} else {
604 			const struct acpi_device_id *aid;
605 
606 			aid = acpi_match_device(at24_acpi_ids, &client->dev);
607 			if (aid)
608 				magic = aid->driver_data;
609 		}
610 		if (!magic)
611 			return -ENODEV;
612 
613 		chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN));
614 		magic >>= AT24_SIZE_BYTELEN;
615 		chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS);
616 		/*
617 		 * This is slow, but we can't know all eeproms, so we better
618 		 * play safe. Specifying custom eeprom-types via platform_data
619 		 * is recommended anyhow.
620 		 */
621 		chip.page_size = 1;
622 
623 		/* update chipdata if OF is present */
624 		at24_get_ofdata(client, &chip);
625 
626 		chip.setup = NULL;
627 		chip.context = NULL;
628 	}
629 
630 	if (!is_power_of_2(chip.byte_len))
631 		dev_warn(&client->dev,
632 			"byte_len looks suspicious (no power of 2)!\n");
633 	if (!chip.page_size) {
634 		dev_err(&client->dev, "page_size must not be 0!\n");
635 		return -EINVAL;
636 	}
637 	if (!is_power_of_2(chip.page_size))
638 		dev_warn(&client->dev,
639 			"page_size looks suspicious (no power of 2)!\n");
640 
641 	/* Use I2C operations unless we're stuck with SMBus extensions. */
642 	if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
643 		if (chip.flags & AT24_FLAG_ADDR16)
644 			return -EPFNOSUPPORT;
645 
646 		if (i2c_check_functionality(client->adapter,
647 				I2C_FUNC_SMBUS_READ_I2C_BLOCK)) {
648 			use_smbus = I2C_SMBUS_I2C_BLOCK_DATA;
649 		} else if (i2c_check_functionality(client->adapter,
650 				I2C_FUNC_SMBUS_READ_WORD_DATA)) {
651 			use_smbus = I2C_SMBUS_WORD_DATA;
652 		} else if (i2c_check_functionality(client->adapter,
653 				I2C_FUNC_SMBUS_READ_BYTE_DATA)) {
654 			use_smbus = I2C_SMBUS_BYTE_DATA;
655 		} else {
656 			return -EPFNOSUPPORT;
657 		}
658 
659 		if (i2c_check_functionality(client->adapter,
660 				I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) {
661 			use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA;
662 		} else if (i2c_check_functionality(client->adapter,
663 				I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) {
664 			use_smbus_write = I2C_SMBUS_BYTE_DATA;
665 			chip.page_size = 1;
666 		}
667 	}
668 
669 	if (chip.flags & AT24_FLAG_TAKE8ADDR)
670 		num_addresses = 8;
671 	else
672 		num_addresses =	DIV_ROUND_UP(chip.byte_len,
673 			(chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256);
674 
675 	at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) +
676 		num_addresses * sizeof(struct i2c_client *), GFP_KERNEL);
677 	if (!at24)
678 		return -ENOMEM;
679 
680 	mutex_init(&at24->lock);
681 	at24->use_smbus = use_smbus;
682 	at24->use_smbus_write = use_smbus_write;
683 	at24->chip = chip;
684 	at24->num_addresses = num_addresses;
685 
686 	if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) {
687 		dev_err(&client->dev,
688 			"invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
689 		return -EINVAL;
690 	}
691 
692 	if (chip.flags & AT24_FLAG_SERIAL) {
693 		at24->read_func = at24_eeprom_read_serial;
694 	} else if (chip.flags & AT24_FLAG_MAC) {
695 		at24->read_func = at24_eeprom_read_mac;
696 	} else {
697 		at24->read_func = at24->use_smbus ? at24_eeprom_read_smbus
698 						  : at24_eeprom_read_i2c;
699 	}
700 
701 	if (at24->use_smbus) {
702 		if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA)
703 			at24->write_func = at24_eeprom_write_smbus_block;
704 		else
705 			at24->write_func = at24_eeprom_write_smbus_byte;
706 	} else {
707 		at24->write_func = at24_eeprom_write_i2c;
708 	}
709 
710 	writable = !(chip.flags & AT24_FLAG_READONLY);
711 	if (writable) {
712 		if (!use_smbus || use_smbus_write) {
713 
714 			unsigned write_max = chip.page_size;
715 
716 			if (write_max > io_limit)
717 				write_max = io_limit;
718 			if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX)
719 				write_max = I2C_SMBUS_BLOCK_MAX;
720 			at24->write_max = write_max;
721 
722 			/* buffer (data + address at the beginning) */
723 			at24->writebuf = devm_kzalloc(&client->dev,
724 				write_max + 2, GFP_KERNEL);
725 			if (!at24->writebuf)
726 				return -ENOMEM;
727 		} else {
728 			dev_warn(&client->dev,
729 				"cannot write due to controller restrictions.");
730 		}
731 	}
732 
733 	at24->client[0] = client;
734 
735 	/* use dummy devices for multiple-address chips */
736 	for (i = 1; i < num_addresses; i++) {
737 		at24->client[i] = i2c_new_dummy(client->adapter,
738 					client->addr + i);
739 		if (!at24->client[i]) {
740 			dev_err(&client->dev, "address 0x%02x unavailable\n",
741 					client->addr + i);
742 			err = -EADDRINUSE;
743 			goto err_clients;
744 		}
745 	}
746 
747 	i2c_set_clientdata(client, at24);
748 
749 	/*
750 	 * Perform a one-byte test read to verify that the
751 	 * chip is functional.
752 	 */
753 	err = at24_read(at24, 0, &test_byte, 1);
754 	if (err) {
755 		err = -ENODEV;
756 		goto err_clients;
757 	}
758 
759 	at24->nvmem_config.name = dev_name(&client->dev);
760 	at24->nvmem_config.dev = &client->dev;
761 	at24->nvmem_config.read_only = !writable;
762 	at24->nvmem_config.root_only = true;
763 	at24->nvmem_config.owner = THIS_MODULE;
764 	at24->nvmem_config.compat = true;
765 	at24->nvmem_config.base_dev = &client->dev;
766 	at24->nvmem_config.reg_read = at24_read;
767 	at24->nvmem_config.reg_write = at24_write;
768 	at24->nvmem_config.priv = at24;
769 	at24->nvmem_config.stride = 4;
770 	at24->nvmem_config.word_size = 1;
771 	at24->nvmem_config.size = chip.byte_len;
772 
773 	at24->nvmem = nvmem_register(&at24->nvmem_config);
774 
775 	if (IS_ERR(at24->nvmem)) {
776 		err = PTR_ERR(at24->nvmem);
777 		goto err_clients;
778 	}
779 
780 	dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n",
781 		chip.byte_len, client->name,
782 		writable ? "writable" : "read-only", at24->write_max);
783 	if (use_smbus == I2C_SMBUS_WORD_DATA ||
784 	    use_smbus == I2C_SMBUS_BYTE_DATA) {
785 		dev_notice(&client->dev, "Falling back to %s reads, "
786 			   "performance will suffer\n", use_smbus ==
787 			   I2C_SMBUS_WORD_DATA ? "word" : "byte");
788 	}
789 
790 	/* export data to kernel code */
791 	if (chip.setup)
792 		chip.setup(at24->nvmem, chip.context);
793 
794 	return 0;
795 
796 err_clients:
797 	for (i = 1; i < num_addresses; i++)
798 		if (at24->client[i])
799 			i2c_unregister_device(at24->client[i]);
800 
801 	return err;
802 }
803 
804 static int at24_remove(struct i2c_client *client)
805 {
806 	struct at24_data *at24;
807 	int i;
808 
809 	at24 = i2c_get_clientdata(client);
810 
811 	nvmem_unregister(at24->nvmem);
812 
813 	for (i = 1; i < at24->num_addresses; i++)
814 		i2c_unregister_device(at24->client[i]);
815 
816 	return 0;
817 }
818 
819 /*-------------------------------------------------------------------------*/
820 
821 static struct i2c_driver at24_driver = {
822 	.driver = {
823 		.name = "at24",
824 		.acpi_match_table = ACPI_PTR(at24_acpi_ids),
825 	},
826 	.probe = at24_probe,
827 	.remove = at24_remove,
828 	.id_table = at24_ids,
829 };
830 
831 static int __init at24_init(void)
832 {
833 	if (!io_limit) {
834 		pr_err("at24: io_limit must not be 0!\n");
835 		return -EINVAL;
836 	}
837 
838 	io_limit = rounddown_pow_of_two(io_limit);
839 	return i2c_add_driver(&at24_driver);
840 }
841 module_init(at24_init);
842 
843 static void __exit at24_exit(void)
844 {
845 	i2c_del_driver(&at24_driver);
846 }
847 module_exit(at24_exit);
848 
849 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
850 MODULE_AUTHOR("David Brownell and Wolfram Sang");
851 MODULE_LICENSE("GPL");
852