1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * at24.c - handle most I2C EEPROMs 4 * 5 * Copyright (C) 2005-2007 David Brownell 6 * Copyright (C) 2008 Wolfram Sang, Pengutronix 7 */ 8 9 #include <linux/acpi.h> 10 #include <linux/bitops.h> 11 #include <linux/capability.h> 12 #include <linux/delay.h> 13 #include <linux/i2c.h> 14 #include <linux/init.h> 15 #include <linux/jiffies.h> 16 #include <linux/kernel.h> 17 #include <linux/mod_devicetable.h> 18 #include <linux/module.h> 19 #include <linux/mutex.h> 20 #include <linux/nvmem-provider.h> 21 #include <linux/of.h> 22 #include <linux/of_device.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/property.h> 25 #include <linux/regmap.h> 26 #include <linux/regulator/consumer.h> 27 #include <linux/slab.h> 28 29 /* Address pointer is 16 bit. */ 30 #define AT24_FLAG_ADDR16 BIT(7) 31 /* sysfs-entry will be read-only. */ 32 #define AT24_FLAG_READONLY BIT(6) 33 /* sysfs-entry will be world-readable. */ 34 #define AT24_FLAG_IRUGO BIT(5) 35 /* Take always 8 addresses (24c00). */ 36 #define AT24_FLAG_TAKE8ADDR BIT(4) 37 /* Factory-programmed serial number. */ 38 #define AT24_FLAG_SERIAL BIT(3) 39 /* Factory-programmed mac address. */ 40 #define AT24_FLAG_MAC BIT(2) 41 /* Does not auto-rollover reads to the next slave address. */ 42 #define AT24_FLAG_NO_RDROL BIT(1) 43 44 /* 45 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. 46 * Differences between different vendor product lines (like Atmel AT24C or 47 * MicroChip 24LC, etc) won't much matter for typical read/write access. 48 * There are also I2C RAM chips, likewise interchangeable. One example 49 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). 50 * 51 * However, misconfiguration can lose data. "Set 16-bit memory address" 52 * to a part with 8-bit addressing will overwrite data. Writing with too 53 * big a page size also loses data. And it's not safe to assume that the 54 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC 55 * uses 0x51, for just one example. 56 * 57 * Accordingly, explicit board-specific configuration data should be used 58 * in almost all cases. (One partial exception is an SMBus used to access 59 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) 60 * 61 * So this driver uses "new style" I2C driver binding, expecting to be 62 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or 63 * similar kernel-resident tables; or, configuration data coming from 64 * a bootloader. 65 * 66 * Other than binding model, current differences from "eeprom" driver are 67 * that this one handles write access and isn't restricted to 24c02 devices. 68 * It also handles larger devices (32 kbit and up) with two-byte addresses, 69 * which won't work on pure SMBus systems. 70 */ 71 72 struct at24_data { 73 /* 74 * Lock protects against activities from other Linux tasks, 75 * but not from changes by other I2C masters. 76 */ 77 struct mutex lock; 78 79 unsigned int write_max; 80 unsigned int num_addresses; 81 unsigned int offset_adj; 82 83 u32 byte_len; 84 u16 page_size; 85 u8 flags; 86 87 struct nvmem_device *nvmem; 88 struct regulator *vcc_reg; 89 void (*read_post)(unsigned int off, char *buf, size_t count); 90 91 /* 92 * Some chips tie up multiple I2C addresses; dummy devices reserve 93 * them for us. 94 */ 95 u8 bank_addr_shift; 96 struct regmap *client_regmaps[] __counted_by(num_addresses); 97 }; 98 99 /* 100 * This parameter is to help this driver avoid blocking other drivers out 101 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C 102 * clock, one 256 byte read takes about 1/43 second which is excessive; 103 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and 104 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. 105 * 106 * This value is forced to be a power of two so that writes align on pages. 107 */ 108 static unsigned int at24_io_limit = 128; 109 module_param_named(io_limit, at24_io_limit, uint, 0); 110 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); 111 112 /* 113 * Specs often allow 5 msec for a page write, sometimes 20 msec; 114 * it's important to recover from write timeouts. 115 */ 116 static unsigned int at24_write_timeout = 25; 117 module_param_named(write_timeout, at24_write_timeout, uint, 0); 118 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); 119 120 struct at24_chip_data { 121 u32 byte_len; 122 u8 flags; 123 u8 bank_addr_shift; 124 void (*read_post)(unsigned int off, char *buf, size_t count); 125 }; 126 127 #define AT24_CHIP_DATA(_name, _len, _flags) \ 128 static const struct at24_chip_data _name = { \ 129 .byte_len = _len, .flags = _flags, \ 130 } 131 132 #define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \ 133 static const struct at24_chip_data _name = { \ 134 .byte_len = _len, .flags = _flags, \ 135 .read_post = _read_post, \ 136 } 137 138 #define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \ 139 static const struct at24_chip_data _name = { \ 140 .byte_len = _len, .flags = _flags, \ 141 .bank_addr_shift = _bank_addr_shift \ 142 } 143 144 static void at24_read_post_vaio(unsigned int off, char *buf, size_t count) 145 { 146 int i; 147 148 if (capable(CAP_SYS_ADMIN)) 149 return; 150 151 /* 152 * Hide VAIO private settings to regular users: 153 * - BIOS passwords: bytes 0x00 to 0x0f 154 * - UUID: bytes 0x10 to 0x1f 155 * - Serial number: 0xc0 to 0xdf 156 */ 157 for (i = 0; i < count; i++) { 158 if ((off + i <= 0x1f) || 159 (off + i >= 0xc0 && off + i <= 0xdf)) 160 buf[i] = 0; 161 } 162 } 163 164 /* needs 8 addresses as A0-A2 are ignored */ 165 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); 166 /* old variants can't be handled with this generic entry! */ 167 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); 168 AT24_CHIP_DATA(at24_data_24cs01, 16, 169 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 170 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); 171 AT24_CHIP_DATA(at24_data_24cs02, 16, 172 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 173 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, 174 AT24_FLAG_MAC | AT24_FLAG_READONLY); 175 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, 176 AT24_FLAG_MAC | AT24_FLAG_READONLY); 177 AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8, 178 AT24_FLAG_READONLY); 179 AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8, 180 AT24_FLAG_READONLY); 181 /* spd is a 24c02 in memory DIMMs */ 182 AT24_CHIP_DATA(at24_data_spd, 2048 / 8, 183 AT24_FLAG_READONLY | AT24_FLAG_IRUGO); 184 /* 24c02_vaio is a 24c02 on some Sony laptops */ 185 AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8, 186 AT24_FLAG_READONLY | AT24_FLAG_IRUGO, 187 at24_read_post_vaio); 188 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); 189 AT24_CHIP_DATA(at24_data_24cs04, 16, 190 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 191 /* 24rf08 quirk is handled at i2c-core */ 192 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); 193 AT24_CHIP_DATA(at24_data_24cs08, 16, 194 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 195 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); 196 AT24_CHIP_DATA(at24_data_24cs16, 16, 197 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 198 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); 199 /* M24C32-D Additional Write lockable page (M24C32-D order codes) */ 200 AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16); 201 AT24_CHIP_DATA(at24_data_24cs32, 16, 202 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 203 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); 204 /* M24C64-D Additional Write lockable page (M24C64-D order codes) */ 205 AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16); 206 AT24_CHIP_DATA(at24_data_24cs64, 16, 207 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 208 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); 209 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); 210 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); 211 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); 212 AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2); 213 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); 214 /* identical to 24c08 ? */ 215 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); 216 217 static const struct i2c_device_id at24_ids[] = { 218 { "24c00", (kernel_ulong_t)&at24_data_24c00 }, 219 { "24c01", (kernel_ulong_t)&at24_data_24c01 }, 220 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, 221 { "24c02", (kernel_ulong_t)&at24_data_24c02 }, 222 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, 223 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, 224 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, 225 { "24aa025e48", (kernel_ulong_t)&at24_data_24aa025e48 }, 226 { "24aa025e64", (kernel_ulong_t)&at24_data_24aa025e64 }, 227 { "spd", (kernel_ulong_t)&at24_data_spd }, 228 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, 229 { "24c04", (kernel_ulong_t)&at24_data_24c04 }, 230 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, 231 { "24c08", (kernel_ulong_t)&at24_data_24c08 }, 232 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, 233 { "24c16", (kernel_ulong_t)&at24_data_24c16 }, 234 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, 235 { "24c32", (kernel_ulong_t)&at24_data_24c32 }, 236 { "24c32d-wl", (kernel_ulong_t)&at24_data_24c32d_wlp }, 237 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, 238 { "24c64", (kernel_ulong_t)&at24_data_24c64 }, 239 { "24c64-wl", (kernel_ulong_t)&at24_data_24c64d_wlp }, 240 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, 241 { "24c128", (kernel_ulong_t)&at24_data_24c128 }, 242 { "24c256", (kernel_ulong_t)&at24_data_24c256 }, 243 { "24c512", (kernel_ulong_t)&at24_data_24c512 }, 244 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, 245 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 }, 246 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 }, 247 { "at24", 0 }, 248 { /* END OF LIST */ } 249 }; 250 MODULE_DEVICE_TABLE(i2c, at24_ids); 251 252 static const struct of_device_id __maybe_unused at24_of_match[] = { 253 { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, 254 { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, 255 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, 256 { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, 257 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, 258 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, 259 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, 260 { .compatible = "atmel,spd", .data = &at24_data_spd }, 261 { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, 262 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, 263 { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, 264 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, 265 { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, 266 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, 267 { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, 268 { .compatible = "atmel,24c32d-wl", .data = &at24_data_24c32d_wlp }, 269 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, 270 { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, 271 { .compatible = "atmel,24c64d-wl", .data = &at24_data_24c64d_wlp }, 272 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, 273 { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, 274 { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, 275 { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, 276 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, 277 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 }, 278 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, 279 { .compatible = "microchip,24aa025e48", .data = &at24_data_24aa025e48 }, 280 { .compatible = "microchip,24aa025e64", .data = &at24_data_24aa025e64 }, 281 { /* END OF LIST */ }, 282 }; 283 MODULE_DEVICE_TABLE(of, at24_of_match); 284 285 static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = { 286 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, 287 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 }, 288 { /* END OF LIST */ } 289 }; 290 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); 291 292 /* 293 * This routine supports chips which consume multiple I2C addresses. It 294 * computes the addressing information to be used for a given r/w request. 295 * Assumes that sanity checks for offset happened at sysfs-layer. 296 * 297 * Slave address and byte offset derive from the offset. Always 298 * set the byte address; on a multi-master board, another master 299 * may have changed the chip's "current" address pointer. 300 */ 301 static struct regmap *at24_translate_offset(struct at24_data *at24, 302 unsigned int *offset) 303 { 304 unsigned int i; 305 306 if (at24->flags & AT24_FLAG_ADDR16) { 307 i = *offset >> 16; 308 *offset &= 0xffff; 309 } else { 310 i = *offset >> 8; 311 *offset &= 0xff; 312 } 313 314 return at24->client_regmaps[i]; 315 } 316 317 static struct device *at24_base_client_dev(struct at24_data *at24) 318 { 319 return regmap_get_device(at24->client_regmaps[0]); 320 } 321 322 static size_t at24_adjust_read_count(struct at24_data *at24, 323 unsigned int offset, size_t count) 324 { 325 unsigned int bits; 326 size_t remainder; 327 328 /* 329 * In case of multi-address chips that don't rollover reads to 330 * the next slave address: truncate the count to the slave boundary, 331 * so that the read never straddles slaves. 332 */ 333 if (at24->flags & AT24_FLAG_NO_RDROL) { 334 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; 335 remainder = BIT(bits) - offset; 336 if (count > remainder) 337 count = remainder; 338 } 339 340 if (count > at24_io_limit) 341 count = at24_io_limit; 342 343 return count; 344 } 345 346 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, 347 unsigned int offset, size_t count) 348 { 349 unsigned long timeout, read_time; 350 struct regmap *regmap; 351 int ret; 352 353 regmap = at24_translate_offset(at24, &offset); 354 count = at24_adjust_read_count(at24, offset, count); 355 356 /* adjust offset for mac and serial read ops */ 357 offset += at24->offset_adj; 358 359 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 360 do { 361 /* 362 * The timestamp shall be taken before the actual operation 363 * to avoid a premature timeout in case of high CPU load. 364 */ 365 read_time = jiffies; 366 367 ret = regmap_bulk_read(regmap, offset, buf, count); 368 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n", 369 count, offset, ret, jiffies); 370 if (!ret) 371 return count; 372 373 usleep_range(1000, 1500); 374 } while (time_before(read_time, timeout)); 375 376 return -ETIMEDOUT; 377 } 378 379 /* 380 * Note that if the hardware write-protect pin is pulled high, the whole 381 * chip is normally write protected. But there are plenty of product 382 * variants here, including OTP fuses and partial chip protect. 383 * 384 * We only use page mode writes; the alternative is sloooow. These routines 385 * write at most one page. 386 */ 387 388 static size_t at24_adjust_write_count(struct at24_data *at24, 389 unsigned int offset, size_t count) 390 { 391 unsigned int next_page; 392 393 /* write_max is at most a page */ 394 if (count > at24->write_max) 395 count = at24->write_max; 396 397 /* Never roll over backwards, to the start of this page */ 398 next_page = roundup(offset + 1, at24->page_size); 399 if (offset + count > next_page) 400 count = next_page - offset; 401 402 return count; 403 } 404 405 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, 406 unsigned int offset, size_t count) 407 { 408 unsigned long timeout, write_time; 409 struct regmap *regmap; 410 int ret; 411 412 regmap = at24_translate_offset(at24, &offset); 413 count = at24_adjust_write_count(at24, offset, count); 414 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 415 416 do { 417 /* 418 * The timestamp shall be taken before the actual operation 419 * to avoid a premature timeout in case of high CPU load. 420 */ 421 write_time = jiffies; 422 423 ret = regmap_bulk_write(regmap, offset, buf, count); 424 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n", 425 count, offset, ret, jiffies); 426 if (!ret) 427 return count; 428 429 usleep_range(1000, 1500); 430 } while (time_before(write_time, timeout)); 431 432 return -ETIMEDOUT; 433 } 434 435 static int at24_read(void *priv, unsigned int off, void *val, size_t count) 436 { 437 struct at24_data *at24; 438 struct device *dev; 439 char *buf = val; 440 int i, ret; 441 442 at24 = priv; 443 dev = at24_base_client_dev(at24); 444 445 if (unlikely(!count)) 446 return count; 447 448 if (off + count > at24->byte_len) 449 return -EINVAL; 450 451 ret = pm_runtime_resume_and_get(dev); 452 if (ret) 453 return ret; 454 /* 455 * Read data from chip, protecting against concurrent updates 456 * from this host, but not from other I2C masters. 457 */ 458 mutex_lock(&at24->lock); 459 460 for (i = 0; count; i += ret, count -= ret) { 461 ret = at24_regmap_read(at24, buf + i, off + i, count); 462 if (ret < 0) { 463 mutex_unlock(&at24->lock); 464 pm_runtime_put(dev); 465 return ret; 466 } 467 } 468 469 mutex_unlock(&at24->lock); 470 471 pm_runtime_put(dev); 472 473 if (unlikely(at24->read_post)) 474 at24->read_post(off, buf, i); 475 476 return 0; 477 } 478 479 static int at24_write(void *priv, unsigned int off, void *val, size_t count) 480 { 481 struct at24_data *at24; 482 struct device *dev; 483 char *buf = val; 484 int ret; 485 486 at24 = priv; 487 dev = at24_base_client_dev(at24); 488 489 if (unlikely(!count)) 490 return -EINVAL; 491 492 if (off + count > at24->byte_len) 493 return -EINVAL; 494 495 ret = pm_runtime_resume_and_get(dev); 496 if (ret) 497 return ret; 498 /* 499 * Write data to chip, protecting against concurrent updates 500 * from this host, but not from other I2C masters. 501 */ 502 mutex_lock(&at24->lock); 503 504 while (count) { 505 ret = at24_regmap_write(at24, buf, off, count); 506 if (ret < 0) { 507 mutex_unlock(&at24->lock); 508 pm_runtime_put(dev); 509 return ret; 510 } 511 buf += ret; 512 off += ret; 513 count -= ret; 514 } 515 516 mutex_unlock(&at24->lock); 517 518 pm_runtime_put(dev); 519 520 return 0; 521 } 522 523 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, 524 struct i2c_client *base_client, 525 struct regmap_config *regmap_config) 526 { 527 struct i2c_client *dummy_client; 528 struct regmap *regmap; 529 530 dummy_client = devm_i2c_new_dummy_device(&base_client->dev, 531 base_client->adapter, 532 base_client->addr + 533 (index << at24->bank_addr_shift)); 534 if (IS_ERR(dummy_client)) 535 return PTR_ERR(dummy_client); 536 537 regmap = devm_regmap_init_i2c(dummy_client, regmap_config); 538 if (IS_ERR(regmap)) 539 return PTR_ERR(regmap); 540 541 at24->client_regmaps[index] = regmap; 542 543 return 0; 544 } 545 546 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) 547 { 548 if (flags & AT24_FLAG_MAC) { 549 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ 550 return 0xa0 - byte_len; 551 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { 552 /* 553 * For 16 bit address pointers, the word address must contain 554 * a '10' sequence in bits 11 and 10 regardless of the 555 * intended position of the address pointer. 556 */ 557 return 0x0800; 558 } else if (flags & AT24_FLAG_SERIAL) { 559 /* 560 * Otherwise the word address must begin with a '10' sequence, 561 * regardless of the intended address. 562 */ 563 return 0x0080; 564 } else { 565 return 0; 566 } 567 } 568 569 static void at24_probe_temp_sensor(struct i2c_client *client) 570 { 571 struct at24_data *at24 = i2c_get_clientdata(client); 572 struct i2c_board_info info = { .type = "jc42" }; 573 int ret; 574 u8 val; 575 576 /* 577 * Byte 2 has value 11 for DDR3, earlier versions don't 578 * support the thermal sensor present flag 579 */ 580 ret = at24_read(at24, 2, &val, 1); 581 if (ret || val != 11) 582 return; 583 584 /* Byte 32, bit 7 is set if temp sensor is present */ 585 ret = at24_read(at24, 32, &val, 1); 586 if (ret || !(val & BIT(7))) 587 return; 588 589 info.addr = 0x18 | (client->addr & 7); 590 591 i2c_new_client_device(client->adapter, &info); 592 } 593 594 static int at24_probe(struct i2c_client *client) 595 { 596 struct regmap_config regmap_config = { }; 597 struct nvmem_config nvmem_config = { }; 598 u32 byte_len, page_size, flags, addrw; 599 const struct at24_chip_data *cdata; 600 struct device *dev = &client->dev; 601 bool i2c_fn_i2c, i2c_fn_block; 602 unsigned int i, num_addresses; 603 struct at24_data *at24; 604 bool full_power; 605 struct regmap *regmap; 606 bool writable; 607 u8 test_byte; 608 int err; 609 610 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); 611 i2c_fn_block = i2c_check_functionality(client->adapter, 612 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); 613 614 cdata = i2c_get_match_data(client); 615 if (!cdata) 616 return -ENODEV; 617 618 err = device_property_read_u32(dev, "pagesize", &page_size); 619 if (err) 620 /* 621 * This is slow, but we can't know all eeproms, so we better 622 * play safe. Specifying custom eeprom-types via device tree 623 * or properties is recommended anyhow. 624 */ 625 page_size = 1; 626 627 flags = cdata->flags; 628 if (device_property_present(dev, "read-only")) 629 flags |= AT24_FLAG_READONLY; 630 if (device_property_present(dev, "no-read-rollover")) 631 flags |= AT24_FLAG_NO_RDROL; 632 633 err = device_property_read_u32(dev, "address-width", &addrw); 634 if (!err) { 635 switch (addrw) { 636 case 8: 637 if (flags & AT24_FLAG_ADDR16) 638 dev_warn(dev, 639 "Override address width to be 8, while default is 16\n"); 640 flags &= ~AT24_FLAG_ADDR16; 641 break; 642 case 16: 643 flags |= AT24_FLAG_ADDR16; 644 break; 645 default: 646 dev_warn(dev, "Bad \"address-width\" property: %u\n", 647 addrw); 648 } 649 } 650 651 err = device_property_read_u32(dev, "size", &byte_len); 652 if (err) 653 byte_len = cdata->byte_len; 654 655 if (!i2c_fn_i2c && !i2c_fn_block) 656 page_size = 1; 657 658 if (!page_size) { 659 dev_err(dev, "page_size must not be 0!\n"); 660 return -EINVAL; 661 } 662 663 if (!is_power_of_2(page_size)) 664 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); 665 666 err = device_property_read_u32(dev, "num-addresses", &num_addresses); 667 if (err) { 668 if (flags & AT24_FLAG_TAKE8ADDR) 669 num_addresses = 8; 670 else 671 num_addresses = DIV_ROUND_UP(byte_len, 672 (flags & AT24_FLAG_ADDR16) ? 65536 : 256); 673 } 674 675 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { 676 dev_err(dev, 677 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); 678 return -EINVAL; 679 } 680 681 regmap_config.val_bits = 8; 682 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; 683 regmap_config.disable_locking = true; 684 685 regmap = devm_regmap_init_i2c(client, ®map_config); 686 if (IS_ERR(regmap)) 687 return PTR_ERR(regmap); 688 689 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses), 690 GFP_KERNEL); 691 if (!at24) 692 return -ENOMEM; 693 694 mutex_init(&at24->lock); 695 at24->byte_len = byte_len; 696 at24->page_size = page_size; 697 at24->flags = flags; 698 at24->read_post = cdata->read_post; 699 at24->bank_addr_shift = cdata->bank_addr_shift; 700 at24->num_addresses = num_addresses; 701 at24->offset_adj = at24_get_offset_adj(flags, byte_len); 702 at24->client_regmaps[0] = regmap; 703 704 at24->vcc_reg = devm_regulator_get(dev, "vcc"); 705 if (IS_ERR(at24->vcc_reg)) 706 return PTR_ERR(at24->vcc_reg); 707 708 writable = !(flags & AT24_FLAG_READONLY); 709 if (writable) { 710 at24->write_max = min_t(unsigned int, 711 page_size, at24_io_limit); 712 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) 713 at24->write_max = I2C_SMBUS_BLOCK_MAX; 714 } 715 716 /* use dummy devices for multiple-address chips */ 717 for (i = 1; i < num_addresses; i++) { 718 err = at24_make_dummy_client(at24, i, client, ®map_config); 719 if (err) 720 return err; 721 } 722 723 /* 724 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the 725 * label property is set as some platform can have multiple eeproms 726 * with same label and we can not register each of those with same 727 * label. Failing to register those eeproms trigger cascade failure 728 * on such platform. 729 */ 730 nvmem_config.id = NVMEM_DEVID_AUTO; 731 732 if (device_property_present(dev, "label")) { 733 err = device_property_read_string(dev, "label", 734 &nvmem_config.name); 735 if (err) 736 return err; 737 } else { 738 nvmem_config.name = dev_name(dev); 739 } 740 741 nvmem_config.type = NVMEM_TYPE_EEPROM; 742 nvmem_config.dev = dev; 743 nvmem_config.read_only = !writable; 744 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO); 745 nvmem_config.owner = THIS_MODULE; 746 nvmem_config.compat = true; 747 nvmem_config.base_dev = dev; 748 nvmem_config.reg_read = at24_read; 749 nvmem_config.reg_write = at24_write; 750 nvmem_config.priv = at24; 751 nvmem_config.stride = 1; 752 nvmem_config.word_size = 1; 753 nvmem_config.size = byte_len; 754 755 i2c_set_clientdata(client, at24); 756 757 full_power = acpi_dev_state_d0(&client->dev); 758 if (full_power) { 759 err = regulator_enable(at24->vcc_reg); 760 if (err) { 761 dev_err(dev, "Failed to enable vcc regulator\n"); 762 return err; 763 } 764 765 pm_runtime_set_active(dev); 766 } 767 pm_runtime_enable(dev); 768 769 /* 770 * Perform a one-byte test read to verify that the chip is functional, 771 * unless powering on the device is to be avoided during probe (i.e. 772 * it's powered off right now). 773 */ 774 if (full_power) { 775 err = at24_read(at24, 0, &test_byte, 1); 776 if (err) { 777 pm_runtime_disable(dev); 778 if (!pm_runtime_status_suspended(dev)) 779 regulator_disable(at24->vcc_reg); 780 return -ENODEV; 781 } 782 } 783 784 at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 785 if (IS_ERR(at24->nvmem)) { 786 pm_runtime_disable(dev); 787 if (!pm_runtime_status_suspended(dev)) 788 regulator_disable(at24->vcc_reg); 789 return dev_err_probe(dev, PTR_ERR(at24->nvmem), 790 "failed to register nvmem\n"); 791 } 792 793 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */ 794 if (cdata == &at24_data_spd) 795 at24_probe_temp_sensor(client); 796 797 pm_runtime_idle(dev); 798 799 if (writable) 800 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n", 801 byte_len, client->name, at24->write_max); 802 else 803 dev_info(dev, "%u byte %s EEPROM, read-only\n", 804 byte_len, client->name); 805 806 return 0; 807 } 808 809 static void at24_remove(struct i2c_client *client) 810 { 811 struct at24_data *at24 = i2c_get_clientdata(client); 812 813 pm_runtime_disable(&client->dev); 814 if (acpi_dev_state_d0(&client->dev)) { 815 if (!pm_runtime_status_suspended(&client->dev)) 816 regulator_disable(at24->vcc_reg); 817 pm_runtime_set_suspended(&client->dev); 818 } 819 } 820 821 static int __maybe_unused at24_suspend(struct device *dev) 822 { 823 struct i2c_client *client = to_i2c_client(dev); 824 struct at24_data *at24 = i2c_get_clientdata(client); 825 826 return regulator_disable(at24->vcc_reg); 827 } 828 829 static int __maybe_unused at24_resume(struct device *dev) 830 { 831 struct i2c_client *client = to_i2c_client(dev); 832 struct at24_data *at24 = i2c_get_clientdata(client); 833 834 return regulator_enable(at24->vcc_reg); 835 } 836 837 static const struct dev_pm_ops at24_pm_ops = { 838 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 839 pm_runtime_force_resume) 840 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL) 841 }; 842 843 static struct i2c_driver at24_driver = { 844 .driver = { 845 .name = "at24", 846 .pm = &at24_pm_ops, 847 .of_match_table = of_match_ptr(at24_of_match), 848 .acpi_match_table = ACPI_PTR(at24_acpi_ids), 849 }, 850 .probe = at24_probe, 851 .remove = at24_remove, 852 .id_table = at24_ids, 853 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE, 854 }; 855 856 static int __init at24_init(void) 857 { 858 if (!at24_io_limit) { 859 pr_err("at24: at24_io_limit must not be 0!\n"); 860 return -EINVAL; 861 } 862 863 at24_io_limit = rounddown_pow_of_two(at24_io_limit); 864 return i2c_add_driver(&at24_driver); 865 } 866 module_init(at24_init); 867 868 static void __exit at24_exit(void) 869 { 870 i2c_del_driver(&at24_driver); 871 } 872 module_exit(at24_exit); 873 874 MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); 875 MODULE_AUTHOR("David Brownell and Wolfram Sang"); 876 MODULE_LICENSE("GPL"); 877