xref: /linux/drivers/misc/eeprom/at24.c (revision 26ba30221c03364d6ed9910be8da4c1fd871b07b)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * at24.c - handle most I2C EEPROMs
4  *
5  * Copyright (C) 2005-2007 David Brownell
6  * Copyright (C) 2008 Wolfram Sang, Pengutronix
7  */
8 
9 #include <linux/acpi.h>
10 #include <linux/bitops.h>
11 #include <linux/capability.h>
12 #include <linux/delay.h>
13 #include <linux/i2c.h>
14 #include <linux/init.h>
15 #include <linux/jiffies.h>
16 #include <linux/kernel.h>
17 #include <linux/module.h>
18 #include <linux/mutex.h>
19 #include <linux/nvmem-provider.h>
20 #include <linux/pm_runtime.h>
21 #include <linux/property.h>
22 #include <linux/regmap.h>
23 #include <linux/regulator/consumer.h>
24 #include <linux/slab.h>
25 
26 /* Address pointer is 16 bit. */
27 #define AT24_FLAG_ADDR16	BIT(7)
28 /* sysfs-entry will be read-only. */
29 #define AT24_FLAG_READONLY	BIT(6)
30 /* sysfs-entry will be world-readable. */
31 #define AT24_FLAG_IRUGO		BIT(5)
32 /* Take always 8 addresses (24c00). */
33 #define AT24_FLAG_TAKE8ADDR	BIT(4)
34 /* Factory-programmed serial number. */
35 #define AT24_FLAG_SERIAL	BIT(3)
36 /* Factory-programmed mac address. */
37 #define AT24_FLAG_MAC		BIT(2)
38 /* Does not auto-rollover reads to the next slave address. */
39 #define AT24_FLAG_NO_RDROL	BIT(1)
40 
41 /*
42  * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
43  * Differences between different vendor product lines (like Atmel AT24C or
44  * MicroChip 24LC, etc) won't much matter for typical read/write access.
45  * There are also I2C RAM chips, likewise interchangeable. One example
46  * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
47  *
48  * However, misconfiguration can lose data. "Set 16-bit memory address"
49  * to a part with 8-bit addressing will overwrite data. Writing with too
50  * big a page size also loses data. And it's not safe to assume that the
51  * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
52  * uses 0x51, for just one example.
53  *
54  * Accordingly, explicit board-specific configuration data should be used
55  * in almost all cases. (One partial exception is an SMBus used to access
56  * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
57  *
58  * So this driver uses "new style" I2C driver binding, expecting to be
59  * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
60  * similar kernel-resident tables; or, configuration data coming from
61  * a bootloader.
62  *
63  * Other than binding model, current differences from "eeprom" driver are
64  * that this one handles write access and isn't restricted to 24c02 devices.
65  * It also handles larger devices (32 kbit and up) with two-byte addresses,
66  * which won't work on pure SMBus systems.
67  */
68 
69 struct at24_data {
70 	/*
71 	 * Lock protects against activities from other Linux tasks,
72 	 * but not from changes by other I2C masters.
73 	 */
74 	struct mutex lock;
75 
76 	unsigned int write_max;
77 	unsigned int num_addresses;
78 	unsigned int offset_adj;
79 
80 	u32 byte_len;
81 	u16 page_size;
82 	u8 flags;
83 
84 	struct nvmem_device *nvmem;
85 	struct regulator *vcc_reg;
86 	void (*read_post)(unsigned int off, char *buf, size_t count);
87 
88 	/*
89 	 * Some chips tie up multiple I2C addresses; dummy devices reserve
90 	 * them for us.
91 	 */
92 	u8 bank_addr_shift;
93 	struct regmap *client_regmaps[] __counted_by(num_addresses);
94 };
95 
96 /*
97  * This parameter is to help this driver avoid blocking other drivers out
98  * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
99  * clock, one 256 byte read takes about 1/43 second which is excessive;
100  * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
101  * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
102  *
103  * This value is forced to be a power of two so that writes align on pages.
104  */
105 static unsigned int at24_io_limit = 128;
106 module_param_named(io_limit, at24_io_limit, uint, 0);
107 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
108 
109 /*
110  * Specs often allow 5 msec for a page write, sometimes 20 msec;
111  * it's important to recover from write timeouts.
112  */
113 static unsigned int at24_write_timeout = 25;
114 module_param_named(write_timeout, at24_write_timeout, uint, 0);
115 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
116 
117 struct at24_chip_data {
118 	u32 byte_len;
119 	u8 flags;
120 	u8 bank_addr_shift;
121 	void (*read_post)(unsigned int off, char *buf, size_t count);
122 };
123 
124 #define AT24_CHIP_DATA(_name, _len, _flags)				\
125 	static const struct at24_chip_data _name = {			\
126 		.byte_len = _len, .flags = _flags,			\
127 	}
128 
129 #define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post)		\
130 	static const struct at24_chip_data _name = {			\
131 		.byte_len = _len, .flags = _flags,			\
132 		.read_post = _read_post,				\
133 	}
134 
135 #define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift)	\
136 	static const struct at24_chip_data _name = {			\
137 		.byte_len = _len, .flags = _flags,			\
138 		.bank_addr_shift = _bank_addr_shift			\
139 	}
140 
141 static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
142 {
143 	int i;
144 
145 	if (capable(CAP_SYS_ADMIN))
146 		return;
147 
148 	/*
149 	 * Hide VAIO private settings to regular users:
150 	 * - BIOS passwords: bytes 0x00 to 0x0f
151 	 * - UUID: bytes 0x10 to 0x1f
152 	 * - Serial number: 0xc0 to 0xdf
153 	 */
154 	for (i = 0; i < count; i++) {
155 		if ((off + i <= 0x1f) ||
156 		    (off + i >= 0xc0 && off + i <= 0xdf))
157 			buf[i] = 0;
158 	}
159 }
160 
161 /* needs 8 addresses as A0-A2 are ignored */
162 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
163 /* old variants can't be handled with this generic entry! */
164 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
165 AT24_CHIP_DATA(at24_data_24cs01, 16,
166 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
167 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
168 AT24_CHIP_DATA(at24_data_24cs02, 16,
169 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
170 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
171 	AT24_FLAG_MAC | AT24_FLAG_READONLY);
172 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
173 	AT24_FLAG_MAC | AT24_FLAG_READONLY);
174 AT24_CHIP_DATA(at24_data_24aa025e48, 48 / 8,
175 	AT24_FLAG_READONLY);
176 AT24_CHIP_DATA(at24_data_24aa025e64, 64 / 8,
177 	AT24_FLAG_READONLY);
178 /* spd is a 24c02 in memory DIMMs */
179 AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
180 	AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
181 /* 24c02_vaio is a 24c02 on some Sony laptops */
182 AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
183 	AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
184 	at24_read_post_vaio);
185 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
186 AT24_CHIP_DATA(at24_data_24cs04, 16,
187 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
188 /* 24rf08 quirk is handled at i2c-core */
189 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
190 AT24_CHIP_DATA(at24_data_24cs08, 16,
191 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
192 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
193 AT24_CHIP_DATA(at24_data_24cs16, 16,
194 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
195 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
196 /* M24C32-D Additional Write lockable page (M24C32-D order codes) */
197 AT24_CHIP_DATA(at24_data_24c32d_wlp, 32, AT24_FLAG_ADDR16);
198 AT24_CHIP_DATA(at24_data_24cs32, 16,
199 	AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
200 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
201 /* M24C64-D Additional Write lockable page (M24C64-D order codes) */
202 AT24_CHIP_DATA(at24_data_24c64d_wlp, 32, AT24_FLAG_ADDR16);
203 AT24_CHIP_DATA(at24_data_24cs64, 16,
204 	AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
205 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
206 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
207 /* M24256E Additional Write lockable page (M24256E-F order codes) */
208 AT24_CHIP_DATA(at24_data_24256e_wlp, 64, AT24_FLAG_ADDR16);
209 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
210 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
211 AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
212 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
213 /* identical to 24c08 ? */
214 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
215 
216 static const struct i2c_device_id at24_ids[] = {
217 	{ .name = "24c00",	.driver_data = (kernel_ulong_t)&at24_data_24c00 },
218 	{ .name = "24c01",	.driver_data = (kernel_ulong_t)&at24_data_24c01 },
219 	{ .name = "24cs01",	.driver_data = (kernel_ulong_t)&at24_data_24cs01 },
220 	{ .name = "24c02",	.driver_data = (kernel_ulong_t)&at24_data_24c02 },
221 	{ .name = "24cs02",	.driver_data = (kernel_ulong_t)&at24_data_24cs02 },
222 	{ .name = "24mac402",	.driver_data = (kernel_ulong_t)&at24_data_24mac402 },
223 	{ .name = "24mac602",	.driver_data = (kernel_ulong_t)&at24_data_24mac602 },
224 	{ .name = "24aa025e48",	.driver_data = (kernel_ulong_t)&at24_data_24aa025e48 },
225 	{ .name = "24aa025e64",	.driver_data = (kernel_ulong_t)&at24_data_24aa025e64 },
226 	{ .name = "spd",	.driver_data = (kernel_ulong_t)&at24_data_spd },
227 	{ .name = "24c02-vaio",	.driver_data = (kernel_ulong_t)&at24_data_24c02_vaio },
228 	{ .name = "24c04",	.driver_data = (kernel_ulong_t)&at24_data_24c04 },
229 	{ .name = "24cs04",	.driver_data = (kernel_ulong_t)&at24_data_24cs04 },
230 	{ .name = "24c08",	.driver_data = (kernel_ulong_t)&at24_data_24c08 },
231 	{ .name = "24cs08",	.driver_data = (kernel_ulong_t)&at24_data_24cs08 },
232 	{ .name = "24c16",	.driver_data = (kernel_ulong_t)&at24_data_24c16 },
233 	{ .name = "24cs16",	.driver_data = (kernel_ulong_t)&at24_data_24cs16 },
234 	{ .name = "24c32",	.driver_data = (kernel_ulong_t)&at24_data_24c32 },
235 	{ .name = "24c32d-wl",	.driver_data = (kernel_ulong_t)&at24_data_24c32d_wlp },
236 	{ .name = "24cs32",	.driver_data = (kernel_ulong_t)&at24_data_24cs32 },
237 	{ .name = "24c64",	.driver_data = (kernel_ulong_t)&at24_data_24c64 },
238 	{ .name = "24c64-wl",	.driver_data = (kernel_ulong_t)&at24_data_24c64d_wlp },
239 	{ .name = "24cs64",	.driver_data = (kernel_ulong_t)&at24_data_24cs64 },
240 	{ .name = "24c128",	.driver_data = (kernel_ulong_t)&at24_data_24c128 },
241 	{ .name = "24c256",	.driver_data = (kernel_ulong_t)&at24_data_24c256 },
242 	{ .name = "24256e-wl",	.driver_data = (kernel_ulong_t)&at24_data_24256e_wlp },
243 	{ .name = "24c512",	.driver_data = (kernel_ulong_t)&at24_data_24c512 },
244 	{ .name = "24c1024",	.driver_data = (kernel_ulong_t)&at24_data_24c1024 },
245 	{ .name = "24c1025",	.driver_data = (kernel_ulong_t)&at24_data_24c1025 },
246 	{ .name = "24c2048",	.driver_data = (kernel_ulong_t)&at24_data_24c2048 },
247 	{ .name = "at24",	.driver_data = 0 },
248 	{ /* END OF LIST */ }
249 };
250 MODULE_DEVICE_TABLE(i2c, at24_ids);
251 
252 static const struct of_device_id at24_of_match[] = {
253 	{ .compatible = "atmel,24c00",		.data = &at24_data_24c00 },
254 	{ .compatible = "atmel,24c01",		.data = &at24_data_24c01 },
255 	{ .compatible = "atmel,24cs01",		.data = &at24_data_24cs01 },
256 	{ .compatible = "atmel,24c02",		.data = &at24_data_24c02 },
257 	{ .compatible = "atmel,24cs02",		.data = &at24_data_24cs02 },
258 	{ .compatible = "atmel,24mac402",	.data = &at24_data_24mac402 },
259 	{ .compatible = "atmel,24mac602",	.data = &at24_data_24mac602 },
260 	{ .compatible = "atmel,spd",		.data = &at24_data_spd },
261 	{ .compatible = "atmel,24c04",		.data = &at24_data_24c04 },
262 	{ .compatible = "atmel,24cs04",		.data = &at24_data_24cs04 },
263 	{ .compatible = "atmel,24c08",		.data = &at24_data_24c08 },
264 	{ .compatible = "atmel,24cs08",		.data = &at24_data_24cs08 },
265 	{ .compatible = "atmel,24c16",		.data = &at24_data_24c16 },
266 	{ .compatible = "atmel,24cs16",		.data = &at24_data_24cs16 },
267 	{ .compatible = "atmel,24c32",		.data = &at24_data_24c32 },
268 	{ .compatible = "atmel,24c32d-wl",	.data = &at24_data_24c32d_wlp },
269 	{ .compatible = "atmel,24cs32",		.data = &at24_data_24cs32 },
270 	{ .compatible = "atmel,24c64",		.data = &at24_data_24c64 },
271 	{ .compatible = "atmel,24c64d-wl",	.data = &at24_data_24c64d_wlp },
272 	{ .compatible = "atmel,24cs64",		.data = &at24_data_24cs64 },
273 	{ .compatible = "atmel,24c128",		.data = &at24_data_24c128 },
274 	{ .compatible = "atmel,24c256",		.data = &at24_data_24c256 },
275 	{ .compatible = "atmel,24c512",		.data = &at24_data_24c512 },
276 	{ .compatible = "atmel,24c1024",	.data = &at24_data_24c1024 },
277 	{ .compatible = "atmel,24c1025",	.data = &at24_data_24c1025 },
278 	{ .compatible = "atmel,24c2048",	.data = &at24_data_24c2048 },
279 	{ .compatible = "microchip,24aa025e48",	.data = &at24_data_24aa025e48 },
280 	{ .compatible = "microchip,24aa025e64",	.data = &at24_data_24aa025e64 },
281 	{ .compatible = "st,24256e-wl",		.data = &at24_data_24256e_wlp },
282 	{ /* END OF LIST */ },
283 };
284 MODULE_DEVICE_TABLE(of, at24_of_match);
285 
286 static const struct acpi_device_id at24_acpi_ids[] = {
287 	{ "INT3499",	(kernel_ulong_t)&at24_data_INT3499 },
288 	{ "TPF0001",	(kernel_ulong_t)&at24_data_24c1024 },
289 	{ /* END OF LIST */ }
290 };
291 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
292 
293 /*
294  * This routine supports chips which consume multiple I2C addresses. It
295  * computes the addressing information to be used for a given r/w request.
296  * Assumes that sanity checks for offset happened at sysfs-layer.
297  *
298  * Slave address and byte offset derive from the offset. Always
299  * set the byte address; on a multi-master board, another master
300  * may have changed the chip's "current" address pointer.
301  */
302 static struct regmap *at24_translate_offset(struct at24_data *at24,
303 					    unsigned int *offset)
304 {
305 	unsigned int i;
306 
307 	if (at24->flags & AT24_FLAG_ADDR16) {
308 		i = *offset >> 16;
309 		*offset &= 0xffff;
310 	} else {
311 		i = *offset >> 8;
312 		*offset &= 0xff;
313 	}
314 
315 	return at24->client_regmaps[i];
316 }
317 
318 static struct device *at24_base_client_dev(struct at24_data *at24)
319 {
320 	return regmap_get_device(at24->client_regmaps[0]);
321 }
322 
323 static size_t at24_adjust_read_count(struct at24_data *at24,
324 				      unsigned int offset, size_t count)
325 {
326 	unsigned int bits;
327 	size_t remainder;
328 
329 	/*
330 	 * In case of multi-address chips that don't rollover reads to
331 	 * the next slave address: truncate the count to the slave boundary,
332 	 * so that the read never straddles slaves.
333 	 */
334 	if (at24->flags & AT24_FLAG_NO_RDROL) {
335 		bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
336 		remainder = BIT(bits) - offset;
337 		if (count > remainder)
338 			count = remainder;
339 	}
340 
341 	if (count > at24_io_limit)
342 		count = at24_io_limit;
343 
344 	return count;
345 }
346 
347 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
348 				unsigned int offset, size_t count)
349 {
350 	unsigned long timeout, read_time;
351 	struct regmap *regmap;
352 	int ret;
353 
354 	regmap = at24_translate_offset(at24, &offset);
355 	count = at24_adjust_read_count(at24, offset, count);
356 
357 	/* adjust offset for mac and serial read ops */
358 	offset += at24->offset_adj;
359 
360 	timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
361 	do {
362 		/*
363 		 * The timestamp shall be taken before the actual operation
364 		 * to avoid a premature timeout in case of high CPU load.
365 		 */
366 		read_time = jiffies;
367 
368 		ret = regmap_bulk_read(regmap, offset, buf, count);
369 		dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
370 			count, offset, ret, jiffies);
371 		if (!ret)
372 			return count;
373 
374 		usleep_range(1000, 1500);
375 	} while (time_before(read_time, timeout));
376 
377 	return -ETIMEDOUT;
378 }
379 
380 /*
381  * Note that if the hardware write-protect pin is pulled high, the whole
382  * chip is normally write protected. But there are plenty of product
383  * variants here, including OTP fuses and partial chip protect.
384  *
385  * We only use page mode writes; the alternative is sloooow. These routines
386  * write at most one page.
387  */
388 
389 static size_t at24_adjust_write_count(struct at24_data *at24,
390 				      unsigned int offset, size_t count)
391 {
392 	unsigned int next_page;
393 
394 	/* write_max is at most a page */
395 	if (count > at24->write_max)
396 		count = at24->write_max;
397 
398 	/* Never roll over backwards, to the start of this page */
399 	next_page = roundup(offset + 1, at24->page_size);
400 	if (offset + count > next_page)
401 		count = next_page - offset;
402 
403 	return count;
404 }
405 
406 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
407 				 unsigned int offset, size_t count)
408 {
409 	unsigned long timeout, write_time;
410 	struct regmap *regmap;
411 	int ret;
412 
413 	regmap = at24_translate_offset(at24, &offset);
414 	count = at24_adjust_write_count(at24, offset, count);
415 	timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
416 
417 	do {
418 		/*
419 		 * The timestamp shall be taken before the actual operation
420 		 * to avoid a premature timeout in case of high CPU load.
421 		 */
422 		write_time = jiffies;
423 
424 		ret = regmap_bulk_write(regmap, offset, buf, count);
425 		dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
426 			count, offset, ret, jiffies);
427 		if (!ret)
428 			return count;
429 
430 		usleep_range(1000, 1500);
431 	} while (time_before(write_time, timeout));
432 
433 	return -ETIMEDOUT;
434 }
435 
436 static int at24_read(void *priv, unsigned int off, void *val, size_t count)
437 {
438 	struct at24_data *at24;
439 	struct device *dev;
440 	char *buf = val;
441 	int i, ret;
442 
443 	at24 = priv;
444 	dev = at24_base_client_dev(at24);
445 
446 	if (unlikely(!count))
447 		return count;
448 
449 	if (off + count > at24->byte_len)
450 		return -EINVAL;
451 
452 	ret = pm_runtime_resume_and_get(dev);
453 	if (ret)
454 		return ret;
455 	/*
456 	 * Read data from chip, protecting against concurrent updates
457 	 * from this host, but not from other I2C masters.
458 	 */
459 	mutex_lock(&at24->lock);
460 
461 	for (i = 0; count; i += ret, count -= ret) {
462 		ret = at24_regmap_read(at24, buf + i, off + i, count);
463 		if (ret < 0) {
464 			mutex_unlock(&at24->lock);
465 			pm_runtime_put(dev);
466 			return ret;
467 		}
468 	}
469 
470 	mutex_unlock(&at24->lock);
471 
472 	pm_runtime_put(dev);
473 
474 	if (unlikely(at24->read_post))
475 		at24->read_post(off, buf, i);
476 
477 	return 0;
478 }
479 
480 static int at24_write(void *priv, unsigned int off, void *val, size_t count)
481 {
482 	struct at24_data *at24;
483 	struct device *dev;
484 	char *buf = val;
485 	int ret;
486 
487 	at24 = priv;
488 	dev = at24_base_client_dev(at24);
489 
490 	if (unlikely(!count))
491 		return -EINVAL;
492 
493 	if (off + count > at24->byte_len)
494 		return -EINVAL;
495 
496 	ret = pm_runtime_resume_and_get(dev);
497 	if (ret)
498 		return ret;
499 	/*
500 	 * Write data to chip, protecting against concurrent updates
501 	 * from this host, but not from other I2C masters.
502 	 */
503 	mutex_lock(&at24->lock);
504 
505 	while (count) {
506 		ret = at24_regmap_write(at24, buf, off, count);
507 		if (ret < 0) {
508 			mutex_unlock(&at24->lock);
509 			pm_runtime_put(dev);
510 			return ret;
511 		}
512 		buf += ret;
513 		off += ret;
514 		count -= ret;
515 	}
516 
517 	mutex_unlock(&at24->lock);
518 
519 	pm_runtime_put(dev);
520 
521 	return 0;
522 }
523 
524 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
525 				  struct i2c_client *base_client,
526 				  struct regmap_config *regmap_config)
527 {
528 	struct i2c_client *dummy_client;
529 	struct regmap *regmap;
530 
531 	dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
532 						 base_client->adapter,
533 						 base_client->addr +
534 						 (index << at24->bank_addr_shift));
535 	if (IS_ERR(dummy_client))
536 		return PTR_ERR(dummy_client);
537 
538 	regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
539 	if (IS_ERR(regmap))
540 		return PTR_ERR(regmap);
541 
542 	at24->client_regmaps[index] = regmap;
543 
544 	return 0;
545 }
546 
547 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
548 {
549 	if (flags & AT24_FLAG_MAC) {
550 		/* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
551 		return 0xa0 - byte_len;
552 	} else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
553 		/*
554 		 * For 16 bit address pointers, the word address must contain
555 		 * a '10' sequence in bits 11 and 10 regardless of the
556 		 * intended position of the address pointer.
557 		 */
558 		return 0x0800;
559 	} else if (flags & AT24_FLAG_SERIAL) {
560 		/*
561 		 * Otherwise the word address must begin with a '10' sequence,
562 		 * regardless of the intended address.
563 		 */
564 		return 0x0080;
565 	} else {
566 		return 0;
567 	}
568 }
569 
570 static void at24_probe_temp_sensor(struct i2c_client *client)
571 {
572 	struct at24_data *at24 = i2c_get_clientdata(client);
573 	struct i2c_board_info info = { .type = "jc42" };
574 	int ret;
575 	u8 val;
576 
577 	/*
578 	 * Byte 2 has value 11 for DDR3, earlier versions don't
579 	 * support the thermal sensor present flag
580 	 */
581 	ret = at24_read(at24, 2, &val, 1);
582 	if (ret || val != 11)
583 		return;
584 
585 	/* Byte 32, bit 7 is set if temp sensor is present */
586 	ret = at24_read(at24, 32, &val, 1);
587 	if (ret || !(val & BIT(7)))
588 		return;
589 
590 	info.addr = 0x18 | (client->addr & 7);
591 
592 	i2c_new_client_device(client->adapter, &info);
593 }
594 
595 static int at24_probe(struct i2c_client *client)
596 {
597 	struct regmap_config regmap_config = { };
598 	struct nvmem_config nvmem_config = { };
599 	u32 byte_len, page_size, flags, addrw;
600 	const struct at24_chip_data *cdata;
601 	struct device *dev = &client->dev;
602 	bool i2c_fn_i2c, i2c_fn_block;
603 	unsigned int i, num_addresses;
604 	struct at24_data *at24;
605 	bool full_power;
606 	struct regmap *regmap;
607 	bool writable;
608 	u8 test_byte;
609 	int err;
610 
611 	i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
612 	i2c_fn_block = i2c_check_functionality(client->adapter,
613 					       I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
614 
615 	cdata = i2c_get_match_data(client);
616 	if (!cdata)
617 		return -ENODEV;
618 
619 	err = device_property_read_u32(dev, "pagesize", &page_size);
620 	if (err)
621 		/*
622 		 * This is slow, but we can't know all eeproms, so we better
623 		 * play safe. Specifying custom eeprom-types via device tree
624 		 * or properties is recommended anyhow.
625 		 */
626 		page_size = 1;
627 
628 	flags = cdata->flags;
629 	if (device_property_present(dev, "read-only"))
630 		flags |= AT24_FLAG_READONLY;
631 	if (device_property_present(dev, "no-read-rollover"))
632 		flags |= AT24_FLAG_NO_RDROL;
633 
634 	err = device_property_read_u32(dev, "address-width", &addrw);
635 	if (!err) {
636 		switch (addrw) {
637 		case 8:
638 			if (flags & AT24_FLAG_ADDR16)
639 				dev_warn(dev,
640 					 "Override address width to be 8, while default is 16\n");
641 			flags &= ~AT24_FLAG_ADDR16;
642 			break;
643 		case 16:
644 			flags |= AT24_FLAG_ADDR16;
645 			break;
646 		default:
647 			dev_warn(dev, "Bad \"address-width\" property: %u\n",
648 				 addrw);
649 		}
650 	}
651 
652 	err = device_property_read_u32(dev, "size", &byte_len);
653 	if (err)
654 		byte_len = cdata->byte_len;
655 
656 	if (!i2c_fn_i2c && !i2c_fn_block)
657 		page_size = 1;
658 
659 	if (!page_size)
660 		return dev_err_probe(dev, -EINVAL, "page_size must not be 0!\n");
661 
662 	if (!is_power_of_2(page_size))
663 		dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
664 
665 	err = device_property_read_u32(dev, "num-addresses", &num_addresses);
666 	if (err) {
667 		if (flags & AT24_FLAG_TAKE8ADDR)
668 			num_addresses = 8;
669 		else
670 			num_addresses =	DIV_ROUND_UP(byte_len,
671 				(flags & AT24_FLAG_ADDR16) ? 65536 : 256);
672 	}
673 
674 	if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC))
675 		return dev_err_probe(dev, -EINVAL,
676 				     "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
677 
678 	regmap_config.val_bits = 8;
679 	regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
680 	regmap_config.disable_locking = true;
681 
682 	regmap = devm_regmap_init_i2c(client, &regmap_config);
683 	if (IS_ERR(regmap))
684 		return PTR_ERR(regmap);
685 
686 	at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
687 			    GFP_KERNEL);
688 	if (!at24)
689 		return -ENOMEM;
690 
691 	mutex_init(&at24->lock);
692 	at24->byte_len = byte_len;
693 	at24->page_size = page_size;
694 	at24->flags = flags;
695 	at24->read_post = cdata->read_post;
696 	at24->bank_addr_shift = cdata->bank_addr_shift;
697 	at24->num_addresses = num_addresses;
698 	at24->offset_adj = at24_get_offset_adj(flags, byte_len);
699 	at24->client_regmaps[0] = regmap;
700 
701 	at24->vcc_reg = devm_regulator_get(dev, "vcc");
702 	if (IS_ERR(at24->vcc_reg))
703 		return PTR_ERR(at24->vcc_reg);
704 
705 	writable = !(flags & AT24_FLAG_READONLY);
706 	if (writable) {
707 		at24->write_max = min_t(unsigned int,
708 					page_size, at24_io_limit);
709 		if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
710 			at24->write_max = I2C_SMBUS_BLOCK_MAX;
711 	}
712 
713 	/* use dummy devices for multiple-address chips */
714 	for (i = 1; i < num_addresses; i++) {
715 		err = at24_make_dummy_client(at24, i, client, &regmap_config);
716 		if (err)
717 			return err;
718 	}
719 
720 	/*
721 	 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
722 	 * label property is set as some platform can have multiple eeproms
723 	 * with same label and we can not register each of those with same
724 	 * label. Failing to register those eeproms trigger cascade failure
725 	 * on such platform.
726 	 */
727 	nvmem_config.id = NVMEM_DEVID_AUTO;
728 
729 	if (device_property_present(dev, "label")) {
730 		err = device_property_read_string(dev, "label",
731 						  &nvmem_config.name);
732 		if (err)
733 			return err;
734 	} else {
735 		nvmem_config.name = dev_name(dev);
736 	}
737 
738 	nvmem_config.type = NVMEM_TYPE_EEPROM;
739 	nvmem_config.dev = dev;
740 	nvmem_config.read_only = !writable;
741 	nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
742 	nvmem_config.owner = THIS_MODULE;
743 	nvmem_config.compat = true;
744 	nvmem_config.base_dev = dev;
745 	nvmem_config.reg_read = at24_read;
746 	nvmem_config.reg_write = at24_write;
747 	nvmem_config.priv = at24;
748 	nvmem_config.stride = 1;
749 	nvmem_config.word_size = 1;
750 	nvmem_config.size = byte_len;
751 
752 	i2c_set_clientdata(client, at24);
753 
754 	full_power = acpi_dev_state_d0(&client->dev);
755 	if (full_power) {
756 		err = regulator_enable(at24->vcc_reg);
757 		if (err)
758 			return dev_err_probe(dev, err, "Failed to enable vcc regulator\n");
759 
760 		pm_runtime_set_active(dev);
761 	}
762 	pm_runtime_enable(dev);
763 
764 	/*
765 	 * Perform a one-byte test read to verify that the chip is functional,
766 	 * unless powering on the device is to be avoided during probe (i.e.
767 	 * it's powered off right now).
768 	 */
769 	if (full_power) {
770 		err = at24_read(at24, 0, &test_byte, 1);
771 		if (err) {
772 			pm_runtime_disable(dev);
773 			if (!pm_runtime_status_suspended(dev))
774 				regulator_disable(at24->vcc_reg);
775 			return -ENODEV;
776 		}
777 	}
778 
779 	at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
780 	if (IS_ERR(at24->nvmem)) {
781 		pm_runtime_disable(dev);
782 		if (!pm_runtime_status_suspended(dev))
783 			regulator_disable(at24->vcc_reg);
784 		return dev_err_probe(dev, PTR_ERR(at24->nvmem),
785 				     "failed to register nvmem\n");
786 	}
787 
788 	/* If this a SPD EEPROM, probe for DDR3 thermal sensor */
789 	if (cdata == &at24_data_spd)
790 		at24_probe_temp_sensor(client);
791 
792 	pm_runtime_idle(dev);
793 
794 	if (writable)
795 		dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
796 			 byte_len, client->name, at24->write_max);
797 	else
798 		dev_info(dev, "%u byte %s EEPROM, read-only\n",
799 			 byte_len, client->name);
800 
801 	return 0;
802 }
803 
804 static void at24_remove(struct i2c_client *client)
805 {
806 	struct at24_data *at24 = i2c_get_clientdata(client);
807 
808 	pm_runtime_disable(&client->dev);
809 	if (acpi_dev_state_d0(&client->dev)) {
810 		if (!pm_runtime_status_suspended(&client->dev))
811 			regulator_disable(at24->vcc_reg);
812 		pm_runtime_set_suspended(&client->dev);
813 	}
814 }
815 
816 static int __maybe_unused at24_suspend(struct device *dev)
817 {
818 	struct i2c_client *client = to_i2c_client(dev);
819 	struct at24_data *at24 = i2c_get_clientdata(client);
820 
821 	return regulator_disable(at24->vcc_reg);
822 }
823 
824 static int __maybe_unused at24_resume(struct device *dev)
825 {
826 	struct i2c_client *client = to_i2c_client(dev);
827 	struct at24_data *at24 = i2c_get_clientdata(client);
828 
829 	return regulator_enable(at24->vcc_reg);
830 }
831 
832 static const struct dev_pm_ops at24_pm_ops = {
833 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
834 				pm_runtime_force_resume)
835 	SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
836 };
837 
838 static struct i2c_driver at24_driver = {
839 	.driver = {
840 		.name = "at24",
841 		.pm = &at24_pm_ops,
842 		.of_match_table = at24_of_match,
843 		.acpi_match_table = at24_acpi_ids,
844 	},
845 	.probe = at24_probe,
846 	.remove = at24_remove,
847 	.id_table = at24_ids,
848 	.flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
849 };
850 
851 static int __init at24_init(void)
852 {
853 	if (!at24_io_limit) {
854 		pr_err("at24: at24_io_limit must not be 0!\n");
855 		return -EINVAL;
856 	}
857 
858 	at24_io_limit = rounddown_pow_of_two(at24_io_limit);
859 	return i2c_add_driver(&at24_driver);
860 }
861 module_init(at24_init);
862 
863 static void __exit at24_exit(void)
864 {
865 	i2c_del_driver(&at24_driver);
866 }
867 module_exit(at24_exit);
868 
869 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
870 MODULE_AUTHOR("David Brownell and Wolfram Sang");
871 MODULE_LICENSE("GPL");
872